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authorAlan Cox <alan@lxorguk.ukuu.org.uk>2006-06-28 07:27:03 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2006-06-28 17:59:07 -0400
commit57e834e2fb0590b4bf9ecffa4d5c87b6f44c5b6b (patch)
treed7889213b6275f6da772a8890ac2d0e17e993ee7 /drivers/ide
parentf201f5046ddaeeccb036bdf6848549bf5cb51bb1 (diff)
[PATCH] ide: clean up pdc202xx_old so its more readable (done so I could work on libata ports)
Also sets the new fifo flag so that we don't hang on some errors with this chipset. Signed-off-by: Alan Cox <alan@redhat.com> Cc: Bartlomiej Zolnierkiewicz <B.Zolnierkiewicz@elka.pw.edu.pl> Cc: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'drivers/ide')
-rw-r--r--drivers/ide/pci/pdc202xx_old.c115
1 files changed, 5 insertions, 110 deletions
diff --git a/drivers/ide/pci/pdc202xx_old.c b/drivers/ide/pci/pdc202xx_old.c
index 22d17548ecdb..26bc688a1821 100644
--- a/drivers/ide/pci/pdc202xx_old.c
+++ b/drivers/ide/pci/pdc202xx_old.c
@@ -101,31 +101,6 @@ static const char *pdc_quirk_drives[] = {
101#define MC1 0x02 /* DMA"C" timing */ 101#define MC1 0x02 /* DMA"C" timing */
102#define MC0 0x01 /* DMA"C" timing */ 102#define MC0 0x01 /* DMA"C" timing */
103 103
104#if 0
105 unsigned long bibma = pci_resource_start(dev, 4);
106 u8 hi = 0, lo = 0;
107
108 u8 sc1c = inb_p((u16)bibma + 0x1c);
109 u8 sc1e = inb_p((u16)bibma + 0x1e);
110 u8 sc1f = inb_p((u16)bibma + 0x1f);
111
112 p += sprintf(p, "Host Mode : %s\n",
113 (sc1f & 0x08) ? "Tri-Stated" : "Normal");
114 p += sprintf(p, "Bus Clocking : %s\n",
115 ((sc1f & 0xC0) == 0xC0) ? "100 External" :
116 ((sc1f & 0x80) == 0x80) ? "66 External" :
117 ((sc1f & 0x40) == 0x40) ? "33 External" : "33 PCI Internal");
118 p += sprintf(p, "IO pad select : %s mA\n",
119 ((sc1c & 0x03) == 0x03) ? "10" :
120 ((sc1c & 0x02) == 0x02) ? "8" :
121 ((sc1c & 0x01) == 0x01) ? "6" :
122 ((sc1c & 0x00) == 0x00) ? "4" : "??");
123 hi = sc1e >> 4;
124 lo = sc1e & 0xf;
125 p += sprintf(p, "Status Polling Period : %d\n", hi);
126 p += sprintf(p, "Interrupt Check Status Polling Delay : %d\n", lo);
127#endif
128
129static u8 pdc202xx_ratemask (ide_drive_t *drive) 104static u8 pdc202xx_ratemask (ide_drive_t *drive)
130{ 105{
131 u8 mode; 106 u8 mode;
@@ -505,42 +480,13 @@ static void pdc202xx_reset (ide_drive_t *drive)
505 480
506 pdc202xx_reset_host(hwif); 481 pdc202xx_reset_host(hwif);
507 pdc202xx_reset_host(mate); 482 pdc202xx_reset_host(mate);
508#if 0
509 /*
510 * FIXME: Have to kick all the drives again :-/
511 * What a pain in the ACE!
512 */
513 if (hwif->present) {
514 u16 hunit = 0;
515 for (hunit = 0; hunit < MAX_DRIVES; ++hunit) {
516 ide_drive_t *hdrive = &hwif->drives[hunit];
517 if (hdrive->present) {
518 if (hwif->ide_dma_check)
519 hwif->ide_dma_check(hdrive);
520 else
521 hwif->tuneproc(hdrive, 5);
522 }
523 }
524 }
525 if (mate->present) {
526 u16 munit = 0;
527 for (munit = 0; munit < MAX_DRIVES; ++munit) {
528 ide_drive_t *mdrive = &mate->drives[munit];
529 if (mdrive->present) {
530 if (mate->ide_dma_check)
531 mate->ide_dma_check(mdrive);
532 else
533 mate->tuneproc(mdrive, 5);
534 }
535 }
536 }
537#else
538 hwif->tuneproc(drive, 5); 483 hwif->tuneproc(drive, 5);
539#endif
540} 484}
541 485
542static unsigned int __devinit init_chipset_pdc202xx(struct pci_dev *dev, const char *name) 486static unsigned int __devinit init_chipset_pdc202xx(struct pci_dev *dev,
487 const char *name)
543{ 488{
489 /* This doesn't appear needed */
544 if (dev->resource[PCI_ROM_RESOURCE].start) { 490 if (dev->resource[PCI_ROM_RESOURCE].start) {
545 pci_write_config_dword(dev, PCI_ROM_ADDRESS, 491 pci_write_config_dword(dev, PCI_ROM_ADDRESS,
546 dev->resource[PCI_ROM_RESOURCE].start | PCI_ROM_ADDRESS_ENABLE); 492 dev->resource[PCI_ROM_RESOURCE].start | PCI_ROM_ADDRESS_ENABLE);
@@ -548,30 +494,6 @@ static unsigned int __devinit init_chipset_pdc202xx(struct pci_dev *dev, const c
548 name, dev->resource[PCI_ROM_RESOURCE].start); 494 name, dev->resource[PCI_ROM_RESOURCE].start);
549 } 495 }
550 496
551 /*
552 * software reset - this is required because the bios
553 * will set UDMA timing on if the hdd supports it. The
554 * user may want to turn udma off. A bug in the pdc20262
555 * is that it cannot handle a downgrade in timing from
556 * UDMA to DMA. Disk accesses after issuing a set
557 * feature command will result in errors. A software
558 * reset leaves the timing registers intact,
559 * but resets the drives.
560 */
561#if 0
562 if ((dev->device == PCI_DEVICE_ID_PROMISE_20267) ||
563 (dev->device == PCI_DEVICE_ID_PROMISE_20265) ||
564 (dev->device == PCI_DEVICE_ID_PROMISE_20263) ||
565 (dev->device == PCI_DEVICE_ID_PROMISE_20262)) {
566 unsigned long high_16 = pci_resource_start(dev, 4);
567 byte udma_speed_flag = inb(high_16 + 0x001f);
568 outb(udma_speed_flag | 0x10, high_16 + 0x001f);
569 mdelay(100);
570 outb(udma_speed_flag & ~0x10, high_16 + 0x001f);
571 mdelay(2000); /* 2 seconds ?! */
572 }
573
574#endif
575 return dev->irq; 497 return dev->irq;
576} 498}
577 499
@@ -599,6 +521,8 @@ static void __devinit init_hwif_pdc202xx(ide_hwif_t *hwif)
599 hwif->mwdma_mask = 0x07; 521 hwif->mwdma_mask = 0x07;
600 hwif->swdma_mask = 0x07; 522 hwif->swdma_mask = 0x07;
601 523
524 hwif->err_stops_fifo = 1;
525
602 hwif->ide_dma_check = &pdc202xx_config_drive_xfer_rate; 526 hwif->ide_dma_check = &pdc202xx_config_drive_xfer_rate;
603 hwif->ide_dma_lostirq = &pdc202xx_ide_dma_lostirq; 527 hwif->ide_dma_lostirq = &pdc202xx_ide_dma_lostirq;
604 hwif->ide_dma_timeout = &pdc202xx_ide_dma_timeout; 528 hwif->ide_dma_timeout = &pdc202xx_ide_dma_timeout;
@@ -687,19 +611,6 @@ static int __devinit init_setup_pdc202ata4(struct pci_dev *dev,
687 "mirror fixed.\n", d->name); 611 "mirror fixed.\n", d->name);
688 } 612 }
689 } 613 }
690
691#if 0
692 if (dev->device == PCI_DEVICE_ID_PROMISE_20262)
693 if (e->reg && (pci_read_config_byte(dev, e->reg, &tmp) ||
694 (tmp & e->mask) != e->val))
695
696 if (d->enablebits[0].reg != d->enablebits[1].reg) {
697 d->enablebits[0].reg = d->enablebits[1].reg;
698 d->enablebits[0].mask = d->enablebits[1].mask;
699 d->enablebits[0].val = d->enablebits[1].val;
700 }
701#endif
702
703 return ide_setup_pci_device(dev, d); 614 return ide_setup_pci_device(dev, d);
704} 615}
705 616
@@ -714,22 +625,6 @@ static int __devinit init_setup_pdc20265(struct pci_dev *dev,
714 "attached to I2O RAID controller.\n"); 625 "attached to I2O RAID controller.\n");
715 return -ENODEV; 626 return -ENODEV;
716 } 627 }
717
718#if 0
719 {
720 u8 pri = 0, sec = 0;
721
722 if (e->reg && (pci_read_config_byte(dev, e->reg, &tmp) ||
723 (tmp & e->mask) != e->val))
724
725 if (d->enablebits[0].reg != d->enablebits[1].reg) {
726 d->enablebits[0].reg = d->enablebits[1].reg;
727 d->enablebits[0].mask = d->enablebits[1].mask;
728 d->enablebits[0].val = d->enablebits[1].val;
729 }
730 }
731#endif
732
733 return ide_setup_pci_device(dev, d); 628 return ide_setup_pci_device(dev, d);
734} 629}
735 630