aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/ide
diff options
context:
space:
mode:
authorSergei Shtylyov <sshtylyov@ru.mvista.com>2007-02-16 20:40:22 -0500
committerBartlomiej Zolnierkiewicz <bzolnier@gmail.com>2007-02-16 20:40:22 -0500
commitea266ba1591d28889645a245e1df6f889c574640 (patch)
tree71bff303517c720ad9022c47716481c863f7bbc2 /drivers/ide
parentfed21641be7b31338dcf6753ef7f8a396242a410 (diff)
sl82c105: DMA support fixes
Fix a number of issues with the DMA support code: - driver claims support for all SW/MW DMA modes while supporting only MWDMA2; - ide_dma_check() method tries to enable DMA on the "known good" drives which don't support MWDMA2; - ide_dma_on() method upon failure to set drive to MWDMA2 re-tunes already tuned PIO mode and calls ide_dma_off() method instead of returning error; - ide_dma_off() method sets drive->current_speed while it doesn't actually change (only the PIO timings are re-loaded into the chip's registers); - init_hwif() method forcibly sets/resets both "drive DMA capable" bits while this is properly handled by ide_dma_{on,off}() methods being called later... Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Diffstat (limited to 'drivers/ide')
-rw-r--r--drivers/ide/pci/sl82c105.c18
1 files changed, 4 insertions, 14 deletions
diff --git a/drivers/ide/pci/sl82c105.c b/drivers/ide/pci/sl82c105.c
index 170a26199050..1cb8afe9cb3c 100644
--- a/drivers/ide/pci/sl82c105.c
+++ b/drivers/ide/pci/sl82c105.c
@@ -164,7 +164,7 @@ static int sl82c105_check_drive (ide_drive_t *drive)
164 return hwif->ide_dma_on(drive); 164 return hwif->ide_dma_on(drive);
165 } 165 }
166 166
167 if (__ide_dma_good_drive(drive)) 167 if (__ide_dma_good_drive(drive) && id->eide_dma_time < 150)
168 return hwif->ide_dma_on(drive); 168 return hwif->ide_dma_on(drive);
169 } while (0); 169 } while (0);
170 170
@@ -259,10 +259,8 @@ static int sl82c105_ide_dma_on (ide_drive_t *drive)
259{ 259{
260 DBG(("sl82c105_ide_dma_on(drive:%s)\n", drive->name)); 260 DBG(("sl82c105_ide_dma_on(drive:%s)\n", drive->name));
261 261
262 if (config_for_dma(drive)) { 262 if (config_for_dma(drive))
263 config_for_pio(drive, 4, 0, 0); 263 return 1;
264 return HWIF(drive)->ide_dma_off_quietly(drive);
265 }
266 printk(KERN_INFO "%s: DMA enabled\n", drive->name); 264 printk(KERN_INFO "%s: DMA enabled\n", drive->name);
267 return __ide_dma_on(drive); 265 return __ide_dma_on(drive);
268} 266}
@@ -278,7 +276,6 @@ static int sl82c105_ide_dma_off_quietly (ide_drive_t *drive)
278 if (drive->pio_speed) 276 if (drive->pio_speed)
279 speed = drive->pio_speed - XFER_PIO_0; 277 speed = drive->pio_speed - XFER_PIO_0;
280 config_for_pio(drive, speed, 0, 1); 278 config_for_pio(drive, speed, 0, 1);
281 drive->current_speed = drive->pio_speed;
282 279
283 return rc; 280 return rc;
284} 281}
@@ -401,11 +398,9 @@ static unsigned int __devinit init_chipset_sl82c105(struct pci_dev *dev, const c
401/* 398/*
402 * Initialise the chip 399 * Initialise the chip
403 */ 400 */
404
405static void __devinit init_hwif_sl82c105(ide_hwif_t *hwif) 401static void __devinit init_hwif_sl82c105(ide_hwif_t *hwif)
406{ 402{
407 unsigned int rev; 403 unsigned int rev;
408 u8 dma_state;
409 404
410 DBG(("init_hwif_sl82c105(hwif: ide%d)\n", hwif->index)); 405 DBG(("init_hwif_sl82c105(hwif: ide%d)\n", hwif->index));
411 406
@@ -431,7 +426,6 @@ static void __devinit init_hwif_sl82c105(ide_hwif_t *hwif)
431 if (!hwif->dma_base) 426 if (!hwif->dma_base)
432 return; 427 return;
433 428
434 dma_state = hwif->INB(hwif->dma_base + 2) & ~0x60;
435 rev = sl82c105_bridge_revision(hwif->pci_dev); 429 rev = sl82c105_bridge_revision(hwif->pci_dev);
436 if (rev <= 5) { 430 if (rev <= 5) {
437 /* 431 /*
@@ -441,11 +435,8 @@ static void __devinit init_hwif_sl82c105(ide_hwif_t *hwif)
441 printk(" %s: Winbond 553 bridge revision %d, BM-DMA disabled\n", 435 printk(" %s: Winbond 553 bridge revision %d, BM-DMA disabled\n",
442 hwif->name, rev); 436 hwif->name, rev);
443 } else { 437 } else {
444 dma_state |= 0x60;
445
446 hwif->atapi_dma = 1; 438 hwif->atapi_dma = 1;
447 hwif->mwdma_mask = 0x07; 439 hwif->mwdma_mask = 0x04;
448 hwif->swdma_mask = 0x07;
449 440
450 hwif->ide_dma_check = &sl82c105_check_drive; 441 hwif->ide_dma_check = &sl82c105_check_drive;
451 hwif->ide_dma_on = &sl82c105_ide_dma_on; 442 hwif->ide_dma_on = &sl82c105_ide_dma_on;
@@ -462,7 +453,6 @@ static void __devinit init_hwif_sl82c105(ide_hwif_t *hwif)
462 if (hwif->mate) 453 if (hwif->mate)
463 hwif->serialized = hwif->mate->serialized = 1; 454 hwif->serialized = hwif->mate->serialized = 1;
464 } 455 }
465 hwif->OUTB(dma_state, hwif->dma_base + 2);
466} 456}
467 457
468static ide_pci_device_t sl82c105_chipset __devinitdata = { 458static ide_pci_device_t sl82c105_chipset __devinitdata = {