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authorSergei Shtylyov <sshtylyov@ru.mvista.com>2009-06-15 12:52:56 -0400
committerBartlomiej Zolnierkiewicz <bzolnier@gmail.com>2009-06-15 12:52:56 -0400
commit30e5ffc368ff7d96fbc7a51ede10809642b0a6df (patch)
tree35a4f6d2c96bffa01560c9ec48a51c8ce7b2615c /drivers/ide
parent53b987d5e7e8d5be3b84522149907fa7ac95526e (diff)
cmd64x: implement clear_irq() method (take 2)
Convert the driver's two dma_end() methods into clear_irq() methods -- the driver will now use the standard dma_end() method implementation, ide_dma_end(). Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Diffstat (limited to 'drivers/ide')
-rw-r--r--drivers/ide/cmd64x.c34
1 files changed, 19 insertions, 15 deletions
diff --git a/drivers/ide/cmd64x.c b/drivers/ide/cmd64x.c
index 80b777e4247b..9f5cde7a731a 100644
--- a/drivers/ide/cmd64x.c
+++ b/drivers/ide/cmd64x.c
@@ -7,7 +7,7 @@
7 * Copyright (C) 1998 David S. Miller (davem@redhat.com) 7 * Copyright (C) 1998 David S. Miller (davem@redhat.com)
8 * 8 *
9 * Copyright (C) 1999-2002 Andre Hedrick <andre@linux-ide.org> 9 * Copyright (C) 1999-2002 Andre Hedrick <andre@linux-ide.org>
10 * Copyright (C) 2007 MontaVista Software, Inc. <source@mvista.com> 10 * Copyright (C) 2007,2009 MontaVista Software, Inc. <source@mvista.com>
11 */ 11 */
12 12
13#include <linux/module.h> 13#include <linux/module.h>
@@ -226,11 +226,11 @@ static void cmd64x_set_dma_mode(ide_drive_t *drive, const u8 speed)
226 (void) pci_write_config_byte(dev, pciU, regU); 226 (void) pci_write_config_byte(dev, pciU, regU);
227} 227}
228 228
229static int cmd648_dma_end(ide_drive_t *drive) 229static void cmd648_clear_irq(ide_drive_t *drive)
230{ 230{
231 ide_hwif_t *hwif = drive->hwif; 231 ide_hwif_t *hwif = drive->hwif;
232 unsigned long base = hwif->dma_base - (hwif->channel * 8); 232 struct pci_dev *dev = to_pci_dev(hwif->dev);
233 int err = ide_dma_end(drive); 233 unsigned long base = pci_resource_start(dev, 4);
234 u8 irq_mask = hwif->channel ? MRDMODE_INTR_CH1 : 234 u8 irq_mask = hwif->channel ? MRDMODE_INTR_CH1 :
235 MRDMODE_INTR_CH0; 235 MRDMODE_INTR_CH0;
236 u8 mrdmode = inb(base + 1); 236 u8 mrdmode = inb(base + 1);
@@ -238,11 +238,9 @@ static int cmd648_dma_end(ide_drive_t *drive)
238 /* clear the interrupt bit */ 238 /* clear the interrupt bit */
239 outb((mrdmode & ~(MRDMODE_INTR_CH0 | MRDMODE_INTR_CH1)) | irq_mask, 239 outb((mrdmode & ~(MRDMODE_INTR_CH0 | MRDMODE_INTR_CH1)) | irq_mask,
240 base + 1); 240 base + 1);
241
242 return err;
243} 241}
244 242
245static int cmd64x_dma_end(ide_drive_t *drive) 243static void cmd64x_clear_irq(ide_drive_t *drive)
246{ 244{
247 ide_hwif_t *hwif = drive->hwif; 245 ide_hwif_t *hwif = drive->hwif;
248 struct pci_dev *dev = to_pci_dev(hwif->dev); 246 struct pci_dev *dev = to_pci_dev(hwif->dev);
@@ -250,13 +248,10 @@ static int cmd64x_dma_end(ide_drive_t *drive)
250 u8 irq_mask = hwif->channel ? ARTTIM23_INTR_CH1 : 248 u8 irq_mask = hwif->channel ? ARTTIM23_INTR_CH1 :
251 CFR_INTR_CH0; 249 CFR_INTR_CH0;
252 u8 irq_stat = 0; 250 u8 irq_stat = 0;
253 int err = ide_dma_end(drive);
254 251
255 (void) pci_read_config_byte(dev, irq_reg, &irq_stat); 252 (void) pci_read_config_byte(dev, irq_reg, &irq_stat);
256 /* clear the interrupt bit */ 253 /* clear the interrupt bit */
257 (void) pci_write_config_byte(dev, irq_reg, irq_stat | irq_mask); 254 (void) pci_write_config_byte(dev, irq_reg, irq_stat | irq_mask);
258
259 return err;
260} 255}
261 256
262static int cmd648_dma_test_irq(ide_drive_t *drive) 257static int cmd648_dma_test_irq(ide_drive_t *drive)
@@ -370,6 +365,14 @@ static u8 cmd64x_cable_detect(ide_hwif_t *hwif)
370static const struct ide_port_ops cmd64x_port_ops = { 365static const struct ide_port_ops cmd64x_port_ops = {
371 .set_pio_mode = cmd64x_set_pio_mode, 366 .set_pio_mode = cmd64x_set_pio_mode,
372 .set_dma_mode = cmd64x_set_dma_mode, 367 .set_dma_mode = cmd64x_set_dma_mode,
368 .clear_irq = cmd64x_clear_irq,
369 .cable_detect = cmd64x_cable_detect,
370};
371
372static const struct ide_port_ops cmd648_port_ops = {
373 .set_pio_mode = cmd64x_set_pio_mode,
374 .set_dma_mode = cmd64x_set_dma_mode,
375 .clear_irq = cmd648_clear_irq,
373 .cable_detect = cmd64x_cable_detect, 376 .cable_detect = cmd64x_cable_detect,
374}; 377};
375 378
@@ -377,7 +380,7 @@ static const struct ide_dma_ops cmd64x_dma_ops = {
377 .dma_host_set = ide_dma_host_set, 380 .dma_host_set = ide_dma_host_set,
378 .dma_setup = ide_dma_setup, 381 .dma_setup = ide_dma_setup,
379 .dma_start = ide_dma_start, 382 .dma_start = ide_dma_start,
380 .dma_end = cmd64x_dma_end, 383 .dma_end = ide_dma_end,
381 .dma_test_irq = cmd64x_dma_test_irq, 384 .dma_test_irq = cmd64x_dma_test_irq,
382 .dma_lost_irq = ide_dma_lost_irq, 385 .dma_lost_irq = ide_dma_lost_irq,
383 .dma_timer_expiry = ide_dma_sff_timer_expiry, 386 .dma_timer_expiry = ide_dma_sff_timer_expiry,
@@ -399,7 +402,7 @@ static const struct ide_dma_ops cmd648_dma_ops = {
399 .dma_host_set = ide_dma_host_set, 402 .dma_host_set = ide_dma_host_set,
400 .dma_setup = ide_dma_setup, 403 .dma_setup = ide_dma_setup,
401 .dma_start = ide_dma_start, 404 .dma_start = ide_dma_start,
402 .dma_end = cmd648_dma_end, 405 .dma_end = ide_dma_end,
403 .dma_test_irq = cmd648_dma_test_irq, 406 .dma_test_irq = cmd648_dma_test_irq,
404 .dma_lost_irq = ide_dma_lost_irq, 407 .dma_lost_irq = ide_dma_lost_irq,
405 .dma_timer_expiry = ide_dma_sff_timer_expiry, 408 .dma_timer_expiry = ide_dma_sff_timer_expiry,
@@ -423,7 +426,7 @@ static const struct ide_port_info cmd64x_chipsets[] __devinitdata = {
423 .name = DRV_NAME, 426 .name = DRV_NAME,
424 .init_chipset = init_chipset_cmd64x, 427 .init_chipset = init_chipset_cmd64x,
425 .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}}, 428 .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}},
426 .port_ops = &cmd64x_port_ops, 429 .port_ops = &cmd648_port_ops,
427 .dma_ops = &cmd648_dma_ops, 430 .dma_ops = &cmd648_dma_ops,
428 .host_flags = IDE_HFLAG_SERIALIZE | 431 .host_flags = IDE_HFLAG_SERIALIZE |
429 IDE_HFLAG_ABUSE_PREFETCH, 432 IDE_HFLAG_ABUSE_PREFETCH,
@@ -435,7 +438,7 @@ static const struct ide_port_info cmd64x_chipsets[] __devinitdata = {
435 .name = DRV_NAME, 438 .name = DRV_NAME,
436 .init_chipset = init_chipset_cmd64x, 439 .init_chipset = init_chipset_cmd64x,
437 .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}}, 440 .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}},
438 .port_ops = &cmd64x_port_ops, 441 .port_ops = &cmd648_port_ops,
439 .dma_ops = &cmd648_dma_ops, 442 .dma_ops = &cmd648_dma_ops,
440 .host_flags = IDE_HFLAG_ABUSE_PREFETCH, 443 .host_flags = IDE_HFLAG_ABUSE_PREFETCH,
441 .pio_mask = ATA_PIO5, 444 .pio_mask = ATA_PIO5,
@@ -446,7 +449,7 @@ static const struct ide_port_info cmd64x_chipsets[] __devinitdata = {
446 .name = DRV_NAME, 449 .name = DRV_NAME,
447 .init_chipset = init_chipset_cmd64x, 450 .init_chipset = init_chipset_cmd64x,
448 .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}}, 451 .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}},
449 .port_ops = &cmd64x_port_ops, 452 .port_ops = &cmd648_port_ops,
450 .dma_ops = &cmd648_dma_ops, 453 .dma_ops = &cmd648_dma_ops,
451 .host_flags = IDE_HFLAG_ABUSE_PREFETCH, 454 .host_flags = IDE_HFLAG_ABUSE_PREFETCH,
452 .pio_mask = ATA_PIO5, 455 .pio_mask = ATA_PIO5,
@@ -484,6 +487,7 @@ static int __devinit cmd64x_init_one(struct pci_dev *dev, const struct pci_devic
484 */ 487 */
485 if (dev->revision < 3) { 488 if (dev->revision < 3) {
486 d.enablebits[0].reg = 0; 489 d.enablebits[0].reg = 0;
490 d.port_ops = &cmd64x_port_ops;
487 if (dev->revision == 1) 491 if (dev->revision == 1)
488 d.dma_ops = &cmd646_rev1_dma_ops; 492 d.dma_ops = &cmd646_rev1_dma_ops;
489 else 493 else