aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/ide/ppc/pmac.c
diff options
context:
space:
mode:
authorJon Loeliger <linuxppc@jdl.com>2005-09-17 11:36:54 -0400
committerPaul Mackerras <paulus@samba.org>2005-09-18 19:38:49 -0400
commitaacaf9bd9646f6f611a08fca976411b6e5ddefe2 (patch)
tree604853646cc176c0a0908db39f254285121fa50c /drivers/ide/ppc/pmac.c
parentf495a8bfd6a52cf32859f93d5320bb234d8a9560 (diff)
[PATCH] powerpc: Remove sections use from ppc64 and drivers
Here is a new patch that removes all notion of the pmac, prep, chrp and openfirmware initialization sections, and then unifies the sections.h files without those __pmac, etc, sections identifiers cluttering things up. Signed-off-by: Jon Loeliger <jdl@freescale.com> Signed-off-by: Kumar Gala <kumar.gala@freescale.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'drivers/ide/ppc/pmac.c')
-rw-r--r--drivers/ide/ppc/pmac.c80
1 files changed, 40 insertions, 40 deletions
diff --git a/drivers/ide/ppc/pmac.c b/drivers/ide/ppc/pmac.c
index 87d1f8a1f41e..d8c3d8ebad30 100644
--- a/drivers/ide/ppc/pmac.c
+++ b/drivers/ide/ppc/pmac.c
@@ -81,7 +81,7 @@ typedef struct pmac_ide_hwif {
81 81
82} pmac_ide_hwif_t; 82} pmac_ide_hwif_t;
83 83
84static pmac_ide_hwif_t pmac_ide[MAX_HWIFS] __pmacdata; 84static pmac_ide_hwif_t pmac_ide[MAX_HWIFS];
85static int pmac_ide_count; 85static int pmac_ide_count;
86 86
87enum { 87enum {
@@ -242,7 +242,7 @@ struct mdma_timings_t {
242 int cycleTime; 242 int cycleTime;
243}; 243};
244 244
245struct mdma_timings_t mdma_timings_33[] __pmacdata = 245struct mdma_timings_t mdma_timings_33[] =
246{ 246{
247 { 240, 240, 480 }, 247 { 240, 240, 480 },
248 { 180, 180, 360 }, 248 { 180, 180, 360 },
@@ -255,7 +255,7 @@ struct mdma_timings_t mdma_timings_33[] __pmacdata =
255 { 0, 0, 0 } 255 { 0, 0, 0 }
256}; 256};
257 257
258struct mdma_timings_t mdma_timings_33k[] __pmacdata = 258struct mdma_timings_t mdma_timings_33k[] =
259{ 259{
260 { 240, 240, 480 }, 260 { 240, 240, 480 },
261 { 180, 180, 360 }, 261 { 180, 180, 360 },
@@ -268,7 +268,7 @@ struct mdma_timings_t mdma_timings_33k[] __pmacdata =
268 { 0, 0, 0 } 268 { 0, 0, 0 }
269}; 269};
270 270
271struct mdma_timings_t mdma_timings_66[] __pmacdata = 271struct mdma_timings_t mdma_timings_66[] =
272{ 272{
273 { 240, 240, 480 }, 273 { 240, 240, 480 },
274 { 180, 180, 360 }, 274 { 180, 180, 360 },
@@ -286,7 +286,7 @@ struct {
286 int addrSetup; /* ??? */ 286 int addrSetup; /* ??? */
287 int rdy2pause; 287 int rdy2pause;
288 int wrDataSetup; 288 int wrDataSetup;
289} kl66_udma_timings[] __pmacdata = 289} kl66_udma_timings[] =
290{ 290{
291 { 0, 180, 120 }, /* Mode 0 */ 291 { 0, 180, 120 }, /* Mode 0 */
292 { 0, 150, 90 }, /* 1 */ 292 { 0, 150, 90 }, /* 1 */
@@ -301,7 +301,7 @@ struct kauai_timing {
301 u32 timing_reg; 301 u32 timing_reg;
302}; 302};
303 303
304static struct kauai_timing kauai_pio_timings[] __pmacdata = 304static struct kauai_timing kauai_pio_timings[] =
305{ 305{
306 { 930 , 0x08000fff }, 306 { 930 , 0x08000fff },
307 { 600 , 0x08000a92 }, 307 { 600 , 0x08000a92 },
@@ -316,7 +316,7 @@ static struct kauai_timing kauai_pio_timings[] __pmacdata =
316 { 120 , 0x04000148 } 316 { 120 , 0x04000148 }
317}; 317};
318 318
319static struct kauai_timing kauai_mdma_timings[] __pmacdata = 319static struct kauai_timing kauai_mdma_timings[] =
320{ 320{
321 { 1260 , 0x00fff000 }, 321 { 1260 , 0x00fff000 },
322 { 480 , 0x00618000 }, 322 { 480 , 0x00618000 },
@@ -330,7 +330,7 @@ static struct kauai_timing kauai_mdma_timings[] __pmacdata =
330 { 0 , 0 }, 330 { 0 , 0 },
331}; 331};
332 332
333static struct kauai_timing kauai_udma_timings[] __pmacdata = 333static struct kauai_timing kauai_udma_timings[] =
334{ 334{
335 { 120 , 0x000070c0 }, 335 { 120 , 0x000070c0 },
336 { 90 , 0x00005d80 }, 336 { 90 , 0x00005d80 },
@@ -341,7 +341,7 @@ static struct kauai_timing kauai_udma_timings[] __pmacdata =
341 { 0 , 0 }, 341 { 0 , 0 },
342}; 342};
343 343
344static struct kauai_timing shasta_pio_timings[] __pmacdata = 344static struct kauai_timing shasta_pio_timings[] =
345{ 345{
346 { 930 , 0x08000fff }, 346 { 930 , 0x08000fff },
347 { 600 , 0x0A000c97 }, 347 { 600 , 0x0A000c97 },
@@ -356,7 +356,7 @@ static struct kauai_timing shasta_pio_timings[] __pmacdata =
356 { 120 , 0x0400010a } 356 { 120 , 0x0400010a }
357}; 357};
358 358
359static struct kauai_timing shasta_mdma_timings[] __pmacdata = 359static struct kauai_timing shasta_mdma_timings[] =
360{ 360{
361 { 1260 , 0x00fff000 }, 361 { 1260 , 0x00fff000 },
362 { 480 , 0x00820800 }, 362 { 480 , 0x00820800 },
@@ -370,7 +370,7 @@ static struct kauai_timing shasta_mdma_timings[] __pmacdata =
370 { 0 , 0 }, 370 { 0 , 0 },
371}; 371};
372 372
373static struct kauai_timing shasta_udma133_timings[] __pmacdata = 373static struct kauai_timing shasta_udma133_timings[] =
374{ 374{
375 { 120 , 0x00035901, }, 375 { 120 , 0x00035901, },
376 { 90 , 0x000348b1, }, 376 { 90 , 0x000348b1, },
@@ -522,7 +522,7 @@ pmu_hd_blink_init(void)
522 * N.B. this can't be an initfunc, because the media-bay task can 522 * N.B. this can't be an initfunc, because the media-bay task can
523 * call ide_[un]register at any time. 523 * call ide_[un]register at any time.
524 */ 524 */
525void __pmac 525void
526pmac_ide_init_hwif_ports(hw_regs_t *hw, 526pmac_ide_init_hwif_ports(hw_regs_t *hw,
527 unsigned long data_port, unsigned long ctrl_port, 527 unsigned long data_port, unsigned long ctrl_port,
528 int *irq) 528 int *irq)
@@ -559,7 +559,7 @@ pmac_ide_init_hwif_ports(hw_regs_t *hw,
559 * timing register when selecting that unit. This version is for 559 * timing register when selecting that unit. This version is for
560 * ASICs with a single timing register 560 * ASICs with a single timing register
561 */ 561 */
562static void __pmac 562static void
563pmac_ide_selectproc(ide_drive_t *drive) 563pmac_ide_selectproc(ide_drive_t *drive)
564{ 564{
565 pmac_ide_hwif_t* pmif = (pmac_ide_hwif_t *)HWIF(drive)->hwif_data; 565 pmac_ide_hwif_t* pmif = (pmac_ide_hwif_t *)HWIF(drive)->hwif_data;
@@ -579,7 +579,7 @@ pmac_ide_selectproc(ide_drive_t *drive)
579 * timing register when selecting that unit. This version is for 579 * timing register when selecting that unit. This version is for
580 * ASICs with a dual timing register (Kauai) 580 * ASICs with a dual timing register (Kauai)
581 */ 581 */
582static void __pmac 582static void
583pmac_ide_kauai_selectproc(ide_drive_t *drive) 583pmac_ide_kauai_selectproc(ide_drive_t *drive)
584{ 584{
585 pmac_ide_hwif_t* pmif = (pmac_ide_hwif_t *)HWIF(drive)->hwif_data; 585 pmac_ide_hwif_t* pmif = (pmac_ide_hwif_t *)HWIF(drive)->hwif_data;
@@ -600,7 +600,7 @@ pmac_ide_kauai_selectproc(ide_drive_t *drive)
600/* 600/*
601 * Force an update of controller timing values for a given drive 601 * Force an update of controller timing values for a given drive
602 */ 602 */
603static void __pmac 603static void
604pmac_ide_do_update_timings(ide_drive_t *drive) 604pmac_ide_do_update_timings(ide_drive_t *drive)
605{ 605{
606 pmac_ide_hwif_t* pmif = (pmac_ide_hwif_t *)HWIF(drive)->hwif_data; 606 pmac_ide_hwif_t* pmif = (pmac_ide_hwif_t *)HWIF(drive)->hwif_data;
@@ -633,7 +633,7 @@ pmac_outbsync(ide_drive_t *drive, u8 value, unsigned long port)
633 * to sort that out sooner or later and see if I can finally get the 633 * to sort that out sooner or later and see if I can finally get the
634 * common version to work properly in all cases 634 * common version to work properly in all cases
635 */ 635 */
636static int __pmac 636static int
637pmac_ide_do_setfeature(ide_drive_t *drive, u8 command) 637pmac_ide_do_setfeature(ide_drive_t *drive, u8 command)
638{ 638{
639 ide_hwif_t *hwif = HWIF(drive); 639 ide_hwif_t *hwif = HWIF(drive);
@@ -710,7 +710,7 @@ out:
710/* 710/*
711 * Old tuning functions (called on hdparm -p), sets up drive PIO timings 711 * Old tuning functions (called on hdparm -p), sets up drive PIO timings
712 */ 712 */
713static void __pmac 713static void
714pmac_ide_tuneproc(ide_drive_t *drive, u8 pio) 714pmac_ide_tuneproc(ide_drive_t *drive, u8 pio)
715{ 715{
716 ide_pio_data_t d; 716 ide_pio_data_t d;
@@ -801,7 +801,7 @@ pmac_ide_tuneproc(ide_drive_t *drive, u8 pio)
801/* 801/*
802 * Calculate KeyLargo ATA/66 UDMA timings 802 * Calculate KeyLargo ATA/66 UDMA timings
803 */ 803 */
804static int __pmac 804static int
805set_timings_udma_ata4(u32 *timings, u8 speed) 805set_timings_udma_ata4(u32 *timings, u8 speed)
806{ 806{
807 unsigned rdyToPauseTicks, wrDataSetupTicks, addrTicks; 807 unsigned rdyToPauseTicks, wrDataSetupTicks, addrTicks;
@@ -829,7 +829,7 @@ set_timings_udma_ata4(u32 *timings, u8 speed)
829/* 829/*
830 * Calculate Kauai ATA/100 UDMA timings 830 * Calculate Kauai ATA/100 UDMA timings
831 */ 831 */
832static int __pmac 832static int
833set_timings_udma_ata6(u32 *pio_timings, u32 *ultra_timings, u8 speed) 833set_timings_udma_ata6(u32 *pio_timings, u32 *ultra_timings, u8 speed)
834{ 834{
835 struct ide_timing *t = ide_timing_find_mode(speed); 835 struct ide_timing *t = ide_timing_find_mode(speed);
@@ -849,7 +849,7 @@ set_timings_udma_ata6(u32 *pio_timings, u32 *ultra_timings, u8 speed)
849/* 849/*
850 * Calculate Shasta ATA/133 UDMA timings 850 * Calculate Shasta ATA/133 UDMA timings
851 */ 851 */
852static int __pmac 852static int
853set_timings_udma_shasta(u32 *pio_timings, u32 *ultra_timings, u8 speed) 853set_timings_udma_shasta(u32 *pio_timings, u32 *ultra_timings, u8 speed)
854{ 854{
855 struct ide_timing *t = ide_timing_find_mode(speed); 855 struct ide_timing *t = ide_timing_find_mode(speed);
@@ -869,7 +869,7 @@ set_timings_udma_shasta(u32 *pio_timings, u32 *ultra_timings, u8 speed)
869/* 869/*
870 * Calculate MDMA timings for all cells 870 * Calculate MDMA timings for all cells
871 */ 871 */
872static int __pmac 872static int
873set_timings_mdma(ide_drive_t *drive, int intf_type, u32 *timings, u32 *timings2, 873set_timings_mdma(ide_drive_t *drive, int intf_type, u32 *timings, u32 *timings2,
874 u8 speed, int drive_cycle_time) 874 u8 speed, int drive_cycle_time)
875{ 875{
@@ -1014,7 +1014,7 @@ set_timings_mdma(ide_drive_t *drive, int intf_type, u32 *timings, u32 *timings2,
1014 * our dedicated function is more precise as it uses the drive provided 1014 * our dedicated function is more precise as it uses the drive provided
1015 * cycle time value. We should probably fix this one to deal with that too... 1015 * cycle time value. We should probably fix this one to deal with that too...
1016 */ 1016 */
1017static int __pmac 1017static int
1018pmac_ide_tune_chipset (ide_drive_t *drive, byte speed) 1018pmac_ide_tune_chipset (ide_drive_t *drive, byte speed)
1019{ 1019{
1020 int unit = (drive->select.b.unit & 0x01); 1020 int unit = (drive->select.b.unit & 0x01);
@@ -1092,7 +1092,7 @@ pmac_ide_tune_chipset (ide_drive_t *drive, byte speed)
1092 * Blast some well known "safe" values to the timing registers at init or 1092 * Blast some well known "safe" values to the timing registers at init or
1093 * wakeup from sleep time, before we do real calculation 1093 * wakeup from sleep time, before we do real calculation
1094 */ 1094 */
1095static void __pmac 1095static void
1096sanitize_timings(pmac_ide_hwif_t *pmif) 1096sanitize_timings(pmac_ide_hwif_t *pmif)
1097{ 1097{
1098 unsigned int value, value2 = 0; 1098 unsigned int value, value2 = 0;
@@ -1123,13 +1123,13 @@ sanitize_timings(pmac_ide_hwif_t *pmif)
1123 pmif->timings[2] = pmif->timings[3] = value2; 1123 pmif->timings[2] = pmif->timings[3] = value2;
1124} 1124}
1125 1125
1126unsigned long __pmac 1126unsigned long
1127pmac_ide_get_base(int index) 1127pmac_ide_get_base(int index)
1128{ 1128{
1129 return pmac_ide[index].regbase; 1129 return pmac_ide[index].regbase;
1130} 1130}
1131 1131
1132int __pmac 1132int
1133pmac_ide_check_base(unsigned long base) 1133pmac_ide_check_base(unsigned long base)
1134{ 1134{
1135 int ix; 1135 int ix;
@@ -1140,7 +1140,7 @@ pmac_ide_check_base(unsigned long base)
1140 return -1; 1140 return -1;
1141} 1141}
1142 1142
1143int __pmac 1143int
1144pmac_ide_get_irq(unsigned long base) 1144pmac_ide_get_irq(unsigned long base)
1145{ 1145{
1146 int ix; 1146 int ix;
@@ -1151,7 +1151,7 @@ pmac_ide_get_irq(unsigned long base)
1151 return 0; 1151 return 0;
1152} 1152}
1153 1153
1154static int ide_majors[] __pmacdata = { 3, 22, 33, 34, 56, 57 }; 1154static int ide_majors[] = { 3, 22, 33, 34, 56, 57 };
1155 1155
1156dev_t __init 1156dev_t __init
1157pmac_find_ide_boot(char *bootdevice, int n) 1157pmac_find_ide_boot(char *bootdevice, int n)
@@ -1701,7 +1701,7 @@ pmac_ide_probe(void)
1701 * pmac_ide_build_dmatable builds the DBDMA command list 1701 * pmac_ide_build_dmatable builds the DBDMA command list
1702 * for a transfer and sets the DBDMA channel to point to it. 1702 * for a transfer and sets the DBDMA channel to point to it.
1703 */ 1703 */
1704static int __pmac 1704static int
1705pmac_ide_build_dmatable(ide_drive_t *drive, struct request *rq) 1705pmac_ide_build_dmatable(ide_drive_t *drive, struct request *rq)
1706{ 1706{
1707 struct dbdma_cmd *table; 1707 struct dbdma_cmd *table;
@@ -1785,7 +1785,7 @@ pmac_ide_build_dmatable(ide_drive_t *drive, struct request *rq)
1785} 1785}
1786 1786
1787/* Teardown mappings after DMA has completed. */ 1787/* Teardown mappings after DMA has completed. */
1788static void __pmac 1788static void
1789pmac_ide_destroy_dmatable (ide_drive_t *drive) 1789pmac_ide_destroy_dmatable (ide_drive_t *drive)
1790{ 1790{
1791 ide_hwif_t *hwif = drive->hwif; 1791 ide_hwif_t *hwif = drive->hwif;
@@ -1802,7 +1802,7 @@ pmac_ide_destroy_dmatable (ide_drive_t *drive)
1802/* 1802/*
1803 * Pick up best MDMA timing for the drive and apply it 1803 * Pick up best MDMA timing for the drive and apply it
1804 */ 1804 */
1805static int __pmac 1805static int
1806pmac_ide_mdma_enable(ide_drive_t *drive, u16 mode) 1806pmac_ide_mdma_enable(ide_drive_t *drive, u16 mode)
1807{ 1807{
1808 ide_hwif_t *hwif = HWIF(drive); 1808 ide_hwif_t *hwif = HWIF(drive);
@@ -1859,7 +1859,7 @@ pmac_ide_mdma_enable(ide_drive_t *drive, u16 mode)
1859/* 1859/*
1860 * Pick up best UDMA timing for the drive and apply it 1860 * Pick up best UDMA timing for the drive and apply it
1861 */ 1861 */
1862static int __pmac 1862static int
1863pmac_ide_udma_enable(ide_drive_t *drive, u16 mode) 1863pmac_ide_udma_enable(ide_drive_t *drive, u16 mode)
1864{ 1864{
1865 ide_hwif_t *hwif = HWIF(drive); 1865 ide_hwif_t *hwif = HWIF(drive);
@@ -1915,7 +1915,7 @@ pmac_ide_udma_enable(ide_drive_t *drive, u16 mode)
1915 * Check what is the best DMA timing setting for the drive and 1915 * Check what is the best DMA timing setting for the drive and
1916 * call appropriate functions to apply it. 1916 * call appropriate functions to apply it.
1917 */ 1917 */
1918static int __pmac 1918static int
1919pmac_ide_dma_check(ide_drive_t *drive) 1919pmac_ide_dma_check(ide_drive_t *drive)
1920{ 1920{
1921 struct hd_driveid *id = drive->id; 1921 struct hd_driveid *id = drive->id;
@@ -1967,7 +1967,7 @@ pmac_ide_dma_check(ide_drive_t *drive)
1967 * Prepare a DMA transfer. We build the DMA table, adjust the timings for 1967 * Prepare a DMA transfer. We build the DMA table, adjust the timings for
1968 * a read on KeyLargo ATA/66 and mark us as waiting for DMA completion 1968 * a read on KeyLargo ATA/66 and mark us as waiting for DMA completion
1969 */ 1969 */
1970static int __pmac 1970static int
1971pmac_ide_dma_setup(ide_drive_t *drive) 1971pmac_ide_dma_setup(ide_drive_t *drive)
1972{ 1972{
1973 ide_hwif_t *hwif = HWIF(drive); 1973 ide_hwif_t *hwif = HWIF(drive);
@@ -1997,7 +1997,7 @@ pmac_ide_dma_setup(ide_drive_t *drive)
1997 return 0; 1997 return 0;
1998} 1998}
1999 1999
2000static void __pmac 2000static void
2001pmac_ide_dma_exec_cmd(ide_drive_t *drive, u8 command) 2001pmac_ide_dma_exec_cmd(ide_drive_t *drive, u8 command)
2002{ 2002{
2003 /* issue cmd to drive */ 2003 /* issue cmd to drive */
@@ -2008,7 +2008,7 @@ pmac_ide_dma_exec_cmd(ide_drive_t *drive, u8 command)
2008 * Kick the DMA controller into life after the DMA command has been issued 2008 * Kick the DMA controller into life after the DMA command has been issued
2009 * to the drive. 2009 * to the drive.
2010 */ 2010 */
2011static void __pmac 2011static void
2012pmac_ide_dma_start(ide_drive_t *drive) 2012pmac_ide_dma_start(ide_drive_t *drive)
2013{ 2013{
2014 pmac_ide_hwif_t* pmif = (pmac_ide_hwif_t *)HWIF(drive)->hwif_data; 2014 pmac_ide_hwif_t* pmif = (pmac_ide_hwif_t *)HWIF(drive)->hwif_data;
@@ -2024,7 +2024,7 @@ pmac_ide_dma_start(ide_drive_t *drive)
2024/* 2024/*
2025 * After a DMA transfer, make sure the controller is stopped 2025 * After a DMA transfer, make sure the controller is stopped
2026 */ 2026 */
2027static int __pmac 2027static int
2028pmac_ide_dma_end (ide_drive_t *drive) 2028pmac_ide_dma_end (ide_drive_t *drive)
2029{ 2029{
2030 pmac_ide_hwif_t* pmif = (pmac_ide_hwif_t *)HWIF(drive)->hwif_data; 2030 pmac_ide_hwif_t* pmif = (pmac_ide_hwif_t *)HWIF(drive)->hwif_data;
@@ -2052,7 +2052,7 @@ pmac_ide_dma_end (ide_drive_t *drive)
2052 * that's not implemented yet), on the other hand, we don't have shared interrupts 2052 * that's not implemented yet), on the other hand, we don't have shared interrupts
2053 * so it's not really a problem 2053 * so it's not really a problem
2054 */ 2054 */
2055static int __pmac 2055static int
2056pmac_ide_dma_test_irq (ide_drive_t *drive) 2056pmac_ide_dma_test_irq (ide_drive_t *drive)
2057{ 2057{
2058 pmac_ide_hwif_t* pmif = (pmac_ide_hwif_t *)HWIF(drive)->hwif_data; 2058 pmac_ide_hwif_t* pmif = (pmac_ide_hwif_t *)HWIF(drive)->hwif_data;
@@ -2108,19 +2108,19 @@ pmac_ide_dma_test_irq (ide_drive_t *drive)
2108 return 1; 2108 return 1;
2109} 2109}
2110 2110
2111static int __pmac 2111static int
2112pmac_ide_dma_host_off (ide_drive_t *drive) 2112pmac_ide_dma_host_off (ide_drive_t *drive)
2113{ 2113{
2114 return 0; 2114 return 0;
2115} 2115}
2116 2116
2117static int __pmac 2117static int
2118pmac_ide_dma_host_on (ide_drive_t *drive) 2118pmac_ide_dma_host_on (ide_drive_t *drive)
2119{ 2119{
2120 return 0; 2120 return 0;
2121} 2121}
2122 2122
2123static int __pmac 2123static int
2124pmac_ide_dma_lostirq (ide_drive_t *drive) 2124pmac_ide_dma_lostirq (ide_drive_t *drive)
2125{ 2125{
2126 pmac_ide_hwif_t* pmif = (pmac_ide_hwif_t *)HWIF(drive)->hwif_data; 2126 pmac_ide_hwif_t* pmif = (pmac_ide_hwif_t *)HWIF(drive)->hwif_data;