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authorBartlomiej Zolnierkiewicz <bzolnier@gmail.com>2007-10-13 11:47:48 -0400
committerBartlomiej Zolnierkiewicz <bzolnier@gmail.com>2007-10-13 11:47:48 -0400
commit085798b12ffebd69c13c8ce05fabc8ed5ac43e63 (patch)
treeda615a9f8ca863354e47b31453a4e9380af7d525 /drivers/ide/ppc/pmac.c
parent90a87ea480ce50e7a1553568395c024294db1808 (diff)
ide-pmac: pmac_ide_tune_chipset() fixes
* Don't check check for pmif == NULL (it should never be NULL if we got here). * Make a local copy of the timings and set the pmif->timings[] only after setting the transfer mode on the device (otherwise SELECT_DRIVE() call in pmac_ide_do_setfeature() will program new timings before the transfer mode is set on the device - this was pointed out by Sergei). This change makes pmac_ide_tune_chipset() behavior match this of pmac_ide_{m,u}dma_enable(). Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Diffstat (limited to 'drivers/ide/ppc/pmac.c')
-rw-r--r--drivers/ide/ppc/pmac.c27
1 files changed, 16 insertions, 11 deletions
diff --git a/drivers/ide/ppc/pmac.c b/drivers/ide/ppc/pmac.c
index b43457e34311..cfbe5690ca88 100644
--- a/drivers/ide/ppc/pmac.c
+++ b/drivers/ide/ppc/pmac.c
@@ -916,14 +916,15 @@ static int pmac_ide_tune_chipset(ide_drive_t *drive, const u8 speed)
916 int unit = (drive->select.b.unit & 0x01); 916 int unit = (drive->select.b.unit & 0x01);
917 int ret = 0; 917 int ret = 0;
918 pmac_ide_hwif_t* pmif = (pmac_ide_hwif_t *)HWIF(drive)->hwif_data; 918 pmac_ide_hwif_t* pmif = (pmac_ide_hwif_t *)HWIF(drive)->hwif_data;
919 u32 *timings, *timings2; 919 u32 *timings, *timings2, tl[2];
920 920
921 if (pmif == NULL)
922 return 1;
923
924 timings = &pmif->timings[unit]; 921 timings = &pmif->timings[unit];
925 timings2 = &pmif->timings[unit+2]; 922 timings2 = &pmif->timings[unit+2];
926 923
924 /* Copy timings to local image */
925 tl[0] = *timings;
926 tl[1] = *timings2;
927
927 switch(speed) { 928 switch(speed) {
928#ifdef CONFIG_BLK_DEV_IDEDMA_PMAC 929#ifdef CONFIG_BLK_DEV_IDEDMA_PMAC
929 case XFER_UDMA_6: 930 case XFER_UDMA_6:
@@ -934,19 +935,19 @@ static int pmac_ide_tune_chipset(ide_drive_t *drive, const u8 speed)
934 case XFER_UDMA_1: 935 case XFER_UDMA_1:
935 case XFER_UDMA_0: 936 case XFER_UDMA_0:
936 if (pmif->kind == controller_kl_ata4) 937 if (pmif->kind == controller_kl_ata4)
937 ret = set_timings_udma_ata4(timings, speed); 938 ret = set_timings_udma_ata4(&tl[0], speed);
938 else if (pmif->kind == controller_un_ata6 939 else if (pmif->kind == controller_un_ata6
939 || pmif->kind == controller_k2_ata6) 940 || pmif->kind == controller_k2_ata6)
940 ret = set_timings_udma_ata6(timings, timings2, speed); 941 ret = set_timings_udma_ata6(&tl[0], &tl[1], speed);
941 else if (pmif->kind == controller_sh_ata6) 942 else if (pmif->kind == controller_sh_ata6)
942 ret = set_timings_udma_shasta(timings, timings2, speed); 943 ret = set_timings_udma_shasta(&tl[0], &tl[1], speed);
943 else 944 else
944 ret = 1; 945 ret = 1;
945 break; 946 break;
946 case XFER_MW_DMA_2: 947 case XFER_MW_DMA_2:
947 case XFER_MW_DMA_1: 948 case XFER_MW_DMA_1:
948 case XFER_MW_DMA_0: 949 case XFER_MW_DMA_0:
949 ret = set_timings_mdma(drive, pmif->kind, timings, timings2, speed, 0); 950 ret = set_timings_mdma(drive, pmif->kind, &tl[0], &tl[1], speed, 0);
950 break; 951 break;
951 case XFER_SW_DMA_2: 952 case XFER_SW_DMA_2:
952 case XFER_SW_DMA_1: 953 case XFER_SW_DMA_1:
@@ -962,7 +963,11 @@ static int pmac_ide_tune_chipset(ide_drive_t *drive, const u8 speed)
962 ret = pmac_ide_do_setfeature(drive, speed); 963 ret = pmac_ide_do_setfeature(drive, speed);
963 if (ret) 964 if (ret)
964 return ret; 965 return ret;
965 966
967 /* Apply timings to controller */
968 *timings = tl[0];
969 *timings2 = tl[1];
970
966 pmac_ide_do_update_timings(drive); 971 pmac_ide_do_update_timings(drive);
967 972
968 return 0; 973 return 0;