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authorBartlomiej Zolnierkiewicz <bzolnier@gmail.com>2008-07-16 14:33:38 -0400
committerBartlomiej Zolnierkiewicz <bzolnier@gmail.com>2008-07-16 14:33:38 -0400
commitb96f7384646519da54ad50bfad8d53b915b70cb3 (patch)
treeaa46d53b9a2a516188a95f487f8fe56b05814d42 /drivers/ide/ppc/mpc8xx.c
parent3f847571a1cf845a338bcd352f31240b3615f40d (diff)
ide-mpc8xx: convert to use ide_timing_find_mode()
Also fix (disabled) debugging code while at it. There should be no functional changes caused by this patch. Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Diffstat (limited to 'drivers/ide/ppc/mpc8xx.c')
-rw-r--r--drivers/ide/ppc/mpc8xx.c33
1 files changed, 13 insertions, 20 deletions
diff --git a/drivers/ide/ppc/mpc8xx.c b/drivers/ide/ppc/mpc8xx.c
index 236f9c38e519..33bc699814d7 100644
--- a/drivers/ide/ppc/mpc8xx.c
+++ b/drivers/ide/ppc/mpc8xx.c
@@ -89,7 +89,7 @@ ide_ioport_desc_t ioport_dsc[MAX_HWIFS] = {
89#endif /* IDE0_BASE_OFFSET */ 89#endif /* IDE0_BASE_OFFSET */
90}; 90};
91 91
92ide_pio_timings_t ide_pio_clocks[6]; 92struct ide_timing ide_pio_clocks[6];
93int hold_time[6] = {30, 20, 15, 10, 10, 10 }; /* PIO Mode 5 with IORDY (nonstandard) */ 93int hold_time[6] = {30, 20, 15, 10, 10, 10 }; /* PIO Mode 5 with IORDY (nonstandard) */
94 94
95/* 95/*
@@ -200,30 +200,23 @@ static int __init m8xx_ide_init_ports(hw_regs_t *hw, unsigned long data_port)
200 /* Compute clock cycles for PIO timings */ 200 /* Compute clock cycles for PIO timings */
201 for (i=0; i<6; ++i) { 201 for (i=0; i<6; ++i) {
202 bd_t *binfo = (bd_t *)__res; 202 bd_t *binfo = (bd_t *)__res;
203 struct ide_timing *t, *n;
203 204
204 hold_time[i] = 205 hold_time[i] =
205 PCMCIA_MK_CLKS (hold_time[i], 206 PCMCIA_MK_CLKS (hold_time[i],
206 binfo->bi_busfreq); 207 binfo->bi_busfreq);
207 ide_pio_clocks[i].setup_time = 208
208 PCMCIA_MK_CLKS (ide_pio_timings[i].setup_time, 209 t = ide_timing_find_mode(XFER_PIO_0 + i);
209 binfo->bi_busfreq); 210 n = &ide_pio_clocks[i];
210 ide_pio_clocks[i].active_time = 211
211 PCMCIA_MK_CLKS (ide_pio_timings[i].active_time, 212 n->setup = PCMCIA_MK_CLKS(t->setup, binfo->bi_busfreq);
212 binfo->bi_busfreq); 213 n->active = PCMCIA_MK_CLKS(t->active, binfo->bi_busfreq);
213 ide_pio_clocks[i].cycle_time = 214 n->cycle = PCMCIA_MK_CLKS(t->cycle, binfo->bi_busfreq);
214 PCMCIA_MK_CLKS (ide_pio_timings[i].cycle_time,
215 binfo->bi_busfreq);
216#if 0 215#if 0
217 printk ("PIO mode %d timings: %d/%d/%d => %d/%d/%d\n", 216 printk ("PIO mode %d timings: %d/%d/%d => %d/%d/%d\n",
218 i, 217 i,
219 ide_pio_clocks[i].setup_time, 218 t->setup, t->active, t->cycle,
220 ide_pio_clocks[i].active_time, 219 n->setup, n->active, n->cycle);
221 ide_pio_clocks[i].hold_time,
222 ide_pio_clocks[i].cycle_time,
223 ide_pio_timings[i].setup_time,
224 ide_pio_timings[i].active_time,
225 ide_pio_timings[i].hold_time,
226 ide_pio_timings[i].cycle_time);
227#endif 220#endif
228 } 221 }
229 } 222 }
@@ -408,8 +401,8 @@ static void m8xx_ide_set_pio_mode(ide_drive_t *drive, const u8 pio)
408 mask = ~(PCMCIA_SHT(0xFF) | PCMCIA_SST(0xFF) | PCMCIA_SL(0xFF)); 401 mask = ~(PCMCIA_SHT(0xFF) | PCMCIA_SST(0xFF) | PCMCIA_SL(0xFF));
409 402
410 timing = PCMCIA_SHT(hold_time[pio] ) 403 timing = PCMCIA_SHT(hold_time[pio] )
411 | PCMCIA_SST(ide_pio_clocks[pio].setup_time ) 404 | PCMCIA_SST(ide_pio_clocks[pio].setup)
412 | PCMCIA_SL (ide_pio_clocks[pio].active_time) 405 | PCMCIA_SL (ide_pio_clocks[pio].active)
413 ; 406 ;
414 407
415#if 1 408#if 1