aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/ide/pci
diff options
context:
space:
mode:
authorSergei Shtylyov <sshtylyov@ru.mvista.com>2007-05-05 16:03:49 -0400
committerBartlomiej Zolnierkiewicz <bzolnier@gmail.com>2007-05-05 16:03:49 -0400
commite51e2528d589c13f0e51dfa671c310021d003e21 (patch)
tree14eccc665d5e810840a88213392f09a2faf4e42f /drivers/ide/pci
parent60e7a82f1acb76af05d81e93ca0f65fdd52c23c2 (diff)
cmd64x: interrupt status fixes (take 2)
The driver's ide_dma_test_irq() method was reading the MRDMODE register even on PCI0643/6 where it was write-only -- fix this by always reading the "backward- compatible" interrupt bits, renaming dma_alt_stat to irq_stat as the interrupt status bits are not coupled to DMA. In addition, wrong interrupt bit was tested/cleared for the primary channel -- it's bit 2 in all the chip specs and the driver used bit 1... :-/ Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Diffstat (limited to 'drivers/ide/pci')
-rw-r--r--drivers/ide/pci/cmd64x.c24
1 files changed, 12 insertions, 12 deletions
diff --git a/drivers/ide/pci/cmd64x.c b/drivers/ide/pci/cmd64x.c
index 336d02f58010..f165bf1c06dc 100644
--- a/drivers/ide/pci/cmd64x.c
+++ b/drivers/ide/pci/cmd64x.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/drivers/ide/pci/cmd64x.c Version 1.43 Mar 10, 2007 2 * linux/drivers/ide/pci/cmd64x.c Version 1.44 Mar 12, 2007
3 * 3 *
4 * cmd64x.c: Enable interrupts at initialization time on Ultra/PCI machines. 4 * cmd64x.c: Enable interrupts at initialization time on Ultra/PCI machines.
5 * Due to massive hardware bugs, UltraDMA is only supported 5 * Due to massive hardware bugs, UltraDMA is only supported
@@ -36,7 +36,7 @@
36 * CMD64x specific registers definition. 36 * CMD64x specific registers definition.
37 */ 37 */
38#define CFR 0x50 38#define CFR 0x50
39#define CFR_INTR_CH0 0x02 39#define CFR_INTR_CH0 0x04
40#define CNTRL 0x51 40#define CNTRL 0x51
41#define CNTRL_DIS_RA0 0x40 41#define CNTRL_DIS_RA0 0x40
42#define CNTRL_DIS_RA1 0x80 42#define CNTRL_DIS_RA1 0x80
@@ -488,19 +488,19 @@ static int cmd64x_ide_dma_end (ide_drive_t *drive)
488 488
489static int cmd64x_ide_dma_test_irq (ide_drive_t *drive) 489static int cmd64x_ide_dma_test_irq (ide_drive_t *drive)
490{ 490{
491 ide_hwif_t *hwif = HWIF(drive); 491 ide_hwif_t *hwif = HWIF(drive);
492 struct pci_dev *dev = hwif->pci_dev; 492 struct pci_dev *dev = hwif->pci_dev;
493 u8 dma_alt_stat = 0, mask = (hwif->channel) ? MRDMODE_INTR_CH1 : 493 u8 irq_reg = hwif->channel ? ARTTIM23 : CFR;
494 MRDMODE_INTR_CH0; 494 u8 irq_stat = 0, mask = hwif->channel ? ARTTIM23_INTR_CH1 : CFR_INTR_CH0;
495 u8 dma_stat = inb(hwif->dma_status); 495 u8 dma_stat = inb(hwif->dma_status);
496
497 (void) pci_read_config_byte(dev, irq_reg, &irq_stat);
496 498
497 (void) pci_read_config_byte(dev, MRDMODE, &dma_alt_stat);
498#ifdef DEBUG 499#ifdef DEBUG
499 printk("%s: dma_stat: 0x%02x dma_alt_stat: " 500 printk("%s: dma_stat: 0x%02x irq_stat: 0x%02x mask: 0x%02x\n",
500 "0x%02x mask: 0x%02x\n", drive->name, 501 drive->name, dma_stat, irq_stat, mask);
501 dma_stat, dma_alt_stat, mask);
502#endif 502#endif
503 if (!(dma_alt_stat & mask)) 503 if (!(irq_stat & mask))
504 return 0; 504 return 0;
505 505
506 /* return 1 if INTR asserted */ 506 /* return 1 if INTR asserted */