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authorBartlomiej Zolnierkiewicz <bzolnier@gmail.com>2008-04-26 16:25:24 -0400
committerBartlomiej Zolnierkiewicz <bzolnier@gmail.com>2008-04-26 16:25:24 -0400
commit5e37bdc081a980dd0d669e6387bcf15ca9666f81 (patch)
treed842166c3bd23fbf3dfba0ccaa0f9ed5cc3096db /drivers/ide/pci
parent1fd1890594bd355a4217f5658a34763e77decee3 (diff)
ide: add struct ide_dma_ops (take 3)
Add struct ide_dma_ops and convert core code + drivers to use it. While at it: * Drop "ide_" prefix from ->ide_dma_end and ->ide_dma_test_irq methods. * Drop "ide_" "infixes" from DMA methods. * au1xxx-ide.c: - use auide_dma_{test_irq,end}() directly in auide_dma_timeout() * pdc202xx_old.c: - drop "old_" "infixes" from DMA methods * siimage.c: - add siimage_dma_test_irq() helper - print SATA warning in siimage_init_one() * Remove no longer needed ->init_hwif implementations. v2: * Changes based on review from Sergei: - s/siimage_ide_dma_test_irq/siimage_dma_test_irq/ - s/drive->hwif/hwif/ in idefloppy_pc_intr(). - fix patch description w.r.t. au1xxx-ide changes - fix au1xxx-ide build - fix naming for cmd64*_dma_ops - drop "ide_" and "old_" infixes - s/hpt3xxx_dma_ops/hpt37x_dma_ops/ - s/hpt370x_dma_ops/hpt370_dma_ops/ - use correct DMA ops for HPT302/N, HPT371/N and HPT374 - s/it821x_smart_dma_ops/it821x_pass_through_dma_ops/ v3: * Two bugs slipped in v2 (noticed by Sergei): - use correct DMA ops for HPT374 (for real this time) - handle HPT370/HPT370A properly Acked-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Diffstat (limited to 'drivers/ide/pci')
-rw-r--r--drivers/ide/pci/alim15x3.c32
-rw-r--r--drivers/ide/pci/cmd64x.c110
-rw-r--r--drivers/ide/pci/cs5520.c14
-rw-r--r--drivers/ide/pci/hpt366.c48
-rw-r--r--drivers/ide/pci/it821x.c8
-rw-r--r--drivers/ide/pci/ns87415.c12
-rw-r--r--drivers/ide/pci/pdc202xx_old.c41
-rw-r--r--drivers/ide/pci/sc1200.c22
-rw-r--r--drivers/ide/pci/scc_pata.c15
-rw-r--r--drivers/ide/pci/sgiioc4.c38
-rw-r--r--drivers/ide/pci/siimage.c76
-rw-r--r--drivers/ide/pci/sl82c105.c27
-rw-r--r--drivers/ide/pci/tc86c001.c7
-rw-r--r--drivers/ide/pci/trm290.c20
14 files changed, 224 insertions, 246 deletions
diff --git a/drivers/ide/pci/alim15x3.c b/drivers/ide/pci/alim15x3.c
index 5261f308d946..987db35199e6 100644
--- a/drivers/ide/pci/alim15x3.c
+++ b/drivers/ide/pci/alim15x3.c
@@ -652,21 +652,7 @@ static u8 __devinit ali_cable_detect(ide_hwif_t *hwif)
652 return cbl; 652 return cbl;
653} 653}
654 654
655/** 655#ifndef CONFIG_SPARC64
656 * init_hwif_common_ali15x3 - Set up ALI IDE hardware
657 * @hwif: IDE interface
658 *
659 * Initialize the IDE structure side of the ALi 15x3 driver.
660 */
661
662static void __devinit init_hwif_common_ali15x3 (ide_hwif_t *hwif)
663{
664 if (hwif->dma_base == 0)
665 return;
666
667 hwif->dma_setup = &ali15x3_dma_setup;
668}
669
670/** 656/**
671 * init_hwif_ali15x3 - Initialize the ALI IDE x86 stuff 657 * init_hwif_ali15x3 - Initialize the ALI IDE x86 stuff
672 * @hwif: interface to configure 658 * @hwif: interface to configure
@@ -716,9 +702,8 @@ static void __devinit init_hwif_ali15x3 (ide_hwif_t *hwif)
716 if(irq >= 0) 702 if(irq >= 0)
717 hwif->irq = irq; 703 hwif->irq = irq;
718 } 704 }
719
720 init_hwif_common_ali15x3(hwif);
721} 705}
706#endif
722 707
723/** 708/**
724 * init_dma_ali15x3 - set up DMA on ALi15x3 709 * init_dma_ali15x3 - set up DMA on ALi15x3
@@ -746,7 +731,7 @@ static int __devinit init_dma_ali15x3(ide_hwif_t *hwif,
746 if (ide_allocate_dma_engine(hwif)) 731 if (ide_allocate_dma_engine(hwif))
747 return -1; 732 return -1;
748 733
749 ide_setup_dma(hwif, base); 734 ide_setup_dma(hwif, base, d);
750 735
751 return 0; 736 return 0;
752} 737}
@@ -758,10 +743,16 @@ static const struct ide_port_ops ali_port_ops = {
758 .cable_detect = ali_cable_detect, 743 .cable_detect = ali_cable_detect,
759}; 744};
760 745
746static struct ide_dma_ops ali_dma_ops = {
747 .dma_setup = ali15x3_dma_setup,
748};
749
761static const struct ide_port_info ali15x3_chipset __devinitdata = { 750static const struct ide_port_info ali15x3_chipset __devinitdata = {
762 .name = "ALI15X3", 751 .name = "ALI15X3",
763 .init_chipset = init_chipset_ali15x3, 752 .init_chipset = init_chipset_ali15x3,
753#ifndef CONFIG_SPARC64
764 .init_hwif = init_hwif_ali15x3, 754 .init_hwif = init_hwif_ali15x3,
755#endif
765 .init_dma = init_dma_ali15x3, 756 .init_dma = init_dma_ali15x3,
766 .port_ops = &ali_port_ops, 757 .port_ops = &ali_port_ops,
767 .pio_mask = ATA_PIO5, 758 .pio_mask = ATA_PIO5,
@@ -806,6 +797,8 @@ static int __devinit alim15x3_init_one(struct pci_dev *dev, const struct pci_dev
806 d.udma_mask = ATA_UDMA5; 797 d.udma_mask = ATA_UDMA5;
807 else 798 else
808 d.udma_mask = ATA_UDMA6; 799 d.udma_mask = ATA_UDMA6;
800
801 d.dma_ops = &ali_dma_ops;
809 } else { 802 } else {
810 d.host_flags |= IDE_HFLAG_NO_DMA; 803 d.host_flags |= IDE_HFLAG_NO_DMA;
811 804
@@ -815,9 +808,6 @@ static int __devinit alim15x3_init_one(struct pci_dev *dev, const struct pci_dev
815 if (idx == 0) 808 if (idx == 0)
816 d.host_flags |= IDE_HFLAG_CLEAR_SIMPLEX; 809 d.host_flags |= IDE_HFLAG_CLEAR_SIMPLEX;
817 810
818#if defined(CONFIG_SPARC64)
819 d.init_hwif = init_hwif_common_ali15x3;
820#endif /* CONFIG_SPARC64 */
821 return ide_setup_pci_device(dev, &d); 811 return ide_setup_pci_device(dev, &d);
822} 812}
823 813
diff --git a/drivers/ide/pci/cmd64x.c b/drivers/ide/pci/cmd64x.c
index 5411ded791bb..5fd252e6ed08 100644
--- a/drivers/ide/pci/cmd64x.c
+++ b/drivers/ide/pci/cmd64x.c
@@ -223,7 +223,7 @@ static void cmd64x_set_dma_mode(ide_drive_t *drive, const u8 speed)
223 (void) pci_write_config_byte(dev, pciU, regU); 223 (void) pci_write_config_byte(dev, pciU, regU);
224} 224}
225 225
226static int cmd648_ide_dma_end (ide_drive_t *drive) 226static int cmd648_dma_end(ide_drive_t *drive)
227{ 227{
228 ide_hwif_t *hwif = HWIF(drive); 228 ide_hwif_t *hwif = HWIF(drive);
229 unsigned long base = hwif->dma_base - (hwif->channel * 8); 229 unsigned long base = hwif->dma_base - (hwif->channel * 8);
@@ -239,7 +239,7 @@ static int cmd648_ide_dma_end (ide_drive_t *drive)
239 return err; 239 return err;
240} 240}
241 241
242static int cmd64x_ide_dma_end (ide_drive_t *drive) 242static int cmd64x_dma_end(ide_drive_t *drive)
243{ 243{
244 ide_hwif_t *hwif = HWIF(drive); 244 ide_hwif_t *hwif = HWIF(drive);
245 struct pci_dev *dev = to_pci_dev(hwif->dev); 245 struct pci_dev *dev = to_pci_dev(hwif->dev);
@@ -256,7 +256,7 @@ static int cmd64x_ide_dma_end (ide_drive_t *drive)
256 return err; 256 return err;
257} 257}
258 258
259static int cmd648_ide_dma_test_irq (ide_drive_t *drive) 259static int cmd648_dma_test_irq(ide_drive_t *drive)
260{ 260{
261 ide_hwif_t *hwif = HWIF(drive); 261 ide_hwif_t *hwif = HWIF(drive);
262 unsigned long base = hwif->dma_base - (hwif->channel * 8); 262 unsigned long base = hwif->dma_base - (hwif->channel * 8);
@@ -279,7 +279,7 @@ static int cmd648_ide_dma_test_irq (ide_drive_t *drive)
279 return 0; 279 return 0;
280} 280}
281 281
282static int cmd64x_ide_dma_test_irq (ide_drive_t *drive) 282static int cmd64x_dma_test_irq(ide_drive_t *drive)
283{ 283{
284 ide_hwif_t *hwif = HWIF(drive); 284 ide_hwif_t *hwif = HWIF(drive);
285 struct pci_dev *dev = to_pci_dev(hwif->dev); 285 struct pci_dev *dev = to_pci_dev(hwif->dev);
@@ -310,7 +310,7 @@ static int cmd64x_ide_dma_test_irq (ide_drive_t *drive)
310 * event order for DMA transfers. 310 * event order for DMA transfers.
311 */ 311 */
312 312
313static int cmd646_1_ide_dma_end (ide_drive_t *drive) 313static int cmd646_1_dma_end(ide_drive_t *drive)
314{ 314{
315 ide_hwif_t *hwif = HWIF(drive); 315 ide_hwif_t *hwif = HWIF(drive);
316 u8 dma_stat = 0, dma_cmd = 0; 316 u8 dma_stat = 0, dma_cmd = 0;
@@ -385,62 +385,33 @@ static u8 __devinit cmd64x_cable_detect(ide_hwif_t *hwif)
385 } 385 }
386} 386}
387 387
388static void __devinit init_hwif_cmd64x(ide_hwif_t *hwif)
389{
390 struct pci_dev *dev = to_pci_dev(hwif->dev);
391
392 if (!hwif->dma_base)
393 return;
394
395 /*
396 * UltraDMA only supported on PCI646U and PCI646U2, which
397 * correspond to revisions 0x03, 0x05 and 0x07 respectively.
398 * Actually, although the CMD tech support people won't
399 * tell me the details, the 0x03 revision cannot support
400 * UDMA correctly without hardware modifications, and even
401 * then it only works with Quantum disks due to some
402 * hold time assumptions in the 646U part which are fixed
403 * in the 646U2.
404 *
405 * So we only do UltraDMA on revision 0x05 and 0x07 chipsets.
406 */
407 if (dev->device == PCI_DEVICE_ID_CMD_646 && dev->revision < 5)
408 hwif->ultra_mask = 0x00;
409
410 switch (dev->device) {
411 case PCI_DEVICE_ID_CMD_648:
412 case PCI_DEVICE_ID_CMD_649:
413 alt_irq_bits:
414 hwif->ide_dma_end = &cmd648_ide_dma_end;
415 hwif->ide_dma_test_irq = &cmd648_ide_dma_test_irq;
416 break;
417 case PCI_DEVICE_ID_CMD_646:
418 if (dev->revision == 0x01) {
419 hwif->ide_dma_end = &cmd646_1_ide_dma_end;
420 break;
421 } else if (dev->revision >= 0x03)
422 goto alt_irq_bits;
423 /* fall thru */
424 default:
425 hwif->ide_dma_end = &cmd64x_ide_dma_end;
426 hwif->ide_dma_test_irq = &cmd64x_ide_dma_test_irq;
427 break;
428 }
429}
430
431static const struct ide_port_ops cmd64x_port_ops = { 388static const struct ide_port_ops cmd64x_port_ops = {
432 .set_pio_mode = cmd64x_set_pio_mode, 389 .set_pio_mode = cmd64x_set_pio_mode,
433 .set_dma_mode = cmd64x_set_dma_mode, 390 .set_dma_mode = cmd64x_set_dma_mode,
434 .cable_detect = cmd64x_cable_detect, 391 .cable_detect = cmd64x_cable_detect,
435}; 392};
436 393
394static struct ide_dma_ops cmd64x_dma_ops = {
395 .dma_end = cmd64x_dma_end,
396 .dma_test_irq = cmd64x_dma_test_irq,
397};
398
399static struct ide_dma_ops cmd646_rev1_dma_ops = {
400 .dma_end = cmd646_1_dma_end,
401};
402
403static struct ide_dma_ops cmd648_dma_ops = {
404 .dma_end = cmd648_dma_end,
405 .dma_test_irq = cmd648_dma_test_irq,
406};
407
437static const struct ide_port_info cmd64x_chipsets[] __devinitdata = { 408static const struct ide_port_info cmd64x_chipsets[] __devinitdata = {
438 { /* 0 */ 409 { /* 0 */
439 .name = "CMD643", 410 .name = "CMD643",
440 .init_chipset = init_chipset_cmd64x, 411 .init_chipset = init_chipset_cmd64x,
441 .init_hwif = init_hwif_cmd64x,
442 .enablebits = {{0x00,0x00,0x00}, {0x51,0x08,0x08}}, 412 .enablebits = {{0x00,0x00,0x00}, {0x51,0x08,0x08}},
443 .port_ops = &cmd64x_port_ops, 413 .port_ops = &cmd64x_port_ops,
414 .dma_ops = &cmd64x_dma_ops,
444 .host_flags = IDE_HFLAG_CLEAR_SIMPLEX | 415 .host_flags = IDE_HFLAG_CLEAR_SIMPLEX |
445 IDE_HFLAG_ABUSE_PREFETCH, 416 IDE_HFLAG_ABUSE_PREFETCH,
446 .pio_mask = ATA_PIO5, 417 .pio_mask = ATA_PIO5,
@@ -449,10 +420,10 @@ static const struct ide_port_info cmd64x_chipsets[] __devinitdata = {
449 },{ /* 1 */ 420 },{ /* 1 */
450 .name = "CMD646", 421 .name = "CMD646",
451 .init_chipset = init_chipset_cmd64x, 422 .init_chipset = init_chipset_cmd64x,
452 .init_hwif = init_hwif_cmd64x,
453 .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}}, 423 .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}},
454 .chipset = ide_cmd646, 424 .chipset = ide_cmd646,
455 .port_ops = &cmd64x_port_ops, 425 .port_ops = &cmd64x_port_ops,
426 .dma_ops = &cmd648_dma_ops,
456 .host_flags = IDE_HFLAG_ABUSE_PREFETCH, 427 .host_flags = IDE_HFLAG_ABUSE_PREFETCH,
457 .pio_mask = ATA_PIO5, 428 .pio_mask = ATA_PIO5,
458 .mwdma_mask = ATA_MWDMA2, 429 .mwdma_mask = ATA_MWDMA2,
@@ -460,9 +431,9 @@ static const struct ide_port_info cmd64x_chipsets[] __devinitdata = {
460 },{ /* 2 */ 431 },{ /* 2 */
461 .name = "CMD648", 432 .name = "CMD648",
462 .init_chipset = init_chipset_cmd64x, 433 .init_chipset = init_chipset_cmd64x,
463 .init_hwif = init_hwif_cmd64x,
464 .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}}, 434 .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}},
465 .port_ops = &cmd64x_port_ops, 435 .port_ops = &cmd64x_port_ops,
436 .dma_ops = &cmd648_dma_ops,
466 .host_flags = IDE_HFLAG_ABUSE_PREFETCH, 437 .host_flags = IDE_HFLAG_ABUSE_PREFETCH,
467 .pio_mask = ATA_PIO5, 438 .pio_mask = ATA_PIO5,
468 .mwdma_mask = ATA_MWDMA2, 439 .mwdma_mask = ATA_MWDMA2,
@@ -470,9 +441,9 @@ static const struct ide_port_info cmd64x_chipsets[] __devinitdata = {
470 },{ /* 3 */ 441 },{ /* 3 */
471 .name = "CMD649", 442 .name = "CMD649",
472 .init_chipset = init_chipset_cmd64x, 443 .init_chipset = init_chipset_cmd64x,
473 .init_hwif = init_hwif_cmd64x,
474 .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}}, 444 .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}},
475 .port_ops = &cmd64x_port_ops, 445 .port_ops = &cmd64x_port_ops,
446 .dma_ops = &cmd648_dma_ops,
476 .host_flags = IDE_HFLAG_ABUSE_PREFETCH, 447 .host_flags = IDE_HFLAG_ABUSE_PREFETCH,
477 .pio_mask = ATA_PIO5, 448 .pio_mask = ATA_PIO5,
478 .mwdma_mask = ATA_MWDMA2, 449 .mwdma_mask = ATA_MWDMA2,
@@ -487,12 +458,35 @@ static int __devinit cmd64x_init_one(struct pci_dev *dev, const struct pci_devic
487 458
488 d = cmd64x_chipsets[idx]; 459 d = cmd64x_chipsets[idx];
489 460
490 /* 461 if (idx == 1) {
491 * The original PCI0646 didn't have the primary channel enable bit, 462 /*
492 * it appeared starting with PCI0646U (i.e. revision ID 3). 463 * UltraDMA only supported on PCI646U and PCI646U2, which
493 */ 464 * correspond to revisions 0x03, 0x05 and 0x07 respectively.
494 if (idx == 1 && dev->revision < 3) 465 * Actually, although the CMD tech support people won't
495 d.enablebits[0].reg = 0; 466 * tell me the details, the 0x03 revision cannot support
467 * UDMA correctly without hardware modifications, and even
468 * then it only works with Quantum disks due to some
469 * hold time assumptions in the 646U part which are fixed
470 * in the 646U2.
471 *
472 * So we only do UltraDMA on revision 0x05 and 0x07 chipsets.
473 */
474 if (dev->revision < 5) {
475 d.udma_mask = 0x00;
476 /*
477 * The original PCI0646 didn't have the primary
478 * channel enable bit, it appeared starting with
479 * PCI0646U (i.e. revision ID 3).
480 */
481 if (dev->revision < 3) {
482 d.enablebits[0].reg = 0;
483 if (dev->revision == 1)
484 d.dma_ops = &cmd646_rev1_dma_ops;
485 else
486 d.dma_ops = &cmd64x_dma_ops;
487 }
488 }
489 }
496 490
497 return ide_setup_pci_device(dev, &d); 491 return ide_setup_pci_device(dev, &d);
498} 492}
diff --git a/drivers/ide/pci/cs5520.c b/drivers/ide/pci/cs5520.c
index 41559c6de0ca..467d331c8109 100644
--- a/drivers/ide/pci/cs5520.c
+++ b/drivers/ide/pci/cs5520.c
@@ -103,24 +103,20 @@ static void cs5520_dma_host_set(ide_drive_t *drive, int on)
103 ide_dma_host_set(drive, on); 103 ide_dma_host_set(drive, on);
104} 104}
105 105
106static void __devinit init_hwif_cs5520(ide_hwif_t *hwif)
107{
108 if (hwif->dma_base == 0)
109 return;
110
111 hwif->dma_host_set = &cs5520_dma_host_set;
112}
113
114static const struct ide_port_ops cs5520_port_ops = { 106static const struct ide_port_ops cs5520_port_ops = {
115 .set_pio_mode = cs5520_set_pio_mode, 107 .set_pio_mode = cs5520_set_pio_mode,
116 .set_dma_mode = cs5520_set_dma_mode, 108 .set_dma_mode = cs5520_set_dma_mode,
117}; 109};
118 110
111static struct ide_dma_ops cs5520_dma_ops = {
112 .dma_host_set = cs5520_dma_host_set,
113};
114
119#define DECLARE_CS_DEV(name_str) \ 115#define DECLARE_CS_DEV(name_str) \
120 { \ 116 { \
121 .name = name_str, \ 117 .name = name_str, \
122 .init_hwif = init_hwif_cs5520, \
123 .port_ops = &cs5520_port_ops, \ 118 .port_ops = &cs5520_port_ops, \
119 .dma_ops = &cs5520_dma_ops, \
124 .host_flags = IDE_HFLAG_ISA_PORTS | \ 120 .host_flags = IDE_HFLAG_ISA_PORTS | \
125 IDE_HFLAG_CS5520 | \ 121 IDE_HFLAG_CS5520 | \
126 IDE_HFLAG_VDMA | \ 122 IDE_HFLAG_VDMA | \
diff --git a/drivers/ide/pci/hpt366.c b/drivers/ide/pci/hpt366.c
index e5e64436ffd9..5030bda1adeb 100644
--- a/drivers/ide/pci/hpt366.c
+++ b/drivers/ide/pci/hpt366.c
@@ -808,7 +808,7 @@ static void hpt370_irq_timeout(ide_drive_t *drive)
808 hpt370_clear_engine(drive); 808 hpt370_clear_engine(drive);
809} 809}
810 810
811static void hpt370_ide_dma_start(ide_drive_t *drive) 811static void hpt370_dma_start(ide_drive_t *drive)
812{ 812{
813#ifdef HPT_RESET_STATE_ENGINE 813#ifdef HPT_RESET_STATE_ENGINE
814 hpt370_clear_engine(drive); 814 hpt370_clear_engine(drive);
@@ -816,7 +816,7 @@ static void hpt370_ide_dma_start(ide_drive_t *drive)
816 ide_dma_start(drive); 816 ide_dma_start(drive);
817} 817}
818 818
819static int hpt370_ide_dma_end(ide_drive_t *drive) 819static int hpt370_dma_end(ide_drive_t *drive)
820{ 820{
821 ide_hwif_t *hwif = HWIF(drive); 821 ide_hwif_t *hwif = HWIF(drive);
822 u8 dma_stat = inb(hwif->dma_status); 822 u8 dma_stat = inb(hwif->dma_status);
@@ -838,7 +838,7 @@ static void hpt370_dma_timeout(ide_drive_t *drive)
838} 838}
839 839
840/* returns 1 if DMA IRQ issued, 0 otherwise */ 840/* returns 1 if DMA IRQ issued, 0 otherwise */
841static int hpt374_ide_dma_test_irq(ide_drive_t *drive) 841static int hpt374_dma_test_irq(ide_drive_t *drive)
842{ 842{
843 ide_hwif_t *hwif = HWIF(drive); 843 ide_hwif_t *hwif = HWIF(drive);
844 struct pci_dev *dev = to_pci_dev(hwif->dev); 844 struct pci_dev *dev = to_pci_dev(hwif->dev);
@@ -862,7 +862,7 @@ static int hpt374_ide_dma_test_irq(ide_drive_t *drive)
862 return 0; 862 return 0;
863} 863}
864 864
865static int hpt374_ide_dma_end(ide_drive_t *drive) 865static int hpt374_dma_end(ide_drive_t *drive)
866{ 866{
867 ide_hwif_t *hwif = HWIF(drive); 867 ide_hwif_t *hwif = HWIF(drive);
868 struct pci_dev *dev = to_pci_dev(hwif->dev); 868 struct pci_dev *dev = to_pci_dev(hwif->dev);
@@ -1312,19 +1312,6 @@ static void __devinit init_hwif_hpt366(ide_hwif_t *hwif)
1312 1312
1313 if (new_mcr != old_mcr) 1313 if (new_mcr != old_mcr)
1314 pci_write_config_byte(dev, hwif->select_data + 1, new_mcr); 1314 pci_write_config_byte(dev, hwif->select_data + 1, new_mcr);
1315
1316 if (hwif->dma_base == 0)
1317 return;
1318
1319 if (chip_type >= HPT374) {
1320 hwif->ide_dma_test_irq = &hpt374_ide_dma_test_irq;
1321 hwif->ide_dma_end = &hpt374_ide_dma_end;
1322 } else if (chip_type >= HPT370) {
1323 hwif->dma_start = &hpt370_ide_dma_start;
1324 hwif->ide_dma_end = &hpt370_ide_dma_end;
1325 hwif->dma_timeout = &hpt370_dma_timeout;
1326 } else
1327 hwif->dma_lost_irq = &hpt366_dma_lost_irq;
1328} 1315}
1329 1316
1330static int __devinit init_dma_hpt366(ide_hwif_t *hwif, 1317static int __devinit init_dma_hpt366(ide_hwif_t *hwif,
@@ -1360,7 +1347,7 @@ static int __devinit init_dma_hpt366(ide_hwif_t *hwif,
1360 if (ide_allocate_dma_engine(hwif)) 1347 if (ide_allocate_dma_engine(hwif))
1361 return -1; 1348 return -1;
1362 1349
1363 ide_setup_dma(hwif, base); 1350 ide_setup_dma(hwif, base, d);
1364 1351
1365 return 0; 1352 return 0;
1366} 1353}
@@ -1428,6 +1415,21 @@ static const struct ide_port_ops hpt3xx_port_ops = {
1428 .cable_detect = hpt3xx_cable_detect, 1415 .cable_detect = hpt3xx_cable_detect,
1429}; 1416};
1430 1417
1418static struct ide_dma_ops hpt37x_dma_ops = {
1419 .dma_end = hpt374_dma_end,
1420 .dma_test_irq = hpt374_dma_test_irq,
1421};
1422
1423static struct ide_dma_ops hpt370_dma_ops = {
1424 .dma_start = hpt370_dma_start,
1425 .dma_end = hpt370_dma_end,
1426 .dma_timeout = hpt370_dma_timeout,
1427};
1428
1429static struct ide_dma_ops hpt36x_dma_ops = {
1430 .dma_lost_irq = hpt366_dma_lost_irq,
1431};
1432
1431static const struct ide_port_info hpt366_chipsets[] __devinitdata = { 1433static const struct ide_port_info hpt366_chipsets[] __devinitdata = {
1432 { /* 0 */ 1434 { /* 0 */
1433 .name = "HPT36x", 1435 .name = "HPT36x",
@@ -1442,6 +1444,7 @@ static const struct ide_port_info hpt366_chipsets[] __devinitdata = {
1442 */ 1444 */
1443 .enablebits = {{0x50,0x10,0x10}, {0x54,0x04,0x04}}, 1445 .enablebits = {{0x50,0x10,0x10}, {0x54,0x04,0x04}},
1444 .port_ops = &hpt3xx_port_ops, 1446 .port_ops = &hpt3xx_port_ops,
1447 .dma_ops = &hpt36x_dma_ops,
1445 .host_flags = IDE_HFLAGS_HPT3XX | IDE_HFLAG_SINGLE, 1448 .host_flags = IDE_HFLAGS_HPT3XX | IDE_HFLAG_SINGLE,
1446 .pio_mask = ATA_PIO4, 1449 .pio_mask = ATA_PIO4,
1447 .mwdma_mask = ATA_MWDMA2, 1450 .mwdma_mask = ATA_MWDMA2,
@@ -1452,6 +1455,7 @@ static const struct ide_port_info hpt366_chipsets[] __devinitdata = {
1452 .init_dma = init_dma_hpt366, 1455 .init_dma = init_dma_hpt366,
1453 .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, 1456 .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}},
1454 .port_ops = &hpt3xx_port_ops, 1457 .port_ops = &hpt3xx_port_ops,
1458 .dma_ops = &hpt37x_dma_ops,
1455 .host_flags = IDE_HFLAGS_HPT3XX, 1459 .host_flags = IDE_HFLAGS_HPT3XX,
1456 .pio_mask = ATA_PIO4, 1460 .pio_mask = ATA_PIO4,
1457 .mwdma_mask = ATA_MWDMA2, 1461 .mwdma_mask = ATA_MWDMA2,
@@ -1462,6 +1466,7 @@ static const struct ide_port_info hpt366_chipsets[] __devinitdata = {
1462 .init_dma = init_dma_hpt366, 1466 .init_dma = init_dma_hpt366,
1463 .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, 1467 .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}},
1464 .port_ops = &hpt3xx_port_ops, 1468 .port_ops = &hpt3xx_port_ops,
1469 .dma_ops = &hpt37x_dma_ops,
1465 .host_flags = IDE_HFLAGS_HPT3XX, 1470 .host_flags = IDE_HFLAGS_HPT3XX,
1466 .pio_mask = ATA_PIO4, 1471 .pio_mask = ATA_PIO4,
1467 .mwdma_mask = ATA_MWDMA2, 1472 .mwdma_mask = ATA_MWDMA2,
@@ -1472,6 +1477,7 @@ static const struct ide_port_info hpt366_chipsets[] __devinitdata = {
1472 .init_dma = init_dma_hpt366, 1477 .init_dma = init_dma_hpt366,
1473 .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, 1478 .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}},
1474 .port_ops = &hpt3xx_port_ops, 1479 .port_ops = &hpt3xx_port_ops,
1480 .dma_ops = &hpt37x_dma_ops,
1475 .host_flags = IDE_HFLAGS_HPT3XX, 1481 .host_flags = IDE_HFLAGS_HPT3XX,
1476 .pio_mask = ATA_PIO4, 1482 .pio_mask = ATA_PIO4,
1477 .mwdma_mask = ATA_MWDMA2, 1483 .mwdma_mask = ATA_MWDMA2,
@@ -1483,6 +1489,7 @@ static const struct ide_port_info hpt366_chipsets[] __devinitdata = {
1483 .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, 1489 .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}},
1484 .udma_mask = ATA_UDMA5, 1490 .udma_mask = ATA_UDMA5,
1485 .port_ops = &hpt3xx_port_ops, 1491 .port_ops = &hpt3xx_port_ops,
1492 .dma_ops = &hpt37x_dma_ops,
1486 .host_flags = IDE_HFLAGS_HPT3XX, 1493 .host_flags = IDE_HFLAGS_HPT3XX,
1487 .pio_mask = ATA_PIO4, 1494 .pio_mask = ATA_PIO4,
1488 .mwdma_mask = ATA_MWDMA2, 1495 .mwdma_mask = ATA_MWDMA2,
@@ -1493,6 +1500,7 @@ static const struct ide_port_info hpt366_chipsets[] __devinitdata = {
1493 .init_dma = init_dma_hpt366, 1500 .init_dma = init_dma_hpt366,
1494 .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, 1501 .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}},
1495 .port_ops = &hpt3xx_port_ops, 1502 .port_ops = &hpt3xx_port_ops,
1503 .dma_ops = &hpt37x_dma_ops,
1496 .host_flags = IDE_HFLAGS_HPT3XX, 1504 .host_flags = IDE_HFLAGS_HPT3XX,
1497 .pio_mask = ATA_PIO4, 1505 .pio_mask = ATA_PIO4,
1498 .mwdma_mask = ATA_MWDMA2, 1506 .mwdma_mask = ATA_MWDMA2,
@@ -1555,6 +1563,10 @@ static int __devinit hpt366_init_one(struct pci_dev *dev, const struct pci_devic
1555 d.name = info->chip_name; 1563 d.name = info->chip_name;
1556 d.udma_mask = info->udma_mask; 1564 d.udma_mask = info->udma_mask;
1557 1565
1566 /* fixup ->dma_ops for HPT370/HPT370A */
1567 if (info == &hpt370 || info == &hpt370a)
1568 d.dma_ops = &hpt370_dma_ops;
1569
1558 pci_set_drvdata(dev, (void *)info); 1570 pci_set_drvdata(dev, (void *)info);
1559 1571
1560 if (info == &hpt36x || info == &hpt374) 1572 if (info == &hpt36x || info == &hpt374)
diff --git a/drivers/ide/pci/it821x.c b/drivers/ide/pci/it821x.c
index 7f4db1c0a4fc..6ab04115286b 100644
--- a/drivers/ide/pci/it821x.c
+++ b/drivers/ide/pci/it821x.c
@@ -511,6 +511,11 @@ static void __devinit it821x_quirkproc(ide_drive_t *drive)
511 511
512} 512}
513 513
514static struct ide_dma_ops it821x_pass_through_dma_ops = {
515 .dma_start = it821x_dma_start,
516 .dma_end = it821x_dma_end,
517};
518
514/** 519/**
515 * init_hwif_it821x - set up hwif structs 520 * init_hwif_it821x - set up hwif structs
516 * @hwif: interface to set up 521 * @hwif: interface to set up
@@ -562,8 +567,7 @@ static void __devinit init_hwif_it821x(ide_hwif_t *hwif)
562 567
563 if (idev->smart == 0) { 568 if (idev->smart == 0) {
564 /* MWDMA/PIO clock switching for pass through mode */ 569 /* MWDMA/PIO clock switching for pass through mode */
565 hwif->dma_start = &it821x_dma_start; 570 hwif->dma_ops = &it821x_pass_through_dma_ops;
566 hwif->ide_dma_end = &it821x_dma_end;
567 } else 571 } else
568 hwif->host_flags |= IDE_HFLAG_NO_SET_MODE; 572 hwif->host_flags |= IDE_HFLAG_NO_SET_MODE;
569 573
diff --git a/drivers/ide/pci/ns87415.c b/drivers/ide/pci/ns87415.c
index 332de832f171..5a6dec0e1f4d 100644
--- a/drivers/ide/pci/ns87415.c
+++ b/drivers/ide/pci/ns87415.c
@@ -150,7 +150,7 @@ static void ns87415_selectproc (ide_drive_t *drive)
150 ns87415_prepare_drive (drive, drive->using_dma); 150 ns87415_prepare_drive (drive, drive->using_dma);
151} 151}
152 152
153static int ns87415_ide_dma_end (ide_drive_t *drive) 153static int ns87415_dma_end(ide_drive_t *drive)
154{ 154{
155 ide_hwif_t *hwif = HWIF(drive); 155 ide_hwif_t *hwif = HWIF(drive);
156 u8 dma_stat = 0, dma_cmd = 0; 156 u8 dma_stat = 0, dma_cmd = 0;
@@ -170,7 +170,7 @@ static int ns87415_ide_dma_end (ide_drive_t *drive)
170 return (dma_stat & 7) != 4; 170 return (dma_stat & 7) != 4;
171} 171}
172 172
173static int ns87415_ide_dma_setup(ide_drive_t *drive) 173static int ns87415_dma_setup(ide_drive_t *drive)
174{ 174{
175 /* select DMA xfer */ 175 /* select DMA xfer */
176 ns87415_prepare_drive(drive, 1); 176 ns87415_prepare_drive(drive, 1);
@@ -252,14 +252,17 @@ static void __devinit init_hwif_ns87415 (ide_hwif_t *hwif)
252 return; 252 return;
253 253
254 outb(0x60, hwif->dma_status); 254 outb(0x60, hwif->dma_status);
255 hwif->dma_setup = &ns87415_ide_dma_setup;
256 hwif->ide_dma_end = &ns87415_ide_dma_end;
257} 255}
258 256
259static const struct ide_port_ops ns87415_port_ops = { 257static const struct ide_port_ops ns87415_port_ops = {
260 .selectproc = ns87415_selectproc, 258 .selectproc = ns87415_selectproc,
261}; 259};
262 260
261static struct ide_dma_ops ns87415_dma_ops = {
262 .dma_setup = ns87415_dma_setup,
263 .dma_end = ns87415_dma_end,
264};
265
263static const struct ide_port_info ns87415_chipset __devinitdata = { 266static const struct ide_port_info ns87415_chipset __devinitdata = {
264 .name = "NS87415", 267 .name = "NS87415",
265#ifdef CONFIG_SUPERIO 268#ifdef CONFIG_SUPERIO
@@ -267,6 +270,7 @@ static const struct ide_port_info ns87415_chipset __devinitdata = {
267#endif 270#endif
268 .init_hwif = init_hwif_ns87415, 271 .init_hwif = init_hwif_ns87415,
269 .port_ops = &ns87415_port_ops, 272 .port_ops = &ns87415_port_ops,
273 .dma_ops = &ns87415_dma_ops,
270 .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA | 274 .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA |
271 IDE_HFLAG_NO_ATAPI_DMA, 275 IDE_HFLAG_NO_ATAPI_DMA,
272}; 276};
diff --git a/drivers/ide/pci/pdc202xx_old.c b/drivers/ide/pci/pdc202xx_old.c
index 24e440de4c80..9c490fd63fde 100644
--- a/drivers/ide/pci/pdc202xx_old.c
+++ b/drivers/ide/pci/pdc202xx_old.c
@@ -163,7 +163,7 @@ static void pdc202xx_quirkproc(ide_drive_t *drive)
163 drive->quirk_list = 0; 163 drive->quirk_list = 0;
164} 164}
165 165
166static void pdc202xx_old_ide_dma_start(ide_drive_t *drive) 166static void pdc202xx_dma_start(ide_drive_t *drive)
167{ 167{
168 if (drive->current_speed > XFER_UDMA_2) 168 if (drive->current_speed > XFER_UDMA_2)
169 pdc_old_enable_66MHz_clock(drive->hwif); 169 pdc_old_enable_66MHz_clock(drive->hwif);
@@ -185,7 +185,7 @@ static void pdc202xx_old_ide_dma_start(ide_drive_t *drive)
185 ide_dma_start(drive); 185 ide_dma_start(drive);
186} 186}
187 187
188static int pdc202xx_old_ide_dma_end(ide_drive_t *drive) 188static int pdc202xx_dma_end(ide_drive_t *drive)
189{ 189{
190 if (drive->media != ide_disk || drive->addressing == 1) { 190 if (drive->media != ide_disk || drive->addressing == 1) {
191 ide_hwif_t *hwif = HWIF(drive); 191 ide_hwif_t *hwif = HWIF(drive);
@@ -202,7 +202,7 @@ static int pdc202xx_old_ide_dma_end(ide_drive_t *drive)
202 return __ide_dma_end(drive); 202 return __ide_dma_end(drive);
203} 203}
204 204
205static int pdc202xx_old_ide_dma_test_irq(ide_drive_t *drive) 205static int pdc202xx_dma_test_irq(ide_drive_t *drive)
206{ 206{
207 ide_hwif_t *hwif = HWIF(drive); 207 ide_hwif_t *hwif = HWIF(drive);
208 unsigned long high_16 = hwif->extra_base - 16; 208 unsigned long high_16 = hwif->extra_base - 16;
@@ -263,23 +263,6 @@ static void pdc202xx_dma_timeout(ide_drive_t *drive)
263 ide_dma_timeout(drive); 263 ide_dma_timeout(drive);
264} 264}
265 265
266static void __devinit init_hwif_pdc202xx(ide_hwif_t *hwif)
267{
268 struct pci_dev *dev = to_pci_dev(hwif->dev);
269
270 if (hwif->dma_base == 0)
271 return;
272
273 hwif->dma_lost_irq = &pdc202xx_dma_lost_irq;
274 hwif->dma_timeout = &pdc202xx_dma_timeout;
275
276 if (dev->device != PCI_DEVICE_ID_PROMISE_20246) {
277 hwif->dma_start = &pdc202xx_old_ide_dma_start;
278 hwif->ide_dma_end = &pdc202xx_old_ide_dma_end;
279 }
280 hwif->ide_dma_test_irq = &pdc202xx_old_ide_dma_test_irq;
281}
282
283static unsigned int __devinit init_chipset_pdc202xx(struct pci_dev *dev, 266static unsigned int __devinit init_chipset_pdc202xx(struct pci_dev *dev,
284 const char *name) 267 const char *name)
285{ 268{
@@ -346,12 +329,26 @@ static const struct ide_port_ops pdc2026x_port_ops = {
346 .cable_detect = pdc2026x_cable_detect, 329 .cable_detect = pdc2026x_cable_detect,
347}; 330};
348 331
332static struct ide_dma_ops pdc20246_dma_ops = {
333 .dma_test_irq = pdc202xx_dma_test_irq,
334 .dma_lost_irq = pdc202xx_dma_lost_irq,
335 .dma_timeout = pdc202xx_dma_timeout,
336};
337
338static struct ide_dma_ops pdc2026x_dma_ops = {
339 .dma_start = pdc202xx_dma_start,
340 .dma_end = pdc202xx_dma_end,
341 .dma_test_irq = pdc202xx_dma_test_irq,
342 .dma_lost_irq = pdc202xx_dma_lost_irq,
343 .dma_timeout = pdc202xx_dma_timeout,
344};
345
349#define DECLARE_PDC2026X_DEV(name_str, udma, extra_flags) \ 346#define DECLARE_PDC2026X_DEV(name_str, udma, extra_flags) \
350 { \ 347 { \
351 .name = name_str, \ 348 .name = name_str, \
352 .init_chipset = init_chipset_pdc202xx, \ 349 .init_chipset = init_chipset_pdc202xx, \
353 .init_hwif = init_hwif_pdc202xx, \
354 .port_ops = &pdc2026x_port_ops, \ 350 .port_ops = &pdc2026x_port_ops, \
351 .dma_ops = &pdc2026x_dma_ops, \
355 .host_flags = IDE_HFLAGS_PDC202XX | extra_flags, \ 352 .host_flags = IDE_HFLAGS_PDC202XX | extra_flags, \
356 .pio_mask = ATA_PIO4, \ 353 .pio_mask = ATA_PIO4, \
357 .mwdma_mask = ATA_MWDMA2, \ 354 .mwdma_mask = ATA_MWDMA2, \
@@ -362,8 +359,8 @@ static const struct ide_port_info pdc202xx_chipsets[] __devinitdata = {
362 { /* 0 */ 359 { /* 0 */
363 .name = "PDC20246", 360 .name = "PDC20246",
364 .init_chipset = init_chipset_pdc202xx, 361 .init_chipset = init_chipset_pdc202xx,
365 .init_hwif = init_hwif_pdc202xx,
366 .port_ops = &pdc20246_port_ops, 362 .port_ops = &pdc20246_port_ops,
363 .dma_ops = &pdc20246_dma_ops,
367 .host_flags = IDE_HFLAGS_PDC202XX, 364 .host_flags = IDE_HFLAGS_PDC202XX,
368 .pio_mask = ATA_PIO4, 365 .pio_mask = ATA_PIO4,
369 .mwdma_mask = ATA_MWDMA2, 366 .mwdma_mask = ATA_MWDMA2,
diff --git a/drivers/ide/pci/sc1200.c b/drivers/ide/pci/sc1200.c
index 0c144770a8da..303bcfb2a441 100644
--- a/drivers/ide/pci/sc1200.c
+++ b/drivers/ide/pci/sc1200.c
@@ -165,7 +165,7 @@ static void sc1200_set_dma_mode(ide_drive_t *drive, const u8 mode)
165 * 165 *
166 * returns 1 on error, 0 otherwise 166 * returns 1 on error, 0 otherwise
167 */ 167 */
168static int sc1200_ide_dma_end (ide_drive_t *drive) 168static int sc1200_dma_end(ide_drive_t *drive)
169{ 169{
170 ide_hwif_t *hwif = HWIF(drive); 170 ide_hwif_t *hwif = HWIF(drive);
171 unsigned long dma_base = hwif->dma_base; 171 unsigned long dma_base = hwif->dma_base;
@@ -214,7 +214,7 @@ static void sc1200_set_pio_mode(ide_drive_t *drive, const u8 pio)
214 printk("SC1200: %s: changing (U)DMA mode\n", drive->name); 214 printk("SC1200: %s: changing (U)DMA mode\n", drive->name);
215 ide_dma_off_quietly(drive); 215 ide_dma_off_quietly(drive);
216 if (ide_set_dma_mode(drive, mode) == 0 && drive->using_dma) 216 if (ide_set_dma_mode(drive, mode) == 0 && drive->using_dma)
217 hwif->dma_host_set(drive, 1); 217 hwif->dma_ops->dma_host_set(drive, 1);
218 return; 218 return;
219 } 219 }
220 220
@@ -286,28 +286,20 @@ static int sc1200_resume (struct pci_dev *dev)
286} 286}
287#endif 287#endif
288 288
289/*
290 * This gets invoked by the IDE driver once for each channel,
291 * and performs channel-specific pre-initialization before drive probing.
292 */
293static void __devinit init_hwif_sc1200 (ide_hwif_t *hwif)
294{
295 if (hwif->dma_base == 0)
296 return;
297
298 hwif->ide_dma_end = &sc1200_ide_dma_end;
299}
300
301static const struct ide_port_ops sc1200_port_ops = { 289static const struct ide_port_ops sc1200_port_ops = {
302 .set_pio_mode = sc1200_set_pio_mode, 290 .set_pio_mode = sc1200_set_pio_mode,
303 .set_dma_mode = sc1200_set_dma_mode, 291 .set_dma_mode = sc1200_set_dma_mode,
304 .udma_filter = sc1200_udma_filter, 292 .udma_filter = sc1200_udma_filter,
305}; 293};
306 294
295static struct ide_dma_ops sc1200_dma_ops = {
296 .dma_end = sc1200_dma_end,
297};
298
307static const struct ide_port_info sc1200_chipset __devinitdata = { 299static const struct ide_port_info sc1200_chipset __devinitdata = {
308 .name = "SC1200", 300 .name = "SC1200",
309 .init_hwif = init_hwif_sc1200,
310 .port_ops = &sc1200_port_ops, 301 .port_ops = &sc1200_port_ops,
302 .dma_ops = &sc1200_dma_ops,
311 .host_flags = IDE_HFLAG_SERIALIZE | 303 .host_flags = IDE_HFLAG_SERIALIZE |
312 IDE_HFLAG_POST_SET_MODE | 304 IDE_HFLAG_POST_SET_MODE |
313 IDE_HFLAG_ABUSE_DMA_MODES, 305 IDE_HFLAG_ABUSE_DMA_MODES,
diff --git a/drivers/ide/pci/scc_pata.c b/drivers/ide/pci/scc_pata.c
index c30b0c44c705..5117c11134cd 100644
--- a/drivers/ide/pci/scc_pata.c
+++ b/drivers/ide/pci/scc_pata.c
@@ -317,14 +317,14 @@ static int scc_dma_setup(ide_drive_t *drive)
317 317
318 318
319/** 319/**
320 * scc_ide_dma_end - Stop DMA 320 * scc_dma_end - Stop DMA
321 * @drive: IDE drive 321 * @drive: IDE drive
322 * 322 *
323 * Check and clear INT Status register. 323 * Check and clear INT Status register.
324 * Then call __ide_dma_end(). 324 * Then call __ide_dma_end().
325 */ 325 */
326 326
327static int scc_ide_dma_end(ide_drive_t * drive) 327static int scc_dma_end(ide_drive_t *drive)
328{ 328{
329 ide_hwif_t *hwif = HWIF(drive); 329 ide_hwif_t *hwif = HWIF(drive);
330 unsigned long intsts_port = hwif->dma_base + 0x014; 330 unsigned long intsts_port = hwif->dma_base + 0x014;
@@ -692,10 +692,6 @@ static void __devinit init_hwif_scc(ide_hwif_t *hwif)
692 /* PTERADD */ 692 /* PTERADD */
693 out_be32((void __iomem *)(hwif->dma_base + 0x018), hwif->dmatable_dma); 693 out_be32((void __iomem *)(hwif->dma_base + 0x018), hwif->dmatable_dma);
694 694
695 hwif->dma_setup = scc_dma_setup;
696 hwif->ide_dma_end = scc_ide_dma_end;
697 hwif->ide_dma_test_irq = scc_dma_test_irq;
698
699 if (in_be32((void __iomem *)(hwif->config_data + 0xff0)) & CCKCTRL_ATACLKOEN) 695 if (in_be32((void __iomem *)(hwif->config_data + 0xff0)) & CCKCTRL_ATACLKOEN)
700 hwif->ultra_mask = ATA_UDMA6; /* 133MHz */ 696 hwif->ultra_mask = ATA_UDMA6; /* 133MHz */
701 else 697 else
@@ -709,12 +705,19 @@ static const struct ide_port_ops scc_port_ops = {
709 .cable_detect = scc_cable_detect, 705 .cable_detect = scc_cable_detect,
710}; 706};
711 707
708static struct ide_dma_ops scc_dma_ops = {
709 .dma_setup = scc_dma_setup,
710 .dma_end = scc_dma_end,
711 .dma_test_irq = scc_dma_test_irq,
712};
713
712#define DECLARE_SCC_DEV(name_str) \ 714#define DECLARE_SCC_DEV(name_str) \
713 { \ 715 { \
714 .name = name_str, \ 716 .name = name_str, \
715 .init_iops = init_iops_scc, \ 717 .init_iops = init_iops_scc, \
716 .init_hwif = init_hwif_scc, \ 718 .init_hwif = init_hwif_scc, \
717 .port_ops = &scc_port_ops, \ 719 .port_ops = &scc_port_ops, \
720 .dma_ops = &scc_dma_ops, \
718 .host_flags = IDE_HFLAG_SINGLE, \ 721 .host_flags = IDE_HFLAG_SINGLE, \
719 .pio_mask = ATA_PIO4, \ 722 .pio_mask = ATA_PIO4, \
720 } 723 }
diff --git a/drivers/ide/pci/sgiioc4.c b/drivers/ide/pci/sgiioc4.c
index 47d6e0492dda..2cbb7fd1ddec 100644
--- a/drivers/ide/pci/sgiioc4.c
+++ b/drivers/ide/pci/sgiioc4.c
@@ -188,7 +188,7 @@ sgiioc4_clearirq(ide_drive_t * drive)
188 return intr_reg & 3; 188 return intr_reg & 3;
189} 189}
190 190
191static void sgiioc4_ide_dma_start(ide_drive_t * drive) 191static void sgiioc4_dma_start(ide_drive_t *drive)
192{ 192{
193 ide_hwif_t *hwif = HWIF(drive); 193 ide_hwif_t *hwif = HWIF(drive);
194 unsigned long ioc4_dma_addr = hwif->dma_base + IOC4_DMA_CTRL * 4; 194 unsigned long ioc4_dma_addr = hwif->dma_base + IOC4_DMA_CTRL * 4;
@@ -215,8 +215,7 @@ sgiioc4_ide_dma_stop(ide_hwif_t *hwif, u64 dma_base)
215} 215}
216 216
217/* Stops the IOC4 DMA Engine */ 217/* Stops the IOC4 DMA Engine */
218static int 218static int sgiioc4_dma_end(ide_drive_t *drive)
219sgiioc4_ide_dma_end(ide_drive_t * drive)
220{ 219{
221 u32 ioc4_dma, bc_dev, bc_mem, num, valid = 0, cnt = 0; 220 u32 ioc4_dma, bc_dev, bc_mem, num, valid = 0, cnt = 0;
222 ide_hwif_t *hwif = HWIF(drive); 221 ide_hwif_t *hwif = HWIF(drive);
@@ -279,8 +278,7 @@ static void sgiioc4_set_dma_mode(ide_drive_t *drive, const u8 speed)
279} 278}
280 279
281/* returns 1 if dma irq issued, 0 otherwise */ 280/* returns 1 if dma irq issued, 0 otherwise */
282static int 281static int sgiioc4_dma_test_irq(ide_drive_t *drive)
283sgiioc4_ide_dma_test_irq(ide_drive_t * drive)
284{ 282{
285 return sgiioc4_checkirq(HWIF(drive)); 283 return sgiioc4_checkirq(HWIF(drive));
286} 284}
@@ -294,7 +292,7 @@ static void sgiioc4_dma_host_set(ide_drive_t *drive, int on)
294static void 292static void
295sgiioc4_resetproc(ide_drive_t * drive) 293sgiioc4_resetproc(ide_drive_t * drive)
296{ 294{
297 sgiioc4_ide_dma_end(drive); 295 sgiioc4_dma_end(drive);
298 sgiioc4_clearirq(drive); 296 sgiioc4_clearirq(drive);
299} 297}
300 298
@@ -327,8 +325,6 @@ sgiioc4_INB(unsigned long port)
327 return reg; 325 return reg;
328} 326}
329 327
330static void __devinit ide_init_sgiioc4(ide_hwif_t *);
331
332/* Creates a dma map for the scatter-gather list entries */ 328/* Creates a dma map for the scatter-gather list entries */
333static int __devinit 329static int __devinit
334ide_dma_sgiioc4(ide_hwif_t *hwif, const struct ide_port_info *d) 330ide_dma_sgiioc4(ide_hwif_t *hwif, const struct ide_port_info *d)
@@ -377,7 +373,6 @@ ide_dma_sgiioc4(ide_hwif_t *hwif, const struct ide_port_info *d)
377 373
378 if (pad) { 374 if (pad) {
379 ide_set_hwifdata(hwif, pad); 375 ide_set_hwifdata(hwif, pad);
380 ide_init_sgiioc4(hwif);
381 return 0; 376 return 0;
382 } 377 }
383 378
@@ -526,7 +521,7 @@ use_pio_instead:
526 return 0; /* revert to PIO for this request */ 521 return 0; /* revert to PIO for this request */
527} 522}
528 523
529static int sgiioc4_ide_dma_setup(ide_drive_t *drive) 524static int sgiioc4_dma_setup(ide_drive_t *drive)
530{ 525{
531 struct request *rq = HWGROUP(drive)->rq; 526 struct request *rq = HWGROUP(drive)->rq;
532 unsigned int count = 0; 527 unsigned int count = 0;
@@ -555,18 +550,6 @@ static int sgiioc4_ide_dma_setup(ide_drive_t *drive)
555 return 0; 550 return 0;
556} 551}
557 552
558static void __devinit
559ide_init_sgiioc4(ide_hwif_t * hwif)
560{
561 hwif->dma_host_set = &sgiioc4_dma_host_set;
562 hwif->dma_setup = &sgiioc4_ide_dma_setup;
563 hwif->dma_start = &sgiioc4_ide_dma_start;
564 hwif->ide_dma_end = &sgiioc4_ide_dma_end;
565 hwif->ide_dma_test_irq = &sgiioc4_ide_dma_test_irq;
566 hwif->dma_lost_irq = &sgiioc4_dma_lost_irq;
567 hwif->dma_timeout = &ide_dma_timeout;
568}
569
570static const struct ide_port_ops sgiioc4_port_ops = { 553static const struct ide_port_ops sgiioc4_port_ops = {
571 .set_dma_mode = sgiioc4_set_dma_mode, 554 .set_dma_mode = sgiioc4_set_dma_mode,
572 /* reset DMA engine, clear IRQs */ 555 /* reset DMA engine, clear IRQs */
@@ -575,10 +558,21 @@ static const struct ide_port_ops sgiioc4_port_ops = {
575 .maskproc = sgiioc4_maskproc, 558 .maskproc = sgiioc4_maskproc,
576}; 559};
577 560
561static struct ide_dma_ops sgiioc4_dma_ops = {
562 .dma_host_set = sgiioc4_dma_host_set,
563 .dma_setup = sgiioc4_dma_setup,
564 .dma_start = sgiioc4_dma_start,
565 .dma_end = sgiioc4_dma_end,
566 .dma_test_irq = sgiioc4_dma_test_irq,
567 .dma_lost_irq = sgiioc4_dma_lost_irq,
568 .dma_timeout = ide_dma_timeout,
569};
570
578static const struct ide_port_info sgiioc4_port_info __devinitdata = { 571static const struct ide_port_info sgiioc4_port_info __devinitdata = {
579 .chipset = ide_pci, 572 .chipset = ide_pci,
580 .init_dma = ide_dma_sgiioc4, 573 .init_dma = ide_dma_sgiioc4,
581 .port_ops = &sgiioc4_port_ops, 574 .port_ops = &sgiioc4_port_ops,
575 .dma_ops = &sgiioc4_dma_ops,
582 .host_flags = IDE_HFLAG_NO_AUTOTUNE, 576 .host_flags = IDE_HFLAG_NO_AUTOTUNE,
583 .mwdma_mask = ATA_MWDMA2_ONLY, 577 .mwdma_mask = ATA_MWDMA2_ONLY,
584}; 578};
diff --git a/drivers/ide/pci/siimage.c b/drivers/ide/pci/siimage.c
index faf5c3d6ab72..1fffea3211bd 100644
--- a/drivers/ide/pci/siimage.c
+++ b/drivers/ide/pci/siimage.c
@@ -301,7 +301,7 @@ static void sil_set_dma_mode(ide_drive_t *drive, const u8 speed)
301} 301}
302 302
303/* returns 1 if dma irq issued, 0 otherwise */ 303/* returns 1 if dma irq issued, 0 otherwise */
304static int siimage_io_ide_dma_test_irq (ide_drive_t *drive) 304static int siimage_io_dma_test_irq(ide_drive_t *drive)
305{ 305{
306 ide_hwif_t *hwif = HWIF(drive); 306 ide_hwif_t *hwif = HWIF(drive);
307 struct pci_dev *dev = to_pci_dev(hwif->dev); 307 struct pci_dev *dev = to_pci_dev(hwif->dev);
@@ -320,14 +320,14 @@ static int siimage_io_ide_dma_test_irq (ide_drive_t *drive)
320} 320}
321 321
322/** 322/**
323 * siimage_mmio_ide_dma_test_irq - check we caused an IRQ 323 * siimage_mmio_dma_test_irq - check we caused an IRQ
324 * @drive: drive we are testing 324 * @drive: drive we are testing
325 * 325 *
326 * Check if we caused an IDE DMA interrupt. We may also have caused 326 * Check if we caused an IDE DMA interrupt. We may also have caused
327 * SATA status interrupts, if so we clean them up and continue. 327 * SATA status interrupts, if so we clean them up and continue.
328 */ 328 */
329 329
330static int siimage_mmio_ide_dma_test_irq (ide_drive_t *drive) 330static int siimage_mmio_dma_test_irq(ide_drive_t *drive)
331{ 331{
332 ide_hwif_t *hwif = HWIF(drive); 332 ide_hwif_t *hwif = HWIF(drive);
333 unsigned long addr = siimage_selreg(hwif, 0x1); 333 unsigned long addr = siimage_selreg(hwif, 0x1);
@@ -369,6 +369,14 @@ static int siimage_mmio_ide_dma_test_irq (ide_drive_t *drive)
369 return 0; 369 return 0;
370} 370}
371 371
372static int siimage_dma_test_irq(ide_drive_t *drive)
373{
374 if (drive->hwif->mmio)
375 return siimage_mmio_dma_test_irq(drive);
376 else
377 return siimage_io_dma_test_irq(drive);
378}
379
372/** 380/**
373 * sil_sata_reset_poll - wait for SATA reset 381 * sil_sata_reset_poll - wait for SATA reset
374 * @drive: drive we are resetting 382 * @drive: drive we are resetting
@@ -756,41 +764,6 @@ static u8 __devinit sil_cable_detect(ide_hwif_t *hwif)
756 return (ata66 & 0x01) ? ATA_CBL_PATA80 : ATA_CBL_PATA40; 764 return (ata66 & 0x01) ? ATA_CBL_PATA80 : ATA_CBL_PATA40;
757} 765}
758 766
759/**
760 * init_hwif_siimage - set up hwif structs
761 * @hwif: interface to set up
762 *
763 * We do the basic set up of the interface structure. The SIIMAGE
764 * requires several custom handlers so we override the default
765 * ide DMA handlers appropriately
766 */
767
768static void __devinit init_hwif_siimage(ide_hwif_t *hwif)
769{
770 u8 sata = is_sata(hwif);
771
772 if (sata) {
773 static int first = 1;
774
775 if (first) {
776 printk(KERN_INFO "siimage: For full SATA support you should use the libata sata_sil module.\n");
777 first = 0;
778 }
779 }
780
781 if (hwif->dma_base == 0)
782 return;
783
784 if (sata)
785 hwif->host_flags |= IDE_HFLAG_NO_ATAPI_DMA;
786
787 if (hwif->mmio) {
788 hwif->ide_dma_test_irq = &siimage_mmio_ide_dma_test_irq;
789 } else {
790 hwif->ide_dma_test_irq = & siimage_io_ide_dma_test_irq;
791 }
792}
793
794static const struct ide_port_ops sil_pata_port_ops = { 767static const struct ide_port_ops sil_pata_port_ops = {
795 .set_pio_mode = sil_set_pio_mode, 768 .set_pio_mode = sil_set_pio_mode,
796 .set_dma_mode = sil_set_dma_mode, 769 .set_dma_mode = sil_set_dma_mode,
@@ -809,13 +782,17 @@ static const struct ide_port_ops sil_sata_port_ops = {
809 .cable_detect = sil_cable_detect, 782 .cable_detect = sil_cable_detect,
810}; 783};
811 784
785static struct ide_dma_ops sil_dma_ops = {
786 .dma_test_irq = siimage_dma_test_irq,
787};
788
812#define DECLARE_SII_DEV(name_str, p_ops) \ 789#define DECLARE_SII_DEV(name_str, p_ops) \
813 { \ 790 { \
814 .name = name_str, \ 791 .name = name_str, \
815 .init_chipset = init_chipset_siimage, \ 792 .init_chipset = init_chipset_siimage, \
816 .init_iops = init_iops_siimage, \ 793 .init_iops = init_iops_siimage, \
817 .init_hwif = init_hwif_siimage, \
818 .port_ops = p_ops, \ 794 .port_ops = p_ops, \
795 .dma_ops = &sil_dma_ops, \
819 .pio_mask = ATA_PIO4, \ 796 .pio_mask = ATA_PIO4, \
820 .mwdma_mask = ATA_MWDMA2, \ 797 .mwdma_mask = ATA_MWDMA2, \
821 .udma_mask = ATA_UDMA6, \ 798 .udma_mask = ATA_UDMA6, \
@@ -838,7 +815,24 @@ static const struct ide_port_info siimage_chipsets[] __devinitdata = {
838 815
839static int __devinit siimage_init_one(struct pci_dev *dev, const struct pci_device_id *id) 816static int __devinit siimage_init_one(struct pci_dev *dev, const struct pci_device_id *id)
840{ 817{
841 return ide_setup_pci_device(dev, &siimage_chipsets[id->driver_data]); 818 struct ide_port_info d;
819 u8 idx = id->driver_data;
820
821 d = siimage_chipsets[idx];
822
823 if (idx) {
824 static int first = 1;
825
826 if (first) {
827 printk(KERN_INFO "siimage: For full SATA support you "
828 "should use the libata sata_sil module.\n");
829 first = 0;
830 }
831
832 d.host_flags |= IDE_HFLAG_NO_ATAPI_DMA;
833 }
834
835 return ide_setup_pci_device(dev, &d);
842} 836}
843 837
844static const struct pci_device_id siimage_pci_tbl[] = { 838static const struct pci_device_id siimage_pci_tbl[] = {
diff --git a/drivers/ide/pci/sl82c105.c b/drivers/ide/pci/sl82c105.c
index c2127cbdecd3..635d607bc0cf 100644
--- a/drivers/ide/pci/sl82c105.c
+++ b/drivers/ide/pci/sl82c105.c
@@ -282,34 +282,25 @@ static unsigned int __devinit init_chipset_sl82c105(struct pci_dev *dev, const c
282 return dev->irq; 282 return dev->irq;
283} 283}
284 284
285/*
286 * Initialise IDE channel
287 */
288static void __devinit init_hwif_sl82c105(ide_hwif_t *hwif)
289{
290 DBG(("init_hwif_sl82c105(hwif: ide%d)\n", hwif->index));
291
292 if (!hwif->dma_base)
293 return;
294
295 hwif->dma_lost_irq = &sl82c105_dma_lost_irq;
296 hwif->dma_start = &sl82c105_dma_start;
297 hwif->ide_dma_end = &sl82c105_dma_end;
298 hwif->dma_timeout = &sl82c105_dma_timeout;
299}
300
301static const struct ide_port_ops sl82c105_port_ops = { 285static const struct ide_port_ops sl82c105_port_ops = {
302 .set_pio_mode = sl82c105_set_pio_mode, 286 .set_pio_mode = sl82c105_set_pio_mode,
303 .set_dma_mode = sl82c105_set_dma_mode, 287 .set_dma_mode = sl82c105_set_dma_mode,
304 .resetproc = sl82c105_resetproc, 288 .resetproc = sl82c105_resetproc,
305}; 289};
306 290
291static struct ide_dma_ops sl82c105_dma_ops = {
292 .dma_start = sl82c105_dma_start,
293 .dma_end = sl82c105_dma_end,
294 .dma_lost_irq = sl82c105_dma_lost_irq,
295 .dma_timeout = sl82c105_dma_timeout,
296};
297
307static const struct ide_port_info sl82c105_chipset __devinitdata = { 298static const struct ide_port_info sl82c105_chipset __devinitdata = {
308 .name = "W82C105", 299 .name = "W82C105",
309 .init_chipset = init_chipset_sl82c105, 300 .init_chipset = init_chipset_sl82c105,
310 .init_hwif = init_hwif_sl82c105,
311 .enablebits = {{0x40,0x01,0x01}, {0x40,0x10,0x10}}, 301 .enablebits = {{0x40,0x01,0x01}, {0x40,0x10,0x10}},
312 .port_ops = &sl82c105_port_ops, 302 .port_ops = &sl82c105_port_ops,
303 .dma_ops = &sl82c105_dma_ops,
313 .host_flags = IDE_HFLAG_IO_32BIT | 304 .host_flags = IDE_HFLAG_IO_32BIT |
314 IDE_HFLAG_UNMASK_IRQS | 305 IDE_HFLAG_UNMASK_IRQS |
315/* FIXME: check for Compatibility mode in generic IDE PCI code */ 306/* FIXME: check for Compatibility mode in generic IDE PCI code */
@@ -334,7 +325,7 @@ static int __devinit sl82c105_init_one(struct pci_dev *dev, const struct pci_dev
334 */ 325 */
335 printk(KERN_INFO "W82C105_IDE: Winbond W83C553 bridge " 326 printk(KERN_INFO "W82C105_IDE: Winbond W83C553 bridge "
336 "revision %d, BM-DMA disabled\n", rev); 327 "revision %d, BM-DMA disabled\n", rev);
337 d.init_hwif = NULL; 328 d.dma_ops = NULL;
338 d.mwdma_mask = 0; 329 d.mwdma_mask = 0;
339 d.host_flags &= ~IDE_HFLAG_SERIALIZE_DMA; 330 d.host_flags &= ~IDE_HFLAG_SERIALIZE_DMA;
340 } 331 }
diff --git a/drivers/ide/pci/tc86c001.c b/drivers/ide/pci/tc86c001.c
index 14ce400a0eaf..4ce240db3263 100644
--- a/drivers/ide/pci/tc86c001.c
+++ b/drivers/ide/pci/tc86c001.c
@@ -168,8 +168,6 @@ static void __devinit init_hwif_tc86c001(ide_hwif_t *hwif)
168 168
169 /* Sector Count Register limit */ 169 /* Sector Count Register limit */
170 hwif->rqsize = 0xffff; 170 hwif->rqsize = 0xffff;
171
172 hwif->dma_start = &tc86c001_dma_start;
173} 171}
174 172
175static unsigned int __devinit init_chipset_tc86c001(struct pci_dev *dev, 173static unsigned int __devinit init_chipset_tc86c001(struct pci_dev *dev,
@@ -188,11 +186,16 @@ static const struct ide_port_ops tc86c001_port_ops = {
188 .cable_detect = tc86c001_cable_detect, 186 .cable_detect = tc86c001_cable_detect,
189}; 187};
190 188
189static struct ide_dma_ops tc86c001_dma_ops = {
190 .dma_start = tc86c001_dma_start,
191};
192
191static const struct ide_port_info tc86c001_chipset __devinitdata = { 193static const struct ide_port_info tc86c001_chipset __devinitdata = {
192 .name = "TC86C001", 194 .name = "TC86C001",
193 .init_chipset = init_chipset_tc86c001, 195 .init_chipset = init_chipset_tc86c001,
194 .init_hwif = init_hwif_tc86c001, 196 .init_hwif = init_hwif_tc86c001,
195 .port_ops = &tc86c001_port_ops, 197 .port_ops = &tc86c001_port_ops,
198 .dma_ops = &tc86c001_dma_ops,
196 .host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_OFF_BOARD | 199 .host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_OFF_BOARD |
197 IDE_HFLAG_ABUSE_SET_DMA_MODE, 200 IDE_HFLAG_ABUSE_SET_DMA_MODE,
198 .pio_mask = ATA_PIO4, 201 .pio_mask = ATA_PIO4,
diff --git a/drivers/ide/pci/trm290.c b/drivers/ide/pci/trm290.c
index 7e354d33323b..c506e97cd716 100644
--- a/drivers/ide/pci/trm290.c
+++ b/drivers/ide/pci/trm290.c
@@ -214,7 +214,7 @@ static void trm290_dma_start(ide_drive_t *drive)
214{ 214{
215} 215}
216 216
217static int trm290_ide_dma_end (ide_drive_t *drive) 217static int trm290_dma_end(ide_drive_t *drive)
218{ 218{
219 u16 status; 219 u16 status;
220 220
@@ -225,7 +225,7 @@ static int trm290_ide_dma_end (ide_drive_t *drive)
225 return status != 0x00ff; 225 return status != 0x00ff;
226} 226}
227 227
228static int trm290_ide_dma_test_irq (ide_drive_t *drive) 228static int trm290_dma_test_irq(ide_drive_t *drive)
229{ 229{
230 u16 status; 230 u16 status;
231 231
@@ -280,12 +280,6 @@ static void __devinit init_hwif_trm290(ide_hwif_t *hwif)
280 /* sharing IRQ with mate */ 280 /* sharing IRQ with mate */
281 hwif->irq = hwif->mate->irq; 281 hwif->irq = hwif->mate->irq;
282 282
283 hwif->dma_host_set = &trm290_dma_host_set;
284 hwif->dma_setup = &trm290_dma_setup;
285 hwif->dma_exec_cmd = &trm290_dma_exec_cmd;
286 hwif->dma_start = &trm290_dma_start;
287 hwif->ide_dma_end = &trm290_ide_dma_end;
288 hwif->ide_dma_test_irq = &trm290_ide_dma_test_irq;
289#if 1 283#if 1
290 { 284 {
291 /* 285 /*
@@ -319,11 +313,21 @@ static const struct ide_port_ops trm290_port_ops = {
319 .selectproc = trm290_selectproc, 313 .selectproc = trm290_selectproc,
320}; 314};
321 315
316static struct ide_dma_ops trm290_dma_ops = {
317 .dma_host_set = trm290_dma_host_set,
318 .dma_setup = trm290_dma_setup,
319 .dma_exec_cmd = trm290_dma_exec_cmd,
320 .dma_start = trm290_dma_start,
321 .dma_end = trm290_dma_end,
322 .dma_test_irq = trm290_dma_test_irq,
323};
324
322static const struct ide_port_info trm290_chipset __devinitdata = { 325static const struct ide_port_info trm290_chipset __devinitdata = {
323 .name = "TRM290", 326 .name = "TRM290",
324 .init_hwif = init_hwif_trm290, 327 .init_hwif = init_hwif_trm290,
325 .chipset = ide_trm290, 328 .chipset = ide_trm290,
326 .port_ops = &trm290_port_ops, 329 .port_ops = &trm290_port_ops,
330 .dma_ops = &trm290_dma_ops,
327 .host_flags = IDE_HFLAG_NO_ATAPI_DMA | 331 .host_flags = IDE_HFLAG_NO_ATAPI_DMA |
328#if 0 /* play it safe for now */ 332#if 0 /* play it safe for now */
329 IDE_HFLAG_TRUST_BIOS_FOR_DMA | 333 IDE_HFLAG_TRUST_BIOS_FOR_DMA |
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-10 11:46:41 -0500