ide: add ->read_status method

* Remove ide_read_status() inline helper.

* Add ->read_status method for reading ATA Status register
  and use it instead of ->INB.

While at it:

* Don't use HWGROUP() macro.

There should be no functional changes caused by this patch.

Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>

3 files changed, 23 insertions, 10 deletions

diff --git a/drivers/ide/pci/ns87415.c b/drivers/ide/pci/ns87415.c
index 76ce112fd857..b20e5f01ac89 100644
--- a/drivers/ide/pci/ns87415.c
+++ b/drivers/ide/pci/ns87415.c
@@ -63,6 +63,11 @@ static u8 superio_ide_inb (unsigned long port)
         return inb(port);
 }
 
+static u8 superio_read_status(ide_hwif_t *hwif)
+{
+        return superio_ide_inb(hwif->io_ports.status_addr);
+}
+
 static u8 superio_read_sff_dma_status(ide_hwif_t *hwif)
 {
         return superio_ide_inb(hwif->dma_base + ATA_DMA_STATUS);
@@ -127,6 +132,7 @@ static void __devinit superio_ide_init_iops (struct hwif_s *hwif)
         tmp = superio_ide_inb(superio_ide_dma_status[port]);
         outb(tmp | 0x66, superio_ide_dma_status[port]);
 
+        hwif->read_status         = superio_read_status;
         hwif->read_sff_dma_status = superio_read_sff_dma_status;
 
         hwif->tf_read = superio_tf_read;
@@ -283,7 +289,7 @@ static void __devinit init_hwif_ns87415 (ide_hwif_t *hwif)
                 outb(8, hwif->io_ports.ctl_addr);
                 do {
                         udelay(50);
-                        stat = hwif->INB(hwif->io_ports.status_addr);
+                        stat = hwif->read_status(hwif);
                         if (stat == 0xff)
                                 break;
                 } while ((stat & BUSY_STAT) && --timeout);
diff --git a/drivers/ide/pci/scc_pata.c b/drivers/ide/pci/scc_pata.c
index d140dfd565a4..3d72a5e03f3d 100644
--- a/drivers/ide/pci/scc_pata.c
+++ b/drivers/ide/pci/scc_pata.c
@@ -134,6 +134,11 @@ static void scc_exec_command(ide_hwif_t *hwif, u8 cmd)
         eieio();
 }
 
+static u8 scc_read_status(ide_hwif_t *hwif)
+{
+        return (u8)in_be32((void *)hwif->io_ports.status_addr);
+}
+
 static u8 scc_read_sff_dma_status(ide_hwif_t *hwif)
 {
         return (u8)in_be32((void *)(hwif->dma_base + 4));
@@ -788,6 +793,7 @@ static void __devinit init_mmio_iops_scc(ide_hwif_t *hwif)
         ide_set_hwifdata(hwif, ports);
 
         hwif->exec_command        = scc_exec_command;
+        hwif->read_status         = scc_read_status;
         hwif->read_sff_dma_status = scc_read_sff_dma_status;
 
         hwif->tf_load = scc_tf_load;
diff --git a/drivers/ide/pci/sgiioc4.c b/drivers/ide/pci/sgiioc4.c
index 76afa1f9c599..3005a6334a58 100644
--- a/drivers/ide/pci/sgiioc4.c
+++ b/drivers/ide/pci/sgiioc4.c
@@ -127,7 +127,7 @@ sgiioc4_checkirq(ide_hwif_t * hwif)
         return 0;
 }
 
-static u8 sgiioc4_INB(unsigned long);
+static u8 sgiioc4_read_status(ide_hwif_t *);
 
 static int
 sgiioc4_clearirq(ide_drive_t * drive)
@@ -141,18 +141,19 @@ sgiioc4_clearirq(ide_drive_t * drive)
         intr_reg = readl((void __iomem *)other_ir);
         if (intr_reg & 0x03) { /* Valid IOC4-IDE interrupt */
                 /*
-                 * Using sgiioc4_INB to read the Status register has a side
-                 * effect of clearing the interrupt.  The first read should
+                 * Using sgiioc4_read_status to read the Status register has a
+                 * side effect of clearing the interrupt.  The first read should
                  * clear it if it is set.  The second read should return
                  * a "clear" status if it got cleared.  If not, then spin
                  * for a bit trying to clear it.
                  */
-                u8 stat = sgiioc4_INB(io_ports->status_addr);
+                u8 stat = sgiioc4_read_status(hwif);
                 int count = 0;
-                stat = sgiioc4_INB(io_ports->status_addr);
+
+                stat = sgiioc4_read_status(hwif);
                 while ((stat & 0x80) && (count++ < 100)) {
                         udelay(1);
-                        stat = sgiioc4_INB(io_ports->status_addr);
+                        stat = sgiioc4_read_status(hwif);
                 }
 
                 if (intr_reg & 0x02) {
@@ -304,9 +305,9 @@ sgiioc4_dma_lost_irq(ide_drive_t * drive)
         ide_dma_lost_irq(drive);
 }
 
-static u8
-sgiioc4_INB(unsigned long port)
+static u8 sgiioc4_read_status(ide_hwif_t *hwif)
 {
+        unsigned long port = hwif->io_ports.status_addr;
         u8 reg = (u8) readb((void __iomem *) port);
 
         if ((port & 0xFFF) == 0x11C) {  /* Status register of IOC4 */
@@ -628,7 +629,7 @@ sgiioc4_ide_setup_pci_device(struct pci_dev *dev)
         /* Initializing chipset IRQ Registers */
         writel(0x03, (void __iomem *)(irqport + IOC4_INTR_SET * 4));
 
-        hwif->INB = &sgiioc4_INB;
+        hwif->read_status = sgiioc4_read_status;
 
         idx[0] = hwif->index;