diff options
author | Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> | 2007-07-09 17:17:57 -0400 |
---|---|---|
committer | Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> | 2007-07-09 17:17:57 -0400 |
commit | 75b1d97535327d0428c6bffd9d5407e65546fd5d (patch) | |
tree | 3271a13a27ed2a7896b7018bc2fceac62eba1b2e /drivers/ide/pci | |
parent | 15a4f943e729d8ba215ee551df6d7988ba14ac00 (diff) |
ide: convert ide_find_best_mode() users to use ide_max_dma_mode()
ide-timing.h:
* remove handling of DMA modes from ide_find_best_mode() and rename it to
ide_find_best_pio_mode()
* drop no longer needed "map" argument from ide_find_best_pio_mode()
and delete needless ->id check
* remove no longer needed XFER_SWDMA and XFER_UDMA* defines
au1xxx-ide.c:
* use ide_max_dma_mode() instead of ide_find_best_mode()
* remove needless CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA #ifdef
amd74xx.c:
* store UDMA masks in amd_ide_chip[] and while at it make "base" field
to be u8 instead of unsigned long
* convert the driver to use UDMA masks from amd_ide_chip[]
* use ide_max_dma_mode() and ide_find_best_pio_mode() instead
of ide_find_best_mode()
* delete stale comment from amd74xx_ide_dma_check()
* remove no longer needed AMD_UDMA* defines
via82cxxx.c:
* remove unused DISPLAY_VIA_TIMINGS define
* store UDMA masks in via_isa_bridges[] and while at it make "flags" field
to be u8 instead of u16
* convert the driver to use UDMA masks from via_isa_bridges[]
* use ide_max_dma_mode() and ide_find_best_pio_mode() instead
of ide_find_best_mode()
* remove no longer needed VIA_UDMA* defines
pmac.c:
* use ide_max_dma_mode() instead of ide_find_best_mode()
There should be no functionality changes caused by this patch.
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Reviewed-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Diffstat (limited to 'drivers/ide/pci')
-rw-r--r-- | drivers/ide/pci/amd74xx.c | 118 | ||||
-rw-r--r-- | drivers/ide/pci/via82cxxx.c | 132 |
2 files changed, 115 insertions, 135 deletions
diff --git a/drivers/ide/pci/amd74xx.c b/drivers/ide/pci/amd74xx.c index a2be65fcf89c..a7443f15b27a 100644 --- a/drivers/ide/pci/amd74xx.c +++ b/drivers/ide/pci/amd74xx.c | |||
@@ -1,10 +1,11 @@ | |||
1 | /* | 1 | /* |
2 | * Version 2.16 | 2 | * Version 2.20 |
3 | * | 3 | * |
4 | * AMD 755/756/766/8111 and nVidia nForce/2/2s/3/3s/CK804/MCP04 | 4 | * AMD 755/756/766/8111 and nVidia nForce/2/2s/3/3s/CK804/MCP04 |
5 | * IDE driver for Linux. | 5 | * IDE driver for Linux. |
6 | * | 6 | * |
7 | * Copyright (c) 2000-2002 Vojtech Pavlik | 7 | * Copyright (c) 2000-2002 Vojtech Pavlik |
8 | * Copyright (c) 2007 Bartlomiej Zolnierkiewicz | ||
8 | * | 9 | * |
9 | * Based on the work of: | 10 | * Based on the work of: |
10 | * Andre Hedrick | 11 | * Andre Hedrick |
@@ -37,11 +38,6 @@ | |||
37 | #define AMD_ADDRESS_SETUP (0x0c + amd_config->base) | 38 | #define AMD_ADDRESS_SETUP (0x0c + amd_config->base) |
38 | #define AMD_UDMA_TIMING (0x10 + amd_config->base) | 39 | #define AMD_UDMA_TIMING (0x10 + amd_config->base) |
39 | 40 | ||
40 | #define AMD_UDMA 0x07 | ||
41 | #define AMD_UDMA_33 0x01 | ||
42 | #define AMD_UDMA_66 0x02 | ||
43 | #define AMD_UDMA_100 0x03 | ||
44 | #define AMD_UDMA_133 0x04 | ||
45 | #define AMD_CHECK_SWDMA 0x08 | 41 | #define AMD_CHECK_SWDMA 0x08 |
46 | #define AMD_BAD_SWDMA 0x10 | 42 | #define AMD_BAD_SWDMA 0x10 |
47 | #define AMD_BAD_FIFO 0x20 | 43 | #define AMD_BAD_FIFO 0x20 |
@@ -53,32 +49,33 @@ | |||
53 | 49 | ||
54 | static struct amd_ide_chip { | 50 | static struct amd_ide_chip { |
55 | unsigned short id; | 51 | unsigned short id; |
56 | unsigned long base; | 52 | u8 base; |
57 | unsigned char flags; | 53 | u8 udma_mask; |
54 | u8 flags; | ||
58 | } amd_ide_chips[] = { | 55 | } amd_ide_chips[] = { |
59 | { PCI_DEVICE_ID_AMD_COBRA_7401, 0x40, AMD_UDMA_33 | AMD_BAD_SWDMA }, | 56 | { PCI_DEVICE_ID_AMD_COBRA_7401, 0x40, ATA_UDMA2, AMD_BAD_SWDMA }, |
60 | { PCI_DEVICE_ID_AMD_VIPER_7409, 0x40, AMD_UDMA_66 | AMD_CHECK_SWDMA }, | 57 | { PCI_DEVICE_ID_AMD_VIPER_7409, 0x40, ATA_UDMA4, AMD_CHECK_SWDMA }, |
61 | { PCI_DEVICE_ID_AMD_VIPER_7411, 0x40, AMD_UDMA_100 | AMD_BAD_FIFO }, | 58 | { PCI_DEVICE_ID_AMD_VIPER_7411, 0x40, ATA_UDMA5, AMD_BAD_FIFO }, |
62 | { PCI_DEVICE_ID_AMD_OPUS_7441, 0x40, AMD_UDMA_100 }, | 59 | { PCI_DEVICE_ID_AMD_OPUS_7441, 0x40, ATA_UDMA5, }, |
63 | { PCI_DEVICE_ID_AMD_8111_IDE, 0x40, AMD_UDMA_133 | AMD_CHECK_SERENADE }, | 60 | { PCI_DEVICE_ID_AMD_8111_IDE, 0x40, ATA_UDMA6, AMD_CHECK_SERENADE }, |
64 | { PCI_DEVICE_ID_NVIDIA_NFORCE_IDE, 0x50, AMD_UDMA_100 }, | 61 | { PCI_DEVICE_ID_NVIDIA_NFORCE_IDE, 0x50, ATA_UDMA5, }, |
65 | { PCI_DEVICE_ID_NVIDIA_NFORCE2_IDE, 0x50, AMD_UDMA_133 }, | 62 | { PCI_DEVICE_ID_NVIDIA_NFORCE2_IDE, 0x50, ATA_UDMA6, }, |
66 | { PCI_DEVICE_ID_NVIDIA_NFORCE2S_IDE, 0x50, AMD_UDMA_133 }, | 63 | { PCI_DEVICE_ID_NVIDIA_NFORCE2S_IDE, 0x50, ATA_UDMA6, }, |
67 | { PCI_DEVICE_ID_NVIDIA_NFORCE2S_SATA, 0x50, AMD_UDMA_133 }, | 64 | { PCI_DEVICE_ID_NVIDIA_NFORCE2S_SATA, 0x50, ATA_UDMA6, }, |
68 | { PCI_DEVICE_ID_NVIDIA_NFORCE3_IDE, 0x50, AMD_UDMA_133 }, | 65 | { PCI_DEVICE_ID_NVIDIA_NFORCE3_IDE, 0x50, ATA_UDMA6, }, |
69 | { PCI_DEVICE_ID_NVIDIA_NFORCE3S_IDE, 0x50, AMD_UDMA_133 }, | 66 | { PCI_DEVICE_ID_NVIDIA_NFORCE3S_IDE, 0x50, ATA_UDMA6, }, |
70 | { PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA, 0x50, AMD_UDMA_133 }, | 67 | { PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA, 0x50, ATA_UDMA6, }, |
71 | { PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA2, 0x50, AMD_UDMA_133 }, | 68 | { PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA2, 0x50, ATA_UDMA6, }, |
72 | { PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_IDE, 0x50, AMD_UDMA_133 }, | 69 | { PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_IDE, 0x50, ATA_UDMA6, }, |
73 | { PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_IDE, 0x50, AMD_UDMA_133 }, | 70 | { PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_IDE, 0x50, ATA_UDMA6, }, |
74 | { PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_IDE, 0x50, AMD_UDMA_133 }, | 71 | { PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_IDE, 0x50, ATA_UDMA6, }, |
75 | { PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_IDE, 0x50, AMD_UDMA_133 }, | 72 | { PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_IDE, 0x50, ATA_UDMA6, }, |
76 | { PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_IDE, 0x50, AMD_UDMA_133 }, | 73 | { PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_IDE, 0x50, ATA_UDMA6, }, |
77 | { PCI_DEVICE_ID_NVIDIA_NFORCE_MCP65_IDE, 0x50, AMD_UDMA_133 }, | 74 | { PCI_DEVICE_ID_NVIDIA_NFORCE_MCP65_IDE, 0x50, ATA_UDMA6, }, |
78 | { PCI_DEVICE_ID_NVIDIA_NFORCE_MCP67_IDE, 0x50, AMD_UDMA_133 }, | 75 | { PCI_DEVICE_ID_NVIDIA_NFORCE_MCP67_IDE, 0x50, ATA_UDMA6, }, |
79 | { PCI_DEVICE_ID_NVIDIA_NFORCE_MCP73_IDE, 0x50, AMD_UDMA_133 }, | 76 | { PCI_DEVICE_ID_NVIDIA_NFORCE_MCP73_IDE, 0x50, ATA_UDMA6, }, |
80 | { PCI_DEVICE_ID_NVIDIA_NFORCE_MCP77_IDE, 0x50, AMD_UDMA_133 }, | 77 | { PCI_DEVICE_ID_NVIDIA_NFORCE_MCP77_IDE, 0x50, ATA_UDMA6, }, |
81 | { PCI_DEVICE_ID_AMD_CS5536_IDE, 0x40, AMD_UDMA_100 }, | 78 | { PCI_DEVICE_ID_AMD_CS5536_IDE, 0x40, ATA_UDMA5, }, |
82 | { 0 } | 79 | { 0 } |
83 | }; | 80 | }; |
84 | 81 | ||
@@ -87,7 +84,7 @@ static ide_pci_device_t *amd_chipset; | |||
87 | static unsigned int amd_80w; | 84 | static unsigned int amd_80w; |
88 | static unsigned int amd_clock; | 85 | static unsigned int amd_clock; |
89 | 86 | ||
90 | static char *amd_dma[] = { "MWDMA16", "UDMA33", "UDMA66", "UDMA100", "UDMA133" }; | 87 | static char *amd_dma[] = { "16", "25", "33", "44", "66", "100", "133" }; |
91 | static unsigned char amd_cyc2udma[] = { 6, 6, 5, 4, 0, 1, 1, 2, 2, 3, 3, 3, 3, 3, 3, 7 }; | 88 | static unsigned char amd_cyc2udma[] = { 6, 6, 5, 4, 0, 1, 1, 2, 2, 3, 3, 3, 3, 3, 3, 7 }; |
92 | 89 | ||
93 | /* | 90 | /* |
@@ -128,7 +125,7 @@ static int amd74xx_get_info(char *buffer, char **addr, off_t offset, int count) | |||
128 | 125 | ||
129 | pci_read_config_byte(dev, PCI_REVISION_ID, &t); | 126 | pci_read_config_byte(dev, PCI_REVISION_ID, &t); |
130 | amd_print("Revision: IDE %#x", t); | 127 | amd_print("Revision: IDE %#x", t); |
131 | amd_print("Highest DMA rate: %s", amd_dma[amd_config->flags & AMD_UDMA]); | 128 | amd_print("Highest DMA rate: UDMA%s", amd_dma[fls(amd_config->udma_mask) - 1]); |
132 | 129 | ||
133 | amd_print("BM-DMA base: %#lx", amd_base); | 130 | amd_print("BM-DMA base: %#lx", amd_base); |
134 | amd_print("PCI clock: %d.%dMHz", amd_clock / 1000, amd_clock / 100 % 10); | 131 | amd_print("PCI clock: %d.%dMHz", amd_clock / 1000, amd_clock / 100 % 10); |
@@ -221,12 +218,12 @@ static void amd_set_speed(struct pci_dev *dev, unsigned char dn, struct ide_timi | |||
221 | pci_write_config_byte(dev, AMD_DRIVE_TIMING + (3 - dn), | 218 | pci_write_config_byte(dev, AMD_DRIVE_TIMING + (3 - dn), |
222 | ((FIT(timing->active, 1, 16) - 1) << 4) | (FIT(timing->recover, 1, 16) - 1)); | 219 | ((FIT(timing->active, 1, 16) - 1) << 4) | (FIT(timing->recover, 1, 16) - 1)); |
223 | 220 | ||
224 | switch (amd_config->flags & AMD_UDMA) { | 221 | switch (amd_config->udma_mask) { |
225 | case AMD_UDMA_33: t = timing->udma ? (0xc0 | (FIT(timing->udma, 2, 5) - 2)) : 0x03; break; | 222 | case ATA_UDMA2: t = timing->udma ? (0xc0 | (FIT(timing->udma, 2, 5) - 2)) : 0x03; break; |
226 | case AMD_UDMA_66: t = timing->udma ? (0xc0 | amd_cyc2udma[FIT(timing->udma, 2, 10)]) : 0x03; break; | 223 | case ATA_UDMA4: t = timing->udma ? (0xc0 | amd_cyc2udma[FIT(timing->udma, 2, 10)]) : 0x03; break; |
227 | case AMD_UDMA_100: t = timing->udma ? (0xc0 | amd_cyc2udma[FIT(timing->udma, 1, 10)]) : 0x03; break; | 224 | case ATA_UDMA5: t = timing->udma ? (0xc0 | amd_cyc2udma[FIT(timing->udma, 1, 10)]) : 0x03; break; |
228 | case AMD_UDMA_133: t = timing->udma ? (0xc0 | amd_cyc2udma[FIT(timing->udma, 1, 15)]) : 0x03; break; | 225 | case ATA_UDMA6: t = timing->udma ? (0xc0 | amd_cyc2udma[FIT(timing->udma, 1, 15)]) : 0x03; break; |
229 | default: return; | 226 | default: return; |
230 | } | 227 | } |
231 | 228 | ||
232 | pci_write_config_byte(dev, AMD_UDMA_TIMING + (3 - dn), t); | 229 | pci_write_config_byte(dev, AMD_UDMA_TIMING + (3 - dn), t); |
@@ -248,7 +245,7 @@ static int amd_set_drive(ide_drive_t *drive, u8 speed) | |||
248 | ide_config_drive_speed(drive, speed); | 245 | ide_config_drive_speed(drive, speed); |
249 | 246 | ||
250 | T = 1000000000 / amd_clock; | 247 | T = 1000000000 / amd_clock; |
251 | UT = T / min_t(int, max_t(int, amd_config->flags & AMD_UDMA, 1), 2); | 248 | UT = (amd_config->udma_mask == ATA_UDMA2) ? T : (T / 2); |
252 | 249 | ||
253 | ide_timing_compute(drive, speed, &t, T, UT); | 250 | ide_timing_compute(drive, speed, &t, T, UT); |
254 | 251 | ||
@@ -277,29 +274,19 @@ static int amd_set_drive(ide_drive_t *drive, u8 speed) | |||
277 | static void amd74xx_tune_drive(ide_drive_t *drive, u8 pio) | 274 | static void amd74xx_tune_drive(ide_drive_t *drive, u8 pio) |
278 | { | 275 | { |
279 | if (pio == 255) { | 276 | if (pio == 255) { |
280 | amd_set_drive(drive, ide_find_best_mode(drive, XFER_PIO | XFER_EPIO)); | 277 | amd_set_drive(drive, ide_find_best_pio_mode(drive)); |
281 | return; | 278 | return; |
282 | } | 279 | } |
283 | 280 | ||
284 | amd_set_drive(drive, XFER_PIO_0 + min_t(byte, pio, 5)); | 281 | amd_set_drive(drive, XFER_PIO_0 + min_t(byte, pio, 5)); |
285 | } | 282 | } |
286 | 283 | ||
287 | /* | ||
288 | * amd74xx_dmaproc() is a callback from upper layers that can do | ||
289 | * a lot, but we use it for DMA/PIO tuning only, delegating everything | ||
290 | * else to the default ide_dmaproc(). | ||
291 | */ | ||
292 | |||
293 | static int amd74xx_ide_dma_check(ide_drive_t *drive) | 284 | static int amd74xx_ide_dma_check(ide_drive_t *drive) |
294 | { | 285 | { |
295 | int w80 = HWIF(drive)->udma_four; | 286 | u8 speed = ide_max_dma_mode(drive); |
296 | 287 | ||
297 | u8 speed = ide_find_best_mode(drive, | 288 | if (speed == 0) |
298 | XFER_PIO | XFER_EPIO | XFER_MWDMA | XFER_UDMA | | 289 | speed = ide_find_best_pio_mode(drive); |
299 | ((amd_config->flags & AMD_BAD_SWDMA) ? 0 : XFER_SWDMA) | | ||
300 | (w80 && (amd_config->flags & AMD_UDMA) >= AMD_UDMA_66 ? XFER_UDMA_66 : 0) | | ||
301 | (w80 && (amd_config->flags & AMD_UDMA) >= AMD_UDMA_100 ? XFER_UDMA_100 : 0) | | ||
302 | (w80 && (amd_config->flags & AMD_UDMA) >= AMD_UDMA_133 ? XFER_UDMA_133 : 0)); | ||
303 | 290 | ||
304 | amd_set_drive(drive, speed); | 291 | amd_set_drive(drive, speed); |
305 | 292 | ||
@@ -334,10 +321,10 @@ static unsigned int __devinit init_chipset_amd74xx(struct pci_dev *dev, const ch | |||
334 | * Check 80-wire cable presence. | 321 | * Check 80-wire cable presence. |
335 | */ | 322 | */ |
336 | 323 | ||
337 | switch (amd_config->flags & AMD_UDMA) { | 324 | switch (amd_config->udma_mask) { |
338 | 325 | ||
339 | case AMD_UDMA_133: | 326 | case ATA_UDMA6: |
340 | case AMD_UDMA_100: | 327 | case ATA_UDMA5: |
341 | pci_read_config_byte(dev, AMD_CABLE_DETECT, &t); | 328 | pci_read_config_byte(dev, AMD_CABLE_DETECT, &t); |
342 | pci_read_config_dword(dev, AMD_UDMA_TIMING, &u); | 329 | pci_read_config_dword(dev, AMD_UDMA_TIMING, &u); |
343 | amd_80w = ((t & 0x3) ? 1 : 0) | ((t & 0xc) ? 2 : 0); | 330 | amd_80w = ((t & 0x3) ? 1 : 0) | ((t & 0xc) ? 2 : 0); |
@@ -349,7 +336,7 @@ static unsigned int __devinit init_chipset_amd74xx(struct pci_dev *dev, const ch | |||
349 | } | 336 | } |
350 | break; | 337 | break; |
351 | 338 | ||
352 | case AMD_UDMA_66: | 339 | case ATA_UDMA4: |
353 | /* no host side cable detection */ | 340 | /* no host side cable detection */ |
354 | amd_80w = 0x03; | 341 | amd_80w = 0x03; |
355 | break; | 342 | break; |
@@ -370,7 +357,7 @@ static unsigned int __devinit init_chipset_amd74xx(struct pci_dev *dev, const ch | |||
370 | if ((amd_config->flags & AMD_CHECK_SERENADE) && | 357 | if ((amd_config->flags & AMD_CHECK_SERENADE) && |
371 | dev->subsystem_vendor == PCI_VENDOR_ID_AMD && | 358 | dev->subsystem_vendor == PCI_VENDOR_ID_AMD && |
372 | dev->subsystem_device == PCI_DEVICE_ID_AMD_SERENADE) | 359 | dev->subsystem_device == PCI_DEVICE_ID_AMD_SERENADE) |
373 | amd_config->flags = AMD_UDMA_100; | 360 | amd_config->udma_mask = ATA_UDMA5; |
374 | 361 | ||
375 | /* | 362 | /* |
376 | * Determine the system bus clock. | 363 | * Determine the system bus clock. |
@@ -395,8 +382,9 @@ static unsigned int __devinit init_chipset_amd74xx(struct pci_dev *dev, const ch | |||
395 | */ | 382 | */ |
396 | 383 | ||
397 | pci_read_config_byte(dev, PCI_REVISION_ID, &t); | 384 | pci_read_config_byte(dev, PCI_REVISION_ID, &t); |
398 | printk(KERN_INFO "%s: %s (rev %02x) %s controller\n", | 385 | printk(KERN_INFO "%s: %s (rev %02x) UDMA%s controller\n", |
399 | amd_chipset->name, pci_name(dev), t, amd_dma[amd_config->flags & AMD_UDMA]); | 386 | amd_chipset->name, pci_name(dev), t, |
387 | amd_dma[fls(amd_config->udma_mask) - 1]); | ||
400 | 388 | ||
401 | /* | 389 | /* |
402 | * Register /proc/ide/amd74xx entry | 390 | * Register /proc/ide/amd74xx entry |
@@ -437,9 +425,11 @@ static void __devinit init_hwif_amd74xx(ide_hwif_t *hwif) | |||
437 | return; | 425 | return; |
438 | 426 | ||
439 | hwif->atapi_dma = 1; | 427 | hwif->atapi_dma = 1; |
440 | hwif->ultra_mask = 0x7f; | 428 | |
441 | hwif->mwdma_mask = 0x07; | 429 | hwif->ultra_mask = amd_config->udma_mask; |
442 | hwif->swdma_mask = 0x07; | 430 | hwif->mwdma_mask = 0x07; |
431 | if ((amd_config->flags & AMD_BAD_SWDMA) == 0) | ||
432 | hwif->swdma_mask = 0x07; | ||
443 | 433 | ||
444 | if (!hwif->udma_four) | 434 | if (!hwif->udma_four) |
445 | hwif->udma_four = (amd_80w >> hwif->channel) & 1; | 435 | hwif->udma_four = (amd_80w >> hwif->channel) & 1; |
diff --git a/drivers/ide/pci/via82cxxx.c b/drivers/ide/pci/via82cxxx.c index a508550c4095..49bd1c645fb2 100644 --- a/drivers/ide/pci/via82cxxx.c +++ b/drivers/ide/pci/via82cxxx.c | |||
@@ -1,6 +1,6 @@ | |||
1 | /* | 1 | /* |
2 | * | 2 | * |
3 | * Version 3.38 | 3 | * Version 3.40 |
4 | * | 4 | * |
5 | * VIA IDE driver for Linux. Supported southbridges: | 5 | * VIA IDE driver for Linux. Supported southbridges: |
6 | * | 6 | * |
@@ -9,6 +9,7 @@ | |||
9 | * vt8235, vt8237, vt8237a | 9 | * vt8235, vt8237, vt8237a |
10 | * | 10 | * |
11 | * Copyright (c) 2000-2002 Vojtech Pavlik | 11 | * Copyright (c) 2000-2002 Vojtech Pavlik |
12 | * Copyright (c) 2007 Bartlomiej Zolnierkiewicz | ||
12 | * | 13 | * |
13 | * Based on the work of: | 14 | * Based on the work of: |
14 | * Michel Aubry | 15 | * Michel Aubry |
@@ -41,8 +42,6 @@ | |||
41 | 42 | ||
42 | #include "ide-timing.h" | 43 | #include "ide-timing.h" |
43 | 44 | ||
44 | #define DISPLAY_VIA_TIMINGS | ||
45 | |||
46 | #define VIA_IDE_ENABLE 0x40 | 45 | #define VIA_IDE_ENABLE 0x40 |
47 | #define VIA_IDE_CONFIG 0x41 | 46 | #define VIA_IDE_CONFIG 0x41 |
48 | #define VIA_FIFO_CONFIG 0x43 | 47 | #define VIA_FIFO_CONFIG 0x43 |
@@ -54,18 +53,12 @@ | |||
54 | #define VIA_ADDRESS_SETUP 0x4c | 53 | #define VIA_ADDRESS_SETUP 0x4c |
55 | #define VIA_UDMA_TIMING 0x50 | 54 | #define VIA_UDMA_TIMING 0x50 |
56 | 55 | ||
57 | #define VIA_UDMA 0x007 | 56 | #define VIA_BAD_PREQ 0x01 /* Crashes if PREQ# till DDACK# set */ |
58 | #define VIA_UDMA_NONE 0x000 | 57 | #define VIA_BAD_CLK66 0x02 /* 66 MHz clock doesn't work correctly */ |
59 | #define VIA_UDMA_33 0x001 | 58 | #define VIA_SET_FIFO 0x04 /* Needs to have FIFO split set */ |
60 | #define VIA_UDMA_66 0x002 | 59 | #define VIA_NO_UNMASK 0x08 /* Doesn't work with IRQ unmasking on */ |
61 | #define VIA_UDMA_100 0x003 | 60 | #define VIA_BAD_ID 0x10 /* Has wrong vendor ID (0x1107) */ |
62 | #define VIA_UDMA_133 0x004 | 61 | #define VIA_BAD_AST 0x20 /* Don't touch Address Setup Timing */ |
63 | #define VIA_BAD_PREQ 0x010 /* Crashes if PREQ# till DDACK# set */ | ||
64 | #define VIA_BAD_CLK66 0x020 /* 66 MHz clock doesn't work correctly */ | ||
65 | #define VIA_SET_FIFO 0x040 /* Needs to have FIFO split set */ | ||
66 | #define VIA_NO_UNMASK 0x080 /* Doesn't work with IRQ unmasking on */ | ||
67 | #define VIA_BAD_ID 0x100 /* Has wrong vendor ID (0x1107) */ | ||
68 | #define VIA_BAD_AST 0x200 /* Don't touch Address Setup Timing */ | ||
69 | 62 | ||
70 | /* | 63 | /* |
71 | * VIA SouthBridge chips. | 64 | * VIA SouthBridge chips. |
@@ -76,36 +69,37 @@ static struct via_isa_bridge { | |||
76 | u16 id; | 69 | u16 id; |
77 | u8 rev_min; | 70 | u8 rev_min; |
78 | u8 rev_max; | 71 | u8 rev_max; |
79 | u16 flags; | 72 | u8 udma_mask; |
73 | u8 flags; | ||
80 | } via_isa_bridges[] = { | 74 | } via_isa_bridges[] = { |
81 | { "cx700", PCI_DEVICE_ID_VIA_CX700, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, | 75 | { "cx700", PCI_DEVICE_ID_VIA_CX700, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST }, |
82 | { "vt8237s", PCI_DEVICE_ID_VIA_8237S, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, | 76 | { "vt8237s", PCI_DEVICE_ID_VIA_8237S, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST }, |
83 | { "vt6410", PCI_DEVICE_ID_VIA_6410, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, | 77 | { "vt6410", PCI_DEVICE_ID_VIA_6410, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST }, |
84 | { "vt8251", PCI_DEVICE_ID_VIA_8251, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, | 78 | { "vt8251", PCI_DEVICE_ID_VIA_8251, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST }, |
85 | { "vt8237", PCI_DEVICE_ID_VIA_8237, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, | 79 | { "vt8237", PCI_DEVICE_ID_VIA_8237, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST }, |
86 | { "vt8237a", PCI_DEVICE_ID_VIA_8237A, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, | 80 | { "vt8237a", PCI_DEVICE_ID_VIA_8237A, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST }, |
87 | { "vt8235", PCI_DEVICE_ID_VIA_8235, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, | 81 | { "vt8235", PCI_DEVICE_ID_VIA_8235, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST }, |
88 | { "vt8233a", PCI_DEVICE_ID_VIA_8233A, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, | 82 | { "vt8233a", PCI_DEVICE_ID_VIA_8233A, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST }, |
89 | { "vt8233c", PCI_DEVICE_ID_VIA_8233C_0, 0x00, 0x2f, VIA_UDMA_100 }, | 83 | { "vt8233c", PCI_DEVICE_ID_VIA_8233C_0, 0x00, 0x2f, ATA_UDMA5, }, |
90 | { "vt8233", PCI_DEVICE_ID_VIA_8233_0, 0x00, 0x2f, VIA_UDMA_100 }, | 84 | { "vt8233", PCI_DEVICE_ID_VIA_8233_0, 0x00, 0x2f, ATA_UDMA5, }, |
91 | { "vt8231", PCI_DEVICE_ID_VIA_8231, 0x00, 0x2f, VIA_UDMA_100 }, | 85 | { "vt8231", PCI_DEVICE_ID_VIA_8231, 0x00, 0x2f, ATA_UDMA5, }, |
92 | { "vt82c686b", PCI_DEVICE_ID_VIA_82C686, 0x40, 0x4f, VIA_UDMA_100 }, | 86 | { "vt82c686b", PCI_DEVICE_ID_VIA_82C686, 0x40, 0x4f, ATA_UDMA5, }, |
93 | { "vt82c686a", PCI_DEVICE_ID_VIA_82C686, 0x10, 0x2f, VIA_UDMA_66 }, | 87 | { "vt82c686a", PCI_DEVICE_ID_VIA_82C686, 0x10, 0x2f, ATA_UDMA4, }, |
94 | { "vt82c686", PCI_DEVICE_ID_VIA_82C686, 0x00, 0x0f, VIA_UDMA_33 | VIA_BAD_CLK66 }, | 88 | { "vt82c686", PCI_DEVICE_ID_VIA_82C686, 0x00, 0x0f, ATA_UDMA2, VIA_BAD_CLK66 }, |
95 | { "vt82c596b", PCI_DEVICE_ID_VIA_82C596, 0x10, 0x2f, VIA_UDMA_66 }, | 89 | { "vt82c596b", PCI_DEVICE_ID_VIA_82C596, 0x10, 0x2f, ATA_UDMA4, }, |
96 | { "vt82c596a", PCI_DEVICE_ID_VIA_82C596, 0x00, 0x0f, VIA_UDMA_33 | VIA_BAD_CLK66 }, | 90 | { "vt82c596a", PCI_DEVICE_ID_VIA_82C596, 0x00, 0x0f, ATA_UDMA2, VIA_BAD_CLK66 }, |
97 | { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x47, 0x4f, VIA_UDMA_33 | VIA_SET_FIFO }, | 91 | { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x47, 0x4f, ATA_UDMA2, VIA_SET_FIFO }, |
98 | { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x40, 0x46, VIA_UDMA_33 | VIA_SET_FIFO | VIA_BAD_PREQ }, | 92 | { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x40, 0x46, ATA_UDMA2, VIA_SET_FIFO | VIA_BAD_PREQ }, |
99 | { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x30, 0x3f, VIA_UDMA_33 | VIA_SET_FIFO }, | 93 | { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x30, 0x3f, ATA_UDMA2, VIA_SET_FIFO }, |
100 | { "vt82c586a", PCI_DEVICE_ID_VIA_82C586_0, 0x20, 0x2f, VIA_UDMA_33 | VIA_SET_FIFO }, | 94 | { "vt82c586a", PCI_DEVICE_ID_VIA_82C586_0, 0x20, 0x2f, ATA_UDMA2, VIA_SET_FIFO }, |
101 | { "vt82c586", PCI_DEVICE_ID_VIA_82C586_0, 0x00, 0x0f, VIA_UDMA_NONE | VIA_SET_FIFO }, | 95 | { "vt82c586", PCI_DEVICE_ID_VIA_82C586_0, 0x00, 0x0f, 0x00, VIA_SET_FIFO }, |
102 | { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, VIA_UDMA_NONE | VIA_SET_FIFO | VIA_NO_UNMASK }, | 96 | { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, 0x00, VIA_SET_FIFO | VIA_NO_UNMASK }, |
103 | { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, VIA_UDMA_NONE | VIA_SET_FIFO | VIA_NO_UNMASK | VIA_BAD_ID }, | 97 | { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, 0x00, VIA_SET_FIFO | VIA_NO_UNMASK | VIA_BAD_ID }, |
104 | { NULL } | 98 | { NULL } |
105 | }; | 99 | }; |
106 | 100 | ||
107 | static unsigned int via_clock; | 101 | static unsigned int via_clock; |
108 | static char *via_dma[] = { "MWDMA16", "UDMA33", "UDMA66", "UDMA100", "UDMA133" }; | 102 | static char *via_dma[] = { "16", "25", "33", "44", "66", "100", "133" }; |
109 | 103 | ||
110 | struct via82cxxx_dev | 104 | struct via82cxxx_dev |
111 | { | 105 | { |
@@ -140,12 +134,12 @@ static void via_set_speed(ide_hwif_t *hwif, u8 dn, struct ide_timing *timing) | |||
140 | pci_write_config_byte(dev, VIA_DRIVE_TIMING + (3 - dn), | 134 | pci_write_config_byte(dev, VIA_DRIVE_TIMING + (3 - dn), |
141 | ((FIT(timing->active, 1, 16) - 1) << 4) | (FIT(timing->recover, 1, 16) - 1)); | 135 | ((FIT(timing->active, 1, 16) - 1) << 4) | (FIT(timing->recover, 1, 16) - 1)); |
142 | 136 | ||
143 | switch (vdev->via_config->flags & VIA_UDMA) { | 137 | switch (vdev->via_config->udma_mask) { |
144 | case VIA_UDMA_33: t = timing->udma ? (0xe0 | (FIT(timing->udma, 2, 5) - 2)) : 0x03; break; | 138 | case ATA_UDMA2: t = timing->udma ? (0xe0 | (FIT(timing->udma, 2, 5) - 2)) : 0x03; break; |
145 | case VIA_UDMA_66: t = timing->udma ? (0xe8 | (FIT(timing->udma, 2, 9) - 2)) : 0x0f; break; | 139 | case ATA_UDMA4: t = timing->udma ? (0xe8 | (FIT(timing->udma, 2, 9) - 2)) : 0x0f; break; |
146 | case VIA_UDMA_100: t = timing->udma ? (0xe0 | (FIT(timing->udma, 2, 9) - 2)) : 0x07; break; | 140 | case ATA_UDMA5: t = timing->udma ? (0xe0 | (FIT(timing->udma, 2, 9) - 2)) : 0x07; break; |
147 | case VIA_UDMA_133: t = timing->udma ? (0xe0 | (FIT(timing->udma, 2, 9) - 2)) : 0x07; break; | 141 | case ATA_UDMA6: t = timing->udma ? (0xe0 | (FIT(timing->udma, 2, 9) - 2)) : 0x07; break; |
148 | default: return; | 142 | default: return; |
149 | } | 143 | } |
150 | 144 | ||
151 | pci_write_config_byte(dev, VIA_UDMA_TIMING + (3 - dn), t); | 145 | pci_write_config_byte(dev, VIA_UDMA_TIMING + (3 - dn), t); |
@@ -173,12 +167,12 @@ static int via_set_drive(ide_drive_t *drive, u8 speed) | |||
173 | 167 | ||
174 | T = 1000000000 / via_clock; | 168 | T = 1000000000 / via_clock; |
175 | 169 | ||
176 | switch (vdev->via_config->flags & VIA_UDMA) { | 170 | switch (vdev->via_config->udma_mask) { |
177 | case VIA_UDMA_33: UT = T; break; | 171 | case ATA_UDMA2: UT = T; break; |
178 | case VIA_UDMA_66: UT = T/2; break; | 172 | case ATA_UDMA4: UT = T/2; break; |
179 | case VIA_UDMA_100: UT = T/3; break; | 173 | case ATA_UDMA5: UT = T/3; break; |
180 | case VIA_UDMA_133: UT = T/4; break; | 174 | case ATA_UDMA6: UT = T/4; break; |
181 | default: UT = T; | 175 | default: UT = T; |
182 | } | 176 | } |
183 | 177 | ||
184 | ide_timing_compute(drive, speed, &t, T, UT); | 178 | ide_timing_compute(drive, speed, &t, T, UT); |
@@ -208,8 +202,7 @@ static int via_set_drive(ide_drive_t *drive, u8 speed) | |||
208 | static void via82cxxx_tune_drive(ide_drive_t *drive, u8 pio) | 202 | static void via82cxxx_tune_drive(ide_drive_t *drive, u8 pio) |
209 | { | 203 | { |
210 | if (pio == 255) { | 204 | if (pio == 255) { |
211 | via_set_drive(drive, | 205 | via_set_drive(drive, ide_find_best_pio_mode(drive)); |
212 | ide_find_best_mode(drive, XFER_PIO | XFER_EPIO)); | ||
213 | return; | 206 | return; |
214 | } | 207 | } |
215 | 208 | ||
@@ -226,16 +219,10 @@ static void via82cxxx_tune_drive(ide_drive_t *drive, u8 pio) | |||
226 | 219 | ||
227 | static int via82cxxx_ide_dma_check (ide_drive_t *drive) | 220 | static int via82cxxx_ide_dma_check (ide_drive_t *drive) |
228 | { | 221 | { |
229 | ide_hwif_t *hwif = HWIF(drive); | 222 | u8 speed = ide_max_dma_mode(drive); |
230 | struct via82cxxx_dev *vdev = pci_get_drvdata(hwif->pci_dev); | ||
231 | u16 w80 = hwif->udma_four; | ||
232 | 223 | ||
233 | u16 speed = ide_find_best_mode(drive, | 224 | if (speed == 0) |
234 | XFER_PIO | XFER_EPIO | XFER_SWDMA | XFER_MWDMA | | 225 | speed = ide_find_best_pio_mode(drive); |
235 | (vdev->via_config->flags & VIA_UDMA ? XFER_UDMA : 0) | | ||
236 | (w80 && (vdev->via_config->flags & VIA_UDMA) >= VIA_UDMA_66 ? XFER_UDMA_66 : 0) | | ||
237 | (w80 && (vdev->via_config->flags & VIA_UDMA) >= VIA_UDMA_100 ? XFER_UDMA_100 : 0) | | ||
238 | (w80 && (vdev->via_config->flags & VIA_UDMA) >= VIA_UDMA_133 ? XFER_UDMA_133 : 0)); | ||
239 | 226 | ||
240 | via_set_drive(drive, speed); | 227 | via_set_drive(drive, speed); |
241 | 228 | ||
@@ -272,8 +259,8 @@ static void __devinit via_cable_detect(struct via82cxxx_dev *vdev, u32 u) | |||
272 | { | 259 | { |
273 | int i; | 260 | int i; |
274 | 261 | ||
275 | switch (vdev->via_config->flags & VIA_UDMA) { | 262 | switch (vdev->via_config->udma_mask) { |
276 | case VIA_UDMA_66: | 263 | case ATA_UDMA4: |
277 | for (i = 24; i >= 0; i -= 8) | 264 | for (i = 24; i >= 0; i -= 8) |
278 | if (((u >> (i & 16)) & 8) && | 265 | if (((u >> (i & 16)) & 8) && |
279 | ((u >> i) & 0x20) && | 266 | ((u >> i) & 0x20) && |
@@ -286,7 +273,7 @@ static void __devinit via_cable_detect(struct via82cxxx_dev *vdev, u32 u) | |||
286 | } | 273 | } |
287 | break; | 274 | break; |
288 | 275 | ||
289 | case VIA_UDMA_100: | 276 | case ATA_UDMA5: |
290 | for (i = 24; i >= 0; i -= 8) | 277 | for (i = 24; i >= 0; i -= 8) |
291 | if (((u >> i) & 0x10) || | 278 | if (((u >> i) & 0x10) || |
292 | (((u >> i) & 0x20) && | 279 | (((u >> i) & 0x20) && |
@@ -298,7 +285,7 @@ static void __devinit via_cable_detect(struct via82cxxx_dev *vdev, u32 u) | |||
298 | } | 285 | } |
299 | break; | 286 | break; |
300 | 287 | ||
301 | case VIA_UDMA_133: | 288 | case ATA_UDMA6: |
302 | for (i = 24; i >= 0; i -= 8) | 289 | for (i = 24; i >= 0; i -= 8) |
303 | if (((u >> i) & 0x10) || | 290 | if (((u >> i) & 0x10) || |
304 | (((u >> i) & 0x20) && | 291 | (((u >> i) & 0x20) && |
@@ -353,7 +340,7 @@ static unsigned int __devinit init_chipset_via82cxxx(struct pci_dev *dev, const | |||
353 | 340 | ||
354 | via_cable_detect(vdev, u); | 341 | via_cable_detect(vdev, u); |
355 | 342 | ||
356 | if ((via_config->flags & VIA_UDMA) == VIA_UDMA_66) { | 343 | if (via_config->udma_mask == ATA_UDMA4) { |
357 | /* Enable Clk66 */ | 344 | /* Enable Clk66 */ |
358 | pci_write_config_dword(dev, VIA_UDMA_TIMING, u|0x80008); | 345 | pci_write_config_dword(dev, VIA_UDMA_TIMING, u|0x80008); |
359 | } else if (via_config->flags & VIA_BAD_CLK66) { | 346 | } else if (via_config->flags & VIA_BAD_CLK66) { |
@@ -416,10 +403,12 @@ static unsigned int __devinit init_chipset_via82cxxx(struct pci_dev *dev, const | |||
416 | */ | 403 | */ |
417 | 404 | ||
418 | pci_read_config_byte(isa, PCI_REVISION_ID, &t); | 405 | pci_read_config_byte(isa, PCI_REVISION_ID, &t); |
419 | printk(KERN_INFO "VP_IDE: VIA %s (rev %02x) IDE %s " | 406 | printk(KERN_INFO "VP_IDE: VIA %s (rev %02x) IDE %sDMA%s " |
420 | "controller on pci%s\n", | 407 | "controller on pci%s\n", |
421 | via_config->name, t, | 408 | via_config->name, t, |
422 | via_dma[via_config->flags & VIA_UDMA], | 409 | via_config->udma_mask ? "U" : "MW", |
410 | via_dma[via_config->udma_mask ? | ||
411 | (fls(via_config->udma_mask) - 1) : 0], | ||
423 | pci_name(dev)); | 412 | pci_name(dev)); |
424 | 413 | ||
425 | pci_dev_put(isa); | 414 | pci_dev_put(isa); |
@@ -454,7 +443,8 @@ static void __devinit init_hwif_via82cxxx(ide_hwif_t *hwif) | |||
454 | return; | 443 | return; |
455 | 444 | ||
456 | hwif->atapi_dma = 1; | 445 | hwif->atapi_dma = 1; |
457 | hwif->ultra_mask = 0x7f; | 446 | |
447 | hwif->ultra_mask = vdev->via_config->udma_mask; | ||
458 | hwif->mwdma_mask = 0x07; | 448 | hwif->mwdma_mask = 0x07; |
459 | hwif->swdma_mask = 0x07; | 449 | hwif->swdma_mask = 0x07; |
460 | 450 | ||