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authorPaolo Ciarrocchi <paolo.ciarrocchi@gmail.com>2008-04-26 11:36:39 -0400
committerBartlomiej Zolnierkiewicz <bzolnier@gmail.com>2008-04-26 11:36:39 -0400
commit5c634bb9ad7e8fac0839d0f36e7b9ee197887d45 (patch)
treeb811a585b2249004394aabd328c667356862c23b /drivers/ide/pci/tc86c001.c
parent846bb88ae8980b98b11e0298c7ab8cfc9539c3f6 (diff)
IDE: Coding Style fixes to drivers/ide/pci/tc86c001.c
File is now error and warning free. Compile tested. [bart: md5sum checked] Signed-off-by: Paolo Ciarrocchi <paolo.ciarrocchi@gmail.com> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Diffstat (limited to 'drivers/ide/pci/tc86c001.c')
-rw-r--r--drivers/ide/pci/tc86c001.c28
1 files changed, 14 insertions, 14 deletions
diff --git a/drivers/ide/pci/tc86c001.c b/drivers/ide/pci/tc86c001.c
index 1e4a6262bcef..c15435182e3c 100644
--- a/drivers/ide/pci/tc86c001.c
+++ b/drivers/ide/pci/tc86c001.c
@@ -18,20 +18,20 @@ static void tc86c001_set_mode(ide_drive_t *drive, const u8 speed)
18 u16 mode, scr = inw(scr_port); 18 u16 mode, scr = inw(scr_port);
19 19
20 switch (speed) { 20 switch (speed) {
21 case XFER_UDMA_4: mode = 0x00c0; break; 21 case XFER_UDMA_4: mode = 0x00c0; break;
22 case XFER_UDMA_3: mode = 0x00b0; break; 22 case XFER_UDMA_3: mode = 0x00b0; break;
23 case XFER_UDMA_2: mode = 0x00a0; break; 23 case XFER_UDMA_2: mode = 0x00a0; break;
24 case XFER_UDMA_1: mode = 0x0090; break; 24 case XFER_UDMA_1: mode = 0x0090; break;
25 case XFER_UDMA_0: mode = 0x0080; break; 25 case XFER_UDMA_0: mode = 0x0080; break;
26 case XFER_MW_DMA_2: mode = 0x0070; break; 26 case XFER_MW_DMA_2: mode = 0x0070; break;
27 case XFER_MW_DMA_1: mode = 0x0060; break; 27 case XFER_MW_DMA_1: mode = 0x0060; break;
28 case XFER_MW_DMA_0: mode = 0x0050; break; 28 case XFER_MW_DMA_0: mode = 0x0050; break;
29 case XFER_PIO_4: mode = 0x0400; break; 29 case XFER_PIO_4: mode = 0x0400; break;
30 case XFER_PIO_3: mode = 0x0300; break; 30 case XFER_PIO_3: mode = 0x0300; break;
31 case XFER_PIO_2: mode = 0x0200; break; 31 case XFER_PIO_2: mode = 0x0200; break;
32 case XFER_PIO_1: mode = 0x0100; break; 32 case XFER_PIO_1: mode = 0x0100; break;
33 case XFER_PIO_0: 33 case XFER_PIO_0:
34 default: mode = 0x0000; break; 34 default: mode = 0x0000; break;
35 } 35 }
36 36
37 scr &= (speed < XFER_MW_DMA_0) ? 0xf8ff : 0xff0f; 37 scr &= (speed < XFER_MW_DMA_0) ? 0xf8ff : 0xff0f;