[PATCH] sl82c105: straighten up IDE control/status register caching

Straighten up the IDE control/status register caching -- you *really* can't
cache the shared register per-channel and hope that it won't get out ouf
sync.

Set the PIO fallback mode to PIO0 for the slave drive as well as master --
there was no point in having them different (most probably a resutl of
typo).

Do a bit of reformat and cleanup while at it...

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Acked-by: Alan Cox <alan@lxorguk.ukuu.org.uk>
Cc: Bartlomiej Zolnierkiewicz <B.Zolnierkiewicz@elka.pw.edu.pl>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

1 files changed, 13 insertions, 18 deletions

diff --git a/drivers/ide/pci/sl82c105.c b/drivers/ide/pci/sl82c105.c
index 0b4b60498515..5afefe8692fe 100644
--- a/drivers/ide/pci/sl82c105.c
+++ b/drivers/ide/pci/sl82c105.c
@@ -299,14 +299,14 @@ static void sl82c105_selectproc(ide_drive_t *drive)
         //DBG(("sl82c105_selectproc(drive:%s)\n", drive->name));
 
         mask = hwif->channel ? CTRL_P1F16 : CTRL_P0F16;
-        old = val = *((u32 *)&hwif->hwif_data);
+        old = val = (u32)pci_get_drvdata(dev);
         if (drive->using_dma)
                 val &= ~mask;
         else
                 val |= mask;
         if (old != val) {
                 pci_write_config_dword(dev, 0x40, val); 
-                *((u32 *)&hwif->hwif_data) = val;
+                pci_set_drvdata(dev, (void *)val);
         }
 }
 
@@ -316,14 +316,13 @@ static void sl82c105_selectproc(ide_drive_t *drive)
  */
 static void sl82c105_resetproc(ide_drive_t *drive)
 {
-        ide_hwif_t *hwif = HWIF(drive);
-        struct pci_dev *dev = hwif->pci_dev;
+        struct pci_dev *dev = HWIF(drive)->pci_dev;
         u32 val;
 
         DBG(("sl82c105_resetproc(drive:%s)\n", drive->name));
 
         pci_read_config_dword(dev, 0x40, &val);
-        *((u32 *)&hwif->hwif_data) = val;
+        pci_set_drvdata(dev, (void *)val);
 }
         
 /*
@@ -394,6 +393,7 @@ static unsigned int __devinit init_chipset_sl82c105(struct pci_dev *dev, const c
         pci_read_config_dword(dev, 0x40, &val);
         val |= CTRL_P0EN | CTRL_P0F16 | CTRL_P1F16;
         pci_write_config_dword(dev, 0x40, val);
+        pci_set_drvdata(dev, (void *)val);
 
         return dev->irq;
 }
@@ -404,30 +404,25 @@ static unsigned int __devinit init_chipset_sl82c105(struct pci_dev *dev, const c
 
 static void __devinit init_hwif_sl82c105(ide_hwif_t *hwif)
 {
-        struct pci_dev *dev = hwif->pci_dev;
         unsigned int rev;
         u8 dma_state;
-        u32 val;
-        
+
         DBG(("init_hwif_sl82c105(hwif: ide%d)\n", hwif->index));
 
         hwif->tuneproc = tune_sl82c105;
         hwif->selectproc = sl82c105_selectproc;
         hwif->resetproc = sl82c105_resetproc;
-        
-        /* Default to PIO 0 for fallback unless tuned otherwise,
-         * we always autotune PIO, this is done before DMA is
-         * checked, so there is no risk of accidentally disabling
-         * DMA
-          */
+
+        /*
+         * Default to PIO 0 for fallback unless tuned otherwise.
+         * We always autotune PIO,  this is done before DMA is checked,
+         * so there's no risk of accidentally disabling DMA
+         */
         hwif->drives[0].pio_speed = XFER_PIO_0;
         hwif->drives[0].autotune = 1;
-        hwif->drives[1].pio_speed = XFER_PIO_1;
+        hwif->drives[1].pio_speed = XFER_PIO_0;
         hwif->drives[1].autotune = 1;
 
-        pci_read_config_dword(dev, 0x40, &val);
-        *((u32 *)&hwif->hwif_data) = val;
-        
         hwif->atapi_dma = 0;
         hwif->mwdma_mask = 0;
         hwif->swdma_mask = 0;