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authorBartlomiej Zolnierkiewicz <bzolnier@gmail.com>2007-05-15 18:51:42 -0400
committerBartlomiej Zolnierkiewicz <bzolnier@gmail.com>2007-05-15 18:51:42 -0400
commit9445de76c124e90176b5116cf82f6cd1413f5230 (patch)
treef48fa3b9f1291a804a3ac434d6140c8a0e4a4969 /drivers/ide/pci/serverworks.c
parent4fce3164b84d5b014acbf5a3f57eb3650e154f5b (diff)
serverworks: PIO mode setup fixes
* limit max PIO mode to PIO4, this driver doesn't support PIO5 and attempt to program PIO5 by svwks_tune_chipset() could result in incorrect PIO timings being programmed and possibly the data corruption (it seems that the minimum possible values were used but I lack the datasheets to be sure) * select best PIO mode in svwks_tune_drive() and not in svwks_tune_chipset() when doing PIO autotuning (pio == 255) * don't try to tune PIO in config_chipset_for_dma() as ide_dma_enable() could return 1 if DMA was previously enabled (svwks_config_drive_xfer_rate() takes care of PIO tuning if no suitable DMA mode is found) * remove config_chipset_for_pio() and use svwks_tune_drive() instead, config_chipset_for_pio() contained numerous bugs when selecting PIO mode (luckily it was only used for devices limited to PIO by capabilities/BIOS): - it didn't check for validity of id->eide_pio_modes and id->eide_pio_iordy before using them - it tried to found out maximum PIO mode basing on minimum IORDY cycle time (moreover wrong cycle times were used for PIO0/1/5) - it was overriding PIO blacklist and conservative PIO "downgrade" done by ide_get_best_pio_mode() - if the max drive PIO was PIO5 then XFER_PIO_0/XFER_PIO_SLOW was selected (XFER_PIO_SLOW is not supported by svwks_tune_chipset() so the result was the same as if using XFER_PIO_5 => wrong PIO timings were set) - it was overriding drive->current_speed * bump driver version Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Diffstat (limited to 'drivers/ide/pci/serverworks.c')
-rw-r--r--drivers/ide/pci/serverworks.c68
1 files changed, 15 insertions, 53 deletions
diff --git a/drivers/ide/pci/serverworks.c b/drivers/ide/pci/serverworks.c
index 2fa6d92d16cc..a94e77d67db3 100644
--- a/drivers/ide/pci/serverworks.c
+++ b/drivers/ide/pci/serverworks.c
@@ -1,9 +1,10 @@
1/* 1/*
2 * linux/drivers/ide/pci/serverworks.c Version 0.8 25 Ebr 2003 2 * linux/drivers/ide/pci/serverworks.c Version 0.9 Mar 4 2007
3 * 3 *
4 * Copyright (C) 1998-2000 Michel Aubry 4 * Copyright (C) 1998-2000 Michel Aubry
5 * Copyright (C) 1998-2000 Andrzej Krzysztofowicz 5 * Copyright (C) 1998-2000 Andrzej Krzysztofowicz
6 * Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org> 6 * Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org>
7 * Copyright (C) 2007 Bartlomiej Zolnierkiewicz
7 * Portions copyright (c) 2001 Sun Microsystems 8 * Portions copyright (c) 2001 Sun Microsystems
8 * 9 *
9 * 10 *
@@ -136,19 +137,14 @@ static int svwks_tune_chipset (ide_drive_t *drive, u8 xferspeed)
136 137
137 ide_hwif_t *hwif = HWIF(drive); 138 ide_hwif_t *hwif = HWIF(drive);
138 struct pci_dev *dev = hwif->pci_dev; 139 struct pci_dev *dev = hwif->pci_dev;
139 u8 speed; 140 u8 speed = ide_rate_filter(drive, xferspeed);
140 u8 pio = ide_get_best_pio_mode(drive, 255, 5, NULL); 141 u8 pio = ide_get_best_pio_mode(drive, 255, 4, NULL);
141 u8 unit = (drive->select.b.unit & 0x01); 142 u8 unit = (drive->select.b.unit & 0x01);
142 u8 csb5 = svwks_csb_check(dev); 143 u8 csb5 = svwks_csb_check(dev);
143 u8 ultra_enable = 0, ultra_timing = 0; 144 u8 ultra_enable = 0, ultra_timing = 0;
144 u8 dma_timing = 0, pio_timing = 0; 145 u8 dma_timing = 0, pio_timing = 0;
145 u16 csb5_pio = 0; 146 u16 csb5_pio = 0;
146 147
147 if (xferspeed == 255) /* PIO auto-tuning */
148 speed = XFER_PIO_0 + pio;
149 else
150 speed = ide_rate_filter(drive, xferspeed);
151
152 /* If we are about to put a disk into UDMA mode we screwed up. 148 /* If we are about to put a disk into UDMA mode we screwed up.
153 Our code assumes we never _ever_ do this on an OSB4 */ 149 Our code assumes we never _ever_ do this on an OSB4 */
154 150
@@ -231,6 +227,9 @@ oem_setup_failed:
231 case XFER_MW_DMA_2: 227 case XFER_MW_DMA_2:
232 case XFER_MW_DMA_1: 228 case XFER_MW_DMA_1:
233 case XFER_MW_DMA_0: 229 case XFER_MW_DMA_0:
230 /*
231 * TODO: always setup PIO mode so this won't be needed
232 */
234 pio_timing |= pio_modes[pio]; 233 pio_timing |= pio_modes[pio];
235 csb5_pio |= (pio << (4*drive->dn)); 234 csb5_pio |= (pio << (4*drive->dn));
236 dma_timing |= dma_modes[speed - XFER_MW_DMA_0]; 235 dma_timing |= dma_modes[speed - XFER_MW_DMA_0];
@@ -242,6 +241,9 @@ oem_setup_failed:
242 case XFER_UDMA_2: 241 case XFER_UDMA_2:
243 case XFER_UDMA_1: 242 case XFER_UDMA_1:
244 case XFER_UDMA_0: 243 case XFER_UDMA_0:
244 /*
245 * TODO: always setup PIO mode so this won't be needed
246 */
245 pio_timing |= pio_modes[pio]; 247 pio_timing |= pio_modes[pio];
246 csb5_pio |= (pio << (4*drive->dn)); 248 csb5_pio |= (pio << (4*drive->dn));
247 dma_timing |= dma_modes[2]; 249 dma_timing |= dma_modes[2];
@@ -262,58 +264,18 @@ oem_setup_failed:
262 return (ide_config_drive_speed(drive, speed)); 264 return (ide_config_drive_speed(drive, speed));
263} 265}
264 266
265static void config_chipset_for_pio (ide_drive_t *drive)
266{
267 u16 eide_pio_timing[6] = {960, 480, 240, 180, 120, 90};
268 u16 xfer_pio = drive->id->eide_pio_modes;
269 u8 timing, speed, pio;
270
271 pio = ide_get_best_pio_mode(drive, 255, 5, NULL);
272
273 if (xfer_pio > 4)
274 xfer_pio = 0;
275
276 if (drive->id->eide_pio_iordy > 0)
277 for (xfer_pio = 5;
278 xfer_pio>0 &&
279 drive->id->eide_pio_iordy>eide_pio_timing[xfer_pio];
280 xfer_pio--);
281 else
282 xfer_pio = (drive->id->eide_pio_modes & 4) ? 0x05 :
283 (drive->id->eide_pio_modes & 2) ? 0x04 :
284 (drive->id->eide_pio_modes & 1) ? 0x03 :
285 (drive->id->tPIO & 2) ? 0x02 :
286 (drive->id->tPIO & 1) ? 0x01 : xfer_pio;
287
288 timing = (xfer_pio >= pio) ? xfer_pio : pio;
289
290 switch(timing) {
291 case 4: speed = XFER_PIO_4;break;
292 case 3: speed = XFER_PIO_3;break;
293 case 2: speed = XFER_PIO_2;break;
294 case 1: speed = XFER_PIO_1;break;
295 default:
296 speed = (!drive->id->tPIO) ? XFER_PIO_0 : XFER_PIO_SLOW;
297 break;
298 }
299 (void) svwks_tune_chipset(drive, speed);
300 drive->current_speed = speed;
301}
302
303static void svwks_tune_drive (ide_drive_t *drive, u8 pio) 267static void svwks_tune_drive (ide_drive_t *drive, u8 pio)
304{ 268{
305 if(pio == 255) 269 pio = ide_get_best_pio_mode(drive, pio, 4, NULL);
306 (void) svwks_tune_chipset(drive, 255); 270 (void)svwks_tune_chipset(drive, XFER_PIO_0 + pio);
307 else
308 (void) svwks_tune_chipset(drive, (XFER_PIO_0 + pio));
309} 271}
310 272
311static int config_chipset_for_dma (ide_drive_t *drive) 273static int config_chipset_for_dma (ide_drive_t *drive)
312{ 274{
313 u8 speed = ide_max_dma_mode(drive); 275 u8 speed = ide_max_dma_mode(drive);
314 276
315 if (!(speed)) 277 if (!speed)
316 speed = XFER_PIO_0 + ide_get_best_pio_mode(drive, 255, 5, NULL); 278 return 0;
317 279
318 (void) svwks_tune_chipset(drive, speed); 280 (void) svwks_tune_chipset(drive, speed);
319 return ide_dma_enable(drive); 281 return ide_dma_enable(drive);
@@ -327,7 +289,7 @@ static int svwks_config_drive_xfer_rate (ide_drive_t *drive)
327 return 0; 289 return 0;
328 290
329 if (ide_use_fast_pio(drive)) 291 if (ide_use_fast_pio(drive))
330 config_chipset_for_pio(drive); 292 svwks_tune_drive(drive, 255);
331 293
332 return -1; 294 return -1;
333} 295}