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authorAuke Kok <auke-jan.h.kok@intel.com>2007-06-08 18:46:36 -0400
committerGreg Kroah-Hartman <gregkh@suse.de>2007-07-11 19:02:10 -0400
commit44c10138fd4bbc4b6d6bff0873c24902f2a9da65 (patch)
tree6e16d3ec80c87490dc743f72da086356f2906ace /drivers/ide/pci/serverworks.c
parentb8a3a5214d7cc115f1ca3a3967b7229d97c46f4a (diff)
PCI: Change all drivers to use pci_device->revision
Instead of all drivers reading pci config space to get the revision ID, they can now use the pci_device->revision member. This exposes some issues where drivers where reading a word or a dword for the revision number, and adding useless error-handling around the read. Some drivers even just read it for no purpose of all. In devices where the revision ID is being copied over and used in what appears to be the equivalent of hotpath, I have left the copy code and the cached copy as not to influence the driver's performance. Compile tested with make all{yes,mod}config on x86_64 and i386. Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Acked-by: Dave Jones <davej@redhat.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/ide/pci/serverworks.c')
-rw-r--r--drivers/ide/pci/serverworks.c13
1 files changed, 3 insertions, 10 deletions
diff --git a/drivers/ide/pci/serverworks.c b/drivers/ide/pci/serverworks.c
index 1371b5bf6bf0..ed04e0c8dd4c 100644
--- a/drivers/ide/pci/serverworks.c
+++ b/drivers/ide/pci/serverworks.c
@@ -55,7 +55,6 @@ static const char *svwks_bad_ata100[] = {
55 NULL 55 NULL
56}; 56};
57 57
58static u8 svwks_revision = 0;
59static struct pci_dev *isa_dev; 58static struct pci_dev *isa_dev;
60 59
61static int check_in_drive_lists (ide_drive_t *drive, const char **list) 60static int check_in_drive_lists (ide_drive_t *drive, const char **list)
@@ -71,9 +70,6 @@ static u8 svwks_udma_filter(ide_drive_t *drive)
71 struct pci_dev *dev = HWIF(drive)->pci_dev; 70 struct pci_dev *dev = HWIF(drive)->pci_dev;
72 u8 mask = 0; 71 u8 mask = 0;
73 72
74 if (!svwks_revision)
75 pci_read_config_byte(dev, PCI_REVISION_ID, &svwks_revision);
76
77 if (dev->device == PCI_DEVICE_ID_SERVERWORKS_HT1000IDE) 73 if (dev->device == PCI_DEVICE_ID_SERVERWORKS_HT1000IDE)
78 return 0x1f; 74 return 0x1f;
79 if (dev->device == PCI_DEVICE_ID_SERVERWORKS_OSB4IDE) { 75 if (dev->device == PCI_DEVICE_ID_SERVERWORKS_OSB4IDE) {
@@ -88,9 +84,9 @@ static u8 svwks_udma_filter(ide_drive_t *drive)
88 return 0; 84 return 0;
89 /* Check the OSB4 DMA33 enable bit */ 85 /* Check the OSB4 DMA33 enable bit */
90 return ((reg & 0x00004000) == 0x00004000) ? 0x07 : 0; 86 return ((reg & 0x00004000) == 0x00004000) ? 0x07 : 0;
91 } else if (svwks_revision < SVWKS_CSB5_REVISION_NEW) { 87 } else if (dev->revision < SVWKS_CSB5_REVISION_NEW) {
92 return 0x07; 88 return 0x07;
93 } else if (svwks_revision >= SVWKS_CSB5_REVISION_NEW) { 89 } else if (dev->revision >= SVWKS_CSB5_REVISION_NEW) {
94 u8 btr = 0, mode; 90 u8 btr = 0, mode;
95 pci_read_config_byte(dev, 0x5A, &btr); 91 pci_read_config_byte(dev, 0x5A, &btr);
96 mode = btr & 0x3; 92 mode = btr & 0x3;
@@ -234,9 +230,6 @@ static unsigned int __devinit init_chipset_svwks (struct pci_dev *dev, const cha
234 unsigned int reg; 230 unsigned int reg;
235 u8 btr; 231 u8 btr;
236 232
237 /* save revision id to determine DMA capability */
238 pci_read_config_byte(dev, PCI_REVISION_ID, &svwks_revision);
239
240 /* force Master Latency Timer value to 64 PCICLKs */ 233 /* force Master Latency Timer value to 64 PCICLKs */
241 pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0x40); 234 pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0x40);
242 235
@@ -315,7 +308,7 @@ static unsigned int __devinit init_chipset_svwks (struct pci_dev *dev, const cha
315 if (!(PCI_FUNC(dev->devfn) & 1)) 308 if (!(PCI_FUNC(dev->devfn) & 1))
316 btr |= 0x2; 309 btr |= 0x2;
317 else 310 else
318 btr |= (svwks_revision >= SVWKS_CSB5_REVISION_NEW) ? 0x3 : 0x2; 311 btr |= (dev->revision >= SVWKS_CSB5_REVISION_NEW) ? 0x3 : 0x2;
319 pci_write_config_byte(dev, 0x5A, btr); 312 pci_write_config_byte(dev, 0x5A, btr);
320 } 313 }
321 /* Setup HT1000 SouthBridge Controller - Single Channel Only */ 314 /* Setup HT1000 SouthBridge Controller - Single Channel Only */