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authorBartlomiej Zolnierkiewicz <bzolnier@gmail.com>2008-07-23 13:55:51 -0400
committerBartlomiej Zolnierkiewicz <bzolnier@gmail.com>2008-07-23 13:55:51 -0400
commitcab7f8eda40d3e3e16b137c67cdddc2cf893c5d7 (patch)
tree369335f0bc359357653fb2271c67940840eedced /drivers/ide/pci/scc_pata.c
parentab86f91e8739e0b1587a16e4792ab5e4bb11f1b5 (diff)
ide: remove ->dma_{status,command} fields from ide_hwif_t
* Use ->dma_base + offset instead of ->dma_{status,command} and remove no longer needed ->dma_{status,command}. While at it: * Use ATA_DMA_* defines. There should be no functional changes caused by this patch. Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Diffstat (limited to 'drivers/ide/pci/scc_pata.c')
-rw-r--r--drivers/ide/pci/scc_pata.c38
1 files changed, 18 insertions, 20 deletions
diff --git a/drivers/ide/pci/scc_pata.c b/drivers/ide/pci/scc_pata.c
index 7a2a7b2a319a..fc163a7772a7 100644
--- a/drivers/ide/pci/scc_pata.c
+++ b/drivers/ide/pci/scc_pata.c
@@ -128,7 +128,7 @@ static u8 scc_ide_inb(unsigned long port)
128 128
129static u8 scc_read_sff_dma_status(ide_hwif_t *hwif) 129static u8 scc_read_sff_dma_status(ide_hwif_t *hwif)
130{ 130{
131 return (u8)in_be32((void *)hwif->dma_status); 131 return (u8)in_be32((void *)(hwif->dma_base + 4));
132} 132}
133 133
134static void scc_ide_insw(unsigned long port, void *addr, u32 count) 134static void scc_ide_insw(unsigned long port, void *addr, u32 count)
@@ -266,14 +266,14 @@ static void scc_dma_host_set(ide_drive_t *drive, int on)
266{ 266{
267 ide_hwif_t *hwif = drive->hwif; 267 ide_hwif_t *hwif = drive->hwif;
268 u8 unit = (drive->select.b.unit & 0x01); 268 u8 unit = (drive->select.b.unit & 0x01);
269 u8 dma_stat = scc_ide_inb(hwif->dma_status); 269 u8 dma_stat = scc_ide_inb(hwif->dma_base + 4);
270 270
271 if (on) 271 if (on)
272 dma_stat |= (1 << (5 + unit)); 272 dma_stat |= (1 << (5 + unit));
273 else 273 else
274 dma_stat &= ~(1 << (5 + unit)); 274 dma_stat &= ~(1 << (5 + unit));
275 275
276 scc_ide_outb(dma_stat, hwif->dma_status); 276 scc_ide_outb(dma_stat, hwif->dma_base + 4);
277} 277}
278 278
279/** 279/**
@@ -309,13 +309,13 @@ static int scc_dma_setup(ide_drive_t *drive)
309 out_be32((void __iomem *)(hwif->dma_base + 8), hwif->dmatable_dma); 309 out_be32((void __iomem *)(hwif->dma_base + 8), hwif->dmatable_dma);
310 310
311 /* specify r/w */ 311 /* specify r/w */
312 out_be32((void __iomem *)hwif->dma_command, reading); 312 out_be32((void __iomem *)hwif->dma_base, reading);
313 313
314 /* read dma_status for INTR & ERROR flags */ 314 /* read DMA status for INTR & ERROR flags */
315 dma_stat = in_be32((void __iomem *)hwif->dma_status); 315 dma_stat = in_be32((void __iomem *)(hwif->dma_base + 4));
316 316
317 /* clear INTR & ERROR flags */ 317 /* clear INTR & ERROR flags */
318 out_be32((void __iomem *)hwif->dma_status, dma_stat|6); 318 out_be32((void __iomem *)(hwif->dma_base + 4), dma_stat | 6);
319 drive->waiting_for_dma = 1; 319 drive->waiting_for_dma = 1;
320 return 0; 320 return 0;
321} 321}
@@ -323,10 +323,10 @@ static int scc_dma_setup(ide_drive_t *drive)
323static void scc_dma_start(ide_drive_t *drive) 323static void scc_dma_start(ide_drive_t *drive)
324{ 324{
325 ide_hwif_t *hwif = drive->hwif; 325 ide_hwif_t *hwif = drive->hwif;
326 u8 dma_cmd = scc_ide_inb(hwif->dma_command); 326 u8 dma_cmd = scc_ide_inb(hwif->dma_base);
327 327
328 /* start DMA */ 328 /* start DMA */
329 scc_ide_outb(dma_cmd | 1, hwif->dma_command); 329 scc_ide_outb(dma_cmd | 1, hwif->dma_base);
330 hwif->dma = 1; 330 hwif->dma = 1;
331 wmb(); 331 wmb();
332} 332}
@@ -338,13 +338,13 @@ static int __scc_dma_end(ide_drive_t *drive)
338 338
339 drive->waiting_for_dma = 0; 339 drive->waiting_for_dma = 0;
340 /* get DMA command mode */ 340 /* get DMA command mode */
341 dma_cmd = scc_ide_inb(hwif->dma_command); 341 dma_cmd = scc_ide_inb(hwif->dma_base);
342 /* stop DMA */ 342 /* stop DMA */
343 scc_ide_outb(dma_cmd & ~1, hwif->dma_command); 343 scc_ide_outb(dma_cmd & ~1, hwif->dma_base);
344 /* get DMA status */ 344 /* get DMA status */
345 dma_stat = scc_ide_inb(hwif->dma_status); 345 dma_stat = scc_ide_inb(hwif->dma_base + 4);
346 /* clear the INTR & ERROR bits */ 346 /* clear the INTR & ERROR bits */
347 scc_ide_outb(dma_stat | 6, hwif->dma_status); 347 scc_ide_outb(dma_stat | 6, hwif->dma_base + 4);
348 /* purge DMA mappings */ 348 /* purge DMA mappings */
349 ide_destroy_dmatable(drive); 349 ide_destroy_dmatable(drive);
350 /* verify good DMA status */ 350 /* verify good DMA status */
@@ -364,6 +364,7 @@ static int __scc_dma_end(ide_drive_t *drive)
364static int scc_dma_end(ide_drive_t *drive) 364static int scc_dma_end(ide_drive_t *drive)
365{ 365{
366 ide_hwif_t *hwif = HWIF(drive); 366 ide_hwif_t *hwif = HWIF(drive);
367 void __iomem *dma_base = (void __iomem *)hwif->dma_base;
367 unsigned long intsts_port = hwif->dma_base + 0x014; 368 unsigned long intsts_port = hwif->dma_base + 0x014;
368 u32 reg; 369 u32 reg;
369 int dma_stat, data_loss = 0; 370 int dma_stat, data_loss = 0;
@@ -402,7 +403,7 @@ static int scc_dma_end(ide_drive_t *drive)
402 printk(KERN_WARNING "%s: SERROR\n", SCC_PATA_NAME); 403 printk(KERN_WARNING "%s: SERROR\n", SCC_PATA_NAME);
403 out_be32((void __iomem *)intsts_port, INTSTS_SERROR|INTSTS_BMSINT); 404 out_be32((void __iomem *)intsts_port, INTSTS_SERROR|INTSTS_BMSINT);
404 405
405 out_be32((void __iomem *)hwif->dma_command, in_be32((void __iomem *)hwif->dma_command) & ~QCHCD_IOS_SS); 406 out_be32(dma_base, in_be32(dma_base) & ~QCHCD_IOS_SS);
406 continue; 407 continue;
407 } 408 }
408 409
@@ -417,7 +418,7 @@ static int scc_dma_end(ide_drive_t *drive)
417 418
418 out_be32((void __iomem *)intsts_port, INTSTS_PRERR|INTSTS_BMSINT); 419 out_be32((void __iomem *)intsts_port, INTSTS_PRERR|INTSTS_BMSINT);
419 420
420 out_be32((void __iomem *)hwif->dma_command, in_be32((void __iomem *)hwif->dma_command) & ~QCHCD_IOS_SS); 421 out_be32(dma_base, in_be32(dma_base) & ~QCHCD_IOS_SS);
421 continue; 422 continue;
422 } 423 }
423 424
@@ -425,12 +426,12 @@ static int scc_dma_end(ide_drive_t *drive)
425 printk(KERN_WARNING "%s: Response Error\n", SCC_PATA_NAME); 426 printk(KERN_WARNING "%s: Response Error\n", SCC_PATA_NAME);
426 out_be32((void __iomem *)intsts_port, INTSTS_RERR|INTSTS_BMSINT); 427 out_be32((void __iomem *)intsts_port, INTSTS_RERR|INTSTS_BMSINT);
427 428
428 out_be32((void __iomem *)hwif->dma_command, in_be32((void __iomem *)hwif->dma_command) & ~QCHCD_IOS_SS); 429 out_be32(dma_base, in_be32(dma_base) & ~QCHCD_IOS_SS);
429 continue; 430 continue;
430 } 431 }
431 432
432 if (reg & INTSTS_ICERR) { 433 if (reg & INTSTS_ICERR) {
433 out_be32((void __iomem *)hwif->dma_command, in_be32((void __iomem *)hwif->dma_command) & ~QCHCD_IOS_SS); 434 out_be32(dma_base, in_be32(dma_base) & ~QCHCD_IOS_SS);
434 435
435 printk(KERN_WARNING "%s: Illegal Configuration\n", SCC_PATA_NAME); 436 printk(KERN_WARNING "%s: Illegal Configuration\n", SCC_PATA_NAME);
436 out_be32((void __iomem *)intsts_port, INTSTS_ICERR|INTSTS_BMSINT); 437 out_be32((void __iomem *)intsts_port, INTSTS_ICERR|INTSTS_BMSINT);
@@ -832,9 +833,6 @@ static void __devinit init_hwif_scc(ide_hwif_t *hwif)
832 833
833 ports->hwif = hwif; 834 ports->hwif = hwif;
834 835
835 hwif->dma_command = hwif->dma_base;
836 hwif->dma_status = hwif->dma_base + 0x04;
837
838 /* PTERADD */ 836 /* PTERADD */
839 out_be32((void __iomem *)(hwif->dma_base + 0x018), hwif->dmatable_dma); 837 out_be32((void __iomem *)(hwif->dma_base + 0x018), hwif->dmatable_dma);
840 838