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authorBartlomiej Zolnierkiewicz <bzolnier@gmail.com>2007-10-18 18:30:07 -0400
committerBartlomiej Zolnierkiewicz <bzolnier@gmail.com>2007-10-18 18:30:07 -0400
commit5f8b6c34854a966fe5eb7241fde0419d47d5d408 (patch)
tree052afd508d9cd314f503d938182db55355f1b392 /drivers/ide/pci/piix.c
parent9adf768a398745c539623210502b521e671c59d7 (diff)
ide: add ->mwdma_mask and ->swdma_mask to ide_pci_device_t (take 2)
* Add ->mwdma_mask and ->swdma_mask to ide_pci_device_t. * Set ide_hwif_t DMA masks using DMA masks from ide_pci_device_t in setup-pci.c::ide_pci_setup_ports() (iff DMA base is valid and ->init_hwif method may still override them). * Convert IDE PCI host drivers to use ide_pci_device_t DMA masks. While at it: * Use ATA_{UDMA,MWDMA,SWDMA}* defines. * hpt34x.c: add separate ide_pci_device_t instances for HPT343 and HPT345. * serverworks.c: fix DMA masks being set before checking DMA base. v2: * Add missing masks to DECLARE_GENERIC_PCI_DEV() macro. Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Diffstat (limited to 'drivers/ide/pci/piix.c')
-rw-r--r--drivers/ide/pci/piix.c54
1 files changed, 26 insertions, 28 deletions
diff --git a/drivers/ide/pci/piix.c b/drivers/ide/pci/piix.c
index 692623892cbc..cbfc27b92ede 100644
--- a/drivers/ide/pci/piix.c
+++ b/drivers/ide/pci/piix.c
@@ -397,10 +397,6 @@ static void __devinit init_hwif_piix(ide_hwif_t *hwif)
397 if (piix_is_ichx(hwif->pci_dev)) 397 if (piix_is_ichx(hwif->pci_dev))
398 hwif->ide_dma_clear_irq = &piix_dma_clear_irq; 398 hwif->ide_dma_clear_irq = &piix_dma_clear_irq;
399 399
400 hwif->ultra_mask = hwif->cds->udma_mask;
401 hwif->mwdma_mask = 0x06;
402 hwif->swdma_mask = 0x04;
403
404 if (hwif->ultra_mask & 0x78) { 400 if (hwif->ultra_mask & 0x78) {
405 if (hwif->cbl != ATA_CBL_PATA40_SHORT) 401 if (hwif->cbl != ATA_CBL_PATA40_SHORT)
406 hwif->cbl = piix_cable_detect(hwif); 402 hwif->cbl = piix_cable_detect(hwif);
@@ -418,12 +414,14 @@ static void __devinit init_hwif_piix(ide_hwif_t *hwif)
418 .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, \ 414 .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, \
419 .host_flags = IDE_HFLAG_BOOTABLE, \ 415 .host_flags = IDE_HFLAG_BOOTABLE, \
420 .pio_mask = ATA_PIO4, \ 416 .pio_mask = ATA_PIO4, \
417 .swdma_mask = ATA_SWDMA2_ONLY, \
418 .mwdma_mask = ATA_MWDMA12_ONLY, \
421 .udma_mask = udma, \ 419 .udma_mask = udma, \
422 } 420 }
423 421
424static ide_pci_device_t piix_pci_info[] __devinitdata = { 422static ide_pci_device_t piix_pci_info[] __devinitdata = {
425 /* 0 */ DECLARE_PIIX_DEV("PIIXa", 0x00), /* no udma */ 423 /* 0 */ DECLARE_PIIX_DEV("PIIXa", 0x00), /* no udma */
426 /* 1 */ DECLARE_PIIX_DEV("PIIXb", 0x00), /* no udma */ 424 /* 1 */ DECLARE_PIIX_DEV("PIIXb", 0x00), /* no udma */
427 425
428 /* 2 */ 426 /* 2 */
429 { /* 427 { /*
@@ -439,28 +437,28 @@ static ide_pci_device_t piix_pci_info[] __devinitdata = {
439 .pio_mask = ATA_PIO4, 437 .pio_mask = ATA_PIO4,
440 }, 438 },
441 439
442 /* 3 */ DECLARE_PIIX_DEV("PIIX3", 0x00), /* no udma */ 440 /* 3 */ DECLARE_PIIX_DEV("PIIX3", 0x00), /* no udma */
443 /* 4 */ DECLARE_PIIX_DEV("PIIX4", 0x07), /* udma0-2 */ 441 /* 4 */ DECLARE_PIIX_DEV("PIIX4", ATA_UDMA2),
444 /* 5 */ DECLARE_PIIX_DEV("ICH0", 0x07), /* udma0-2 */ 442 /* 5 */ DECLARE_PIIX_DEV("ICH0", ATA_UDMA2),
445 /* 6 */ DECLARE_PIIX_DEV("PIIX4", 0x07), /* udma0-2 */ 443 /* 6 */ DECLARE_PIIX_DEV("PIIX4", ATA_UDMA2),
446 /* 7 */ DECLARE_PIIX_DEV("ICH", 0x1f), /* udma0-4 */ 444 /* 7 */ DECLARE_PIIX_DEV("ICH", ATA_UDMA4),
447 /* 8 */ DECLARE_PIIX_DEV("PIIX4", 0x1f), /* udma0-4 */ 445 /* 8 */ DECLARE_PIIX_DEV("PIIX4", ATA_UDMA4),
448 /* 9 */ DECLARE_PIIX_DEV("PIIX4", 0x07), /* udma0-2 */ 446 /* 9 */ DECLARE_PIIX_DEV("PIIX4", ATA_UDMA2),
449 /* 10 */ DECLARE_PIIX_DEV("ICH2", 0x3f), /* udma0-5 */ 447 /* 10 */ DECLARE_PIIX_DEV("ICH2", ATA_UDMA5),
450 /* 11 */ DECLARE_PIIX_DEV("ICH2M", 0x3f), /* udma0-5 */ 448 /* 11 */ DECLARE_PIIX_DEV("ICH2M", ATA_UDMA5),
451 /* 12 */ DECLARE_PIIX_DEV("ICH3M", 0x3f), /* udma0-5 */ 449 /* 12 */ DECLARE_PIIX_DEV("ICH3M", ATA_UDMA5),
452 /* 13 */ DECLARE_PIIX_DEV("ICH3", 0x3f), /* udma0-5 */ 450 /* 13 */ DECLARE_PIIX_DEV("ICH3", ATA_UDMA5),
453 /* 14 */ DECLARE_PIIX_DEV("ICH4", 0x3f), /* udma0-5 */ 451 /* 14 */ DECLARE_PIIX_DEV("ICH4", ATA_UDMA5),
454 /* 15 */ DECLARE_PIIX_DEV("ICH5", 0x3f), /* udma0-5 */ 452 /* 15 */ DECLARE_PIIX_DEV("ICH5", ATA_UDMA5),
455 /* 16 */ DECLARE_PIIX_DEV("C-ICH", 0x3f), /* udma0-5 */ 453 /* 16 */ DECLARE_PIIX_DEV("C-ICH", ATA_UDMA5),
456 /* 17 */ DECLARE_PIIX_DEV("ICH4", 0x3f), /* udma0-5 */ 454 /* 17 */ DECLARE_PIIX_DEV("ICH4", ATA_UDMA5),
457 /* 18 */ DECLARE_PIIX_DEV("ICH5-SATA", 0x3f), /* udma0-5 */ 455 /* 18 */ DECLARE_PIIX_DEV("ICH5-SATA", ATA_UDMA5),
458 /* 19 */ DECLARE_PIIX_DEV("ICH5", 0x3f), /* udma0-5 */ 456 /* 19 */ DECLARE_PIIX_DEV("ICH5", ATA_UDMA5),
459 /* 20 */ DECLARE_PIIX_DEV("ICH6", 0x3f), /* udma0-5 */ 457 /* 20 */ DECLARE_PIIX_DEV("ICH6", ATA_UDMA5),
460 /* 21 */ DECLARE_PIIX_DEV("ICH7", 0x3f), /* udma0-5 */ 458 /* 21 */ DECLARE_PIIX_DEV("ICH7", ATA_UDMA5),
461 /* 22 */ DECLARE_PIIX_DEV("ICH4", 0x3f), /* udma0-5 */ 459 /* 22 */ DECLARE_PIIX_DEV("ICH4", ATA_UDMA5),
462 /* 23 */ DECLARE_PIIX_DEV("ESB2", 0x3f), /* udma0-5 */ 460 /* 23 */ DECLARE_PIIX_DEV("ESB2", ATA_UDMA5),
463 /* 24 */ DECLARE_PIIX_DEV("ICH8M", 0x3f), /* udma0-5 */ 461 /* 24 */ DECLARE_PIIX_DEV("ICH8M", ATA_UDMA5),
464}; 462};
465 463
466/** 464/**