diff options
author | Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> | 2007-10-18 18:30:10 -0400 |
---|---|---|
committer | Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> | 2007-10-18 18:30:10 -0400 |
commit | 40d2dd7ef3df468814a34cd3d31486408e604468 (patch) | |
tree | d4425c5f3859698ff88fc4df15bcd4274d238ae1 /drivers/ide/pci/piix.c | |
parent | 5ef8cb5d9262678d3020a9395afb96592bffe069 (diff) |
piix: add DECLARE_ICH_DEV() macro
Add DECLARE_ICH_DEV() macro.
While at it:
* Add init_hwif_ich() (->init_hwif method) for ICH controllers.
* Rename init_chipset_piix() to init_chipset_ich() and use it only for
ICH controllers.
* Remove no longer needed piix_is_ichx() helper.
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Diffstat (limited to 'drivers/ide/pci/piix.c')
-rw-r--r-- | drivers/ide/pci/piix.c | 110 |
1 files changed, 47 insertions, 63 deletions
diff --git a/drivers/ide/pci/piix.c b/drivers/ide/pci/piix.c index 3f3879cff3c1..bcdf8c17b90b 100644 --- a/drivers/ide/pci/piix.c +++ b/drivers/ide/pci/piix.c | |||
@@ -254,53 +254,20 @@ static void piix_set_dma_mode(ide_drive_t *drive, const u8 speed) | |||
254 | } | 254 | } |
255 | 255 | ||
256 | /** | 256 | /** |
257 | * piix_is_ichx - check if ICHx | 257 | * init_chipset_ich - set up the ICH chipset |
258 | * @dev: PCI device to check | ||
259 | * | ||
260 | * returns 1 if ICHx, 0 otherwise. | ||
261 | */ | ||
262 | static int piix_is_ichx(struct pci_dev *dev) | ||
263 | { | ||
264 | switch (dev->device) { | ||
265 | case PCI_DEVICE_ID_INTEL_82801EB_1: | ||
266 | case PCI_DEVICE_ID_INTEL_82801AA_1: | ||
267 | case PCI_DEVICE_ID_INTEL_82801AB_1: | ||
268 | case PCI_DEVICE_ID_INTEL_82801BA_8: | ||
269 | case PCI_DEVICE_ID_INTEL_82801BA_9: | ||
270 | case PCI_DEVICE_ID_INTEL_82801CA_10: | ||
271 | case PCI_DEVICE_ID_INTEL_82801CA_11: | ||
272 | case PCI_DEVICE_ID_INTEL_82801DB_1: | ||
273 | case PCI_DEVICE_ID_INTEL_82801DB_10: | ||
274 | case PCI_DEVICE_ID_INTEL_82801DB_11: | ||
275 | case PCI_DEVICE_ID_INTEL_82801EB_11: | ||
276 | case PCI_DEVICE_ID_INTEL_82801E_11: | ||
277 | case PCI_DEVICE_ID_INTEL_ESB_2: | ||
278 | case PCI_DEVICE_ID_INTEL_ICH6_19: | ||
279 | case PCI_DEVICE_ID_INTEL_ICH7_21: | ||
280 | case PCI_DEVICE_ID_INTEL_ESB2_18: | ||
281 | case PCI_DEVICE_ID_INTEL_ICH8_6: | ||
282 | return 1; | ||
283 | } | ||
284 | |||
285 | return 0; | ||
286 | } | ||
287 | |||
288 | /** | ||
289 | * init_chipset_piix - set up the PIIX chipset | ||
290 | * @dev: PCI device to set up | 258 | * @dev: PCI device to set up |
291 | * @name: Name of the device | 259 | * @name: Name of the device |
292 | * | 260 | * |
293 | * Initialize the PCI device as required. For the PIIX this turns | 261 | * Initialize the PCI device as required. For the ICH this turns |
294 | * out to be nice and simple | 262 | * out to be nice and simple. |
295 | */ | 263 | */ |
296 | 264 | ||
297 | static unsigned int __devinit init_chipset_piix (struct pci_dev *dev, const char *name) | 265 | static unsigned int __devinit init_chipset_ich(struct pci_dev *dev, const char *name) |
298 | { | 266 | { |
299 | if (piix_is_ichx(dev)) { | 267 | u32 extra = 0; |
300 | unsigned int extra = 0; | 268 | |
301 | pci_read_config_dword(dev, 0x54, &extra); | 269 | pci_read_config_dword(dev, 0x54, &extra); |
302 | pci_write_config_dword(dev, 0x54, extra|0x400); | 270 | pci_write_config_dword(dev, 0x54, extra | 0x400); |
303 | } | ||
304 | 271 | ||
305 | return 0; | 272 | return 0; |
306 | } | 273 | } |
@@ -393,10 +360,6 @@ static void __devinit init_hwif_piix(ide_hwif_t *hwif) | |||
393 | if (!hwif->dma_base) | 360 | if (!hwif->dma_base) |
394 | return; | 361 | return; |
395 | 362 | ||
396 | /* ICHx need to clear the bmdma status for all interrupts */ | ||
397 | if (piix_is_ichx(hwif->pci_dev)) | ||
398 | hwif->ide_dma_clear_irq = &piix_dma_clear_irq; | ||
399 | |||
400 | if (hwif->ultra_mask & 0x78) { | 363 | if (hwif->ultra_mask & 0x78) { |
401 | if (hwif->cbl != ATA_CBL_PATA40_SHORT) | 364 | if (hwif->cbl != ATA_CBL_PATA40_SHORT) |
402 | hwif->cbl = piix_cable_detect(hwif); | 365 | hwif->cbl = piix_cable_detect(hwif); |
@@ -406,10 +369,18 @@ static void __devinit init_hwif_piix(ide_hwif_t *hwif) | |||
406 | hwif->ultra_mask = hwif->mwdma_mask = hwif->swdma_mask = 0; | 369 | hwif->ultra_mask = hwif->mwdma_mask = hwif->swdma_mask = 0; |
407 | } | 370 | } |
408 | 371 | ||
372 | static void __devinit init_hwif_ich(ide_hwif_t *hwif) | ||
373 | { | ||
374 | init_hwif_piix(hwif); | ||
375 | |||
376 | /* ICHx need to clear the BMDMA status for all interrupts */ | ||
377 | if (hwif->dma_base) | ||
378 | hwif->ide_dma_clear_irq = &piix_dma_clear_irq; | ||
379 | } | ||
380 | |||
409 | #define DECLARE_PIIX_DEV(name_str, udma) \ | 381 | #define DECLARE_PIIX_DEV(name_str, udma) \ |
410 | { \ | 382 | { \ |
411 | .name = name_str, \ | 383 | .name = name_str, \ |
412 | .init_chipset = init_chipset_piix, \ | ||
413 | .init_hwif = init_hwif_piix, \ | 384 | .init_hwif = init_hwif_piix, \ |
414 | .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, \ | 385 | .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, \ |
415 | .host_flags = IDE_HFLAG_BOOTABLE, \ | 386 | .host_flags = IDE_HFLAG_BOOTABLE, \ |
@@ -419,6 +390,19 @@ static void __devinit init_hwif_piix(ide_hwif_t *hwif) | |||
419 | .udma_mask = udma, \ | 390 | .udma_mask = udma, \ |
420 | } | 391 | } |
421 | 392 | ||
393 | #define DECLARE_ICH_DEV(name_str, udma) \ | ||
394 | { \ | ||
395 | .name = name_str, \ | ||
396 | .init_chipset = init_chipset_ich, \ | ||
397 | .init_hwif = init_hwif_ich, \ | ||
398 | .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, \ | ||
399 | .host_flags = IDE_HFLAG_BOOTABLE, \ | ||
400 | .pio_mask = ATA_PIO4, \ | ||
401 | .swdma_mask = ATA_SWDMA2_ONLY, \ | ||
402 | .mwdma_mask = ATA_MWDMA12_ONLY, \ | ||
403 | .udma_mask = udma, \ | ||
404 | } | ||
405 | |||
422 | static ide_pci_device_t piix_pci_info[] __devinitdata = { | 406 | static ide_pci_device_t piix_pci_info[] __devinitdata = { |
423 | /* 0 */ DECLARE_PIIX_DEV("PIIXa", 0x00), /* no udma */ | 407 | /* 0 */ DECLARE_PIIX_DEV("PIIXa", 0x00), /* no udma */ |
424 | /* 1 */ DECLARE_PIIX_DEV("PIIXb", 0x00), /* no udma */ | 408 | /* 1 */ DECLARE_PIIX_DEV("PIIXb", 0x00), /* no udma */ |
@@ -439,26 +423,26 @@ static ide_pci_device_t piix_pci_info[] __devinitdata = { | |||
439 | 423 | ||
440 | /* 3 */ DECLARE_PIIX_DEV("PIIX3", 0x00), /* no udma */ | 424 | /* 3 */ DECLARE_PIIX_DEV("PIIX3", 0x00), /* no udma */ |
441 | /* 4 */ DECLARE_PIIX_DEV("PIIX4", ATA_UDMA2), | 425 | /* 4 */ DECLARE_PIIX_DEV("PIIX4", ATA_UDMA2), |
442 | /* 5 */ DECLARE_PIIX_DEV("ICH0", ATA_UDMA2), | 426 | /* 5 */ DECLARE_ICH_DEV("ICH0", ATA_UDMA2), |
443 | /* 6 */ DECLARE_PIIX_DEV("PIIX4", ATA_UDMA2), | 427 | /* 6 */ DECLARE_PIIX_DEV("PIIX4", ATA_UDMA2), |
444 | /* 7 */ DECLARE_PIIX_DEV("ICH", ATA_UDMA4), | 428 | /* 7 */ DECLARE_ICH_DEV("ICH", ATA_UDMA4), |
445 | /* 8 */ DECLARE_PIIX_DEV("PIIX4", ATA_UDMA4), | 429 | /* 8 */ DECLARE_PIIX_DEV("PIIX4", ATA_UDMA4), |
446 | /* 9 */ DECLARE_PIIX_DEV("PIIX4", ATA_UDMA2), | 430 | /* 9 */ DECLARE_PIIX_DEV("PIIX4", ATA_UDMA2), |
447 | /* 10 */ DECLARE_PIIX_DEV("ICH2", ATA_UDMA5), | 431 | /* 10 */ DECLARE_ICH_DEV("ICH2", ATA_UDMA5), |
448 | /* 11 */ DECLARE_PIIX_DEV("ICH2M", ATA_UDMA5), | 432 | /* 11 */ DECLARE_ICH_DEV("ICH2M", ATA_UDMA5), |
449 | /* 12 */ DECLARE_PIIX_DEV("ICH3M", ATA_UDMA5), | 433 | /* 12 */ DECLARE_ICH_DEV("ICH3M", ATA_UDMA5), |
450 | /* 13 */ DECLARE_PIIX_DEV("ICH3", ATA_UDMA5), | 434 | /* 13 */ DECLARE_ICH_DEV("ICH3", ATA_UDMA5), |
451 | /* 14 */ DECLARE_PIIX_DEV("ICH4", ATA_UDMA5), | 435 | /* 14 */ DECLARE_ICH_DEV("ICH4", ATA_UDMA5), |
452 | /* 15 */ DECLARE_PIIX_DEV("ICH5", ATA_UDMA5), | 436 | /* 15 */ DECLARE_ICH_DEV("ICH5", ATA_UDMA5), |
453 | /* 16 */ DECLARE_PIIX_DEV("C-ICH", ATA_UDMA5), | 437 | /* 16 */ DECLARE_ICH_DEV("C-ICH", ATA_UDMA5), |
454 | /* 17 */ DECLARE_PIIX_DEV("ICH4", ATA_UDMA5), | 438 | /* 17 */ DECLARE_ICH_DEV("ICH4", ATA_UDMA5), |
455 | /* 18 */ DECLARE_PIIX_DEV("ICH5-SATA", ATA_UDMA5), | 439 | /* 18 */ DECLARE_ICH_DEV("ICH5-SATA", ATA_UDMA5), |
456 | /* 19 */ DECLARE_PIIX_DEV("ICH5", ATA_UDMA5), | 440 | /* 19 */ DECLARE_ICH_DEV("ICH5", ATA_UDMA5), |
457 | /* 20 */ DECLARE_PIIX_DEV("ICH6", ATA_UDMA5), | 441 | /* 20 */ DECLARE_ICH_DEV("ICH6", ATA_UDMA5), |
458 | /* 21 */ DECLARE_PIIX_DEV("ICH7", ATA_UDMA5), | 442 | /* 21 */ DECLARE_ICH_DEV("ICH7", ATA_UDMA5), |
459 | /* 22 */ DECLARE_PIIX_DEV("ICH4", ATA_UDMA5), | 443 | /* 22 */ DECLARE_ICH_DEV("ICH4", ATA_UDMA5), |
460 | /* 23 */ DECLARE_PIIX_DEV("ESB2", ATA_UDMA5), | 444 | /* 23 */ DECLARE_ICH_DEV("ESB2", ATA_UDMA5), |
461 | /* 24 */ DECLARE_PIIX_DEV("ICH8M", ATA_UDMA5), | 445 | /* 24 */ DECLARE_ICH_DEV("ICH8M", ATA_UDMA5), |
462 | }; | 446 | }; |
463 | 447 | ||
464 | /** | 448 | /** |