diff options
author | Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> | 2007-02-16 20:40:25 -0500 |
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committer | Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> | 2007-02-16 20:40:25 -0500 |
commit | 0ecdca26e556eae9668ce6de9554757dddb942ef (patch) | |
tree | 21d62c01d0c0d5aeea2524252ed8dec6ca20b6d4 /drivers/ide/pci/pdc202xx_old.c | |
parent | 7569e8dc2213ecc47024ea5edbadc8736487d926 (diff) |
ide: use PIO/MMIO operations directly where possible (v2)
This results in smaller/faster/simpler code and allows future optimizations.
Also remove no longer needed ide[_mm]_{inl,outl}() and ide_hwif_t.{INL,OUTL}.
v2:
* updated for scc_pata
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Diffstat (limited to 'drivers/ide/pci/pdc202xx_old.c')
-rw-r--r-- | drivers/ide/pci/pdc202xx_old.c | 41 |
1 files changed, 20 insertions, 21 deletions
diff --git a/drivers/ide/pci/pdc202xx_old.c b/drivers/ide/pci/pdc202xx_old.c index a2be3d2fd3f6..d3be342e5162 100644 --- a/drivers/ide/pci/pdc202xx_old.c +++ b/drivers/ide/pci/pdc202xx_old.c | |||
@@ -240,17 +240,17 @@ static u8 pdc202xx_old_cable_detect (ide_hwif_t *hwif) | |||
240 | static void pdc_old_enable_66MHz_clock(ide_hwif_t *hwif) | 240 | static void pdc_old_enable_66MHz_clock(ide_hwif_t *hwif) |
241 | { | 241 | { |
242 | unsigned long clock_reg = hwif->dma_master + 0x11; | 242 | unsigned long clock_reg = hwif->dma_master + 0x11; |
243 | u8 clock = hwif->INB(clock_reg); | 243 | u8 clock = inb(clock_reg); |
244 | 244 | ||
245 | hwif->OUTB(clock | (hwif->channel ? 0x08 : 0x02), clock_reg); | 245 | outb(clock | (hwif->channel ? 0x08 : 0x02), clock_reg); |
246 | } | 246 | } |
247 | 247 | ||
248 | static void pdc_old_disable_66MHz_clock(ide_hwif_t *hwif) | 248 | static void pdc_old_disable_66MHz_clock(ide_hwif_t *hwif) |
249 | { | 249 | { |
250 | unsigned long clock_reg = hwif->dma_master + 0x11; | 250 | unsigned long clock_reg = hwif->dma_master + 0x11; |
251 | u8 clock = hwif->INB(clock_reg); | 251 | u8 clock = inb(clock_reg); |
252 | 252 | ||
253 | hwif->OUTB(clock & ~(hwif->channel ? 0x08 : 0x02), clock_reg); | 253 | outb(clock & ~(hwif->channel ? 0x08 : 0x02), clock_reg); |
254 | } | 254 | } |
255 | 255 | ||
256 | static int config_chipset_for_dma (ide_drive_t *drive) | 256 | static int config_chipset_for_dma (ide_drive_t *drive) |
@@ -357,14 +357,14 @@ static void pdc202xx_old_ide_dma_start(ide_drive_t *drive) | |||
357 | unsigned long high_16 = hwif->dma_master; | 357 | unsigned long high_16 = hwif->dma_master; |
358 | unsigned long atapi_reg = high_16 + (hwif->channel ? 0x24 : 0x20); | 358 | unsigned long atapi_reg = high_16 + (hwif->channel ? 0x24 : 0x20); |
359 | u32 word_count = 0; | 359 | u32 word_count = 0; |
360 | u8 clock = hwif->INB(high_16 + 0x11); | 360 | u8 clock = inb(high_16 + 0x11); |
361 | 361 | ||
362 | hwif->OUTB(clock|(hwif->channel ? 0x08 : 0x02), high_16+0x11); | 362 | outb(clock | (hwif->channel ? 0x08 : 0x02), high_16 + 0x11); |
363 | word_count = (rq->nr_sectors << 8); | 363 | word_count = (rq->nr_sectors << 8); |
364 | word_count = (rq_data_dir(rq) == READ) ? | 364 | word_count = (rq_data_dir(rq) == READ) ? |
365 | word_count | 0x05000000 : | 365 | word_count | 0x05000000 : |
366 | word_count | 0x06000000; | 366 | word_count | 0x06000000; |
367 | hwif->OUTL(word_count, atapi_reg); | 367 | outl(word_count, atapi_reg); |
368 | } | 368 | } |
369 | ide_dma_start(drive); | 369 | ide_dma_start(drive); |
370 | } | 370 | } |
@@ -377,9 +377,9 @@ static int pdc202xx_old_ide_dma_end(ide_drive_t *drive) | |||
377 | unsigned long atapi_reg = high_16 + (hwif->channel ? 0x24 : 0x20); | 377 | unsigned long atapi_reg = high_16 + (hwif->channel ? 0x24 : 0x20); |
378 | u8 clock = 0; | 378 | u8 clock = 0; |
379 | 379 | ||
380 | hwif->OUTL(0, atapi_reg); /* zero out extra */ | 380 | outl(0, atapi_reg); /* zero out extra */ |
381 | clock = hwif->INB(high_16 + 0x11); | 381 | clock = inb(high_16 + 0x11); |
382 | hwif->OUTB(clock & ~(hwif->channel ? 0x08:0x02), high_16+0x11); | 382 | outb(clock & ~(hwif->channel ? 0x08:0x02), high_16 + 0x11); |
383 | } | 383 | } |
384 | if (drive->current_speed > XFER_UDMA_2) | 384 | if (drive->current_speed > XFER_UDMA_2) |
385 | pdc_old_disable_66MHz_clock(drive->hwif); | 385 | pdc_old_disable_66MHz_clock(drive->hwif); |
@@ -390,8 +390,8 @@ static int pdc202xx_old_ide_dma_test_irq(ide_drive_t *drive) | |||
390 | { | 390 | { |
391 | ide_hwif_t *hwif = HWIF(drive); | 391 | ide_hwif_t *hwif = HWIF(drive); |
392 | unsigned long high_16 = hwif->dma_master; | 392 | unsigned long high_16 = hwif->dma_master; |
393 | u8 dma_stat = hwif->INB(hwif->dma_status); | 393 | u8 dma_stat = inb(hwif->dma_status); |
394 | u8 sc1d = hwif->INB((high_16 + 0x001d)); | 394 | u8 sc1d = inb(high_16 + 0x001d); |
395 | 395 | ||
396 | if (hwif->channel) { | 396 | if (hwif->channel) { |
397 | /* bit7: Error, bit6: Interrupting, bit5: FIFO Full, bit4: FIFO Empty */ | 397 | /* bit7: Error, bit6: Interrupting, bit5: FIFO Full, bit4: FIFO Empty */ |
@@ -427,11 +427,11 @@ static int pdc202xx_ide_dma_timeout(ide_drive_t *drive) | |||
427 | static void pdc202xx_reset_host (ide_hwif_t *hwif) | 427 | static void pdc202xx_reset_host (ide_hwif_t *hwif) |
428 | { | 428 | { |
429 | unsigned long high_16 = hwif->dma_master; | 429 | unsigned long high_16 = hwif->dma_master; |
430 | u8 udma_speed_flag = hwif->INB(high_16|0x001f); | 430 | u8 udma_speed_flag = inb(high_16 | 0x001f); |
431 | 431 | ||
432 | hwif->OUTB((udma_speed_flag | 0x10), (high_16|0x001f)); | 432 | outb(udma_speed_flag | 0x10, high_16 | 0x001f); |
433 | mdelay(100); | 433 | mdelay(100); |
434 | hwif->OUTB((udma_speed_flag & ~0x10), (high_16|0x001f)); | 434 | outb(udma_speed_flag & ~0x10, high_16 | 0x001f); |
435 | mdelay(2000); /* 2 seconds ?! */ | 435 | mdelay(2000); /* 2 seconds ?! */ |
436 | 436 | ||
437 | printk(KERN_WARNING "PDC202XX: %s channel reset.\n", | 437 | printk(KERN_WARNING "PDC202XX: %s channel reset.\n", |
@@ -519,9 +519,9 @@ static void __devinit init_dma_pdc202xx(ide_hwif_t *hwif, unsigned long dmabase) | |||
519 | return; | 519 | return; |
520 | } | 520 | } |
521 | 521 | ||
522 | udma_speed_flag = hwif->INB((dmabase|0x1f)); | 522 | udma_speed_flag = inb(dmabase | 0x1f); |
523 | primary_mode = hwif->INB((dmabase|0x1a)); | 523 | primary_mode = inb(dmabase | 0x1a); |
524 | secondary_mode = hwif->INB((dmabase|0x1b)); | 524 | secondary_mode = inb(dmabase | 0x1b); |
525 | printk(KERN_INFO "%s: (U)DMA Burst Bit %sABLED " \ | 525 | printk(KERN_INFO "%s: (U)DMA Burst Bit %sABLED " \ |
526 | "Primary %s Mode " \ | 526 | "Primary %s Mode " \ |
527 | "Secondary %s Mode.\n", hwif->cds->name, | 527 | "Secondary %s Mode.\n", hwif->cds->name, |
@@ -534,9 +534,8 @@ static void __devinit init_dma_pdc202xx(ide_hwif_t *hwif, unsigned long dmabase) | |||
534 | printk(KERN_INFO "%s: FORCING BURST BIT 0x%02x->0x%02x ", | 534 | printk(KERN_INFO "%s: FORCING BURST BIT 0x%02x->0x%02x ", |
535 | hwif->cds->name, udma_speed_flag, | 535 | hwif->cds->name, udma_speed_flag, |
536 | (udma_speed_flag|1)); | 536 | (udma_speed_flag|1)); |
537 | hwif->OUTB(udma_speed_flag|1,(dmabase|0x1f)); | 537 | outb(udma_speed_flag | 1, dmabase | 0x1f); |
538 | printk("%sACTIVE\n", | 538 | printk("%sACTIVE\n", (inb(dmabase | 0x1f) & 1) ? "" : "IN"); |
539 | (hwif->INB(dmabase|0x1f)&1) ? "":"IN"); | ||
540 | } | 539 | } |
541 | #endif /* CONFIG_PDC202XX_BURST */ | 540 | #endif /* CONFIG_PDC202XX_BURST */ |
542 | 541 | ||