diff options
| author | Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> | 2008-01-25 16:17:18 -0500 |
|---|---|---|
| committer | Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> | 2008-01-25 16:17:18 -0500 |
| commit | 4db90a145292327b95b03f6dcd3352327235cc36 (patch) | |
| tree | c48ba5fc31e27d6fbdb8883151bdf237e7eb1920 /drivers/ide/pci/pdc202xx_new.c | |
| parent | 428c6440ef933a3d9df5adfeb2cbb3ea7ebb6a68 (diff) | |
ide: add IDE_HFLAG_ABUSE_SET_DMA_MODE host flag
* Add IDE_HFLAG_ABUSE_SET_DMA_MODE host flag and use it to decide
what to do with transfer modes < XFER_PIO_0 in ide_set_xfer_rate().
* Set IDE_HFLAG_ABUSE_SET_DMA_MODE in host drivers that need it
(aec62xx, amd74xx, cs5520, cs5535, hpt34x, hpt366, pdc202xx_old,
serverworks, tc86c001 and via82cxxx) and cleanup ->set_dma_mode
methods in host drivers that don't (IDE core code guarantees that
->set_dma_mode will be called only for modes which are present
in SWDMA/MWDMA/UDMA masks).
While at it:
* Add IDE_HFLAGS_HPT34X/HPT3XX/PDC202XX/SVWKS define in
hpt34x/hpt366/pdc202xx_old/serverworks host driver.
There should be no functionality changes caused by this patch.
Acked-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Diffstat (limited to 'drivers/ide/pci/pdc202xx_new.c')
| -rw-r--r-- | drivers/ide/pci/pdc202xx_new.c | 38 |
1 files changed, 12 insertions, 26 deletions
diff --git a/drivers/ide/pci/pdc202xx_new.c b/drivers/ide/pci/pdc202xx_new.c index 79ba8eff3644..ef4a99b99d1f 100644 --- a/drivers/ide/pci/pdc202xx_new.c +++ b/drivers/ide/pci/pdc202xx_new.c | |||
| @@ -162,32 +162,18 @@ static void pdcnew_set_dma_mode(ide_drive_t *drive, const u8 speed) | |||
| 162 | if (max_dma_rate(hwif->pci_dev) == 4) { | 162 | if (max_dma_rate(hwif->pci_dev) == 4) { |
| 163 | u8 mode = speed & 0x07; | 163 | u8 mode = speed & 0x07; |
| 164 | 164 | ||
| 165 | switch (speed) { | 165 | if (speed >= XFER_UDMA_0) { |
| 166 | case XFER_UDMA_6: | 166 | set_indexed_reg(hwif, 0x10 + adj, |
| 167 | case XFER_UDMA_5: | 167 | udma_timings[mode].reg10); |
| 168 | case XFER_UDMA_4: | 168 | set_indexed_reg(hwif, 0x11 + adj, |
| 169 | case XFER_UDMA_3: | 169 | udma_timings[mode].reg11); |
| 170 | case XFER_UDMA_2: | 170 | set_indexed_reg(hwif, 0x12 + adj, |
| 171 | case XFER_UDMA_1: | 171 | udma_timings[mode].reg12); |
| 172 | case XFER_UDMA_0: | 172 | } else { |
| 173 | set_indexed_reg(hwif, 0x10 + adj, | 173 | set_indexed_reg(hwif, 0x0e + adj, |
| 174 | udma_timings[mode].reg10); | 174 | mwdma_timings[mode].reg0e); |
| 175 | set_indexed_reg(hwif, 0x11 + adj, | 175 | set_indexed_reg(hwif, 0x0f + adj, |
| 176 | udma_timings[mode].reg11); | 176 | mwdma_timings[mode].reg0f); |
| 177 | set_indexed_reg(hwif, 0x12 + adj, | ||
| 178 | udma_timings[mode].reg12); | ||
| 179 | break; | ||
| 180 | case XFER_MW_DMA_2: | ||
| 181 | case XFER_MW_DMA_1: | ||
| 182 | case XFER_MW_DMA_0: | ||
| 183 | set_indexed_reg(hwif, 0x0e + adj, | ||
| 184 | mwdma_timings[mode].reg0e); | ||
| 185 | set_indexed_reg(hwif, 0x0f + adj, | ||
| 186 | mwdma_timings[mode].reg0f); | ||
| 187 | break; | ||
| 188 | default: | ||
| 189 | printk(KERN_ERR "pdc202xx_new: " | ||
| 190 | "Unknown speed %d ignored\n", speed); | ||
| 191 | } | 177 | } |
| 192 | } else if (speed == XFER_UDMA_2) { | 178 | } else if (speed == XFER_UDMA_2) { |
| 193 | /* Set tHOLD bit to 0 if using UDMA mode 2 */ | 179 | /* Set tHOLD bit to 0 if using UDMA mode 2 */ |