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authorBartlomiej Zolnierkiewicz <bzolnier@gmail.com>2008-07-24 16:53:32 -0400
committerBartlomiej Zolnierkiewicz <bzolnier@gmail.com>2008-07-24 16:53:32 -0400
commitced3ec8aa7d0fa3300187ee47c144a22ccfc974e (patch)
treeea48651fe1b372685020cd67ac133240829c1576 /drivers/ide/pci/opti621.c
parent04ba6e739e9c0623c25f94b191fd20dfbd1b26e3 (diff)
ide: prefix messages from IDE PCI host drivers by driver name
Prefix messages from IDE PCI host drivers by driver name instead of marketed chipset name (it is still possible to exactly identify the particular chipset basing on driver messages). As a bonus this provides nice code savings for some drivers: text data bss dec hex filename 3826 112 8 3946 f6a drivers/ide/pci/amd74xx.o.before 2786 112 8 2906 b5a drivers/ide/pci/amd74xx.o.after 764 108 0 872 368 drivers/ide/pci/cs5520.o.before 680 108 0 788 314 drivers/ide/pci/cs5520.o.after 1680 112 4 1796 704 drivers/ide/pci/generic.o.before 1155 112 4 1271 4f7 drivers/ide/pci/generic.o.after 7128 792 0 7920 1ef0 drivers/ide/pci/hpt366.o.before 6984 792 0 7776 1e60 drivers/ide/pci/hpt366.o.after 2800 148 0 2948 b84 drivers/ide/pci/pdc202xx_new.o.before 2523 148 0 2671 a6f drivers/ide/pci/pdc202xx_new.o.after 2831 148 0 2979 ba3 drivers/ide/pci/pdc202xx_old.o.before 2683 148 0 2831 b0f drivers/ide/pci/pdc202xx_old.o.after 3776 112 4 3892 f34 drivers/ide/pci/piix.o.before 2804 112 4 2920 b68 drivers/ide/pci/piix.o.after 4693 116 0 4809 12c9 drivers/ide/pci/siimage.o.before 4600 116 0 4716 126c drivers/ide/pci/siimage.o.after Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Diffstat (limited to 'drivers/ide/pci/opti621.c')
-rw-r--r--drivers/ide/pci/opti621.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/ide/pci/opti621.c b/drivers/ide/pci/opti621.c
index 4895f2ff3f05..e28e672ddafc 100644
--- a/drivers/ide/pci/opti621.c
+++ b/drivers/ide/pci/opti621.c
@@ -90,6 +90,8 @@
90 90
91#include <asm/io.h> 91#include <asm/io.h>
92 92
93#define DRV_NAME "opti621"
94
93#define READ_REG 0 /* index of Read cycle timing register */ 95#define READ_REG 0 /* index of Read cycle timing register */
94#define WRITE_REG 1 /* index of Write cycle timing register */ 96#define WRITE_REG 1 /* index of Write cycle timing register */
95#define CNTRL_REG 3 /* index of Control register */ 97#define CNTRL_REG 3 /* index of Control register */
@@ -200,7 +202,7 @@ static const struct ide_port_ops opti621_port_ops = {
200}; 202};
201 203
202static const struct ide_port_info opti621_chipset __devinitdata = { 204static const struct ide_port_info opti621_chipset __devinitdata = {
203 .name = "OPTI621/X", 205 .name = DRV_NAME,
204 .enablebits = { {0x45, 0x80, 0x00}, {0x40, 0x08, 0x00} }, 206 .enablebits = { {0x45, 0x80, 0x00}, {0x40, 0x08, 0x00} },
205 .port_ops = &opti621_port_ops, 207 .port_ops = &opti621_port_ops,
206 .host_flags = IDE_HFLAG_NO_DMA, 208 .host_flags = IDE_HFLAG_NO_DMA,