diff options
author | Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> | 2008-10-13 15:39:39 -0400 |
---|---|---|
committer | Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> | 2008-10-13 15:39:39 -0400 |
commit | 00bb2c16e84845a381162df03eec79129b30271c (patch) | |
tree | 12c692f0e3d2f004a981b212329cbe489c6adc7d /drivers/ide/pci/cy82c693.c | |
parent | 0d346ba0730d84f04022f9f984d3f606f69cef37 (diff) |
cy82c693: remove dead CY82C693_SETDMA_CLOCK code
Remove dead CY82C693_SETDMA_CLOCK code and now not needed
init_chipset_cy82c693().
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Diffstat (limited to 'drivers/ide/pci/cy82c693.c')
-rw-r--r-- | drivers/ide/pci/cy82c693.c | 60 |
1 files changed, 0 insertions, 60 deletions
diff --git a/drivers/ide/pci/cy82c693.c b/drivers/ide/pci/cy82c693.c index 69820e9224d1..1e3d60a87008 100644 --- a/drivers/ide/pci/cy82c693.c +++ b/drivers/ide/pci/cy82c693.c | |||
@@ -50,18 +50,12 @@ | |||
50 | 50 | ||
51 | #define DRV_NAME "cy82c693" | 51 | #define DRV_NAME "cy82c693" |
52 | 52 | ||
53 | /* the current version */ | ||
54 | #define CY82_VERSION "CY82C693U driver v0.34 99-13-12 Andreas S. Krebs (akrebs@altavista.net)" | ||
55 | |||
56 | /* | 53 | /* |
57 | * The following are used to debug the driver. | 54 | * The following are used to debug the driver. |
58 | */ | 55 | */ |
59 | #define CY82C693_DEBUG_LOGS 0 | 56 | #define CY82C693_DEBUG_LOGS 0 |
60 | #define CY82C693_DEBUG_INFO 0 | 57 | #define CY82C693_DEBUG_INFO 0 |
61 | 58 | ||
62 | /* define CY82C693_SETDMA_CLOCK to set DMA Controller Clock Speed to ATCLK */ | ||
63 | #undef CY82C693_SETDMA_CLOCK | ||
64 | |||
65 | /* | 59 | /* |
66 | * NOTE: the value for busmaster timeout is tricky and I got it by | 60 | * NOTE: the value for busmaster timeout is tricky and I got it by |
67 | * trial and error! By using a to low value will cause DMA timeouts | 61 | * trial and error! By using a to low value will cause DMA timeouts |
@@ -89,7 +83,6 @@ | |||
89 | #define CY82_INDEX_PORT 0x22 | 83 | #define CY82_INDEX_PORT 0x22 |
90 | #define CY82_DATA_PORT 0x23 | 84 | #define CY82_DATA_PORT 0x23 |
91 | 85 | ||
92 | #define CY82_INDEX_CTRLREG1 0x01 | ||
93 | #define CY82_INDEX_CHANNEL0 0x30 | 86 | #define CY82_INDEX_CHANNEL0 0x30 |
94 | #define CY82_INDEX_CHANNEL1 0x31 | 87 | #define CY82_INDEX_CHANNEL1 0x31 |
95 | #define CY82_INDEX_TIMEOUT 0x32 | 88 | #define CY82_INDEX_TIMEOUT 0x32 |
@@ -329,58 +322,6 @@ static void cy82c693_set_pio_mode(ide_drive_t *drive, const u8 pio) | |||
329 | #endif /* CY82C693_DEBUG_INFO */ | 322 | #endif /* CY82C693_DEBUG_INFO */ |
330 | } | 323 | } |
331 | 324 | ||
332 | /* | ||
333 | * this function is called during init and is used to setup the cy82c693 chip | ||
334 | */ | ||
335 | static unsigned int init_chipset_cy82c693(struct pci_dev *dev) | ||
336 | { | ||
337 | if (PCI_FUNC(dev->devfn) != 1) | ||
338 | return 0; | ||
339 | |||
340 | #ifdef CY82C693_SETDMA_CLOCK | ||
341 | u8 data = 0; | ||
342 | #endif /* CY82C693_SETDMA_CLOCK */ | ||
343 | |||
344 | /* write info about this verion of the driver */ | ||
345 | printk(KERN_INFO CY82_VERSION "\n"); | ||
346 | |||
347 | #ifdef CY82C693_SETDMA_CLOCK | ||
348 | /* okay let's set the DMA clock speed */ | ||
349 | |||
350 | outb(CY82_INDEX_CTRLREG1, CY82_INDEX_PORT); | ||
351 | data = inb(CY82_DATA_PORT); | ||
352 | |||
353 | #if CY82C693_DEBUG_INFO | ||
354 | printk(KERN_INFO DRV_NAME ": Peripheral Configuration Register: 0x%X\n", | ||
355 | data); | ||
356 | #endif /* CY82C693_DEBUG_INFO */ | ||
357 | |||
358 | /* | ||
359 | * for some reason sometimes the DMA controller | ||
360 | * speed is set to ATCLK/2 ???? - we fix this here | ||
361 | * | ||
362 | * note: i don't know what causes this strange behaviour, | ||
363 | * but even changing the dma speed doesn't solve it :-( | ||
364 | * the ide performance is still only half the normal speed | ||
365 | * | ||
366 | * if anybody knows what goes wrong with my machine, please | ||
367 | * let me know - ASK | ||
368 | */ | ||
369 | |||
370 | data |= 0x03; | ||
371 | |||
372 | outb(CY82_INDEX_CTRLREG1, CY82_INDEX_PORT); | ||
373 | outb(data, CY82_DATA_PORT); | ||
374 | |||
375 | #if CY82C693_DEBUG_INFO | ||
376 | printk(KERN_INFO ": New Peripheral Configuration Register: 0x%X\n", | ||
377 | data); | ||
378 | #endif /* CY82C693_DEBUG_INFO */ | ||
379 | |||
380 | #endif /* CY82C693_SETDMA_CLOCK */ | ||
381 | return 0; | ||
382 | } | ||
383 | |||
384 | static void __devinit init_iops_cy82c693(ide_hwif_t *hwif) | 325 | static void __devinit init_iops_cy82c693(ide_hwif_t *hwif) |
385 | { | 326 | { |
386 | static ide_hwif_t *primary; | 327 | static ide_hwif_t *primary; |
@@ -401,7 +342,6 @@ static const struct ide_port_ops cy82c693_port_ops = { | |||
401 | 342 | ||
402 | static const struct ide_port_info cy82c693_chipset __devinitdata = { | 343 | static const struct ide_port_info cy82c693_chipset __devinitdata = { |
403 | .name = DRV_NAME, | 344 | .name = DRV_NAME, |
404 | .init_chipset = init_chipset_cy82c693, | ||
405 | .init_iops = init_iops_cy82c693, | 345 | .init_iops = init_iops_cy82c693, |
406 | .port_ops = &cy82c693_port_ops, | 346 | .port_ops = &cy82c693_port_ops, |
407 | .chipset = ide_cy82c693, | 347 | .chipset = ide_cy82c693, |