diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2008-04-26 12:48:00 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2008-04-26 12:48:00 -0400 |
commit | 1292ebb82c00c69cf983e871faa221ce88ed3338 (patch) | |
tree | 91f624dd175c9d3e842db78789c6a0c79a78eee5 /drivers/ide/pci/cy82c693.c | |
parent | b82287587ef9917afbea5fcbf7aa63424b6f3719 (diff) | |
parent | 784506cbddd17bcd5929f827df39b0c7014e3f1e (diff) |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/bart/ide-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/bart/ide-2.6: (61 commits)
ide: sanitize handling of IDE_HFLAG_NO_SET_MODE host flag
sis5513: fail early for unsupported chipsets
it821x: fix kzalloc() failure handling
qd65xx: use IDE_HFLAG_SINGLE host flag
qd65xx: always use ->selectproc method
ide-cd: put proc-related functions together under single ifdef
ide-cd: Replace __FUNCTION__ with __func__
IDE: Coding Style fixes to drivers/ide/ide-cd.c
IDE: Coding Style fixes to drivers/ide/pci/cy82c693.c
IDE: Coding Style fixes to drivers/ide/pci/it8213.c
IDE: Coding Style fixes to drivers/ide/ide-floppy.c
IDE: Coding Style fixes to drivers/ide/legacy/ali14xx.c
IDE: Coding Style fixes to drivers/ide/legacy/hd.c
IDE: Coding Style fixes to drivers/ide/pci/cmd640.c
IDE: Coding Style fixes to drivers/ide/pci/opti621.c
IDE: Coding Style fixes to drivers/ide/ide-pnp.c
IDE: Coding Style fixes to drivers/ide/ide-proc.c
IDE: Coding Style fixes to drivers/ide/legacy/ide-4drives.c
IDE: Coding Style fixes to drivers/ide/legacy/umc8672.c
IDE: Coding Style fixes to drivers/ide/pci/generic.c
...
Diffstat (limited to 'drivers/ide/pci/cy82c693.c')
-rw-r--r-- | drivers/ide/pci/cy82c693.c | 77 |
1 files changed, 38 insertions, 39 deletions
diff --git a/drivers/ide/pci/cy82c693.c b/drivers/ide/pci/cy82c693.c index 724cbacf4e5b..08eab7e7f051 100644 --- a/drivers/ide/pci/cy82c693.c +++ b/drivers/ide/pci/cy82c693.c | |||
@@ -6,7 +6,7 @@ | |||
6 | * | 6 | * |
7 | * The CY82C693 chipset is used on Digital's PC-Alpha 164SX boards. | 7 | * The CY82C693 chipset is used on Digital's PC-Alpha 164SX boards. |
8 | * Writing the driver was quite simple, since most of the job is | 8 | * Writing the driver was quite simple, since most of the job is |
9 | * done by the generic pci-ide support. | 9 | * done by the generic pci-ide support. |
10 | * The hard part was finding the CY82C693's datasheet on Cypress's | 10 | * The hard part was finding the CY82C693's datasheet on Cypress's |
11 | * web page :-(. But Altavista solved this problem :-). | 11 | * web page :-(. But Altavista solved this problem :-). |
12 | * | 12 | * |
@@ -15,12 +15,12 @@ | |||
15 | * - I recently got a 16.8G IBM DTTA, so I was able to test it with | 15 | * - I recently got a 16.8G IBM DTTA, so I was able to test it with |
16 | * a large and fast disk - the results look great, so I'd say the | 16 | * a large and fast disk - the results look great, so I'd say the |
17 | * driver is working fine :-) | 17 | * driver is working fine :-) |
18 | * hdparm -t reports 8.17 MB/sec at about 6% CPU usage for the DTTA | 18 | * hdparm -t reports 8.17 MB/sec at about 6% CPU usage for the DTTA |
19 | * - this is my first linux driver, so there's probably a lot of room | 19 | * - this is my first linux driver, so there's probably a lot of room |
20 | * for optimizations and bug fixing, so feel free to do it. | 20 | * for optimizations and bug fixing, so feel free to do it. |
21 | * - use idebus=xx parameter to set PCI bus speed - needed to calc | 21 | * - use idebus=xx parameter to set PCI bus speed - needed to calc |
22 | * timings for PIO modes (default will be 40) | 22 | * timings for PIO modes (default will be 40) |
23 | * - if using PIO mode it's a good idea to set the PIO mode and | 23 | * - if using PIO mode it's a good idea to set the PIO mode and |
24 | * 32-bit I/O support (if possible), e.g. hdparm -p2 -c1 /dev/hda | 24 | * 32-bit I/O support (if possible), e.g. hdparm -p2 -c1 /dev/hda |
25 | * - I had some problems with my IBM DHEA with PIO modes < 2 | 25 | * - I had some problems with my IBM DHEA with PIO modes < 2 |
26 | * (lost interrupts) ????? | 26 | * (lost interrupts) ????? |
@@ -110,11 +110,11 @@ typedef struct pio_clocks_s { | |||
110 | * calc clocks using bus_speed | 110 | * calc clocks using bus_speed |
111 | * returns (rounded up) time in bus clocks for time in ns | 111 | * returns (rounded up) time in bus clocks for time in ns |
112 | */ | 112 | */ |
113 | static int calc_clk (int time, int bus_speed) | 113 | static int calc_clk(int time, int bus_speed) |
114 | { | 114 | { |
115 | int clocks; | 115 | int clocks; |
116 | 116 | ||
117 | clocks = (time*bus_speed+999)/1000 -1; | 117 | clocks = (time*bus_speed+999)/1000 - 1; |
118 | 118 | ||
119 | if (clocks < 0) | 119 | if (clocks < 0) |
120 | clocks = 0; | 120 | clocks = 0; |
@@ -132,8 +132,8 @@ static int calc_clk (int time, int bus_speed) | |||
132 | * NOTE: for mode 0,1 and 2 drives 8-bit IDE command control registers are used | 132 | * NOTE: for mode 0,1 and 2 drives 8-bit IDE command control registers are used |
133 | * for mode 3 and 4 drives 8 and 16-bit timings are the same | 133 | * for mode 3 and 4 drives 8 and 16-bit timings are the same |
134 | * | 134 | * |
135 | */ | 135 | */ |
136 | static void compute_clocks (u8 pio, pio_clocks_t *p_pclk) | 136 | static void compute_clocks(u8 pio, pio_clocks_t *p_pclk) |
137 | { | 137 | { |
138 | int clk1, clk2; | 138 | int clk1, clk2; |
139 | int bus_speed = system_bus_clock(); /* get speed of PCI bus */ | 139 | int bus_speed = system_bus_clock(); /* get speed of PCI bus */ |
@@ -158,7 +158,7 @@ static void compute_clocks (u8 pio, pio_clocks_t *p_pclk) | |||
158 | clk1 = (clk1<<4)|clk2; /* combine active and recovery clocks */ | 158 | clk1 = (clk1<<4)|clk2; /* combine active and recovery clocks */ |
159 | 159 | ||
160 | /* note: we use the same values for 16bit IOR and IOW | 160 | /* note: we use the same values for 16bit IOR and IOW |
161 | * those are all the same, since I don't have other | 161 | * those are all the same, since I don't have other |
162 | * timings than those from ide-lib.c | 162 | * timings than those from ide-lib.c |
163 | */ | 163 | */ |
164 | 164 | ||
@@ -186,7 +186,7 @@ static void cy82c693_set_dma_mode(ide_drive_t *drive, const u8 mode) | |||
186 | outb(index, CY82_INDEX_PORT); | 186 | outb(index, CY82_INDEX_PORT); |
187 | data = inb(CY82_DATA_PORT); | 187 | data = inb(CY82_DATA_PORT); |
188 | 188 | ||
189 | printk (KERN_INFO "%s (ch=%d, dev=%d): DMA mode is %d (single=%d)\n", | 189 | printk(KERN_INFO "%s (ch=%d, dev=%d): DMA mode is %d (single=%d)\n", |
190 | drive->name, HWIF(drive)->channel, drive->select.b.unit, | 190 | drive->name, HWIF(drive)->channel, drive->select.b.unit, |
191 | (data&0x3), ((data>>2)&1)); | 191 | (data&0x3), ((data>>2)&1)); |
192 | #endif /* CY82C693_DEBUG_LOGS */ | 192 | #endif /* CY82C693_DEBUG_LOGS */ |
@@ -202,7 +202,7 @@ static void cy82c693_set_dma_mode(ide_drive_t *drive, const u8 mode) | |||
202 | mode & 3, single); | 202 | mode & 3, single); |
203 | #endif /* CY82C693_DEBUG_INFO */ | 203 | #endif /* CY82C693_DEBUG_INFO */ |
204 | 204 | ||
205 | /* | 205 | /* |
206 | * note: below we set the value for Bus Master IDE TimeOut Register | 206 | * note: below we set the value for Bus Master IDE TimeOut Register |
207 | * I'm not absolutly sure what this does, but it solved my problem | 207 | * I'm not absolutly sure what this does, but it solved my problem |
208 | * with IDE DMA and sound, so I now can play sound and work with | 208 | * with IDE DMA and sound, so I now can play sound and work with |
@@ -216,8 +216,8 @@ static void cy82c693_set_dma_mode(ide_drive_t *drive, const u8 mode) | |||
216 | outb(CY82_INDEX_TIMEOUT, CY82_INDEX_PORT); | 216 | outb(CY82_INDEX_TIMEOUT, CY82_INDEX_PORT); |
217 | outb(data, CY82_DATA_PORT); | 217 | outb(data, CY82_DATA_PORT); |
218 | 218 | ||
219 | #if CY82C693_DEBUG_INFO | 219 | #if CY82C693_DEBUG_INFO |
220 | printk (KERN_INFO "%s: Set IDE Bus Master TimeOut Register to 0x%X\n", | 220 | printk(KERN_INFO "%s: Set IDE Bus Master TimeOut Register to 0x%X\n", |
221 | drive->name, data); | 221 | drive->name, data); |
222 | #endif /* CY82C693_DEBUG_INFO */ | 222 | #endif /* CY82C693_DEBUG_INFO */ |
223 | } | 223 | } |
@@ -242,14 +242,14 @@ static void cy82c693_set_pio_mode(ide_drive_t *drive, const u8 pio) | |||
242 | 242 | ||
243 | #if CY82C693_DEBUG_LOGS | 243 | #if CY82C693_DEBUG_LOGS |
244 | /* for debug let's show the register values */ | 244 | /* for debug let's show the register values */ |
245 | 245 | ||
246 | if (drive->select.b.unit == 0) { | 246 | if (drive->select.b.unit == 0) { |
247 | /* | 247 | /* |
248 | * get master drive registers | 248 | * get master drive registers |
249 | * address setup control register | 249 | * address setup control register |
250 | * is 32 bit !!! | 250 | * is 32 bit !!! |
251 | */ | 251 | */ |
252 | pci_read_config_dword(dev, CY82_IDE_ADDRSETUP, &addrCtrl); | 252 | pci_read_config_dword(dev, CY82_IDE_ADDRSETUP, &addrCtrl); |
253 | addrCtrl &= 0x0F; | 253 | addrCtrl &= 0x0F; |
254 | 254 | ||
255 | /* now let's get the remaining registers */ | 255 | /* now let's get the remaining registers */ |
@@ -261,7 +261,7 @@ static void cy82c693_set_pio_mode(ide_drive_t *drive, const u8 pio) | |||
261 | * set slave drive registers | 261 | * set slave drive registers |
262 | * address setup control register | 262 | * address setup control register |
263 | * is 32 bit !!! | 263 | * is 32 bit !!! |
264 | */ | 264 | */ |
265 | pci_read_config_dword(dev, CY82_IDE_ADDRSETUP, &addrCtrl); | 265 | pci_read_config_dword(dev, CY82_IDE_ADDRSETUP, &addrCtrl); |
266 | 266 | ||
267 | addrCtrl &= 0xF0; | 267 | addrCtrl &= 0xF0; |
@@ -288,9 +288,9 @@ static void cy82c693_set_pio_mode(ide_drive_t *drive, const u8 pio) | |||
288 | * set master drive | 288 | * set master drive |
289 | * address setup control register | 289 | * address setup control register |
290 | * is 32 bit !!! | 290 | * is 32 bit !!! |
291 | */ | 291 | */ |
292 | pci_read_config_dword(dev, CY82_IDE_ADDRSETUP, &addrCtrl); | 292 | pci_read_config_dword(dev, CY82_IDE_ADDRSETUP, &addrCtrl); |
293 | 293 | ||
294 | addrCtrl &= (~0xF); | 294 | addrCtrl &= (~0xF); |
295 | addrCtrl |= (unsigned int)pclk.address_time; | 295 | addrCtrl |= (unsigned int)pclk.address_time; |
296 | pci_write_config_dword(dev, CY82_IDE_ADDRSETUP, addrCtrl); | 296 | pci_write_config_dword(dev, CY82_IDE_ADDRSETUP, addrCtrl); |
@@ -299,14 +299,14 @@ static void cy82c693_set_pio_mode(ide_drive_t *drive, const u8 pio) | |||
299 | pci_write_config_byte(dev, CY82_IDE_MASTER_IOR, pclk.time_16r); | 299 | pci_write_config_byte(dev, CY82_IDE_MASTER_IOR, pclk.time_16r); |
300 | pci_write_config_byte(dev, CY82_IDE_MASTER_IOW, pclk.time_16w); | 300 | pci_write_config_byte(dev, CY82_IDE_MASTER_IOW, pclk.time_16w); |
301 | pci_write_config_byte(dev, CY82_IDE_MASTER_8BIT, pclk.time_8); | 301 | pci_write_config_byte(dev, CY82_IDE_MASTER_8BIT, pclk.time_8); |
302 | 302 | ||
303 | addrCtrl &= 0xF; | 303 | addrCtrl &= 0xF; |
304 | } else { | 304 | } else { |
305 | /* | 305 | /* |
306 | * set slave drive | 306 | * set slave drive |
307 | * address setup control register | 307 | * address setup control register |
308 | * is 32 bit !!! | 308 | * is 32 bit !!! |
309 | */ | 309 | */ |
310 | pci_read_config_dword(dev, CY82_IDE_ADDRSETUP, &addrCtrl); | 310 | pci_read_config_dword(dev, CY82_IDE_ADDRSETUP, &addrCtrl); |
311 | 311 | ||
312 | addrCtrl &= (~0xF0); | 312 | addrCtrl &= (~0xF0); |
@@ -320,7 +320,7 @@ static void cy82c693_set_pio_mode(ide_drive_t *drive, const u8 pio) | |||
320 | 320 | ||
321 | addrCtrl >>= 4; | 321 | addrCtrl >>= 4; |
322 | addrCtrl &= 0xF; | 322 | addrCtrl &= 0xF; |
323 | } | 323 | } |
324 | 324 | ||
325 | #if CY82C693_DEBUG_INFO | 325 | #if CY82C693_DEBUG_INFO |
326 | printk(KERN_INFO "%s (ch=%d, dev=%d): set PIO timing to " | 326 | printk(KERN_INFO "%s (ch=%d, dev=%d): set PIO timing to " |
@@ -340,41 +340,41 @@ static unsigned int __devinit init_chipset_cy82c693(struct pci_dev *dev, const c | |||
340 | 340 | ||
341 | #ifdef CY82C693_SETDMA_CLOCK | 341 | #ifdef CY82C693_SETDMA_CLOCK |
342 | u8 data = 0; | 342 | u8 data = 0; |
343 | #endif /* CY82C693_SETDMA_CLOCK */ | 343 | #endif /* CY82C693_SETDMA_CLOCK */ |
344 | 344 | ||
345 | /* write info about this verion of the driver */ | 345 | /* write info about this verion of the driver */ |
346 | printk(KERN_INFO CY82_VERSION "\n"); | 346 | printk(KERN_INFO CY82_VERSION "\n"); |
347 | 347 | ||
348 | #ifdef CY82C693_SETDMA_CLOCK | 348 | #ifdef CY82C693_SETDMA_CLOCK |
349 | /* okay let's set the DMA clock speed */ | 349 | /* okay let's set the DMA clock speed */ |
350 | 350 | ||
351 | outb(CY82_INDEX_CTRLREG1, CY82_INDEX_PORT); | 351 | outb(CY82_INDEX_CTRLREG1, CY82_INDEX_PORT); |
352 | data = inb(CY82_DATA_PORT); | 352 | data = inb(CY82_DATA_PORT); |
353 | 353 | ||
354 | #if CY82C693_DEBUG_INFO | 354 | #if CY82C693_DEBUG_INFO |
355 | printk(KERN_INFO "%s: Peripheral Configuration Register: 0x%X\n", | 355 | printk(KERN_INFO "%s: Peripheral Configuration Register: 0x%X\n", |
356 | name, data); | 356 | name, data); |
357 | #endif /* CY82C693_DEBUG_INFO */ | 357 | #endif /* CY82C693_DEBUG_INFO */ |
358 | 358 | ||
359 | /* | 359 | /* |
360 | * for some reason sometimes the DMA controller | 360 | * for some reason sometimes the DMA controller |
361 | * speed is set to ATCLK/2 ???? - we fix this here | 361 | * speed is set to ATCLK/2 ???? - we fix this here |
362 | * | 362 | * |
363 | * note: i don't know what causes this strange behaviour, | 363 | * note: i don't know what causes this strange behaviour, |
364 | * but even changing the dma speed doesn't solve it :-( | 364 | * but even changing the dma speed doesn't solve it :-( |
365 | * the ide performance is still only half the normal speed | 365 | * the ide performance is still only half the normal speed |
366 | * | 366 | * |
367 | * if anybody knows what goes wrong with my machine, please | 367 | * if anybody knows what goes wrong with my machine, please |
368 | * let me know - ASK | 368 | * let me know - ASK |
369 | */ | 369 | */ |
370 | 370 | ||
371 | data |= 0x03; | 371 | data |= 0x03; |
372 | 372 | ||
373 | outb(CY82_INDEX_CTRLREG1, CY82_INDEX_PORT); | 373 | outb(CY82_INDEX_CTRLREG1, CY82_INDEX_PORT); |
374 | outb(data, CY82_DATA_PORT); | 374 | outb(data, CY82_DATA_PORT); |
375 | 375 | ||
376 | #if CY82C693_DEBUG_INFO | 376 | #if CY82C693_DEBUG_INFO |
377 | printk (KERN_INFO "%s: New Peripheral Configuration Register: 0x%X\n", | 377 | printk(KERN_INFO "%s: New Peripheral Configuration Register: 0x%X\n", |
378 | name, data); | 378 | name, data); |
379 | #endif /* CY82C693_DEBUG_INFO */ | 379 | #endif /* CY82C693_DEBUG_INFO */ |
380 | 380 | ||
@@ -410,8 +410,7 @@ static const struct ide_port_info cy82c693_chipset __devinitdata = { | |||
410 | .init_iops = init_iops_cy82c693, | 410 | .init_iops = init_iops_cy82c693, |
411 | .init_hwif = init_hwif_cy82c693, | 411 | .init_hwif = init_hwif_cy82c693, |
412 | .chipset = ide_cy82c693, | 412 | .chipset = ide_cy82c693, |
413 | .host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_CY82C693 | | 413 | .host_flags = IDE_HFLAG_SINGLE, |
414 | IDE_HFLAG_BOOTABLE, | ||
415 | .pio_mask = ATA_PIO4, | 414 | .pio_mask = ATA_PIO4, |
416 | .swdma_mask = ATA_SWDMA2, | 415 | .swdma_mask = ATA_SWDMA2, |
417 | .mwdma_mask = ATA_MWDMA2, | 416 | .mwdma_mask = ATA_MWDMA2, |
@@ -424,7 +423,7 @@ static int __devinit cy82c693_init_one(struct pci_dev *dev, const struct pci_dev | |||
424 | 423 | ||
425 | /* CY82C693 is more than only a IDE controller. | 424 | /* CY82C693 is more than only a IDE controller. |
426 | Function 1 is primary IDE channel, function 2 - secondary. */ | 425 | Function 1 is primary IDE channel, function 2 - secondary. */ |
427 | if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE && | 426 | if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE && |
428 | PCI_FUNC(dev->devfn) == 1) { | 427 | PCI_FUNC(dev->devfn) == 1) { |
429 | dev2 = pci_get_slot(dev->bus, dev->devfn + 1); | 428 | dev2 = pci_get_slot(dev->bus, dev->devfn + 1); |
430 | ret = ide_setup_pci_devices(dev, dev2, &cy82c693_chipset); | 429 | ret = ide_setup_pci_devices(dev, dev2, &cy82c693_chipset); |