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authorBartlomiej Zolnierkiewicz <bzolnier@gmail.com>2007-10-13 11:47:51 -0400
committerBartlomiej Zolnierkiewicz <bzolnier@gmail.com>2007-10-13 11:47:51 -0400
commit88b2b32babd46cd54d2de4d17eb869aea3383e11 (patch)
treed446864f7c3431f8c428eecacd11caf7b794f018 /drivers/ide/pci/cs5530.c
parent6e249395eace037ef139a1c8996b31e3797e412a (diff)
ide: move ide_config_drive_speed() calls to upper layers (take 2)
* Convert {ide_hwif_t,ide_pci_device_t}->host_flag to be u16. * Add IDE_HFLAG_POST_SET_MODE host flag to indicate the need to program the host for the transfer mode after programming the device. Set it in au1xxx-ide, amd74xx, cs5530, cs5535, pdc202xx_new, sc1200, pmac and via82cxxx host drivers. * Add IDE_HFLAG_NO_SET_MODE host flag to indicate the need to completely skip programming of host/device for the transfer mode ("smart" hosts). Set it in it821x host driver and check it in ide_tune_dma(). * Add ide_set_pio_mode()/ide_set_dma_mode() helpers and convert all direct ->set_pio_mode/->speedproc users to use these helpers. * Move ide_config_drive_speed() calls from ->set_pio_mode/->speedproc methods to callers. * Rename ->speedproc method to ->set_dma_mode, make it void and update all implementations accordingly. * Update ide_set_xfer_rate() comments. * Unexport ide_config_drive_speed(). v2: * Fix issues noticed by Sergei: - export ide_set_dma_mode() instead of moving ->set_pio_mode abuse wrt to setting DMA modes from sc1200_set_pio_mode() to do_special() - check IDE_HFLAG_NO_SET_MODE in ide_tune_dma() - check for (hwif->set_pio_mode) == NULL in ide_set_pio_mode() - check for (hwif->set_dma_mode) == NULL in ide_set_dma_mode() - return -1 from ide_set_{pio,dma}_mode() if ->set_{pio,dma}_mode == NULL - don't set ->set_{pio,dma}_mode on it821x in "smart" mode - fix build problem in pmac.c - minor fixes in au1xxx-ide.c/cs5530.c/siimage.c - improve patch description Changes in behavior caused by this patch: - HDIO_SET_PIO_MODE ioctl would now return -ENOSYS for attempts to change PIO mode if it821x controller is in "smart" mode - removal of two debugging printk-s (from cs5530.c and sc1200.c) - transfer modes 0x00-0x07 passed from user space may be programmed twice on the device (not really an issue since 0x00 is not supported correctly by any host driver ATM, 0x01 is not supported at all and 0x02-0x07 are invalid) Acked-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Diffstat (limited to 'drivers/ide/pci/cs5530.c')
-rw-r--r--drivers/ide/pci/cs5530.c50
1 files changed, 9 insertions, 41 deletions
diff --git a/drivers/ide/pci/cs5530.c b/drivers/ide/pci/cs5530.c
index 741507b4cd93..e4121577cef0 100644
--- a/drivers/ide/pci/cs5530.c
+++ b/drivers/ide/pci/cs5530.c
@@ -30,22 +30,6 @@
30#include <asm/io.h> 30#include <asm/io.h>
31#include <asm/irq.h> 31#include <asm/irq.h>
32 32
33/**
34 * cs5530_xfer_set_mode - set a new transfer mode at the drive
35 * @drive: drive to tune
36 * @mode: new mode
37 *
38 * Logging wrapper to the IDE driver speed configuration. This can
39 * probably go away now.
40 */
41
42static int cs5530_set_xfer_mode (ide_drive_t *drive, u8 mode)
43{
44 printk(KERN_DEBUG "%s: cs5530_set_xfer_mode(%s)\n",
45 drive->name, ide_xfer_verbose(mode));
46 return (ide_config_drive_speed(drive, mode));
47}
48
49/* 33/*
50 * Here are the standard PIO mode 0-4 timings for each "format". 34 * Here are the standard PIO mode 0-4 timings for each "format".
51 * Format-0 uses fast data reg timings, with slower command reg timings. 35 * Format-0 uses fast data reg timings, with slower command reg timings.
@@ -62,20 +46,12 @@ static unsigned int cs5530_pio_timings[2][5] = {
62#define CS5530_BAD_PIO(timings) (((timings)&~0x80000000)==0x0000e132) 46#define CS5530_BAD_PIO(timings) (((timings)&~0x80000000)==0x0000e132)
63#define CS5530_BASEREG(hwif) (((hwif)->dma_base & ~0xf) + ((hwif)->channel ? 0x30 : 0x20)) 47#define CS5530_BASEREG(hwif) (((hwif)->dma_base & ~0xf) + ((hwif)->channel ? 0x30 : 0x20))
64 48
65static void cs5530_tunepio(ide_drive_t *drive, u8 pio)
66{
67 unsigned long basereg = CS5530_BASEREG(drive->hwif);
68 unsigned int format = (inl(basereg + 4) >> 31) & 1;
69
70 outl(cs5530_pio_timings[format][pio], basereg + ((drive->dn & 1)<<3));
71}
72
73/** 49/**
74 * cs5530_set_pio_mode - set PIO mode 50 * cs5530_set_pio_mode - set host controller for PIO mode
75 * @drive: drive 51 * @drive: drive
76 * @pio: PIO mode number 52 * @pio: PIO mode number
77 * 53 *
78 * Handles setting of PIO mode for both the chipset and drive. 54 * Handles setting of PIO mode for the chipset.
79 * 55 *
80 * The init_hwif_cs5530() routine guarantees that all drives 56 * The init_hwif_cs5530() routine guarantees that all drives
81 * will have valid default PIO timings set up before we get here. 57 * will have valid default PIO timings set up before we get here.
@@ -83,8 +59,10 @@ static void cs5530_tunepio(ide_drive_t *drive, u8 pio)
83 59
84static void cs5530_set_pio_mode(ide_drive_t *drive, const u8 pio) 60static void cs5530_set_pio_mode(ide_drive_t *drive, const u8 pio)
85{ 61{
86 if (cs5530_set_xfer_mode(drive, XFER_PIO_0 + pio) == 0) 62 unsigned long basereg = CS5530_BASEREG(drive->hwif);
87 cs5530_tunepio(drive, pio); 63 unsigned int format = (inl(basereg + 4) >> 31) & 1;
64
65 outl(cs5530_pio_timings[format][pio], basereg + ((drive->dn & 1)<<3));
88} 66}
89 67
90/** 68/**
@@ -142,20 +120,11 @@ static int cs5530_config_dma(ide_drive_t *drive)
142 return 1; 120 return 1;
143} 121}
144 122
145static int cs5530_tune_chipset(ide_drive_t *drive, const u8 mode) 123static void cs5530_set_dma_mode(ide_drive_t *drive, const u8 mode)
146{ 124{
147 unsigned long basereg; 125 unsigned long basereg;
148 unsigned int reg, timings = 0; 126 unsigned int reg, timings = 0;
149 127
150 /*
151 * Tell the drive to switch to the new mode; abort on failure.
152 */
153 if (cs5530_set_xfer_mode(drive, mode))
154 return 1; /* failure */
155
156 /*
157 * Now tune the chipset to match the drive:
158 */
159 switch (mode) { 128 switch (mode) {
160 case XFER_UDMA_0: timings = 0x00921250; break; 129 case XFER_UDMA_0: timings = 0x00921250; break;
161 case XFER_UDMA_1: timings = 0x00911140; break; 130 case XFER_UDMA_1: timings = 0x00911140; break;
@@ -180,8 +149,6 @@ static int cs5530_tune_chipset(ide_drive_t *drive, const u8 mode)
180 outl(reg, basereg + 4); /* write drive0 config register */ 149 outl(reg, basereg + 4); /* write drive0 config register */
181 outl(timings, basereg + 12); /* write drive1 config register */ 150 outl(timings, basereg + 12); /* write drive1 config register */
182 } 151 }
183
184 return 0; /* success */
185} 152}
186 153
187/** 154/**
@@ -299,7 +266,7 @@ static void __devinit init_hwif_cs5530 (ide_hwif_t *hwif)
299 hwif->serialized = hwif->mate->serialized = 1; 266 hwif->serialized = hwif->mate->serialized = 1;
300 267
301 hwif->set_pio_mode = &cs5530_set_pio_mode; 268 hwif->set_pio_mode = &cs5530_set_pio_mode;
302 hwif->speedproc = &cs5530_tune_chipset; 269 hwif->set_dma_mode = &cs5530_set_dma_mode;
303 270
304 basereg = CS5530_BASEREG(hwif); 271 basereg = CS5530_BASEREG(hwif);
305 d0_timings = inl(basereg + 0); 272 d0_timings = inl(basereg + 0);
@@ -340,6 +307,7 @@ static ide_pci_device_t cs5530_chipset __devinitdata = {
340 .autodma = AUTODMA, 307 .autodma = AUTODMA,
341 .bootable = ON_BOARD, 308 .bootable = ON_BOARD,
342 .pio_mask = ATA_PIO4, 309 .pio_mask = ATA_PIO4,
310 .host_flags = IDE_HFLAG_POST_SET_MODE,
343}; 311};
344 312
345static int __devinit cs5530_init_one(struct pci_dev *dev, const struct pci_device_id *id) 313static int __devinit cs5530_init_one(struct pci_dev *dev, const struct pci_device_id *id)