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authorBartlomiej Zolnierkiewicz <bzolnier@gmail.com>2007-10-11 17:54:02 -0400
committerBartlomiej Zolnierkiewicz <bzolnier@gmail.com>2007-10-11 17:54:02 -0400
commit8f4dd2e42637fd61a6366d2cace69091926eaa15 (patch)
tree38dc8e475afc27c575ff7f3701e57d5c9e3a9be9 /drivers/ide/pci/cs5520.c
parent0d3be723cb6432e384267d0fe83ee0bae5e17846 (diff)
ide: use only ->set_pio_mode method for programming PIO modes (take 2)
Use ->set_pio_mode method to program PIO modes in ide_set_xfer_rate() (the only place which used ->speedproc to program PIO modes) and remove handling of PIO modes from all ->speedproc implementations. v2: * Fix pmac_ide_tune_chipset() comment. There should be no functionality changes caused by this patch. Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Diffstat (limited to 'drivers/ide/pci/cs5520.c')
-rw-r--r--drivers/ide/pci/cs5520.c36
1 files changed, 14 insertions, 22 deletions
diff --git a/drivers/ide/pci/cs5520.c b/drivers/ide/pci/cs5520.c
index e6af534a7190..1217d2a747fb 100644
--- a/drivers/ide/pci/cs5520.c
+++ b/drivers/ide/pci/cs5520.c
@@ -66,30 +66,13 @@ static struct pio_clocks cs5520_pio_clocks[]={
66 {1, 2, 1} 66 {1, 2, 1}
67}; 67};
68 68
69static int cs5520_tune_chipset(ide_drive_t *drive, const u8 speed) 69static void cs5520_set_pio_mode(ide_drive_t *drive, const u8 pio)
70{ 70{
71 ide_hwif_t *hwif = HWIF(drive); 71 ide_hwif_t *hwif = HWIF(drive);
72 struct pci_dev *pdev = hwif->pci_dev; 72 struct pci_dev *pdev = hwif->pci_dev;
73 int pio = speed;
74 u8 reg;
75 int controller = drive->dn > 1 ? 1 : 0; 73 int controller = drive->dn > 1 ? 1 : 0;
74 u8 reg;
76 75
77 switch(speed)
78 {
79 case XFER_PIO_4:
80 case XFER_PIO_3:
81 case XFER_PIO_2:
82 case XFER_PIO_1:
83 case XFER_PIO_0:
84 pio -= XFER_PIO_0;
85 break;
86 default:
87 pio = 0;
88 printk(KERN_ERR "cs55x0: bad ide timing.\n");
89 }
90
91 printk("PIO clocking = %d\n", pio);
92
93 /* FIXME: if DMA = 1 do we need to set the DMA bit here ? */ 76 /* FIXME: if DMA = 1 do we need to set the DMA bit here ? */
94 77
95 /* 8bit CAT/CRT - 8bit command timing for channel */ 78 /* 8bit CAT/CRT - 8bit command timing for channel */
@@ -114,12 +97,21 @@ static int cs5520_tune_chipset(ide_drive_t *drive, const u8 speed)
114 reg |= 1<<((drive->dn&1)+5); 97 reg |= 1<<((drive->dn&1)+5);
115 outb(reg, hwif->dma_base + 0x02 + 8*controller); 98 outb(reg, hwif->dma_base + 0x02 + 8*controller);
116 99
117 return ide_config_drive_speed(drive, speed); 100 (void)ide_config_drive_speed(drive, XFER_PIO_0 + pio);
118} 101}
119 102
120static void cs5520_set_pio_mode(ide_drive_t *drive, const u8 pio) 103static int cs5520_tune_chipset(ide_drive_t *drive, const u8 speed)
121{ 104{
122 cs5520_tune_chipset(drive, XFER_PIO_0 + pio); 105 printk(KERN_ERR "cs55x0: bad ide timing.\n");
106
107 cs5520_set_pio_mode(drive, 0);
108
109 /*
110 * FIXME: this is incorrect to return zero here but
111 * since all users of ide_set_xfer_rate() ignore
112 * the return value it is not a problem currently
113 */
114 return 0;
123} 115}
124 116
125static int cs5520_config_drive_xfer_rate(ide_drive_t *drive) 117static int cs5520_config_drive_xfer_rate(ide_drive_t *drive)