diff options
author | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 18:20:36 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 18:20:36 -0400 |
commit | 1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch) | |
tree | 0bba044c4ce775e45a88a51686b5d9f90697ea9d /drivers/ide/pci/cmd640.c |
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.
Let it rip!
Diffstat (limited to 'drivers/ide/pci/cmd640.c')
-rw-r--r-- | drivers/ide/pci/cmd640.c | 879 |
1 files changed, 879 insertions, 0 deletions
diff --git a/drivers/ide/pci/cmd640.c b/drivers/ide/pci/cmd640.c new file mode 100644 index 000000000000..92a2b7caed58 --- /dev/null +++ b/drivers/ide/pci/cmd640.c | |||
@@ -0,0 +1,879 @@ | |||
1 | /* | ||
2 | * linux/drivers/ide/pci/cmd640.c Version 1.02 Sep 01, 1996 | ||
3 | * | ||
4 | * Copyright (C) 1995-1996 Linus Torvalds & authors (see below) | ||
5 | */ | ||
6 | |||
7 | /* | ||
8 | * Original authors: abramov@cecmow.enet.dec.com (Igor Abramov) | ||
9 | * mlord@pobox.com (Mark Lord) | ||
10 | * | ||
11 | * See linux/MAINTAINERS for address of current maintainer. | ||
12 | * | ||
13 | * This file provides support for the advanced features and bugs | ||
14 | * of IDE interfaces using the CMD Technologies 0640 IDE interface chip. | ||
15 | * | ||
16 | * These chips are basically fucked by design, and getting this driver | ||
17 | * to work on every motherboard design that uses this screwed chip seems | ||
18 | * bloody well impossible. However, we're still trying. | ||
19 | * | ||
20 | * Version 0.97 worked for everybody. | ||
21 | * | ||
22 | * User feedback is essential. Many thanks to the beta test team: | ||
23 | * | ||
24 | * A.Hartgers@stud.tue.nl, JZDQC@CUNYVM.CUNY.edu, abramov@cecmow.enet.dec.com, | ||
25 | * bardj@utopia.ppp.sn.no, bart@gaga.tue.nl, bbol001@cs.auckland.ac.nz, | ||
26 | * chrisc@dbass.demon.co.uk, dalecki@namu26.Num.Math.Uni-Goettingen.de, | ||
27 | * derekn@vw.ece.cmu.edu, florian@btp2x3.phy.uni-bayreuth.de, | ||
28 | * flynn@dei.unipd.it, gadio@netvision.net.il, godzilla@futuris.net, | ||
29 | * j@pobox.com, jkemp1@mises.uni-paderborn.de, jtoppe@hiwaay.net, | ||
30 | * kerouac@ssnet.com, meskes@informatik.rwth-aachen.de, hzoli@cs.elte.hu, | ||
31 | * peter@udgaard.isgtec.com, phil@tazenda.demon.co.uk, roadcapw@cfw.com, | ||
32 | * s0033las@sun10.vsz.bme.hu, schaffer@tam.cornell.edu, sjd@slip.net, | ||
33 | * steve@ei.org, ulrpeg@bigcomm.gun.de, ism@tardis.ed.ac.uk, mack@cray.com | ||
34 | * liug@mama.indstate.edu, and others. | ||
35 | * | ||
36 | * Version 0.01 Initial version, hacked out of ide.c, | ||
37 | * and #include'd rather than compiled separately. | ||
38 | * This will get cleaned up in a subsequent release. | ||
39 | * | ||
40 | * Version 0.02 Fixes for vlb initialization code, enable prefetch | ||
41 | * for versions 'B' and 'C' of chip by default, | ||
42 | * some code cleanup. | ||
43 | * | ||
44 | * Version 0.03 Added reset of secondary interface, | ||
45 | * and black list for devices which are not compatible | ||
46 | * with prefetch mode. Separate function for setting | ||
47 | * prefetch is added, possibly it will be called some | ||
48 | * day from ioctl processing code. | ||
49 | * | ||
50 | * Version 0.04 Now configs/compiles separate from ide.c | ||
51 | * | ||
52 | * Version 0.05 Major rewrite of interface timing code. | ||
53 | * Added new function cmd640_set_mode to set PIO mode | ||
54 | * from ioctl call. New drives added to black list. | ||
55 | * | ||
56 | * Version 0.06 More code cleanup. Prefetch is enabled only for | ||
57 | * detected hard drives, not included in prefetch | ||
58 | * black list. | ||
59 | * | ||
60 | * Version 0.07 Changed to more conservative drive tuning policy. | ||
61 | * Unknown drives, which report PIO < 4 are set to | ||
62 | * (reported_PIO - 1) if it is supported, or to PIO0. | ||
63 | * List of known drives extended by info provided by | ||
64 | * CMD at their ftp site. | ||
65 | * | ||
66 | * Version 0.08 Added autotune/noautotune support. | ||
67 | * | ||
68 | * Version 0.09 Try to be smarter about 2nd port enabling. | ||
69 | * Version 0.10 Be nice and don't reset 2nd port. | ||
70 | * Version 0.11 Try to handle more weird situations. | ||
71 | * | ||
72 | * Version 0.12 Lots of bug fixes from Laszlo Peter | ||
73 | * irq unmasking disabled for reliability. | ||
74 | * try to be even smarter about the second port. | ||
75 | * tidy up source code formatting. | ||
76 | * Version 0.13 permit irq unmasking again. | ||
77 | * Version 0.90 massive code cleanup, some bugs fixed. | ||
78 | * defaults all drives to PIO mode0, prefetch off. | ||
79 | * autotune is OFF by default, with compile time flag. | ||
80 | * prefetch can be turned OFF/ON using "hdparm -p8/-p9" | ||
81 | * (requires hdparm-3.1 or newer) | ||
82 | * Version 0.91 first release to linux-kernel list. | ||
83 | * Version 0.92 move initial reg dump to separate callable function | ||
84 | * change "readahead" to "prefetch" to avoid confusion | ||
85 | * Version 0.95 respect original BIOS timings unless autotuning. | ||
86 | * tons of code cleanup and rearrangement. | ||
87 | * added CONFIG_BLK_DEV_CMD640_ENHANCED option | ||
88 | * prevent use of unmask when prefetch is on | ||
89 | * Version 0.96 prevent use of io_32bit when prefetch is off | ||
90 | * Version 0.97 fix VLB secondary interface for sjd@slip.net | ||
91 | * other minor tune-ups: 0.96 was very good. | ||
92 | * Version 0.98 ignore PCI version when disabled by BIOS | ||
93 | * Version 0.99 display setup/active/recovery clocks with PIO mode | ||
94 | * Version 1.00 Mmm.. cannot depend on PCMD_ENA in all systems | ||
95 | * Version 1.01 slow/fast devsel can be selected with "hdparm -p6/-p7" | ||
96 | * ("fast" is necessary for 32bit I/O in some systems) | ||
97 | * Version 1.02 fix bug that resulted in slow "setup times" | ||
98 | * (patch courtesy of Zoltan Hidvegi) | ||
99 | */ | ||
100 | |||
101 | #undef REALLY_SLOW_IO /* most systems can safely undef this */ | ||
102 | #define CMD640_PREFETCH_MASKS 1 | ||
103 | |||
104 | //#define CMD640_DUMP_REGS | ||
105 | |||
106 | #include <linux/config.h> | ||
107 | #include <linux/types.h> | ||
108 | #include <linux/kernel.h> | ||
109 | #include <linux/delay.h> | ||
110 | #include <linux/timer.h> | ||
111 | #include <linux/mm.h> | ||
112 | #include <linux/ioport.h> | ||
113 | #include <linux/blkdev.h> | ||
114 | #include <linux/hdreg.h> | ||
115 | #include <linux/ide.h> | ||
116 | #include <linux/init.h> | ||
117 | |||
118 | #include <asm/io.h> | ||
119 | |||
120 | /* | ||
121 | * This flag is set in ide.c by the parameter: ide0=cmd640_vlb | ||
122 | */ | ||
123 | int cmd640_vlb = 0; | ||
124 | |||
125 | /* | ||
126 | * CMD640 specific registers definition. | ||
127 | */ | ||
128 | |||
129 | #define VID 0x00 | ||
130 | #define DID 0x02 | ||
131 | #define PCMD 0x04 | ||
132 | #define PCMD_ENA 0x01 | ||
133 | #define PSTTS 0x06 | ||
134 | #define REVID 0x08 | ||
135 | #define PROGIF 0x09 | ||
136 | #define SUBCL 0x0a | ||
137 | #define BASCL 0x0b | ||
138 | #define BaseA0 0x10 | ||
139 | #define BaseA1 0x14 | ||
140 | #define BaseA2 0x18 | ||
141 | #define BaseA3 0x1c | ||
142 | #define INTLINE 0x3c | ||
143 | #define INPINE 0x3d | ||
144 | |||
145 | #define CFR 0x50 | ||
146 | #define CFR_DEVREV 0x03 | ||
147 | #define CFR_IDE01INTR 0x04 | ||
148 | #define CFR_DEVID 0x18 | ||
149 | #define CFR_AT_VESA_078h 0x20 | ||
150 | #define CFR_DSA1 0x40 | ||
151 | #define CFR_DSA0 0x80 | ||
152 | |||
153 | #define CNTRL 0x51 | ||
154 | #define CNTRL_DIS_RA0 0x40 | ||
155 | #define CNTRL_DIS_RA1 0x80 | ||
156 | #define CNTRL_ENA_2ND 0x08 | ||
157 | |||
158 | #define CMDTIM 0x52 | ||
159 | #define ARTTIM0 0x53 | ||
160 | #define DRWTIM0 0x54 | ||
161 | #define ARTTIM1 0x55 | ||
162 | #define DRWTIM1 0x56 | ||
163 | #define ARTTIM23 0x57 | ||
164 | #define ARTTIM23_DIS_RA2 0x04 | ||
165 | #define ARTTIM23_DIS_RA3 0x08 | ||
166 | #define DRWTIM23 0x58 | ||
167 | #define BRST 0x59 | ||
168 | |||
169 | /* | ||
170 | * Registers and masks for easy access by drive index: | ||
171 | */ | ||
172 | static u8 prefetch_regs[4] = {CNTRL, CNTRL, ARTTIM23, ARTTIM23}; | ||
173 | static u8 prefetch_masks[4] = {CNTRL_DIS_RA0, CNTRL_DIS_RA1, ARTTIM23_DIS_RA2, ARTTIM23_DIS_RA3}; | ||
174 | |||
175 | #ifdef CONFIG_BLK_DEV_CMD640_ENHANCED | ||
176 | |||
177 | static u8 arttim_regs[4] = {ARTTIM0, ARTTIM1, ARTTIM23, ARTTIM23}; | ||
178 | static u8 drwtim_regs[4] = {DRWTIM0, DRWTIM1, DRWTIM23, DRWTIM23}; | ||
179 | |||
180 | /* | ||
181 | * Current cmd640 timing values for each drive. | ||
182 | * The defaults for each are the slowest possible timings. | ||
183 | */ | ||
184 | static u8 setup_counts[4] = {4, 4, 4, 4}; /* Address setup count (in clocks) */ | ||
185 | static u8 active_counts[4] = {16, 16, 16, 16}; /* Active count (encoded) */ | ||
186 | static u8 recovery_counts[4] = {16, 16, 16, 16}; /* Recovery count (encoded) */ | ||
187 | |||
188 | #endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */ | ||
189 | |||
190 | /* | ||
191 | * These are initialized to point at the devices we control | ||
192 | */ | ||
193 | static ide_hwif_t *cmd_hwif0, *cmd_hwif1; | ||
194 | static ide_drive_t *cmd_drives[4]; | ||
195 | |||
196 | /* | ||
197 | * Interface to access cmd640x registers | ||
198 | */ | ||
199 | static unsigned int cmd640_key; | ||
200 | static void (*__put_cmd640_reg)(u16 reg, u8 val); | ||
201 | static u8 (*__get_cmd640_reg)(u16 reg); | ||
202 | |||
203 | /* | ||
204 | * This is read from the CFR reg, and is used in several places. | ||
205 | */ | ||
206 | static unsigned int cmd640_chip_version; | ||
207 | |||
208 | /* | ||
209 | * The CMD640x chip does not support DWORD config write cycles, but some | ||
210 | * of the BIOSes use them to implement the config services. | ||
211 | * Therefore, we must use direct IO instead. | ||
212 | */ | ||
213 | |||
214 | /* PCI method 1 access */ | ||
215 | |||
216 | static void put_cmd640_reg_pci1 (u16 reg, u8 val) | ||
217 | { | ||
218 | outl_p((reg & 0xfc) | cmd640_key, 0xcf8); | ||
219 | outb_p(val, (reg & 3) | 0xcfc); | ||
220 | } | ||
221 | |||
222 | static u8 get_cmd640_reg_pci1 (u16 reg) | ||
223 | { | ||
224 | outl_p((reg & 0xfc) | cmd640_key, 0xcf8); | ||
225 | return inb_p((reg & 3) | 0xcfc); | ||
226 | } | ||
227 | |||
228 | /* PCI method 2 access (from CMD datasheet) */ | ||
229 | |||
230 | static void put_cmd640_reg_pci2 (u16 reg, u8 val) | ||
231 | { | ||
232 | outb_p(0x10, 0xcf8); | ||
233 | outb_p(val, cmd640_key + reg); | ||
234 | outb_p(0, 0xcf8); | ||
235 | } | ||
236 | |||
237 | static u8 get_cmd640_reg_pci2 (u16 reg) | ||
238 | { | ||
239 | u8 b; | ||
240 | |||
241 | outb_p(0x10, 0xcf8); | ||
242 | b = inb_p(cmd640_key + reg); | ||
243 | outb_p(0, 0xcf8); | ||
244 | return b; | ||
245 | } | ||
246 | |||
247 | /* VLB access */ | ||
248 | |||
249 | static void put_cmd640_reg_vlb (u16 reg, u8 val) | ||
250 | { | ||
251 | outb_p(reg, cmd640_key); | ||
252 | outb_p(val, cmd640_key + 4); | ||
253 | } | ||
254 | |||
255 | static u8 get_cmd640_reg_vlb (u16 reg) | ||
256 | { | ||
257 | outb_p(reg, cmd640_key); | ||
258 | return inb_p(cmd640_key + 4); | ||
259 | } | ||
260 | |||
261 | static u8 get_cmd640_reg(u16 reg) | ||
262 | { | ||
263 | u8 b; | ||
264 | unsigned long flags; | ||
265 | |||
266 | spin_lock_irqsave(&ide_lock, flags); | ||
267 | b = __get_cmd640_reg(reg); | ||
268 | spin_unlock_irqrestore(&ide_lock, flags); | ||
269 | return b; | ||
270 | } | ||
271 | |||
272 | static void put_cmd640_reg(u16 reg, u8 val) | ||
273 | { | ||
274 | unsigned long flags; | ||
275 | |||
276 | spin_lock_irqsave(&ide_lock, flags); | ||
277 | __put_cmd640_reg(reg,val); | ||
278 | spin_unlock_irqrestore(&ide_lock, flags); | ||
279 | } | ||
280 | |||
281 | static int __init match_pci_cmd640_device (void) | ||
282 | { | ||
283 | const u8 ven_dev[4] = {0x95, 0x10, 0x40, 0x06}; | ||
284 | unsigned int i; | ||
285 | for (i = 0; i < 4; i++) { | ||
286 | if (get_cmd640_reg(i) != ven_dev[i]) | ||
287 | return 0; | ||
288 | } | ||
289 | #ifdef STUPIDLY_TRUST_BROKEN_PCMD_ENA_BIT | ||
290 | if ((get_cmd640_reg(PCMD) & PCMD_ENA) == 0) { | ||
291 | printk("ide: cmd640 on PCI disabled by BIOS\n"); | ||
292 | return 0; | ||
293 | } | ||
294 | #endif /* STUPIDLY_TRUST_BROKEN_PCMD_ENA_BIT */ | ||
295 | return 1; /* success */ | ||
296 | } | ||
297 | |||
298 | /* | ||
299 | * Probe for CMD640x -- pci method 1 | ||
300 | */ | ||
301 | static int __init probe_for_cmd640_pci1 (void) | ||
302 | { | ||
303 | __get_cmd640_reg = get_cmd640_reg_pci1; | ||
304 | __put_cmd640_reg = put_cmd640_reg_pci1; | ||
305 | for (cmd640_key = 0x80000000; | ||
306 | cmd640_key <= 0x8000f800; | ||
307 | cmd640_key += 0x800) { | ||
308 | if (match_pci_cmd640_device()) | ||
309 | return 1; /* success */ | ||
310 | } | ||
311 | return 0; | ||
312 | } | ||
313 | |||
314 | /* | ||
315 | * Probe for CMD640x -- pci method 2 | ||
316 | */ | ||
317 | static int __init probe_for_cmd640_pci2 (void) | ||
318 | { | ||
319 | __get_cmd640_reg = get_cmd640_reg_pci2; | ||
320 | __put_cmd640_reg = put_cmd640_reg_pci2; | ||
321 | for (cmd640_key = 0xc000; cmd640_key <= 0xcf00; cmd640_key += 0x100) { | ||
322 | if (match_pci_cmd640_device()) | ||
323 | return 1; /* success */ | ||
324 | } | ||
325 | return 0; | ||
326 | } | ||
327 | |||
328 | /* | ||
329 | * Probe for CMD640x -- vlb | ||
330 | */ | ||
331 | static int __init probe_for_cmd640_vlb (void) | ||
332 | { | ||
333 | u8 b; | ||
334 | |||
335 | __get_cmd640_reg = get_cmd640_reg_vlb; | ||
336 | __put_cmd640_reg = put_cmd640_reg_vlb; | ||
337 | cmd640_key = 0x178; | ||
338 | b = get_cmd640_reg(CFR); | ||
339 | if (b == 0xff || b == 0x00 || (b & CFR_AT_VESA_078h)) { | ||
340 | cmd640_key = 0x78; | ||
341 | b = get_cmd640_reg(CFR); | ||
342 | if (b == 0xff || b == 0x00 || !(b & CFR_AT_VESA_078h)) | ||
343 | return 0; | ||
344 | } | ||
345 | return 1; /* success */ | ||
346 | } | ||
347 | |||
348 | /* | ||
349 | * Returns 1 if an IDE interface/drive exists at 0x170, | ||
350 | * Returns 0 otherwise. | ||
351 | */ | ||
352 | static int __init secondary_port_responding (void) | ||
353 | { | ||
354 | unsigned long flags; | ||
355 | |||
356 | spin_lock_irqsave(&ide_lock, flags); | ||
357 | |||
358 | outb_p(0x0a, 0x170 + IDE_SELECT_OFFSET); /* select drive0 */ | ||
359 | udelay(100); | ||
360 | if ((inb_p(0x170 + IDE_SELECT_OFFSET) & 0x1f) != 0x0a) { | ||
361 | outb_p(0x1a, 0x170 + IDE_SELECT_OFFSET); /* select drive1 */ | ||
362 | udelay(100); | ||
363 | if ((inb_p(0x170 + IDE_SELECT_OFFSET) & 0x1f) != 0x1a) { | ||
364 | spin_unlock_irqrestore(&ide_lock, flags); | ||
365 | return 0; /* nothing responded */ | ||
366 | } | ||
367 | } | ||
368 | spin_unlock_irqrestore(&ide_lock, flags); | ||
369 | return 1; /* success */ | ||
370 | } | ||
371 | |||
372 | #ifdef CMD640_DUMP_REGS | ||
373 | /* | ||
374 | * Dump out all cmd640 registers. May be called from ide.c | ||
375 | */ | ||
376 | static void cmd640_dump_regs (void) | ||
377 | { | ||
378 | unsigned int reg = cmd640_vlb ? 0x50 : 0x00; | ||
379 | |||
380 | /* Dump current state of chip registers */ | ||
381 | printk("ide: cmd640 internal register dump:"); | ||
382 | for (; reg <= 0x59; reg++) { | ||
383 | if (!(reg & 0x0f)) | ||
384 | printk("\n%04x:", reg); | ||
385 | printk(" %02x", get_cmd640_reg(reg)); | ||
386 | } | ||
387 | printk("\n"); | ||
388 | } | ||
389 | #endif | ||
390 | |||
391 | /* | ||
392 | * Check whether prefetch is on for a drive, | ||
393 | * and initialize the unmask flags for safe operation. | ||
394 | */ | ||
395 | static void __init check_prefetch (unsigned int index) | ||
396 | { | ||
397 | ide_drive_t *drive = cmd_drives[index]; | ||
398 | u8 b = get_cmd640_reg(prefetch_regs[index]); | ||
399 | |||
400 | if (b & prefetch_masks[index]) { /* is prefetch off? */ | ||
401 | drive->no_unmask = 0; | ||
402 | drive->no_io_32bit = 1; | ||
403 | drive->io_32bit = 0; | ||
404 | } else { | ||
405 | #if CMD640_PREFETCH_MASKS | ||
406 | drive->no_unmask = 1; | ||
407 | drive->unmask = 0; | ||
408 | #endif | ||
409 | drive->no_io_32bit = 0; | ||
410 | } | ||
411 | } | ||
412 | |||
413 | /* | ||
414 | * Figure out which devices we control | ||
415 | */ | ||
416 | static void __init setup_device_ptrs (void) | ||
417 | { | ||
418 | unsigned int i; | ||
419 | |||
420 | cmd_hwif0 = &ide_hwifs[0]; /* default, if not found below */ | ||
421 | cmd_hwif1 = &ide_hwifs[1]; /* default, if not found below */ | ||
422 | for (i = 0; i < MAX_HWIFS; i++) { | ||
423 | ide_hwif_t *hwif = &ide_hwifs[i]; | ||
424 | if (hwif->chipset == ide_unknown || hwif->chipset == ide_forced) { | ||
425 | if (hwif->io_ports[IDE_DATA_OFFSET] == 0x1f0) | ||
426 | cmd_hwif0 = hwif; | ||
427 | else if (hwif->io_ports[IDE_DATA_OFFSET] == 0x170) | ||
428 | cmd_hwif1 = hwif; | ||
429 | } | ||
430 | } | ||
431 | cmd_drives[0] = &cmd_hwif0->drives[0]; | ||
432 | cmd_drives[1] = &cmd_hwif0->drives[1]; | ||
433 | cmd_drives[2] = &cmd_hwif1->drives[0]; | ||
434 | cmd_drives[3] = &cmd_hwif1->drives[1]; | ||
435 | } | ||
436 | |||
437 | #ifdef CONFIG_BLK_DEV_CMD640_ENHANCED | ||
438 | |||
439 | /* | ||
440 | * Sets prefetch mode for a drive. | ||
441 | */ | ||
442 | static void set_prefetch_mode (unsigned int index, int mode) | ||
443 | { | ||
444 | ide_drive_t *drive = cmd_drives[index]; | ||
445 | int reg = prefetch_regs[index]; | ||
446 | u8 b; | ||
447 | unsigned long flags; | ||
448 | |||
449 | spin_lock_irqsave(&ide_lock, flags); | ||
450 | b = __get_cmd640_reg(reg); | ||
451 | if (mode) { /* want prefetch on? */ | ||
452 | #if CMD640_PREFETCH_MASKS | ||
453 | drive->no_unmask = 1; | ||
454 | drive->unmask = 0; | ||
455 | #endif | ||
456 | drive->no_io_32bit = 0; | ||
457 | b &= ~prefetch_masks[index]; /* enable prefetch */ | ||
458 | } else { | ||
459 | drive->no_unmask = 0; | ||
460 | drive->no_io_32bit = 1; | ||
461 | drive->io_32bit = 0; | ||
462 | b |= prefetch_masks[index]; /* disable prefetch */ | ||
463 | } | ||
464 | __put_cmd640_reg(reg, b); | ||
465 | spin_unlock_irqrestore(&ide_lock, flags); | ||
466 | } | ||
467 | |||
468 | /* | ||
469 | * Dump out current drive clocks settings | ||
470 | */ | ||
471 | static void display_clocks (unsigned int index) | ||
472 | { | ||
473 | u8 active_count, recovery_count; | ||
474 | |||
475 | active_count = active_counts[index]; | ||
476 | if (active_count == 1) | ||
477 | ++active_count; | ||
478 | recovery_count = recovery_counts[index]; | ||
479 | if (active_count > 3 && recovery_count == 1) | ||
480 | ++recovery_count; | ||
481 | if (cmd640_chip_version > 1) | ||
482 | recovery_count += 1; /* cmd640b uses (count + 1)*/ | ||
483 | printk(", clocks=%d/%d/%d\n", setup_counts[index], active_count, recovery_count); | ||
484 | } | ||
485 | |||
486 | /* | ||
487 | * Pack active and recovery counts into single byte representation | ||
488 | * used by controller | ||
489 | */ | ||
490 | inline static u8 pack_nibbles (u8 upper, u8 lower) | ||
491 | { | ||
492 | return ((upper & 0x0f) << 4) | (lower & 0x0f); | ||
493 | } | ||
494 | |||
495 | /* | ||
496 | * This routine retrieves the initial drive timings from the chipset. | ||
497 | */ | ||
498 | static void __init retrieve_drive_counts (unsigned int index) | ||
499 | { | ||
500 | u8 b; | ||
501 | |||
502 | /* | ||
503 | * Get the internal setup timing, and convert to clock count | ||
504 | */ | ||
505 | b = get_cmd640_reg(arttim_regs[index]) & ~0x3f; | ||
506 | switch (b) { | ||
507 | case 0x00: b = 4; break; | ||
508 | case 0x80: b = 3; break; | ||
509 | case 0x40: b = 2; break; | ||
510 | default: b = 5; break; | ||
511 | } | ||
512 | setup_counts[index] = b; | ||
513 | |||
514 | /* | ||
515 | * Get the active/recovery counts | ||
516 | */ | ||
517 | b = get_cmd640_reg(drwtim_regs[index]); | ||
518 | active_counts[index] = (b >> 4) ? (b >> 4) : 0x10; | ||
519 | recovery_counts[index] = (b & 0x0f) ? (b & 0x0f) : 0x10; | ||
520 | } | ||
521 | |||
522 | |||
523 | /* | ||
524 | * This routine writes the prepared setup/active/recovery counts | ||
525 | * for a drive into the cmd640 chipset registers to active them. | ||
526 | */ | ||
527 | static void program_drive_counts (unsigned int index) | ||
528 | { | ||
529 | unsigned long flags; | ||
530 | u8 setup_count = setup_counts[index]; | ||
531 | u8 active_count = active_counts[index]; | ||
532 | u8 recovery_count = recovery_counts[index]; | ||
533 | |||
534 | /* | ||
535 | * Set up address setup count and drive read/write timing registers. | ||
536 | * Primary interface has individual count/timing registers for | ||
537 | * each drive. Secondary interface has one common set of registers, | ||
538 | * so we merge the timings, using the slowest value for each timing. | ||
539 | */ | ||
540 | if (index > 1) { | ||
541 | unsigned int mate; | ||
542 | if (cmd_drives[mate = index ^ 1]->present) { | ||
543 | if (setup_count < setup_counts[mate]) | ||
544 | setup_count = setup_counts[mate]; | ||
545 | if (active_count < active_counts[mate]) | ||
546 | active_count = active_counts[mate]; | ||
547 | if (recovery_count < recovery_counts[mate]) | ||
548 | recovery_count = recovery_counts[mate]; | ||
549 | } | ||
550 | } | ||
551 | |||
552 | /* | ||
553 | * Convert setup_count to internal chipset representation | ||
554 | */ | ||
555 | switch (setup_count) { | ||
556 | case 4: setup_count = 0x00; break; | ||
557 | case 3: setup_count = 0x80; break; | ||
558 | case 1: | ||
559 | case 2: setup_count = 0x40; break; | ||
560 | default: setup_count = 0xc0; /* case 5 */ | ||
561 | } | ||
562 | |||
563 | /* | ||
564 | * Now that everything is ready, program the new timings | ||
565 | */ | ||
566 | spin_lock_irqsave(&ide_lock, flags); | ||
567 | /* | ||
568 | * Program the address_setup clocks into ARTTIM reg, | ||
569 | * and then the active/recovery counts into the DRWTIM reg | ||
570 | * (this converts counts of 16 into counts of zero -- okay). | ||
571 | */ | ||
572 | setup_count |= __get_cmd640_reg(arttim_regs[index]) & 0x3f; | ||
573 | __put_cmd640_reg(arttim_regs[index], setup_count); | ||
574 | __put_cmd640_reg(drwtim_regs[index], pack_nibbles(active_count, recovery_count)); | ||
575 | spin_unlock_irqrestore(&ide_lock, flags); | ||
576 | } | ||
577 | |||
578 | /* | ||
579 | * Set a specific pio_mode for a drive | ||
580 | */ | ||
581 | static void cmd640_set_mode (unsigned int index, u8 pio_mode, unsigned int cycle_time) | ||
582 | { | ||
583 | int setup_time, active_time, recovery_time, clock_time; | ||
584 | u8 setup_count, active_count, recovery_count, recovery_count2, cycle_count; | ||
585 | int bus_speed = system_bus_clock(); | ||
586 | |||
587 | if (pio_mode > 5) | ||
588 | pio_mode = 5; | ||
589 | setup_time = ide_pio_timings[pio_mode].setup_time; | ||
590 | active_time = ide_pio_timings[pio_mode].active_time; | ||
591 | recovery_time = cycle_time - (setup_time + active_time); | ||
592 | clock_time = 1000 / bus_speed; | ||
593 | cycle_count = (cycle_time + clock_time - 1) / clock_time; | ||
594 | |||
595 | setup_count = (setup_time + clock_time - 1) / clock_time; | ||
596 | |||
597 | active_count = (active_time + clock_time - 1) / clock_time; | ||
598 | if (active_count < 2) | ||
599 | active_count = 2; /* minimum allowed by cmd640 */ | ||
600 | |||
601 | recovery_count = (recovery_time + clock_time - 1) / clock_time; | ||
602 | recovery_count2 = cycle_count - (setup_count + active_count); | ||
603 | if (recovery_count2 > recovery_count) | ||
604 | recovery_count = recovery_count2; | ||
605 | if (recovery_count < 2) | ||
606 | recovery_count = 2; /* minimum allowed by cmd640 */ | ||
607 | if (recovery_count > 17) { | ||
608 | active_count += recovery_count - 17; | ||
609 | recovery_count = 17; | ||
610 | } | ||
611 | if (active_count > 16) | ||
612 | active_count = 16; /* maximum allowed by cmd640 */ | ||
613 | if (cmd640_chip_version > 1) | ||
614 | recovery_count -= 1; /* cmd640b uses (count + 1)*/ | ||
615 | if (recovery_count > 16) | ||
616 | recovery_count = 16; /* maximum allowed by cmd640 */ | ||
617 | |||
618 | setup_counts[index] = setup_count; | ||
619 | active_counts[index] = active_count; | ||
620 | recovery_counts[index] = recovery_count; | ||
621 | |||
622 | /* | ||
623 | * In a perfect world, we might set the drive pio mode here | ||
624 | * (using WIN_SETFEATURE) before continuing. | ||
625 | * | ||
626 | * But we do not, because: | ||
627 | * 1) this is the wrong place to do it (proper is do_special() in ide.c) | ||
628 | * 2) in practice this is rarely, if ever, necessary | ||
629 | */ | ||
630 | program_drive_counts (index); | ||
631 | } | ||
632 | |||
633 | /* | ||
634 | * Drive PIO mode selection: | ||
635 | */ | ||
636 | static void cmd640_tune_drive (ide_drive_t *drive, u8 mode_wanted) | ||
637 | { | ||
638 | u8 b; | ||
639 | ide_pio_data_t d; | ||
640 | unsigned int index = 0; | ||
641 | |||
642 | while (drive != cmd_drives[index]) { | ||
643 | if (++index > 3) { | ||
644 | printk("%s: bad news in cmd640_tune_drive\n", drive->name); | ||
645 | return; | ||
646 | } | ||
647 | } | ||
648 | switch (mode_wanted) { | ||
649 | case 6: /* set fast-devsel off */ | ||
650 | case 7: /* set fast-devsel on */ | ||
651 | mode_wanted &= 1; | ||
652 | b = get_cmd640_reg(CNTRL) & ~0x27; | ||
653 | if (mode_wanted) | ||
654 | b |= 0x27; | ||
655 | put_cmd640_reg(CNTRL, b); | ||
656 | printk("%s: %sabled cmd640 fast host timing (devsel)\n", drive->name, mode_wanted ? "en" : "dis"); | ||
657 | return; | ||
658 | |||
659 | case 8: /* set prefetch off */ | ||
660 | case 9: /* set prefetch on */ | ||
661 | mode_wanted &= 1; | ||
662 | set_prefetch_mode(index, mode_wanted); | ||
663 | printk("%s: %sabled cmd640 prefetch\n", drive->name, mode_wanted ? "en" : "dis"); | ||
664 | return; | ||
665 | } | ||
666 | |||
667 | (void) ide_get_best_pio_mode (drive, mode_wanted, 5, &d); | ||
668 | cmd640_set_mode (index, d.pio_mode, d.cycle_time); | ||
669 | |||
670 | printk ("%s: selected cmd640 PIO mode%d (%dns)%s", | ||
671 | drive->name, | ||
672 | d.pio_mode, | ||
673 | d.cycle_time, | ||
674 | d.overridden ? " (overriding vendor mode)" : ""); | ||
675 | display_clocks(index); | ||
676 | return; | ||
677 | } | ||
678 | |||
679 | #endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */ | ||
680 | |||
681 | static int pci_conf1(void) | ||
682 | { | ||
683 | u32 tmp; | ||
684 | unsigned long flags; | ||
685 | |||
686 | spin_lock_irqsave(&ide_lock, flags); | ||
687 | outb(0x01, 0xCFB); | ||
688 | tmp = inl(0xCF8); | ||
689 | outl(0x80000000, 0xCF8); | ||
690 | if (inl(0xCF8) == 0x80000000) { | ||
691 | outl(tmp, 0xCF8); | ||
692 | spin_unlock_irqrestore(&ide_lock, flags); | ||
693 | return 1; | ||
694 | } | ||
695 | outl(tmp, 0xCF8); | ||
696 | spin_unlock_irqrestore(&ide_lock, flags); | ||
697 | return 0; | ||
698 | } | ||
699 | |||
700 | static int pci_conf2(void) | ||
701 | { | ||
702 | unsigned long flags; | ||
703 | |||
704 | spin_lock_irqsave(&ide_lock, flags); | ||
705 | outb(0x00, 0xCFB); | ||
706 | outb(0x00, 0xCF8); | ||
707 | outb(0x00, 0xCFA); | ||
708 | if (inb(0xCF8) == 0x00 && inb(0xCF8) == 0x00) { | ||
709 | spin_unlock_irqrestore(&ide_lock, flags); | ||
710 | return 1; | ||
711 | } | ||
712 | spin_unlock_irqrestore(&ide_lock, flags); | ||
713 | return 0; | ||
714 | } | ||
715 | |||
716 | /* | ||
717 | * Probe for a cmd640 chipset, and initialize it if found. Called from ide.c | ||
718 | */ | ||
719 | int __init ide_probe_for_cmd640x (void) | ||
720 | { | ||
721 | #ifdef CONFIG_BLK_DEV_CMD640_ENHANCED | ||
722 | int second_port_toggled = 0; | ||
723 | #endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */ | ||
724 | int second_port_cmd640 = 0; | ||
725 | const char *bus_type, *port2; | ||
726 | unsigned int index; | ||
727 | u8 b, cfr; | ||
728 | |||
729 | if (cmd640_vlb && probe_for_cmd640_vlb()) { | ||
730 | bus_type = "VLB"; | ||
731 | } else { | ||
732 | cmd640_vlb = 0; | ||
733 | /* Find out what kind of PCI probing is supported otherwise | ||
734 | Justin Gibbs will sulk.. */ | ||
735 | if (pci_conf1() && probe_for_cmd640_pci1()) | ||
736 | bus_type = "PCI (type1)"; | ||
737 | else if (pci_conf2() && probe_for_cmd640_pci2()) | ||
738 | bus_type = "PCI (type2)"; | ||
739 | else | ||
740 | return 0; | ||
741 | } | ||
742 | /* | ||
743 | * Undocumented magic (there is no 0x5b reg in specs) | ||
744 | */ | ||
745 | put_cmd640_reg(0x5b, 0xbd); | ||
746 | if (get_cmd640_reg(0x5b) != 0xbd) { | ||
747 | printk(KERN_ERR "ide: cmd640 init failed: wrong value in reg 0x5b\n"); | ||
748 | return 0; | ||
749 | } | ||
750 | put_cmd640_reg(0x5b, 0); | ||
751 | |||
752 | #ifdef CMD640_DUMP_REGS | ||
753 | cmd640_dump_regs(); | ||
754 | #endif | ||
755 | |||
756 | /* | ||
757 | * Documented magic begins here | ||
758 | */ | ||
759 | cfr = get_cmd640_reg(CFR); | ||
760 | cmd640_chip_version = cfr & CFR_DEVREV; | ||
761 | if (cmd640_chip_version == 0) { | ||
762 | printk ("ide: bad cmd640 revision: %d\n", cmd640_chip_version); | ||
763 | return 0; | ||
764 | } | ||
765 | |||
766 | /* | ||
767 | * Initialize data for primary port | ||
768 | */ | ||
769 | setup_device_ptrs (); | ||
770 | printk("%s: buggy cmd640%c interface on %s, config=0x%02x\n", | ||
771 | cmd_hwif0->name, 'a' + cmd640_chip_version - 1, bus_type, cfr); | ||
772 | cmd_hwif0->chipset = ide_cmd640; | ||
773 | #ifdef CONFIG_BLK_DEV_CMD640_ENHANCED | ||
774 | cmd_hwif0->tuneproc = &cmd640_tune_drive; | ||
775 | #endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */ | ||
776 | |||
777 | /* | ||
778 | * Ensure compatibility by always using the slowest timings | ||
779 | * for access to the drive's command register block, | ||
780 | * and reset the prefetch burstsize to default (512 bytes). | ||
781 | * | ||
782 | * Maybe we need a way to NOT do these on *some* systems? | ||
783 | */ | ||
784 | put_cmd640_reg(CMDTIM, 0); | ||
785 | put_cmd640_reg(BRST, 0x40); | ||
786 | |||
787 | /* | ||
788 | * Try to enable the secondary interface, if not already enabled | ||
789 | */ | ||
790 | if (cmd_hwif1->noprobe) { | ||
791 | port2 = "not probed"; | ||
792 | } else { | ||
793 | b = get_cmd640_reg(CNTRL); | ||
794 | if (secondary_port_responding()) { | ||
795 | if ((b & CNTRL_ENA_2ND)) { | ||
796 | second_port_cmd640 = 1; | ||
797 | port2 = "okay"; | ||
798 | } else if (cmd640_vlb) { | ||
799 | second_port_cmd640 = 1; | ||
800 | port2 = "alive"; | ||
801 | } else | ||
802 | port2 = "not cmd640"; | ||
803 | } else { | ||
804 | put_cmd640_reg(CNTRL, b ^ CNTRL_ENA_2ND); /* toggle the bit */ | ||
805 | if (secondary_port_responding()) { | ||
806 | second_port_cmd640 = 1; | ||
807 | #ifdef CONFIG_BLK_DEV_CMD640_ENHANCED | ||
808 | second_port_toggled = 1; | ||
809 | #endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */ | ||
810 | port2 = "enabled"; | ||
811 | } else { | ||
812 | put_cmd640_reg(CNTRL, b); /* restore original setting */ | ||
813 | port2 = "not responding"; | ||
814 | } | ||
815 | } | ||
816 | } | ||
817 | |||
818 | /* | ||
819 | * Initialize data for secondary cmd640 port, if enabled | ||
820 | */ | ||
821 | if (second_port_cmd640) { | ||
822 | cmd_hwif0->serialized = 1; | ||
823 | cmd_hwif1->serialized = 1; | ||
824 | cmd_hwif1->chipset = ide_cmd640; | ||
825 | cmd_hwif0->mate = cmd_hwif1; | ||
826 | cmd_hwif1->mate = cmd_hwif0; | ||
827 | cmd_hwif1->channel = 1; | ||
828 | #ifdef CONFIG_BLK_DEV_CMD640_ENHANCED | ||
829 | cmd_hwif1->tuneproc = &cmd640_tune_drive; | ||
830 | #endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */ | ||
831 | } | ||
832 | printk(KERN_INFO "%s: %sserialized, secondary interface %s\n", cmd_hwif1->name, | ||
833 | cmd_hwif0->serialized ? "" : "not ", port2); | ||
834 | |||
835 | /* | ||
836 | * Establish initial timings/prefetch for all drives. | ||
837 | * Do not unnecessarily disturb any prior BIOS setup of these. | ||
838 | */ | ||
839 | for (index = 0; index < (2 + (second_port_cmd640 << 1)); index++) { | ||
840 | ide_drive_t *drive = cmd_drives[index]; | ||
841 | #ifdef CONFIG_BLK_DEV_CMD640_ENHANCED | ||
842 | if (drive->autotune || ((index > 1) && second_port_toggled)) { | ||
843 | /* | ||
844 | * Reset timing to the slowest speed and turn off prefetch. | ||
845 | * This way, the drive identify code has a better chance. | ||
846 | */ | ||
847 | setup_counts [index] = 4; /* max possible */ | ||
848 | active_counts [index] = 16; /* max possible */ | ||
849 | recovery_counts [index] = 16; /* max possible */ | ||
850 | program_drive_counts (index); | ||
851 | set_prefetch_mode (index, 0); | ||
852 | printk("cmd640: drive%d timings/prefetch cleared\n", index); | ||
853 | } else { | ||
854 | /* | ||
855 | * Record timings/prefetch without changing them. | ||
856 | * This preserves any prior BIOS setup. | ||
857 | */ | ||
858 | retrieve_drive_counts (index); | ||
859 | check_prefetch (index); | ||
860 | printk("cmd640: drive%d timings/prefetch(%s) preserved", | ||
861 | index, drive->no_io_32bit ? "off" : "on"); | ||
862 | display_clocks(index); | ||
863 | } | ||
864 | #else | ||
865 | /* | ||
866 | * Set the drive unmask flags to match the prefetch setting | ||
867 | */ | ||
868 | check_prefetch (index); | ||
869 | printk("cmd640: drive%d timings/prefetch(%s) preserved\n", | ||
870 | index, drive->no_io_32bit ? "off" : "on"); | ||
871 | #endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */ | ||
872 | } | ||
873 | |||
874 | #ifdef CMD640_DUMP_REGS | ||
875 | cmd640_dump_regs(); | ||
876 | #endif | ||
877 | return 1; | ||
878 | } | ||
879 | |||