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authorBartlomiej Zolnierkiewicz <bzolnier@gmail.com>2008-07-16 14:33:37 -0400
committerBartlomiej Zolnierkiewicz <bzolnier@gmail.com>2008-07-16 14:33:37 -0400
commitf06ab3402aa2d6de060442c1053ea10b24b65076 (patch)
tree400f7ff5a79e75b82a7ba0daaf669f5d38f7c679 /drivers/ide/ide-timing.h
parent2c139e7a7152f66ff93b173f8770c94ea53a691e (diff)
ide: convert ide-timing.h to ide-timings.c library (take 2)
* Don't include ide-timing.h in cs5535 and sis5513 host drivers (they don't need it currently). * Convert ide-timing.h to ide-timings.c library and add CONFIG_IDE_TIMINGS config option to be selected by host drivers using the library. While at it: - fix ide_timing_find_mode() placement v2: * Add missing EXPORT_SYMBOLs. (Stephen Rothwell <sfr@canb.auug.org.au>) There should be no functional changes caused by this patch. Cc: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Diffstat (limited to 'drivers/ide/ide-timing.h')
-rw-r--r--drivers/ide/ide-timing.h183
1 files changed, 0 insertions, 183 deletions
diff --git a/drivers/ide/ide-timing.h b/drivers/ide/ide-timing.h
deleted file mode 100644
index 98e05f545450..000000000000
--- a/drivers/ide/ide-timing.h
+++ /dev/null
@@ -1,183 +0,0 @@
1#ifndef _IDE_TIMING_H
2#define _IDE_TIMING_H
3
4/*
5 * Copyright (c) 1999-2001 Vojtech Pavlik
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 *
21 * Should you need to contact me, the author, you can do so either by
22 * e-mail - mail your message to <vojtech@ucw.cz>, or by paper mail:
23 * Vojtech Pavlik, Simunkova 1594, Prague 8, 182 00 Czech Republic
24 */
25
26#include <linux/kernel.h>
27#include <linux/hdreg.h>
28
29/*
30 * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
31 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
32 * for PIO 5, which is a nonstandard extension and UDMA6, which
33 * is currently supported only by Maxtor drives.
34 */
35
36static struct ide_timing ide_timing[] = {
37
38 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
39 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
40 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
41 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
42
43 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
44 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
45 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
46
47 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
48 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
49 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
50
51 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
52 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
53 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
54
55 { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 },
56 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
57 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
58
59 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
60 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
61 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
62
63 { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 },
64
65 { 0xff }
66};
67
68#define ENOUGH(v, unit) (((v) - 1) / (unit) + 1)
69#define EZ(v, unit) ((v) ? ENOUGH(v, unit) : 0)
70
71static void ide_timing_quantize(struct ide_timing *t, struct ide_timing *q,
72 int T, int UT)
73{
74 q->setup = EZ(t->setup * 1000, T);
75 q->act8b = EZ(t->act8b * 1000, T);
76 q->rec8b = EZ(t->rec8b * 1000, T);
77 q->cyc8b = EZ(t->cyc8b * 1000, T);
78 q->active = EZ(t->active * 1000, T);
79 q->recover = EZ(t->recover * 1000, T);
80 q->cycle = EZ(t->cycle * 1000, T);
81 q->udma = EZ(t->udma * 1000, UT);
82}
83
84static void ide_timing_merge(struct ide_timing *a, struct ide_timing *b,
85 struct ide_timing *m, unsigned int what)
86{
87 if (what & IDE_TIMING_SETUP)
88 m->setup = max(a->setup, b->setup);
89 if (what & IDE_TIMING_ACT8B)
90 m->act8b = max(a->act8b, b->act8b);
91 if (what & IDE_TIMING_REC8B)
92 m->rec8b = max(a->rec8b, b->rec8b);
93 if (what & IDE_TIMING_CYC8B)
94 m->cyc8b = max(a->cyc8b, b->cyc8b);
95 if (what & IDE_TIMING_ACTIVE)
96 m->active = max(a->active, b->active);
97 if (what & IDE_TIMING_RECOVER)
98 m->recover = max(a->recover, b->recover);
99 if (what & IDE_TIMING_CYCLE)
100 m->cycle = max(a->cycle, b->cycle);
101 if (what & IDE_TIMING_UDMA)
102 m->udma = max(a->udma, b->udma);
103}
104
105static struct ide_timing *ide_timing_find_mode(u8 speed)
106{
107 struct ide_timing *t;
108
109 for (t = ide_timing; t->mode != speed; t++)
110 if (t->mode == 0xff)
111 return NULL;
112 return t;
113}
114
115static int ide_timing_compute(ide_drive_t *drive, u8 speed,
116 struct ide_timing *t, int T, int UT)
117{
118 struct hd_driveid *id = drive->id;
119 struct ide_timing *s, p;
120
121 /*
122 * Find the mode.
123 */
124 s = ide_timing_find_mode(speed);
125 if (s == NULL)
126 return -EINVAL;
127
128 /*
129 * Copy the timing from the table.
130 */
131 *t = *s;
132
133 /*
134 * If the drive is an EIDE drive, it can tell us it needs extended
135 * PIO/MWDMA cycle timing.
136 */
137 if (id && id->field_valid & 2) { /* EIDE drive */
138
139 memset(&p, 0, sizeof(p));
140
141 if (speed <= XFER_PIO_2)
142 p.cycle = p.cyc8b = id->eide_pio;
143 else if (speed <= XFER_PIO_5)
144 p.cycle = p.cyc8b = id->eide_pio_iordy;
145 else if (speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2)
146 p.cycle = id->eide_dma_min;
147
148 ide_timing_merge(&p, t, t, IDE_TIMING_CYCLE | IDE_TIMING_CYC8B);
149 }
150
151 /*
152 * Convert the timing to bus clock counts.
153 */
154 ide_timing_quantize(t, t, T, UT);
155
156 /*
157 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
158 * S.M.A.R.T and some other commands. We have to ensure that the
159 * DMA cycle timing is slower/equal than the fastest PIO timing.
160 */
161 if (speed >= XFER_SW_DMA_0) {
162 u8 pio = ide_get_best_pio_mode(drive, 255, 5);
163 ide_timing_compute(drive, XFER_PIO_0 + pio, &p, T, UT);
164 ide_timing_merge(&p, t, t, IDE_TIMING_ALL);
165 }
166
167 /*
168 * Lengthen active & recovery time so that cycle time is correct.
169 */
170 if (t->act8b + t->rec8b < t->cyc8b) {
171 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
172 t->rec8b = t->cyc8b - t->act8b;
173 }
174
175 if (t->active + t->recover < t->cycle) {
176 t->active += (t->cycle - (t->active + t->recover)) / 2;
177 t->recover = t->cycle - t->active;
178 }
179
180 return 0;
181}
182
183#endif
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