diff options
author | Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> | 2008-07-16 14:33:36 -0400 |
---|---|---|
committer | Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> | 2008-07-16 14:33:36 -0400 |
commit | 2c139e7a7152f66ff93b173f8770c94ea53a691e (patch) | |
tree | 7f8d3b2c7e105acf755cad0af310f9c1e2404d2b /drivers/ide/ide-timing.h | |
parent | bd887f72d2a28a8202519e67fd9ed93ee3c4e78d (diff) |
ide: checkpatch.pl fixes for ide-timing.h
Also fix placement of comments in ide_timing_compute() while at it.
There should be no functional changes caused by this patch
(md5sum was verified to be the same before/after the patch).
Acked-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Diffstat (limited to 'drivers/ide/ide-timing.h')
-rw-r--r-- | drivers/ide/ide-timing.h | 93 |
1 files changed, 48 insertions, 45 deletions
diff --git a/drivers/ide/ide-timing.h b/drivers/ide/ide-timing.h index a401d8f82b50..98e05f545450 100644 --- a/drivers/ide/ide-timing.h +++ b/drivers/ide/ide-timing.h | |||
@@ -3,9 +3,7 @@ | |||
3 | 3 | ||
4 | /* | 4 | /* |
5 | * Copyright (c) 1999-2001 Vojtech Pavlik | 5 | * Copyright (c) 1999-2001 Vojtech Pavlik |
6 | */ | 6 | * |
7 | |||
8 | /* | ||
9 | * This program is free software; you can redistribute it and/or modify | 7 | * This program is free software; you can redistribute it and/or modify |
10 | * it under the terms of the GNU General Public License as published by | 8 | * it under the terms of the GNU General Public License as published by |
11 | * the Free Software Foundation; either version 2 of the License, or | 9 | * the Free Software Foundation; either version 2 of the License, or |
@@ -32,7 +30,7 @@ | |||
32 | * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds). | 30 | * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds). |
33 | * These were taken from ATA/ATAPI-6 standard, rev 0a, except | 31 | * These were taken from ATA/ATAPI-6 standard, rev 0a, except |
34 | * for PIO 5, which is a nonstandard extension and UDMA6, which | 32 | * for PIO 5, which is a nonstandard extension and UDMA6, which |
35 | * is currently supported only by Maxtor drives. | 33 | * is currently supported only by Maxtor drives. |
36 | */ | 34 | */ |
37 | 35 | ||
38 | static struct ide_timing ide_timing[] = { | 36 | static struct ide_timing ide_timing[] = { |
@@ -67,10 +65,11 @@ static struct ide_timing ide_timing[] = { | |||
67 | { 0xff } | 65 | { 0xff } |
68 | }; | 66 | }; |
69 | 67 | ||
70 | #define ENOUGH(v,unit) (((v)-1)/(unit)+1) | 68 | #define ENOUGH(v, unit) (((v) - 1) / (unit) + 1) |
71 | #define EZ(v,unit) ((v)?ENOUGH(v,unit):0) | 69 | #define EZ(v, unit) ((v) ? ENOUGH(v, unit) : 0) |
72 | 70 | ||
73 | static void ide_timing_quantize(struct ide_timing *t, struct ide_timing *q, int T, int UT) | 71 | static void ide_timing_quantize(struct ide_timing *t, struct ide_timing *q, |
72 | int T, int UT) | ||
74 | { | 73 | { |
75 | q->setup = EZ(t->setup * 1000, T); | 74 | q->setup = EZ(t->setup * 1000, T); |
76 | q->act8b = EZ(t->act8b * 1000, T); | 75 | q->act8b = EZ(t->act8b * 1000, T); |
@@ -82,16 +81,25 @@ static void ide_timing_quantize(struct ide_timing *t, struct ide_timing *q, int | |||
82 | q->udma = EZ(t->udma * 1000, UT); | 81 | q->udma = EZ(t->udma * 1000, UT); |
83 | } | 82 | } |
84 | 83 | ||
85 | static void ide_timing_merge(struct ide_timing *a, struct ide_timing *b, struct ide_timing *m, unsigned int what) | 84 | static void ide_timing_merge(struct ide_timing *a, struct ide_timing *b, |
85 | struct ide_timing *m, unsigned int what) | ||
86 | { | 86 | { |
87 | if (what & IDE_TIMING_SETUP ) m->setup = max(a->setup, b->setup); | 87 | if (what & IDE_TIMING_SETUP) |
88 | if (what & IDE_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b); | 88 | m->setup = max(a->setup, b->setup); |
89 | if (what & IDE_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b); | 89 | if (what & IDE_TIMING_ACT8B) |
90 | if (what & IDE_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b); | 90 | m->act8b = max(a->act8b, b->act8b); |
91 | if (what & IDE_TIMING_ACTIVE ) m->active = max(a->active, b->active); | 91 | if (what & IDE_TIMING_REC8B) |
92 | if (what & IDE_TIMING_RECOVER) m->recover = max(a->recover, b->recover); | 92 | m->rec8b = max(a->rec8b, b->rec8b); |
93 | if (what & IDE_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle); | 93 | if (what & IDE_TIMING_CYC8B) |
94 | if (what & IDE_TIMING_UDMA ) m->udma = max(a->udma, b->udma); | 94 | m->cyc8b = max(a->cyc8b, b->cyc8b); |
95 | if (what & IDE_TIMING_ACTIVE) | ||
96 | m->active = max(a->active, b->active); | ||
97 | if (what & IDE_TIMING_RECOVER) | ||
98 | m->recover = max(a->recover, b->recover); | ||
99 | if (what & IDE_TIMING_CYCLE) | ||
100 | m->cycle = max(a->cycle, b->cycle); | ||
101 | if (what & IDE_TIMING_UDMA) | ||
102 | m->udma = max(a->udma, b->udma); | ||
95 | } | 103 | } |
96 | 104 | ||
97 | static struct ide_timing *ide_timing_find_mode(u8 speed) | 105 | static struct ide_timing *ide_timing_find_mode(u8 speed) |
@@ -101,7 +109,7 @@ static struct ide_timing *ide_timing_find_mode(u8 speed) | |||
101 | for (t = ide_timing; t->mode != speed; t++) | 109 | for (t = ide_timing; t->mode != speed; t++) |
102 | if (t->mode == 0xff) | 110 | if (t->mode == 0xff) |
103 | return NULL; | 111 | return NULL; |
104 | return t; | 112 | return t; |
105 | } | 113 | } |
106 | 114 | ||
107 | static int ide_timing_compute(ide_drive_t *drive, u8 speed, | 115 | static int ide_timing_compute(ide_drive_t *drive, u8 speed, |
@@ -110,24 +118,22 @@ static int ide_timing_compute(ide_drive_t *drive, u8 speed, | |||
110 | struct hd_driveid *id = drive->id; | 118 | struct hd_driveid *id = drive->id; |
111 | struct ide_timing *s, p; | 119 | struct ide_timing *s, p; |
112 | 120 | ||
113 | /* | 121 | /* |
114 | * Find the mode. | 122 | * Find the mode. |
115 | */ | 123 | */ |
116 | 124 | s = ide_timing_find_mode(speed); | |
117 | if (!(s = ide_timing_find_mode(speed))) | 125 | if (s == NULL) |
118 | return -EINVAL; | 126 | return -EINVAL; |
119 | 127 | ||
120 | /* | 128 | /* |
121 | * Copy the timing from the table. | 129 | * Copy the timing from the table. |
122 | */ | 130 | */ |
123 | |||
124 | *t = *s; | 131 | *t = *s; |
125 | 132 | ||
126 | /* | 133 | /* |
127 | * If the drive is an EIDE drive, it can tell us it needs extended | 134 | * If the drive is an EIDE drive, it can tell us it needs extended |
128 | * PIO/MWDMA cycle timing. | 135 | * PIO/MWDMA cycle timing. |
129 | */ | 136 | */ |
130 | |||
131 | if (id && id->field_valid & 2) { /* EIDE drive */ | 137 | if (id && id->field_valid & 2) { /* EIDE drive */ |
132 | 138 | ||
133 | memset(&p, 0, sizeof(p)); | 139 | memset(&p, 0, sizeof(p)); |
@@ -142,28 +148,25 @@ static int ide_timing_compute(ide_drive_t *drive, u8 speed, | |||
142 | ide_timing_merge(&p, t, t, IDE_TIMING_CYCLE | IDE_TIMING_CYC8B); | 148 | ide_timing_merge(&p, t, t, IDE_TIMING_CYCLE | IDE_TIMING_CYC8B); |
143 | } | 149 | } |
144 | 150 | ||
145 | /* | 151 | /* |
146 | * Convert the timing to bus clock counts. | 152 | * Convert the timing to bus clock counts. |
147 | */ | 153 | */ |
148 | |||
149 | ide_timing_quantize(t, t, T, UT); | 154 | ide_timing_quantize(t, t, T, UT); |
150 | 155 | ||
151 | /* | 156 | /* |
152 | * Even in DMA/UDMA modes we still use PIO access for IDENTIFY, S.M.A.R.T | 157 | * Even in DMA/UDMA modes we still use PIO access for IDENTIFY, |
153 | * and some other commands. We have to ensure that the DMA cycle timing is | 158 | * S.M.A.R.T and some other commands. We have to ensure that the |
154 | * slower/equal than the fastest PIO timing. | 159 | * DMA cycle timing is slower/equal than the fastest PIO timing. |
155 | */ | 160 | */ |
156 | |||
157 | if (speed >= XFER_SW_DMA_0) { | 161 | if (speed >= XFER_SW_DMA_0) { |
158 | u8 pio = ide_get_best_pio_mode(drive, 255, 5); | 162 | u8 pio = ide_get_best_pio_mode(drive, 255, 5); |
159 | ide_timing_compute(drive, XFER_PIO_0 + pio, &p, T, UT); | 163 | ide_timing_compute(drive, XFER_PIO_0 + pio, &p, T, UT); |
160 | ide_timing_merge(&p, t, t, IDE_TIMING_ALL); | 164 | ide_timing_merge(&p, t, t, IDE_TIMING_ALL); |
161 | } | 165 | } |
162 | 166 | ||
163 | /* | 167 | /* |
164 | * Lengthen active & recovery time so that cycle time is correct. | 168 | * Lengthen active & recovery time so that cycle time is correct. |
165 | */ | 169 | */ |
166 | |||
167 | if (t->act8b + t->rec8b < t->cyc8b) { | 170 | if (t->act8b + t->rec8b < t->cyc8b) { |
168 | t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2; | 171 | t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2; |
169 | t->rec8b = t->cyc8b - t->act8b; | 172 | t->rec8b = t->cyc8b - t->act8b; |