diff options
author | Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> | 2008-10-13 15:39:47 -0400 |
---|---|---|
committer | Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> | 2008-10-13 15:39:47 -0400 |
commit | 2dbe7e919eb696c86790797f8a814bef19a0d50a (patch) | |
tree | 59f9b665d99790226e1fba3d463fae3edab2c95a /drivers/ide/ide-dma.c | |
parent | db3f99ef7c30d541e4a78931acf2c64abe3e26d1 (diff) |
ide: move SFF DMA code to ide-dma-sff.c
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Diffstat (limited to 'drivers/ide/ide-dma.c')
-rw-r--r-- | drivers/ide/ide-dma.c | 363 |
1 files changed, 1 insertions, 362 deletions
diff --git a/drivers/ide/ide-dma.c b/drivers/ide/ide-dma.c index d935a6ec022f..fffd11717b2d 100644 --- a/drivers/ide/ide-dma.c +++ b/drivers/ide/ide-dma.c | |||
@@ -33,7 +33,6 @@ | |||
33 | #include <linux/ide.h> | 33 | #include <linux/ide.h> |
34 | #include <linux/scatterlist.h> | 34 | #include <linux/scatterlist.h> |
35 | #include <linux/dma-mapping.h> | 35 | #include <linux/dma-mapping.h> |
36 | #include <linux/io.h> | ||
37 | 36 | ||
38 | static const struct drive_list_entry drive_whitelist[] = { | 37 | static const struct drive_list_entry drive_whitelist[] = { |
39 | { "Micropolis 2112A" , NULL }, | 38 | { "Micropolis 2112A" , NULL }, |
@@ -109,7 +108,7 @@ ide_startstop_t ide_dma_intr(ide_drive_t *drive) | |||
109 | } | 108 | } |
110 | EXPORT_SYMBOL_GPL(ide_dma_intr); | 109 | EXPORT_SYMBOL_GPL(ide_dma_intr); |
111 | 110 | ||
112 | static int ide_dma_good_drive(ide_drive_t *drive) | 111 | int ide_dma_good_drive(ide_drive_t *drive) |
113 | { | 112 | { |
114 | return ide_in_drive_list(drive->id, drive_whitelist); | 113 | return ide_in_drive_list(drive->id, drive_whitelist); |
115 | } | 114 | } |
@@ -142,90 +141,6 @@ int ide_build_sglist(ide_drive_t *drive, struct request *rq) | |||
142 | } | 141 | } |
143 | EXPORT_SYMBOL_GPL(ide_build_sglist); | 142 | EXPORT_SYMBOL_GPL(ide_build_sglist); |
144 | 143 | ||
145 | #ifdef CONFIG_BLK_DEV_IDEDMA_SFF | ||
146 | /** | ||
147 | * ide_build_dmatable - build IDE DMA table | ||
148 | * | ||
149 | * ide_build_dmatable() prepares a dma request. We map the command | ||
150 | * to get the pci bus addresses of the buffers and then build up | ||
151 | * the PRD table that the IDE layer wants to be fed. | ||
152 | * | ||
153 | * Most chipsets correctly interpret a length of 0x0000 as 64KB, | ||
154 | * but at least one (e.g. CS5530) misinterprets it as zero (!). | ||
155 | * So we break the 64KB entry into two 32KB entries instead. | ||
156 | * | ||
157 | * Returns the number of built PRD entries if all went okay, | ||
158 | * returns 0 otherwise. | ||
159 | * | ||
160 | * May also be invoked from trm290.c | ||
161 | */ | ||
162 | |||
163 | int ide_build_dmatable(ide_drive_t *drive, struct request *rq) | ||
164 | { | ||
165 | ide_hwif_t *hwif = drive->hwif; | ||
166 | __le32 *table = (__le32 *)hwif->dmatable_cpu; | ||
167 | unsigned int is_trm290 = (hwif->chipset == ide_trm290) ? 1 : 0; | ||
168 | unsigned int count = 0; | ||
169 | int i; | ||
170 | struct scatterlist *sg; | ||
171 | |||
172 | hwif->sg_nents = ide_build_sglist(drive, rq); | ||
173 | if (hwif->sg_nents == 0) | ||
174 | return 0; | ||
175 | |||
176 | for_each_sg(hwif->sg_table, sg, hwif->sg_nents, i) { | ||
177 | u32 cur_addr, cur_len, xcount, bcount; | ||
178 | |||
179 | cur_addr = sg_dma_address(sg); | ||
180 | cur_len = sg_dma_len(sg); | ||
181 | |||
182 | /* | ||
183 | * Fill in the dma table, without crossing any 64kB boundaries. | ||
184 | * Most hardware requires 16-bit alignment of all blocks, | ||
185 | * but the trm290 requires 32-bit alignment. | ||
186 | */ | ||
187 | |||
188 | while (cur_len) { | ||
189 | if (count++ >= PRD_ENTRIES) | ||
190 | goto use_pio_instead; | ||
191 | |||
192 | bcount = 0x10000 - (cur_addr & 0xffff); | ||
193 | if (bcount > cur_len) | ||
194 | bcount = cur_len; | ||
195 | *table++ = cpu_to_le32(cur_addr); | ||
196 | xcount = bcount & 0xffff; | ||
197 | if (is_trm290) | ||
198 | xcount = ((xcount >> 2) - 1) << 16; | ||
199 | if (xcount == 0x0000) { | ||
200 | if (count++ >= PRD_ENTRIES) | ||
201 | goto use_pio_instead; | ||
202 | *table++ = cpu_to_le32(0x8000); | ||
203 | *table++ = cpu_to_le32(cur_addr + 0x8000); | ||
204 | xcount = 0x8000; | ||
205 | } | ||
206 | *table++ = cpu_to_le32(xcount); | ||
207 | cur_addr += bcount; | ||
208 | cur_len -= bcount; | ||
209 | } | ||
210 | } | ||
211 | |||
212 | if (count) { | ||
213 | if (!is_trm290) | ||
214 | *--table |= cpu_to_le32(0x80000000); | ||
215 | return count; | ||
216 | } | ||
217 | |||
218 | use_pio_instead: | ||
219 | printk(KERN_ERR "%s: %s\n", drive->name, | ||
220 | count ? "DMA table too small" : "empty DMA table?"); | ||
221 | |||
222 | ide_destroy_dmatable(drive); | ||
223 | |||
224 | return 0; /* revert to PIO for this request */ | ||
225 | } | ||
226 | EXPORT_SYMBOL_GPL(ide_build_dmatable); | ||
227 | #endif | ||
228 | |||
229 | /** | 144 | /** |
230 | * ide_destroy_dmatable - clean up DMA mapping | 145 | * ide_destroy_dmatable - clean up DMA mapping |
231 | * @drive: The drive to unmap | 146 | * @drive: The drive to unmap |
@@ -246,120 +161,6 @@ void ide_destroy_dmatable(ide_drive_t *drive) | |||
246 | } | 161 | } |
247 | EXPORT_SYMBOL_GPL(ide_destroy_dmatable); | 162 | EXPORT_SYMBOL_GPL(ide_destroy_dmatable); |
248 | 163 | ||
249 | #ifdef CONFIG_BLK_DEV_IDEDMA_SFF | ||
250 | /** | ||
251 | * config_drive_for_dma - attempt to activate IDE DMA | ||
252 | * @drive: the drive to place in DMA mode | ||
253 | * | ||
254 | * If the drive supports at least mode 2 DMA or UDMA of any kind | ||
255 | * then attempt to place it into DMA mode. Drives that are known to | ||
256 | * support DMA but predate the DMA properties or that are known | ||
257 | * to have DMA handling bugs are also set up appropriately based | ||
258 | * on the good/bad drive lists. | ||
259 | */ | ||
260 | |||
261 | static int config_drive_for_dma(ide_drive_t *drive) | ||
262 | { | ||
263 | ide_hwif_t *hwif = drive->hwif; | ||
264 | u16 *id = drive->id; | ||
265 | |||
266 | if (drive->media != ide_disk) { | ||
267 | if (hwif->host_flags & IDE_HFLAG_NO_ATAPI_DMA) | ||
268 | return 0; | ||
269 | } | ||
270 | |||
271 | /* | ||
272 | * Enable DMA on any drive that has | ||
273 | * UltraDMA (mode 0/1/2/3/4/5/6) enabled | ||
274 | */ | ||
275 | if ((id[ATA_ID_FIELD_VALID] & 4) && | ||
276 | ((id[ATA_ID_UDMA_MODES] >> 8) & 0x7f)) | ||
277 | return 1; | ||
278 | |||
279 | /* | ||
280 | * Enable DMA on any drive that has mode2 DMA | ||
281 | * (multi or single) enabled | ||
282 | */ | ||
283 | if (id[ATA_ID_FIELD_VALID] & 2) /* regular DMA */ | ||
284 | if ((id[ATA_ID_MWDMA_MODES] & 0x404) == 0x404 || | ||
285 | (id[ATA_ID_SWDMA_MODES] & 0x404) == 0x404) | ||
286 | return 1; | ||
287 | |||
288 | /* Consult the list of known "good" drives */ | ||
289 | if (ide_dma_good_drive(drive)) | ||
290 | return 1; | ||
291 | |||
292 | return 0; | ||
293 | } | ||
294 | |||
295 | /** | ||
296 | * dma_timer_expiry - handle a DMA timeout | ||
297 | * @drive: Drive that timed out | ||
298 | * | ||
299 | * An IDE DMA transfer timed out. In the event of an error we ask | ||
300 | * the driver to resolve the problem, if a DMA transfer is still | ||
301 | * in progress we continue to wait (arguably we need to add a | ||
302 | * secondary 'I don't care what the drive thinks' timeout here) | ||
303 | * Finally if we have an interrupt we let it complete the I/O. | ||
304 | * But only one time - we clear expiry and if it's still not | ||
305 | * completed after WAIT_CMD, we error and retry in PIO. | ||
306 | * This can occur if an interrupt is lost or due to hang or bugs. | ||
307 | */ | ||
308 | |||
309 | static int dma_timer_expiry(ide_drive_t *drive) | ||
310 | { | ||
311 | ide_hwif_t *hwif = drive->hwif; | ||
312 | u8 dma_stat = hwif->tp_ops->read_sff_dma_status(hwif); | ||
313 | |||
314 | printk(KERN_WARNING "%s: %s: DMA status (0x%02x)\n", | ||
315 | drive->name, __func__, dma_stat); | ||
316 | |||
317 | if ((dma_stat & 0x18) == 0x18) /* BUSY Stupid Early Timer !! */ | ||
318 | return WAIT_CMD; | ||
319 | |||
320 | hwif->hwgroup->expiry = NULL; /* one free ride for now */ | ||
321 | |||
322 | /* 1 dmaing, 2 error, 4 intr */ | ||
323 | if (dma_stat & 2) /* ERROR */ | ||
324 | return -1; | ||
325 | |||
326 | if (dma_stat & 1) /* DMAing */ | ||
327 | return WAIT_CMD; | ||
328 | |||
329 | if (dma_stat & 4) /* Got an Interrupt */ | ||
330 | return WAIT_CMD; | ||
331 | |||
332 | return 0; /* Status is unknown -- reset the bus */ | ||
333 | } | ||
334 | |||
335 | /** | ||
336 | * ide_dma_host_set - Enable/disable DMA on a host | ||
337 | * @drive: drive to control | ||
338 | * | ||
339 | * Enable/disable DMA on an IDE controller following generic | ||
340 | * bus-mastering IDE controller behaviour. | ||
341 | */ | ||
342 | |||
343 | void ide_dma_host_set(ide_drive_t *drive, int on) | ||
344 | { | ||
345 | ide_hwif_t *hwif = drive->hwif; | ||
346 | u8 unit = drive->dn & 1; | ||
347 | u8 dma_stat = hwif->tp_ops->read_sff_dma_status(hwif); | ||
348 | |||
349 | if (on) | ||
350 | dma_stat |= (1 << (5 + unit)); | ||
351 | else | ||
352 | dma_stat &= ~(1 << (5 + unit)); | ||
353 | |||
354 | if (hwif->host_flags & IDE_HFLAG_MMIO) | ||
355 | writeb(dma_stat, | ||
356 | (void __iomem *)(hwif->dma_base + ATA_DMA_STATUS)); | ||
357 | else | ||
358 | outb(dma_stat, hwif->dma_base + ATA_DMA_STATUS); | ||
359 | } | ||
360 | EXPORT_SYMBOL_GPL(ide_dma_host_set); | ||
361 | #endif /* CONFIG_BLK_DEV_IDEDMA_SFF */ | ||
362 | |||
363 | /** | 164 | /** |
364 | * ide_dma_off_quietly - Generic DMA kill | 165 | * ide_dma_off_quietly - Generic DMA kill |
365 | * @drive: drive to control | 166 | * @drive: drive to control |
@@ -406,154 +207,6 @@ void ide_dma_on(ide_drive_t *drive) | |||
406 | drive->hwif->dma_ops->dma_host_set(drive, 1); | 207 | drive->hwif->dma_ops->dma_host_set(drive, 1); |
407 | } | 208 | } |
408 | 209 | ||
409 | #ifdef CONFIG_BLK_DEV_IDEDMA_SFF | ||
410 | /** | ||
411 | * ide_dma_setup - begin a DMA phase | ||
412 | * @drive: target device | ||
413 | * | ||
414 | * Build an IDE DMA PRD (IDE speak for scatter gather table) | ||
415 | * and then set up the DMA transfer registers for a device | ||
416 | * that follows generic IDE PCI DMA behaviour. Controllers can | ||
417 | * override this function if they need to | ||
418 | * | ||
419 | * Returns 0 on success. If a PIO fallback is required then 1 | ||
420 | * is returned. | ||
421 | */ | ||
422 | |||
423 | int ide_dma_setup(ide_drive_t *drive) | ||
424 | { | ||
425 | ide_hwif_t *hwif = drive->hwif; | ||
426 | struct request *rq = hwif->hwgroup->rq; | ||
427 | unsigned int reading; | ||
428 | u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0; | ||
429 | u8 dma_stat; | ||
430 | |||
431 | if (rq_data_dir(rq)) | ||
432 | reading = 0; | ||
433 | else | ||
434 | reading = 1 << 3; | ||
435 | |||
436 | /* fall back to pio! */ | ||
437 | if (!ide_build_dmatable(drive, rq)) { | ||
438 | ide_map_sg(drive, rq); | ||
439 | return 1; | ||
440 | } | ||
441 | |||
442 | /* PRD table */ | ||
443 | if (hwif->host_flags & IDE_HFLAG_MMIO) | ||
444 | writel(hwif->dmatable_dma, | ||
445 | (void __iomem *)(hwif->dma_base + ATA_DMA_TABLE_OFS)); | ||
446 | else | ||
447 | outl(hwif->dmatable_dma, hwif->dma_base + ATA_DMA_TABLE_OFS); | ||
448 | |||
449 | /* specify r/w */ | ||
450 | if (mmio) | ||
451 | writeb(reading, (void __iomem *)(hwif->dma_base + ATA_DMA_CMD)); | ||
452 | else | ||
453 | outb(reading, hwif->dma_base + ATA_DMA_CMD); | ||
454 | |||
455 | /* read DMA status for INTR & ERROR flags */ | ||
456 | dma_stat = hwif->tp_ops->read_sff_dma_status(hwif); | ||
457 | |||
458 | /* clear INTR & ERROR flags */ | ||
459 | if (mmio) | ||
460 | writeb(dma_stat | 6, | ||
461 | (void __iomem *)(hwif->dma_base + ATA_DMA_STATUS)); | ||
462 | else | ||
463 | outb(dma_stat | 6, hwif->dma_base + ATA_DMA_STATUS); | ||
464 | |||
465 | drive->waiting_for_dma = 1; | ||
466 | return 0; | ||
467 | } | ||
468 | EXPORT_SYMBOL_GPL(ide_dma_setup); | ||
469 | |||
470 | void ide_dma_exec_cmd(ide_drive_t *drive, u8 command) | ||
471 | { | ||
472 | /* issue cmd to drive */ | ||
473 | ide_execute_command(drive, command, &ide_dma_intr, 2 * WAIT_CMD, | ||
474 | dma_timer_expiry); | ||
475 | } | ||
476 | EXPORT_SYMBOL_GPL(ide_dma_exec_cmd); | ||
477 | |||
478 | void ide_dma_start(ide_drive_t *drive) | ||
479 | { | ||
480 | ide_hwif_t *hwif = drive->hwif; | ||
481 | u8 dma_cmd; | ||
482 | |||
483 | /* Note that this is done *after* the cmd has | ||
484 | * been issued to the drive, as per the BM-IDE spec. | ||
485 | * The Promise Ultra33 doesn't work correctly when | ||
486 | * we do this part before issuing the drive cmd. | ||
487 | */ | ||
488 | if (hwif->host_flags & IDE_HFLAG_MMIO) { | ||
489 | dma_cmd = readb((void __iomem *)(hwif->dma_base + ATA_DMA_CMD)); | ||
490 | /* start DMA */ | ||
491 | writeb(dma_cmd | 1, | ||
492 | (void __iomem *)(hwif->dma_base + ATA_DMA_CMD)); | ||
493 | } else { | ||
494 | dma_cmd = inb(hwif->dma_base + ATA_DMA_CMD); | ||
495 | outb(dma_cmd | 1, hwif->dma_base + ATA_DMA_CMD); | ||
496 | } | ||
497 | |||
498 | wmb(); | ||
499 | } | ||
500 | EXPORT_SYMBOL_GPL(ide_dma_start); | ||
501 | |||
502 | /* returns 1 on error, 0 otherwise */ | ||
503 | int ide_dma_end(ide_drive_t *drive) | ||
504 | { | ||
505 | ide_hwif_t *hwif = drive->hwif; | ||
506 | u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0; | ||
507 | u8 dma_stat = 0, dma_cmd = 0; | ||
508 | |||
509 | drive->waiting_for_dma = 0; | ||
510 | |||
511 | if (mmio) { | ||
512 | /* get DMA command mode */ | ||
513 | dma_cmd = readb((void __iomem *)(hwif->dma_base + ATA_DMA_CMD)); | ||
514 | /* stop DMA */ | ||
515 | writeb(dma_cmd & ~1, | ||
516 | (void __iomem *)(hwif->dma_base + ATA_DMA_CMD)); | ||
517 | } else { | ||
518 | dma_cmd = inb(hwif->dma_base + ATA_DMA_CMD); | ||
519 | outb(dma_cmd & ~1, hwif->dma_base + ATA_DMA_CMD); | ||
520 | } | ||
521 | |||
522 | /* get DMA status */ | ||
523 | dma_stat = hwif->tp_ops->read_sff_dma_status(hwif); | ||
524 | |||
525 | if (mmio) | ||
526 | /* clear the INTR & ERROR bits */ | ||
527 | writeb(dma_stat | 6, | ||
528 | (void __iomem *)(hwif->dma_base + ATA_DMA_STATUS)); | ||
529 | else | ||
530 | outb(dma_stat | 6, hwif->dma_base + ATA_DMA_STATUS); | ||
531 | |||
532 | /* purge DMA mappings */ | ||
533 | ide_destroy_dmatable(drive); | ||
534 | /* verify good DMA status */ | ||
535 | wmb(); | ||
536 | return (dma_stat & 7) != 4 ? (0x10 | dma_stat) : 0; | ||
537 | } | ||
538 | EXPORT_SYMBOL_GPL(ide_dma_end); | ||
539 | |||
540 | /* returns 1 if dma irq issued, 0 otherwise */ | ||
541 | int ide_dma_test_irq(ide_drive_t *drive) | ||
542 | { | ||
543 | ide_hwif_t *hwif = drive->hwif; | ||
544 | u8 dma_stat = hwif->tp_ops->read_sff_dma_status(hwif); | ||
545 | |||
546 | /* return 1 if INTR asserted */ | ||
547 | if ((dma_stat & 4) == 4) | ||
548 | return 1; | ||
549 | |||
550 | return 0; | ||
551 | } | ||
552 | EXPORT_SYMBOL_GPL(ide_dma_test_irq); | ||
553 | #else | ||
554 | static inline int config_drive_for_dma(ide_drive_t *drive) { return 0; } | ||
555 | #endif /* CONFIG_BLK_DEV_IDEDMA_SFF */ | ||
556 | |||
557 | int __ide_dma_bad_drive(ide_drive_t *drive) | 210 | int __ide_dma_bad_drive(ide_drive_t *drive) |
558 | { | 211 | { |
559 | u16 *id = drive->id; | 212 | u16 *id = drive->id; |
@@ -846,17 +499,3 @@ int ide_allocate_dma_engine(ide_hwif_t *hwif) | |||
846 | return 0; | 499 | return 0; |
847 | } | 500 | } |
848 | EXPORT_SYMBOL_GPL(ide_allocate_dma_engine); | 501 | EXPORT_SYMBOL_GPL(ide_allocate_dma_engine); |
849 | |||
850 | #ifdef CONFIG_BLK_DEV_IDEDMA_SFF | ||
851 | const struct ide_dma_ops sff_dma_ops = { | ||
852 | .dma_host_set = ide_dma_host_set, | ||
853 | .dma_setup = ide_dma_setup, | ||
854 | .dma_exec_cmd = ide_dma_exec_cmd, | ||
855 | .dma_start = ide_dma_start, | ||
856 | .dma_end = ide_dma_end, | ||
857 | .dma_test_irq = ide_dma_test_irq, | ||
858 | .dma_timeout = ide_dma_timeout, | ||
859 | .dma_lost_irq = ide_dma_lost_irq, | ||
860 | }; | ||
861 | EXPORT_SYMBOL_GPL(sff_dma_ops); | ||
862 | #endif /* CONFIG_BLK_DEV_IDEDMA_SFF */ | ||