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authorManuel Lauss <manuel.lauss@googlemail.com>2011-08-18 05:11:58 -0400
committerRalf Baechle <ralf@linux-mips.org>2011-10-24 18:34:24 -0400
commitd4f07ae748539d792162a9aa56f192c3992cb3fb (patch)
tree6f87cb57e87ebc4a76fa377633da00d404ac652e /drivers/ide/au1xxx-ide.c
parent7517de348663b08a808aff44b5300e817157a568 (diff)
MIPS, IDE: Alchem, au1xxx-ide: Remove pb1200/db1200 header dep
au1xxx-ide uses defines from the pb1200/db1200 headers: get DBDMA ID through platform resource information, hardcode register spacing. The only 2 users of this driver (and the only boards it can really work on realiably) use the same register layout. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> Cc: linux-ide@vger.kernel.org To: Linux-MIPS <linux-mips@linux-mips.org> Cc: linux-ide@vger.kernel.org Acked-by: David S. Miller <davem@davemloft.net> Patchwork: https://patchwork.linux-mips.org/patch/2716/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'drivers/ide/au1xxx-ide.c')
-rw-r--r--drivers/ide/au1xxx-ide.c44
1 files changed, 26 insertions, 18 deletions
diff --git a/drivers/ide/au1xxx-ide.c b/drivers/ide/au1xxx-ide.c
index b26c23416fa7..c7783733f3c3 100644
--- a/drivers/ide/au1xxx-ide.c
+++ b/drivers/ide/au1xxx-ide.c
@@ -43,6 +43,10 @@
43#define DRV_NAME "au1200-ide" 43#define DRV_NAME "au1200-ide"
44#define DRV_AUTHOR "Enrico Walther <enrico.walther@amd.com> / Pete Popov <ppopov@embeddedalley.com>" 44#define DRV_AUTHOR "Enrico Walther <enrico.walther@amd.com> / Pete Popov <ppopov@embeddedalley.com>"
45 45
46#ifndef IDE_REG_SHIFT
47#define IDE_REG_SHIFT 5
48#endif
49
46/* enable the burstmode in the dbdma */ 50/* enable the burstmode in the dbdma */
47#define IDE_AU1XXX_BURSTMODE 1 51#define IDE_AU1XXX_BURSTMODE 1
48 52
@@ -317,10 +321,11 @@ static void auide_ddma_rx_callback(int irq, void *param)
317} 321}
318#endif /* end CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA */ 322#endif /* end CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA */
319 323
320static void auide_init_dbdma_dev(dbdev_tab_t *dev, u32 dev_id, u32 tsize, u32 devwidth, u32 flags) 324static void auide_init_dbdma_dev(dbdev_tab_t *dev, u32 dev_id, u32 tsize,
325 u32 devwidth, u32 flags, u32 regbase)
321{ 326{
322 dev->dev_id = dev_id; 327 dev->dev_id = dev_id;
323 dev->dev_physaddr = (u32)IDE_PHYS_ADDR; 328 dev->dev_physaddr = CPHYSADDR(regbase);
324 dev->dev_intlevel = 0; 329 dev->dev_intlevel = 0;
325 dev->dev_intpolarity = 0; 330 dev->dev_intpolarity = 0;
326 dev->dev_tsize = tsize; 331 dev->dev_tsize = tsize;
@@ -344,7 +349,7 @@ static int auide_ddma_init(ide_hwif_t *hwif, const struct ide_port_info *d)
344 dbdev_tab_t source_dev_tab, target_dev_tab; 349 dbdev_tab_t source_dev_tab, target_dev_tab;
345 u32 dev_id, tsize, devwidth, flags; 350 u32 dev_id, tsize, devwidth, flags;
346 351
347 dev_id = IDE_DDMA_REQ; 352 dev_id = hwif->ddma_id;
348 353
349 tsize = 8; /* 1 */ 354 tsize = 8; /* 1 */
350 devwidth = 32; /* 16 */ 355 devwidth = 32; /* 16 */
@@ -356,20 +361,17 @@ static int auide_ddma_init(ide_hwif_t *hwif, const struct ide_port_info *d)
356#endif 361#endif
357 362
358 /* setup dev_tab for tx channel */ 363 /* setup dev_tab for tx channel */
359 auide_init_dbdma_dev( &source_dev_tab, 364 auide_init_dbdma_dev(&source_dev_tab, dev_id, tsize, devwidth,
360 dev_id, 365 DEV_FLAGS_OUT | flags, auide->regbase);
361 tsize, devwidth, DEV_FLAGS_OUT | flags);
362 auide->tx_dev_id = au1xxx_ddma_add_device( &source_dev_tab ); 366 auide->tx_dev_id = au1xxx_ddma_add_device( &source_dev_tab );
363 367
364 auide_init_dbdma_dev( &source_dev_tab, 368 auide_init_dbdma_dev(&source_dev_tab, dev_id, tsize, devwidth,
365 dev_id, 369 DEV_FLAGS_IN | flags, auide->regbase);
366 tsize, devwidth, DEV_FLAGS_IN | flags);
367 auide->rx_dev_id = au1xxx_ddma_add_device( &source_dev_tab ); 370 auide->rx_dev_id = au1xxx_ddma_add_device( &source_dev_tab );
368 371
369 /* We also need to add a target device for the DMA */ 372 /* We also need to add a target device for the DMA */
370 auide_init_dbdma_dev( &target_dev_tab, 373 auide_init_dbdma_dev(&target_dev_tab, (u32)DSCR_CMD0_ALWAYS, tsize,
371 (u32)DSCR_CMD0_ALWAYS, 374 devwidth, DEV_FLAGS_ANYUSE, auide->regbase);
372 tsize, devwidth, DEV_FLAGS_ANYUSE);
373 auide->target_dev_id = au1xxx_ddma_add_device(&target_dev_tab); 375 auide->target_dev_id = au1xxx_ddma_add_device(&target_dev_tab);
374 376
375 /* Get a channel for TX */ 377 /* Get a channel for TX */
@@ -411,14 +413,12 @@ static int auide_ddma_init(ide_hwif_t *hwif, const struct ide_port_info *d)
411#endif 413#endif
412 414
413 /* setup dev_tab for tx channel */ 415 /* setup dev_tab for tx channel */
414 auide_init_dbdma_dev( &source_dev_tab, 416 auide_init_dbdma_dev(&source_dev_tab, (u32)DSCR_CMD0_ALWAYS, 8, 32,
415 (u32)DSCR_CMD0_ALWAYS, 417 DEV_FLAGS_OUT | flags, auide->regbase);
416 8, 32, DEV_FLAGS_OUT | flags);
417 auide->tx_dev_id = au1xxx_ddma_add_device( &source_dev_tab ); 418 auide->tx_dev_id = au1xxx_ddma_add_device( &source_dev_tab );
418 419
419 auide_init_dbdma_dev( &source_dev_tab, 420 auide_init_dbdma_dev(&source_dev_tab, (u32)DSCR_CMD0_ALWAYS, 8, 32,
420 (u32)DSCR_CMD0_ALWAYS, 421 DEV_FLAGS_IN | flags, auide->regbase);
421 8, 32, DEV_FLAGS_IN | flags);
422 auide->rx_dev_id = au1xxx_ddma_add_device( &source_dev_tab ); 422 auide->rx_dev_id = au1xxx_ddma_add_device( &source_dev_tab );
423 423
424 /* Get a channel for TX */ 424 /* Get a channel for TX */
@@ -540,6 +540,14 @@ static int au_ide_probe(struct platform_device *dev)
540 goto out; 540 goto out;
541 } 541 }
542 542
543 res = platform_get_resource(dev, IORESOURCE_DMA, 0);
544 if (!res) {
545 pr_debug("%s: no DDMA ID resource\n", DRV_NAME);
546 ret = -ENODEV;
547 goto out;
548 }
549 ahwif->ddma_id = res->start;
550
543 memset(&hw, 0, sizeof(hw)); 551 memset(&hw, 0, sizeof(hw));
544 auide_setup_ports(&hw, ahwif); 552 auide_setup_ports(&hw, ahwif);
545 hw.irq = ahwif->irq; 553 hw.irq = ahwif->irq;