diff options
author | Arnd Bergmann <arnd@arndb.de> | 2012-11-12 16:18:43 -0500 |
---|---|---|
committer | Arnd Bergmann <arnd@arndb.de> | 2012-11-13 04:14:38 -0500 |
commit | b5932cc839d809a07a43b93555ccc3fbabc2a766 (patch) | |
tree | 528d7a0b3353c08ec7461dee80d7d3151061dc07 /drivers/i2c | |
parent | a5434fc9e2ad9bac545f058a24b284c051a1faae (diff) | |
parent | 16cf8a80a8f0f4757427b17cdfb6c4897674db68 (diff) |
Merge branch 'cleanups/dma' into next/cleanup
Separate patches from Marek Szyprowski <m.szyprowski@samsung.com>:
Commit e9da6e9905e639b0 ("ARM: dma-mapping: remove custom consistent dma
region") replaced custom consistent memory handling, so setting
consistent dma memory size is not longer required. This patch series
cleans sub-architecture platform code to remove all calls to the
obsolated init_consistent_dma_size() function and finally removes the
init_consistent_dma_size() stub itself.
* cleanups/dma:
ARM: at91: remove obsoleted init_consistent_dma_size()
ARM: u300: remove obsoleted init_consistent_dma_size()
ARM: dma-mapping: remove init_consistent_dma_size() stub
ARM: shmobile: remove obsoleted init_consistent_dma_size()
ARM: davinci: remove obsoleted init_consistent_dma_size()
ARM: samsung: remove obsoleted init_consistent_dma_size()
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'drivers/i2c')
-rw-r--r-- | drivers/i2c/Makefile | 1 | ||||
-rw-r--r-- | drivers/i2c/busses/Kconfig | 1 | ||||
-rw-r--r-- | drivers/i2c/busses/Makefile | 1 | ||||
-rw-r--r-- | drivers/i2c/busses/i2c-i801.c | 11 | ||||
-rw-r--r-- | drivers/i2c/busses/i2c-mxs.c | 186 | ||||
-rw-r--r-- | drivers/i2c/busses/i2c-nomadik.c | 9 | ||||
-rw-r--r-- | drivers/i2c/busses/i2c-tegra.c | 2 | ||||
-rw-r--r-- | drivers/i2c/i2c-stub.c (renamed from drivers/i2c/busses/i2c-stub.c) | 66 |
8 files changed, 62 insertions, 215 deletions
diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile index beee6b2d361d..1722f50f2473 100644 --- a/drivers/i2c/Makefile +++ b/drivers/i2c/Makefile | |||
@@ -8,6 +8,7 @@ obj-$(CONFIG_I2C_SMBUS) += i2c-smbus.o | |||
8 | obj-$(CONFIG_I2C_CHARDEV) += i2c-dev.o | 8 | obj-$(CONFIG_I2C_CHARDEV) += i2c-dev.o |
9 | obj-$(CONFIG_I2C_MUX) += i2c-mux.o | 9 | obj-$(CONFIG_I2C_MUX) += i2c-mux.o |
10 | obj-y += algos/ busses/ muxes/ | 10 | obj-y += algos/ busses/ muxes/ |
11 | obj-$(CONFIG_I2C_STUB) += i2c-stub.o | ||
11 | 12 | ||
12 | ccflags-$(CONFIG_I2C_DEBUG_CORE) := -DDEBUG | 13 | ccflags-$(CONFIG_I2C_DEBUG_CORE) := -DDEBUG |
13 | CFLAGS_i2c-core.o := -Wno-deprecated-declarations | 14 | CFLAGS_i2c-core.o := -Wno-deprecated-declarations |
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig index 65dd599a0262..e9df4612b7eb 100644 --- a/drivers/i2c/busses/Kconfig +++ b/drivers/i2c/busses/Kconfig | |||
@@ -81,7 +81,6 @@ config I2C_I801 | |||
81 | tristate "Intel 82801 (ICH/PCH)" | 81 | tristate "Intel 82801 (ICH/PCH)" |
82 | depends on PCI | 82 | depends on PCI |
83 | select CHECK_SIGNATURE if X86 && DMI | 83 | select CHECK_SIGNATURE if X86 && DMI |
84 | select GPIOLIB if I2C_MUX | ||
85 | help | 84 | help |
86 | If you say yes to this option, support will be included for the Intel | 85 | If you say yes to this option, support will be included for the Intel |
87 | 801 family of mainboard I2C interfaces. Specifically, the following | 86 | 801 family of mainboard I2C interfaces. Specifically, the following |
diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile index 2d33d62952c1..395b516ffa08 100644 --- a/drivers/i2c/busses/Makefile +++ b/drivers/i2c/busses/Makefile | |||
@@ -85,7 +85,6 @@ obj-$(CONFIG_I2C_ACORN) += i2c-acorn.o | |||
85 | obj-$(CONFIG_I2C_ELEKTOR) += i2c-elektor.o | 85 | obj-$(CONFIG_I2C_ELEKTOR) += i2c-elektor.o |
86 | obj-$(CONFIG_I2C_PCA_ISA) += i2c-pca-isa.o | 86 | obj-$(CONFIG_I2C_PCA_ISA) += i2c-pca-isa.o |
87 | obj-$(CONFIG_I2C_SIBYTE) += i2c-sibyte.o | 87 | obj-$(CONFIG_I2C_SIBYTE) += i2c-sibyte.o |
88 | obj-$(CONFIG_I2C_STUB) += i2c-stub.o | ||
89 | obj-$(CONFIG_SCx200_ACB) += scx200_acb.o | 88 | obj-$(CONFIG_SCx200_ACB) += scx200_acb.o |
90 | obj-$(CONFIG_SCx200_I2C) += scx200_i2c.o | 89 | obj-$(CONFIG_SCx200_I2C) += scx200_i2c.o |
91 | 90 | ||
diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c index 37793156bd93..6abc00d59881 100644 --- a/drivers/i2c/busses/i2c-i801.c +++ b/drivers/i2c/busses/i2c-i801.c | |||
@@ -82,7 +82,8 @@ | |||
82 | #include <linux/wait.h> | 82 | #include <linux/wait.h> |
83 | #include <linux/err.h> | 83 | #include <linux/err.h> |
84 | 84 | ||
85 | #if defined CONFIG_I2C_MUX || defined CONFIG_I2C_MUX_MODULE | 85 | #if (defined CONFIG_I2C_MUX_GPIO || defined CONFIG_I2C_MUX_GPIO_MODULE) && \ |
86 | defined CONFIG_DMI | ||
86 | #include <linux/gpio.h> | 87 | #include <linux/gpio.h> |
87 | #include <linux/i2c-mux-gpio.h> | 88 | #include <linux/i2c-mux-gpio.h> |
88 | #include <linux/platform_device.h> | 89 | #include <linux/platform_device.h> |
@@ -192,7 +193,8 @@ struct i801_priv { | |||
192 | int len; | 193 | int len; |
193 | u8 *data; | 194 | u8 *data; |
194 | 195 | ||
195 | #if defined CONFIG_I2C_MUX || defined CONFIG_I2C_MUX_MODULE | 196 | #if (defined CONFIG_I2C_MUX_GPIO || defined CONFIG_I2C_MUX_GPIO_MODULE) && \ |
197 | defined CONFIG_DMI | ||
196 | const struct i801_mux_config *mux_drvdata; | 198 | const struct i801_mux_config *mux_drvdata; |
197 | struct platform_device *mux_pdev; | 199 | struct platform_device *mux_pdev; |
198 | #endif | 200 | #endif |
@@ -921,7 +923,8 @@ static void __init input_apanel_init(void) {} | |||
921 | static void __devinit i801_probe_optional_slaves(struct i801_priv *priv) {} | 923 | static void __devinit i801_probe_optional_slaves(struct i801_priv *priv) {} |
922 | #endif /* CONFIG_X86 && CONFIG_DMI */ | 924 | #endif /* CONFIG_X86 && CONFIG_DMI */ |
923 | 925 | ||
924 | #if defined CONFIG_I2C_MUX || defined CONFIG_I2C_MUX_MODULE | 926 | #if (defined CONFIG_I2C_MUX_GPIO || defined CONFIG_I2C_MUX_GPIO_MODULE) && \ |
927 | defined CONFIG_DMI | ||
925 | static struct i801_mux_config i801_mux_config_asus_z8_d12 = { | 928 | static struct i801_mux_config i801_mux_config_asus_z8_d12 = { |
926 | .gpio_chip = "gpio_ich", | 929 | .gpio_chip = "gpio_ich", |
927 | .values = { 0x02, 0x03 }, | 930 | .values = { 0x02, 0x03 }, |
@@ -1059,7 +1062,7 @@ static unsigned int __devinit i801_get_adapter_class(struct i801_priv *priv) | |||
1059 | 1062 | ||
1060 | id = dmi_first_match(mux_dmi_table); | 1063 | id = dmi_first_match(mux_dmi_table); |
1061 | if (id) { | 1064 | if (id) { |
1062 | /* Remove from branch classes from trunk */ | 1065 | /* Remove branch classes from trunk */ |
1063 | mux_config = id->driver_data; | 1066 | mux_config = id->driver_data; |
1064 | for (i = 0; i < mux_config->n_values; i++) | 1067 | for (i = 0; i < mux_config->n_values; i++) |
1065 | class &= ~mux_config->classes[i]; | 1068 | class &= ~mux_config->classes[i]; |
diff --git a/drivers/i2c/busses/i2c-mxs.c b/drivers/i2c/busses/i2c-mxs.c index 1f58197062cf..286ca1917820 100644 --- a/drivers/i2c/busses/i2c-mxs.c +++ b/drivers/i2c/busses/i2c-mxs.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * Freescale MXS I2C bus driver | 2 | * Freescale MXS I2C bus driver |
3 | * | 3 | * |
4 | * Copyright (C) 2011 Wolfram Sang, Pengutronix e.K. | 4 | * Copyright (C) 2011-2012 Wolfram Sang, Pengutronix e.K. |
5 | * | 5 | * |
6 | * based on a (non-working) driver which was: | 6 | * based on a (non-working) driver which was: |
7 | * | 7 | * |
@@ -35,10 +35,6 @@ | |||
35 | 35 | ||
36 | #define DRIVER_NAME "mxs-i2c" | 36 | #define DRIVER_NAME "mxs-i2c" |
37 | 37 | ||
38 | static bool use_pioqueue; | ||
39 | module_param(use_pioqueue, bool, 0); | ||
40 | MODULE_PARM_DESC(use_pioqueue, "Use PIOQUEUE mode for transfer instead of DMA"); | ||
41 | |||
42 | #define MXS_I2C_CTRL0 (0x00) | 38 | #define MXS_I2C_CTRL0 (0x00) |
43 | #define MXS_I2C_CTRL0_SET (0x04) | 39 | #define MXS_I2C_CTRL0_SET (0x04) |
44 | 40 | ||
@@ -75,23 +71,6 @@ MODULE_PARM_DESC(use_pioqueue, "Use PIOQUEUE mode for transfer instead of DMA"); | |||
75 | MXS_I2C_CTRL1_SLAVE_STOP_IRQ | \ | 71 | MXS_I2C_CTRL1_SLAVE_STOP_IRQ | \ |
76 | MXS_I2C_CTRL1_SLAVE_IRQ) | 72 | MXS_I2C_CTRL1_SLAVE_IRQ) |
77 | 73 | ||
78 | #define MXS_I2C_QUEUECTRL (0x60) | ||
79 | #define MXS_I2C_QUEUECTRL_SET (0x64) | ||
80 | #define MXS_I2C_QUEUECTRL_CLR (0x68) | ||
81 | |||
82 | #define MXS_I2C_QUEUECTRL_QUEUE_RUN 0x20 | ||
83 | #define MXS_I2C_QUEUECTRL_PIO_QUEUE_MODE 0x04 | ||
84 | |||
85 | #define MXS_I2C_QUEUESTAT (0x70) | ||
86 | #define MXS_I2C_QUEUESTAT_RD_QUEUE_EMPTY 0x00002000 | ||
87 | #define MXS_I2C_QUEUESTAT_WRITE_QUEUE_CNT_MASK 0x0000001F | ||
88 | |||
89 | #define MXS_I2C_QUEUECMD (0x80) | ||
90 | |||
91 | #define MXS_I2C_QUEUEDATA (0x90) | ||
92 | |||
93 | #define MXS_I2C_DATA (0xa0) | ||
94 | |||
95 | 74 | ||
96 | #define MXS_CMD_I2C_SELECT (MXS_I2C_CTRL0_RETAIN_CLOCK | \ | 75 | #define MXS_CMD_I2C_SELECT (MXS_I2C_CTRL0_RETAIN_CLOCK | \ |
97 | MXS_I2C_CTRL0_PRE_SEND_START | \ | 76 | MXS_I2C_CTRL0_PRE_SEND_START | \ |
@@ -153,7 +132,6 @@ struct mxs_i2c_dev { | |||
153 | const struct mxs_i2c_speed_config *speed; | 132 | const struct mxs_i2c_speed_config *speed; |
154 | 133 | ||
155 | /* DMA support components */ | 134 | /* DMA support components */ |
156 | bool dma_mode; | ||
157 | int dma_channel; | 135 | int dma_channel; |
158 | struct dma_chan *dmach; | 136 | struct dma_chan *dmach; |
159 | struct mxs_dma_data dma_data; | 137 | struct mxs_dma_data dma_data; |
@@ -172,99 +150,6 @@ static void mxs_i2c_reset(struct mxs_i2c_dev *i2c) | |||
172 | writel(i2c->speed->timing2, i2c->regs + MXS_I2C_TIMING2); | 150 | writel(i2c->speed->timing2, i2c->regs + MXS_I2C_TIMING2); |
173 | 151 | ||
174 | writel(MXS_I2C_IRQ_MASK << 8, i2c->regs + MXS_I2C_CTRL1_SET); | 152 | writel(MXS_I2C_IRQ_MASK << 8, i2c->regs + MXS_I2C_CTRL1_SET); |
175 | if (i2c->dma_mode) | ||
176 | writel(MXS_I2C_QUEUECTRL_PIO_QUEUE_MODE, | ||
177 | i2c->regs + MXS_I2C_QUEUECTRL_CLR); | ||
178 | else | ||
179 | writel(MXS_I2C_QUEUECTRL_PIO_QUEUE_MODE, | ||
180 | i2c->regs + MXS_I2C_QUEUECTRL_SET); | ||
181 | } | ||
182 | |||
183 | static void mxs_i2c_pioq_setup_read(struct mxs_i2c_dev *i2c, u8 addr, int len, | ||
184 | int flags) | ||
185 | { | ||
186 | u32 data; | ||
187 | |||
188 | writel(MXS_CMD_I2C_SELECT, i2c->regs + MXS_I2C_QUEUECMD); | ||
189 | |||
190 | data = (addr << 1) | I2C_SMBUS_READ; | ||
191 | writel(data, i2c->regs + MXS_I2C_DATA); | ||
192 | |||
193 | data = MXS_CMD_I2C_READ | MXS_I2C_CTRL0_XFER_COUNT(len) | flags; | ||
194 | writel(data, i2c->regs + MXS_I2C_QUEUECMD); | ||
195 | } | ||
196 | |||
197 | static void mxs_i2c_pioq_setup_write(struct mxs_i2c_dev *i2c, | ||
198 | u8 addr, u8 *buf, int len, int flags) | ||
199 | { | ||
200 | u32 data; | ||
201 | int i, shifts_left; | ||
202 | |||
203 | data = MXS_CMD_I2C_WRITE | MXS_I2C_CTRL0_XFER_COUNT(len + 1) | flags; | ||
204 | writel(data, i2c->regs + MXS_I2C_QUEUECMD); | ||
205 | |||
206 | /* | ||
207 | * We have to copy the slave address (u8) and buffer (arbitrary number | ||
208 | * of u8) into the data register (u32). To achieve that, the u8 are put | ||
209 | * into the MSBs of 'data' which is then shifted for the next u8. When | ||
210 | * appropriate, 'data' is written to MXS_I2C_DATA. So, the first u32 | ||
211 | * looks like this: | ||
212 | * | ||
213 | * 3 2 1 0 | ||
214 | * 10987654|32109876|54321098|76543210 | ||
215 | * --------+--------+--------+-------- | ||
216 | * buffer+2|buffer+1|buffer+0|slave_addr | ||
217 | */ | ||
218 | |||
219 | data = ((addr << 1) | I2C_SMBUS_WRITE) << 24; | ||
220 | |||
221 | for (i = 0; i < len; i++) { | ||
222 | data >>= 8; | ||
223 | data |= buf[i] << 24; | ||
224 | if ((i & 3) == 2) | ||
225 | writel(data, i2c->regs + MXS_I2C_DATA); | ||
226 | } | ||
227 | |||
228 | /* Write out the remaining bytes if any */ | ||
229 | shifts_left = 24 - (i & 3) * 8; | ||
230 | if (shifts_left) | ||
231 | writel(data >> shifts_left, i2c->regs + MXS_I2C_DATA); | ||
232 | } | ||
233 | |||
234 | /* | ||
235 | * TODO: should be replaceable with a waitqueue and RD_QUEUE_IRQ (setting the | ||
236 | * rd_threshold to 1). Couldn't get this to work, though. | ||
237 | */ | ||
238 | static int mxs_i2c_wait_for_data(struct mxs_i2c_dev *i2c) | ||
239 | { | ||
240 | unsigned long timeout = jiffies + msecs_to_jiffies(1000); | ||
241 | |||
242 | while (readl(i2c->regs + MXS_I2C_QUEUESTAT) | ||
243 | & MXS_I2C_QUEUESTAT_RD_QUEUE_EMPTY) { | ||
244 | if (time_after(jiffies, timeout)) | ||
245 | return -ETIMEDOUT; | ||
246 | cond_resched(); | ||
247 | } | ||
248 | |||
249 | return 0; | ||
250 | } | ||
251 | |||
252 | static int mxs_i2c_finish_read(struct mxs_i2c_dev *i2c, u8 *buf, int len) | ||
253 | { | ||
254 | u32 uninitialized_var(data); | ||
255 | int i; | ||
256 | |||
257 | for (i = 0; i < len; i++) { | ||
258 | if ((i & 3) == 0) { | ||
259 | if (mxs_i2c_wait_for_data(i2c)) | ||
260 | return -ETIMEDOUT; | ||
261 | data = readl(i2c->regs + MXS_I2C_QUEUEDATA); | ||
262 | } | ||
263 | buf[i] = data & 0xff; | ||
264 | data >>= 8; | ||
265 | } | ||
266 | |||
267 | return 0; | ||
268 | } | 153 | } |
269 | 154 | ||
270 | static void mxs_i2c_dma_finish(struct mxs_i2c_dev *i2c) | 155 | static void mxs_i2c_dma_finish(struct mxs_i2c_dev *i2c) |
@@ -432,39 +317,17 @@ static int mxs_i2c_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg, | |||
432 | init_completion(&i2c->cmd_complete); | 317 | init_completion(&i2c->cmd_complete); |
433 | i2c->cmd_err = 0; | 318 | i2c->cmd_err = 0; |
434 | 319 | ||
435 | if (i2c->dma_mode) { | 320 | ret = mxs_i2c_dma_setup_xfer(adap, msg, flags); |
436 | ret = mxs_i2c_dma_setup_xfer(adap, msg, flags); | 321 | if (ret) |
437 | if (ret) | 322 | return ret; |
438 | return ret; | ||
439 | } else { | ||
440 | if (msg->flags & I2C_M_RD) { | ||
441 | mxs_i2c_pioq_setup_read(i2c, msg->addr, | ||
442 | msg->len, flags); | ||
443 | } else { | ||
444 | mxs_i2c_pioq_setup_write(i2c, msg->addr, msg->buf, | ||
445 | msg->len, flags); | ||
446 | } | ||
447 | |||
448 | writel(MXS_I2C_QUEUECTRL_QUEUE_RUN, | ||
449 | i2c->regs + MXS_I2C_QUEUECTRL_SET); | ||
450 | } | ||
451 | 323 | ||
452 | ret = wait_for_completion_timeout(&i2c->cmd_complete, | 324 | ret = wait_for_completion_timeout(&i2c->cmd_complete, |
453 | msecs_to_jiffies(1000)); | 325 | msecs_to_jiffies(1000)); |
454 | if (ret == 0) | 326 | if (ret == 0) |
455 | goto timeout; | 327 | goto timeout; |
456 | 328 | ||
457 | if (!i2c->dma_mode && !i2c->cmd_err && (msg->flags & I2C_M_RD)) { | ||
458 | ret = mxs_i2c_finish_read(i2c, msg->buf, msg->len); | ||
459 | if (ret) | ||
460 | goto timeout; | ||
461 | } | ||
462 | |||
463 | if (i2c->cmd_err == -ENXIO) | 329 | if (i2c->cmd_err == -ENXIO) |
464 | mxs_i2c_reset(i2c); | 330 | mxs_i2c_reset(i2c); |
465 | else | ||
466 | writel(MXS_I2C_QUEUECTRL_QUEUE_RUN, | ||
467 | i2c->regs + MXS_I2C_QUEUECTRL_CLR); | ||
468 | 331 | ||
469 | dev_dbg(i2c->dev, "Done with err=%d\n", i2c->cmd_err); | 332 | dev_dbg(i2c->dev, "Done with err=%d\n", i2c->cmd_err); |
470 | 333 | ||
@@ -472,8 +335,7 @@ static int mxs_i2c_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg, | |||
472 | 335 | ||
473 | timeout: | 336 | timeout: |
474 | dev_dbg(i2c->dev, "Timeout!\n"); | 337 | dev_dbg(i2c->dev, "Timeout!\n"); |
475 | if (i2c->dma_mode) | 338 | mxs_i2c_dma_finish(i2c); |
476 | mxs_i2c_dma_finish(i2c); | ||
477 | mxs_i2c_reset(i2c); | 339 | mxs_i2c_reset(i2c); |
478 | return -ETIMEDOUT; | 340 | return -ETIMEDOUT; |
479 | } | 341 | } |
@@ -502,7 +364,6 @@ static irqreturn_t mxs_i2c_isr(int this_irq, void *dev_id) | |||
502 | { | 364 | { |
503 | struct mxs_i2c_dev *i2c = dev_id; | 365 | struct mxs_i2c_dev *i2c = dev_id; |
504 | u32 stat = readl(i2c->regs + MXS_I2C_CTRL1) & MXS_I2C_IRQ_MASK; | 366 | u32 stat = readl(i2c->regs + MXS_I2C_CTRL1) & MXS_I2C_IRQ_MASK; |
505 | bool is_last_cmd; | ||
506 | 367 | ||
507 | if (!stat) | 368 | if (!stat) |
508 | return IRQ_NONE; | 369 | return IRQ_NONE; |
@@ -515,14 +376,6 @@ static irqreturn_t mxs_i2c_isr(int this_irq, void *dev_id) | |||
515 | /* MXS_I2C_CTRL1_OVERSIZE_XFER_TERM_IRQ is only for slaves */ | 376 | /* MXS_I2C_CTRL1_OVERSIZE_XFER_TERM_IRQ is only for slaves */ |
516 | i2c->cmd_err = -EIO; | 377 | i2c->cmd_err = -EIO; |
517 | 378 | ||
518 | if (!i2c->dma_mode) { | ||
519 | is_last_cmd = (readl(i2c->regs + MXS_I2C_QUEUESTAT) & | ||
520 | MXS_I2C_QUEUESTAT_WRITE_QUEUE_CNT_MASK) == 0; | ||
521 | |||
522 | if (is_last_cmd || i2c->cmd_err) | ||
523 | complete(&i2c->cmd_complete); | ||
524 | } | ||
525 | |||
526 | writel(stat, i2c->regs + MXS_I2C_CTRL1_CLR); | 379 | writel(stat, i2c->regs + MXS_I2C_CTRL1_CLR); |
527 | 380 | ||
528 | return IRQ_HANDLED; | 381 | return IRQ_HANDLED; |
@@ -556,23 +409,14 @@ static int mxs_i2c_get_ofdata(struct mxs_i2c_dev *i2c) | |||
556 | int ret; | 409 | int ret; |
557 | 410 | ||
558 | /* | 411 | /* |
559 | * The MXS I2C DMA mode is prefered and enabled by default. | ||
560 | * The PIO mode is still supported, but should be used only | ||
561 | * for debuging purposes etc. | ||
562 | */ | ||
563 | i2c->dma_mode = !use_pioqueue; | ||
564 | if (!i2c->dma_mode) | ||
565 | dev_info(dev, "Using PIOQUEUE mode for I2C transfers!\n"); | ||
566 | |||
567 | /* | ||
568 | * TODO: This is a temporary solution and should be changed | 412 | * TODO: This is a temporary solution and should be changed |
569 | * to use generic DMA binding later when the helpers get in. | 413 | * to use generic DMA binding later when the helpers get in. |
570 | */ | 414 | */ |
571 | ret = of_property_read_u32(node, "fsl,i2c-dma-channel", | 415 | ret = of_property_read_u32(node, "fsl,i2c-dma-channel", |
572 | &i2c->dma_channel); | 416 | &i2c->dma_channel); |
573 | if (ret) { | 417 | if (ret) { |
574 | dev_warn(dev, "Failed to get DMA channel, using PIOQUEUE!\n"); | 418 | dev_err(dev, "Failed to get DMA channel!\n"); |
575 | i2c->dma_mode = 0; | 419 | return -ENODEV; |
576 | } | 420 | } |
577 | 421 | ||
578 | ret = of_property_read_u32(node, "clock-frequency", &speed); | 422 | ret = of_property_read_u32(node, "clock-frequency", &speed); |
@@ -634,15 +478,13 @@ static int __devinit mxs_i2c_probe(struct platform_device *pdev) | |||
634 | } | 478 | } |
635 | 479 | ||
636 | /* Setup the DMA */ | 480 | /* Setup the DMA */ |
637 | if (i2c->dma_mode) { | 481 | dma_cap_zero(mask); |
638 | dma_cap_zero(mask); | 482 | dma_cap_set(DMA_SLAVE, mask); |
639 | dma_cap_set(DMA_SLAVE, mask); | 483 | i2c->dma_data.chan_irq = dmairq; |
640 | i2c->dma_data.chan_irq = dmairq; | 484 | i2c->dmach = dma_request_channel(mask, mxs_i2c_dma_filter, i2c); |
641 | i2c->dmach = dma_request_channel(mask, mxs_i2c_dma_filter, i2c); | 485 | if (!i2c->dmach) { |
642 | if (!i2c->dmach) { | 486 | dev_err(dev, "Failed to request dma\n"); |
643 | dev_err(dev, "Failed to request dma\n"); | 487 | return -ENODEV; |
644 | return -ENODEV; | ||
645 | } | ||
646 | } | 488 | } |
647 | 489 | ||
648 | platform_set_drvdata(pdev, i2c); | 490 | platform_set_drvdata(pdev, i2c); |
diff --git a/drivers/i2c/busses/i2c-nomadik.c b/drivers/i2c/busses/i2c-nomadik.c index 698d7acb0f08..02c3115a2dfa 100644 --- a/drivers/i2c/busses/i2c-nomadik.c +++ b/drivers/i2c/busses/i2c-nomadik.c | |||
@@ -644,7 +644,11 @@ static int nmk_i2c_xfer(struct i2c_adapter *i2c_adap, | |||
644 | 644 | ||
645 | pm_runtime_get_sync(&dev->adev->dev); | 645 | pm_runtime_get_sync(&dev->adev->dev); |
646 | 646 | ||
647 | clk_enable(dev->clk); | 647 | status = clk_prepare_enable(dev->clk); |
648 | if (status) { | ||
649 | dev_err(&dev->adev->dev, "can't prepare_enable clock\n"); | ||
650 | goto out_clk; | ||
651 | } | ||
648 | 652 | ||
649 | status = init_hw(dev); | 653 | status = init_hw(dev); |
650 | if (status) | 654 | if (status) |
@@ -671,7 +675,8 @@ static int nmk_i2c_xfer(struct i2c_adapter *i2c_adap, | |||
671 | } | 675 | } |
672 | 676 | ||
673 | out: | 677 | out: |
674 | clk_disable(dev->clk); | 678 | clk_disable_unprepare(dev->clk); |
679 | out_clk: | ||
675 | pm_runtime_put_sync(&dev->adev->dev); | 680 | pm_runtime_put_sync(&dev->adev->dev); |
676 | 681 | ||
677 | dev->busy = false; | 682 | dev->busy = false; |
diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c index f981ac4e6783..dcea77bf6f50 100644 --- a/drivers/i2c/busses/i2c-tegra.c +++ b/drivers/i2c/busses/i2c-tegra.c | |||
@@ -742,7 +742,7 @@ static int __devinit tegra_i2c_probe(struct platform_device *pdev) | |||
742 | } | 742 | } |
743 | 743 | ||
744 | ret = devm_request_irq(&pdev->dev, i2c_dev->irq, | 744 | ret = devm_request_irq(&pdev->dev, i2c_dev->irq, |
745 | tegra_i2c_isr, 0, pdev->name, i2c_dev); | 745 | tegra_i2c_isr, 0, dev_name(&pdev->dev), i2c_dev); |
746 | if (ret) { | 746 | if (ret) { |
747 | dev_err(&pdev->dev, "Failed to request irq %i\n", i2c_dev->irq); | 747 | dev_err(&pdev->dev, "Failed to request irq %i\n", i2c_dev->irq); |
748 | return ret; | 748 | return ret; |
diff --git a/drivers/i2c/busses/i2c-stub.c b/drivers/i2c/i2c-stub.c index b1b3447942c9..d0a9c590c3cd 100644 --- a/drivers/i2c/busses/i2c-stub.c +++ b/drivers/i2c/i2c-stub.c | |||
@@ -2,7 +2,7 @@ | |||
2 | i2c-stub.c - I2C/SMBus chip emulator | 2 | i2c-stub.c - I2C/SMBus chip emulator |
3 | 3 | ||
4 | Copyright (c) 2004 Mark M. Hoffman <mhoffman@lightlink.com> | 4 | Copyright (c) 2004 Mark M. Hoffman <mhoffman@lightlink.com> |
5 | Copyright (C) 2007 Jean Delvare <khali@linux-fr.org> | 5 | Copyright (C) 2007, 2012 Jean Delvare <khali@linux-fr.org> |
6 | 6 | ||
7 | This program is free software; you can redistribute it and/or modify | 7 | This program is free software; you can redistribute it and/or modify |
8 | it under the terms of the GNU General Public License as published by | 8 | it under the terms of the GNU General Public License as published by |
@@ -51,8 +51,8 @@ struct stub_chip { | |||
51 | static struct stub_chip *stub_chips; | 51 | static struct stub_chip *stub_chips; |
52 | 52 | ||
53 | /* Return negative errno on error. */ | 53 | /* Return negative errno on error. */ |
54 | static s32 stub_xfer(struct i2c_adapter * adap, u16 addr, unsigned short flags, | 54 | static s32 stub_xfer(struct i2c_adapter *adap, u16 addr, unsigned short flags, |
55 | char read_write, u8 command, int size, union i2c_smbus_data * data) | 55 | char read_write, u8 command, int size, union i2c_smbus_data *data) |
56 | { | 56 | { |
57 | s32 ret; | 57 | s32 ret; |
58 | int i, len; | 58 | int i, len; |
@@ -78,14 +78,14 @@ static s32 stub_xfer(struct i2c_adapter * adap, u16 addr, unsigned short flags, | |||
78 | case I2C_SMBUS_BYTE: | 78 | case I2C_SMBUS_BYTE: |
79 | if (read_write == I2C_SMBUS_WRITE) { | 79 | if (read_write == I2C_SMBUS_WRITE) { |
80 | chip->pointer = command; | 80 | chip->pointer = command; |
81 | dev_dbg(&adap->dev, "smbus byte - addr 0x%02x, " | 81 | dev_dbg(&adap->dev, |
82 | "wrote 0x%02x.\n", | 82 | "smbus byte - addr 0x%02x, wrote 0x%02x.\n", |
83 | addr, command); | 83 | addr, command); |
84 | } else { | 84 | } else { |
85 | data->byte = chip->words[chip->pointer++] & 0xff; | 85 | data->byte = chip->words[chip->pointer++] & 0xff; |
86 | dev_dbg(&adap->dev, "smbus byte - addr 0x%02x, " | 86 | dev_dbg(&adap->dev, |
87 | "read 0x%02x.\n", | 87 | "smbus byte - addr 0x%02x, read 0x%02x.\n", |
88 | addr, data->byte); | 88 | addr, data->byte); |
89 | } | 89 | } |
90 | 90 | ||
91 | ret = 0; | 91 | ret = 0; |
@@ -95,14 +95,14 @@ static s32 stub_xfer(struct i2c_adapter * adap, u16 addr, unsigned short flags, | |||
95 | if (read_write == I2C_SMBUS_WRITE) { | 95 | if (read_write == I2C_SMBUS_WRITE) { |
96 | chip->words[command] &= 0xff00; | 96 | chip->words[command] &= 0xff00; |
97 | chip->words[command] |= data->byte; | 97 | chip->words[command] |= data->byte; |
98 | dev_dbg(&adap->dev, "smbus byte data - addr 0x%02x, " | 98 | dev_dbg(&adap->dev, |
99 | "wrote 0x%02x at 0x%02x.\n", | 99 | "smbus byte data - addr 0x%02x, wrote 0x%02x at 0x%02x.\n", |
100 | addr, data->byte, command); | 100 | addr, data->byte, command); |
101 | } else { | 101 | } else { |
102 | data->byte = chip->words[command] & 0xff; | 102 | data->byte = chip->words[command] & 0xff; |
103 | dev_dbg(&adap->dev, "smbus byte data - addr 0x%02x, " | 103 | dev_dbg(&adap->dev, |
104 | "read 0x%02x at 0x%02x.\n", | 104 | "smbus byte data - addr 0x%02x, read 0x%02x at 0x%02x.\n", |
105 | addr, data->byte, command); | 105 | addr, data->byte, command); |
106 | } | 106 | } |
107 | chip->pointer = command + 1; | 107 | chip->pointer = command + 1; |
108 | 108 | ||
@@ -112,14 +112,14 @@ static s32 stub_xfer(struct i2c_adapter * adap, u16 addr, unsigned short flags, | |||
112 | case I2C_SMBUS_WORD_DATA: | 112 | case I2C_SMBUS_WORD_DATA: |
113 | if (read_write == I2C_SMBUS_WRITE) { | 113 | if (read_write == I2C_SMBUS_WRITE) { |
114 | chip->words[command] = data->word; | 114 | chip->words[command] = data->word; |
115 | dev_dbg(&adap->dev, "smbus word data - addr 0x%02x, " | 115 | dev_dbg(&adap->dev, |
116 | "wrote 0x%04x at 0x%02x.\n", | 116 | "smbus word data - addr 0x%02x, wrote 0x%04x at 0x%02x.\n", |
117 | addr, data->word, command); | 117 | addr, data->word, command); |
118 | } else { | 118 | } else { |
119 | data->word = chip->words[command]; | 119 | data->word = chip->words[command]; |
120 | dev_dbg(&adap->dev, "smbus word data - addr 0x%02x, " | 120 | dev_dbg(&adap->dev, |
121 | "read 0x%04x at 0x%02x.\n", | 121 | "smbus word data - addr 0x%02x, read 0x%04x at 0x%02x.\n", |
122 | addr, data->word, command); | 122 | addr, data->word, command); |
123 | } | 123 | } |
124 | 124 | ||
125 | ret = 0; | 125 | ret = 0; |
@@ -132,17 +132,17 @@ static s32 stub_xfer(struct i2c_adapter * adap, u16 addr, unsigned short flags, | |||
132 | chip->words[command + i] &= 0xff00; | 132 | chip->words[command + i] &= 0xff00; |
133 | chip->words[command + i] |= data->block[1 + i]; | 133 | chip->words[command + i] |= data->block[1 + i]; |
134 | } | 134 | } |
135 | dev_dbg(&adap->dev, "i2c block data - addr 0x%02x, " | 135 | dev_dbg(&adap->dev, |
136 | "wrote %d bytes at 0x%02x.\n", | 136 | "i2c block data - addr 0x%02x, wrote %d bytes at 0x%02x.\n", |
137 | addr, len, command); | 137 | addr, len, command); |
138 | } else { | 138 | } else { |
139 | for (i = 0; i < len; i++) { | 139 | for (i = 0; i < len; i++) { |
140 | data->block[1 + i] = | 140 | data->block[1 + i] = |
141 | chip->words[command + i] & 0xff; | 141 | chip->words[command + i] & 0xff; |
142 | } | 142 | } |
143 | dev_dbg(&adap->dev, "i2c block data - addr 0x%02x, " | 143 | dev_dbg(&adap->dev, |
144 | "read %d bytes at 0x%02x.\n", | 144 | "i2c block data - addr 0x%02x, read %d bytes at 0x%02x.\n", |
145 | addr, len, command); | 145 | addr, len, command); |
146 | } | 146 | } |
147 | 147 | ||
148 | ret = 0; | 148 | ret = 0; |
@@ -179,25 +179,24 @@ static int __init i2c_stub_init(void) | |||
179 | int i, ret; | 179 | int i, ret; |
180 | 180 | ||
181 | if (!chip_addr[0]) { | 181 | if (!chip_addr[0]) { |
182 | printk(KERN_ERR "i2c-stub: Please specify a chip address\n"); | 182 | pr_err("i2c-stub: Please specify a chip address\n"); |
183 | return -ENODEV; | 183 | return -ENODEV; |
184 | } | 184 | } |
185 | 185 | ||
186 | for (i = 0; i < MAX_CHIPS && chip_addr[i]; i++) { | 186 | for (i = 0; i < MAX_CHIPS && chip_addr[i]; i++) { |
187 | if (chip_addr[i] < 0x03 || chip_addr[i] > 0x77) { | 187 | if (chip_addr[i] < 0x03 || chip_addr[i] > 0x77) { |
188 | printk(KERN_ERR "i2c-stub: Invalid chip address " | 188 | pr_err("i2c-stub: Invalid chip address 0x%02x\n", |
189 | "0x%02x\n", chip_addr[i]); | 189 | chip_addr[i]); |
190 | return -EINVAL; | 190 | return -EINVAL; |
191 | } | 191 | } |
192 | 192 | ||
193 | printk(KERN_INFO "i2c-stub: Virtual chip at 0x%02x\n", | 193 | pr_info("i2c-stub: Virtual chip at 0x%02x\n", chip_addr[i]); |
194 | chip_addr[i]); | ||
195 | } | 194 | } |
196 | 195 | ||
197 | /* Allocate memory for all chips at once */ | 196 | /* Allocate memory for all chips at once */ |
198 | stub_chips = kzalloc(i * sizeof(struct stub_chip), GFP_KERNEL); | 197 | stub_chips = kzalloc(i * sizeof(struct stub_chip), GFP_KERNEL); |
199 | if (!stub_chips) { | 198 | if (!stub_chips) { |
200 | printk(KERN_ERR "i2c-stub: Out of memory\n"); | 199 | pr_err("i2c-stub: Out of memory\n"); |
201 | return -ENOMEM; | 200 | return -ENOMEM; |
202 | } | 201 | } |
203 | 202 | ||
@@ -219,4 +218,3 @@ MODULE_LICENSE("GPL"); | |||
219 | 218 | ||
220 | module_init(i2c_stub_init); | 219 | module_init(i2c_stub_init); |
221 | module_exit(i2c_stub_exit); | 220 | module_exit(i2c_stub_exit); |
222 | |||