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authorHenrique de Moraes Holschuh <hmh@hmh.eng.br>2010-05-16 18:40:56 -0400
committerHenrique de Moraes Holschuh <hmh@hmh.eng.br>2010-05-16 18:40:56 -0400
commitb65b34895437915f411882dd40d704eb0863ffb0 (patch)
tree3e9302ab09c9a9068fd8fd80708ef3a35b55e665 /drivers/i2c
parent88cc83772a3c7756b9f2b4ba835545ad90a08409 (diff)
parentb57f95a38233a2e73b679bea4a5453a1cc2a1cc9 (diff)
Merge mainline (v2.6.34-rc7)
Diffstat (limited to 'drivers/i2c')
-rw-r--r--drivers/i2c/Kconfig19
-rw-r--r--drivers/i2c/Makefile3
-rw-r--r--drivers/i2c/algos/i2c-algo-bit.c10
-rw-r--r--drivers/i2c/algos/i2c-algo-pca.c2
-rw-r--r--drivers/i2c/algos/i2c-algo-pcf.c3
-rw-r--r--drivers/i2c/busses/Kconfig43
-rw-r--r--drivers/i2c/busses/Makefile3
-rw-r--r--drivers/i2c/busses/i2c-ali1535.c2
-rw-r--r--drivers/i2c/busses/i2c-ali1563.c2
-rw-r--r--drivers/i2c/busses/i2c-ali15x3.c2
-rw-r--r--drivers/i2c/busses/i2c-amd756.c2
-rw-r--r--drivers/i2c/busses/i2c-amd8111.c3
-rw-r--r--drivers/i2c/busses/i2c-bfin-twi.c1
-rw-r--r--drivers/i2c/busses/i2c-davinci.c1
-rw-r--r--drivers/i2c/busses/i2c-designware.c5
-rw-r--r--drivers/i2c/busses/i2c-elektor.c1
-rw-r--r--drivers/i2c/busses/i2c-gpio.c1
-rw-r--r--drivers/i2c/busses/i2c-highlander.c1
-rw-r--r--drivers/i2c/busses/i2c-hydra.c2
-rw-r--r--drivers/i2c/busses/i2c-i801.c13
-rw-r--r--drivers/i2c/busses/i2c-imx.c8
-rw-r--r--drivers/i2c/busses/i2c-isch.c68
-rw-r--r--drivers/i2c/busses/i2c-ixp2000.c1
-rw-r--r--drivers/i2c/busses/i2c-mpc.c195
-rw-r--r--drivers/i2c/busses/i2c-mv64xxx.c1
-rw-r--r--drivers/i2c/busses/i2c-nforce2.c3
-rw-r--r--drivers/i2c/busses/i2c-nomadik.c960
-rw-r--r--drivers/i2c/busses/i2c-ocores.c1
-rw-r--r--drivers/i2c/busses/i2c-octeon.c652
-rw-r--r--drivers/i2c/busses/i2c-omap.c47
-rw-r--r--drivers/i2c/busses/i2c-parport-light.c48
-rw-r--r--drivers/i2c/busses/i2c-parport.c44
-rw-r--r--drivers/i2c/busses/i2c-parport.h4
-rw-r--r--drivers/i2c/busses/i2c-pasemi.c3
-rw-r--r--drivers/i2c/busses/i2c-piix4.c2
-rw-r--r--drivers/i2c/busses/i2c-pnx.c295
-rw-r--r--drivers/i2c/busses/i2c-powermac.c25
-rw-r--r--drivers/i2c/busses/i2c-pxa.c3
-rw-r--r--drivers/i2c/busses/i2c-s3c2410.c1
-rw-r--r--drivers/i2c/busses/i2c-scmi.c32
-rw-r--r--drivers/i2c/busses/i2c-sh_mobile.c1
-rw-r--r--drivers/i2c/busses/i2c-simtec.c1
-rw-r--r--drivers/i2c/busses/i2c-sis5595.c2
-rw-r--r--drivers/i2c/busses/i2c-sis630.c2
-rw-r--r--drivers/i2c/busses/i2c-sis96x.c2
-rw-r--r--drivers/i2c/busses/i2c-stu300.c3
-rw-r--r--drivers/i2c/busses/i2c-tiny-usb.c11
-rw-r--r--drivers/i2c/busses/i2c-versatile.c1
-rw-r--r--drivers/i2c/busses/i2c-via.c2
-rw-r--r--drivers/i2c/busses/i2c-viapro.c2
-rw-r--r--drivers/i2c/busses/i2c-xiic.c826
-rw-r--r--drivers/i2c/busses/scx200_acb.c1
-rw-r--r--drivers/i2c/chips/Kconfig19
-rw-r--r--drivers/i2c/chips/Makefile18
-rw-r--r--drivers/i2c/chips/tsl2550.c473
-rw-r--r--drivers/i2c/i2c-boardinfo.c1
-rw-r--r--drivers/i2c/i2c-core.c117
-rw-r--r--drivers/i2c/i2c-smbus.c263
58 files changed, 3378 insertions, 879 deletions
diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig
index 8d8a00e5a30e..d06083fdffbb 100644
--- a/drivers/i2c/Kconfig
+++ b/drivers/i2c/Kconfig
@@ -61,9 +61,18 @@ config I2C_HELPER_AUTO
61 61
62 In doubt, say Y. 62 In doubt, say Y.
63 63
64config I2C_SMBUS
65 tristate "SMBus-specific protocols" if !I2C_HELPER_AUTO
66 help
67 Say Y here if you want support for SMBus extensions to the I2C
68 specification. At the moment, the only supported extension is
69 the SMBus alert protocol.
70
71 This support is also available as a module. If so, the module
72 will be called i2c-smbus.
73
64source drivers/i2c/algos/Kconfig 74source drivers/i2c/algos/Kconfig
65source drivers/i2c/busses/Kconfig 75source drivers/i2c/busses/Kconfig
66source drivers/i2c/chips/Kconfig
67 76
68config I2C_DEBUG_CORE 77config I2C_DEBUG_CORE
69 bool "I2C Core debugging messages" 78 bool "I2C Core debugging messages"
@@ -88,12 +97,4 @@ config I2C_DEBUG_BUS
88 a problem with I2C support and want to see more of what is going 97 a problem with I2C support and want to see more of what is going
89 on. 98 on.
90 99
91config I2C_DEBUG_CHIP
92 bool "I2C Chip debugging messages"
93 help
94 Say Y here if you want the I2C chip drivers to produce a bunch of
95 debug messages to the system log. Select this if you are having
96 a problem with I2C support and want to see more of what is going
97 on.
98
99endif # I2C 100endif # I2C
diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile
index ba26e6cbe74e..a7d9b4be9bb3 100644
--- a/drivers/i2c/Makefile
+++ b/drivers/i2c/Makefile
@@ -4,8 +4,9 @@
4 4
5obj-$(CONFIG_I2C_BOARDINFO) += i2c-boardinfo.o 5obj-$(CONFIG_I2C_BOARDINFO) += i2c-boardinfo.o
6obj-$(CONFIG_I2C) += i2c-core.o 6obj-$(CONFIG_I2C) += i2c-core.o
7obj-$(CONFIG_I2C_SMBUS) += i2c-smbus.o
7obj-$(CONFIG_I2C_CHARDEV) += i2c-dev.o 8obj-$(CONFIG_I2C_CHARDEV) += i2c-dev.o
8obj-y += busses/ chips/ algos/ 9obj-y += algos/ busses/
9 10
10ifeq ($(CONFIG_I2C_DEBUG_CORE),y) 11ifeq ($(CONFIG_I2C_DEBUG_CORE),y)
11EXTRA_CFLAGS += -DDEBUG 12EXTRA_CFLAGS += -DDEBUG
diff --git a/drivers/i2c/algos/i2c-algo-bit.c b/drivers/i2c/algos/i2c-algo-bit.c
index e25e13980af3..a39e6cff86e7 100644
--- a/drivers/i2c/algos/i2c-algo-bit.c
+++ b/drivers/i2c/algos/i2c-algo-bit.c
@@ -24,7 +24,6 @@
24#include <linux/kernel.h> 24#include <linux/kernel.h>
25#include <linux/module.h> 25#include <linux/module.h>
26#include <linux/delay.h> 26#include <linux/delay.h>
27#include <linux/slab.h>
28#include <linux/init.h> 27#include <linux/init.h>
29#include <linux/errno.h> 28#include <linux/errno.h>
30#include <linux/sched.h> 29#include <linux/sched.h>
@@ -522,6 +521,12 @@ static int bit_xfer(struct i2c_adapter *i2c_adap,
522 int i, ret; 521 int i, ret;
523 unsigned short nak_ok; 522 unsigned short nak_ok;
524 523
524 if (adap->pre_xfer) {
525 ret = adap->pre_xfer(i2c_adap);
526 if (ret < 0)
527 return ret;
528 }
529
525 bit_dbg(3, &i2c_adap->dev, "emitting start condition\n"); 530 bit_dbg(3, &i2c_adap->dev, "emitting start condition\n");
526 i2c_start(adap); 531 i2c_start(adap);
527 for (i = 0; i < num; i++) { 532 for (i = 0; i < num; i++) {
@@ -570,6 +575,9 @@ static int bit_xfer(struct i2c_adapter *i2c_adap,
570bailout: 575bailout:
571 bit_dbg(3, &i2c_adap->dev, "emitting stop condition\n"); 576 bit_dbg(3, &i2c_adap->dev, "emitting stop condition\n");
572 i2c_stop(adap); 577 i2c_stop(adap);
578
579 if (adap->post_xfer)
580 adap->post_xfer(i2c_adap);
573 return ret; 581 return ret;
574} 582}
575 583
diff --git a/drivers/i2c/algos/i2c-algo-pca.c b/drivers/i2c/algos/i2c-algo-pca.c
index 78d42aae0089..dcdaf8e675bf 100644
--- a/drivers/i2c/algos/i2c-algo-pca.c
+++ b/drivers/i2c/algos/i2c-algo-pca.c
@@ -453,8 +453,6 @@ static int pca_init(struct i2c_adapter *adap)
453 */ 453 */
454 int raise_fall_time; 454 int raise_fall_time;
455 455
456 struct i2c_algo_pca_data *pca_data = adap->algo_data;
457
458 /* Ignore the reset function from the module, 456 /* Ignore the reset function from the module,
459 * we can use the parallel bus reset 457 * we can use the parallel bus reset
460 */ 458 */
diff --git a/drivers/i2c/algos/i2c-algo-pcf.c b/drivers/i2c/algos/i2c-algo-pcf.c
index 7ce75775ec73..5eebf562ff31 100644
--- a/drivers/i2c/algos/i2c-algo-pcf.c
+++ b/drivers/i2c/algos/i2c-algo-pcf.c
@@ -29,7 +29,6 @@
29#include <linux/kernel.h> 29#include <linux/kernel.h>
30#include <linux/module.h> 30#include <linux/module.h>
31#include <linux/delay.h> 31#include <linux/delay.h>
32#include <linux/slab.h>
33#include <linux/init.h> 32#include <linux/init.h>
34#include <linux/errno.h> 33#include <linux/errno.h>
35#include <linux/i2c.h> 34#include <linux/i2c.h>
@@ -176,7 +175,7 @@ static int pcf_init_8584 (struct i2c_algo_pcf_data *adap)
176 */ 175 */
177 if (((temp = get_pcf(adap, 1)) & 0x7f) != (0)) { 176 if (((temp = get_pcf(adap, 1)) & 0x7f) != (0)) {
178 DEB2(printk(KERN_ERR "i2c-algo-pcf.o: PCF detection failed -- can't select S0 (0x%02x).\n", temp)); 177 DEB2(printk(KERN_ERR "i2c-algo-pcf.o: PCF detection failed -- can't select S0 (0x%02x).\n", temp));
179 return -ENXIO; /* definetly not PCF8584 */ 178 return -ENXIO; /* definitely not PCF8584 */
180 } 179 }
181 180
182 /* load own address in S0, effective address is (own << 1) */ 181 /* load own address in S0, effective address is (own << 1) */
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index 5f318ce29770..9c6170cd9aac 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -77,7 +77,7 @@ config I2C_AMD8111
77 will be called i2c-amd8111. 77 will be called i2c-amd8111.
78 78
79config I2C_I801 79config I2C_I801
80 tristate "Intel 82801 (ICH)" 80 tristate "Intel 82801 (ICH/PCH)"
81 depends on PCI 81 depends on PCI
82 help 82 help
83 If you say yes to this option, support will be included for the Intel 83 If you say yes to this option, support will be included for the Intel
@@ -97,7 +97,8 @@ config I2C_I801
97 ICH9 97 ICH9
98 Tolapai 98 Tolapai
99 ICH10 99 ICH10
100 PCH 100 3400/5 Series (PCH)
101 Cougar Point (PCH)
101 102
102 This driver can also be built as a module. If so, the module 103 This driver can also be built as a module. If so, the module
103 will be called i2c-i801. 104 will be called i2c-i801.
@@ -105,6 +106,8 @@ config I2C_I801
105config I2C_ISCH 106config I2C_ISCH
106 tristate "Intel SCH SMBus 1.0" 107 tristate "Intel SCH SMBus 1.0"
107 depends on PCI 108 depends on PCI
109 select MFD_CORE
110 select LPC_SCH
108 help 111 help
109 Say Y here if you want to use SMBus controller on the Intel SCH 112 Say Y here if you want to use SMBus controller on the Intel SCH
110 based systems. 113 based systems.
@@ -418,13 +421,12 @@ config I2C_IXP2000
418 instead. 421 instead.
419 422
420config I2C_MPC 423config I2C_MPC
421 tristate "MPC107/824x/85xx/52xx/86xx" 424 tristate "MPC107/824x/85xx/512x/52xx/83xx/86xx"
422 depends on PPC32 425 depends on PPC32
423 help 426 help
424 If you say yes to this option, support will be included for the 427 If you say yes to this option, support will be included for the
425 built-in I2C interface on the MPC107/Tsi107/MPC8240/MPC8245 and 428 built-in I2C interface on the MPC107, Tsi107, MPC512x, MPC52xx,
426 MPC85xx/MPC8641 family processors. The driver may also work on 52xx 429 MPC8240, MPC8245, MPC83xx, MPC85xx and MPC8641 family processors.
427 family processors, though interrupts are known not to work.
428 430
429 This driver can also be built as a module. If so, the module 431 This driver can also be built as a module. If so, the module
430 will be called i2c-mpc. 432 will be called i2c-mpc.
@@ -439,6 +441,13 @@ config I2C_MV64XXX
439 This driver can also be built as a module. If so, the module 441 This driver can also be built as a module. If so, the module
440 will be called i2c-mv64xxx. 442 will be called i2c-mv64xxx.
441 443
444config I2C_NOMADIK
445 tristate "ST-Ericsson Nomadik/Ux500 I2C Controller"
446 depends on PLAT_NOMADIK
447 help
448 If you say yes to this option, support will be included for the
449 I2C interface from ST-Ericsson's Nomadik and Ux500 architectures.
450
442config I2C_OCORES 451config I2C_OCORES
443 tristate "OpenCores I2C Controller" 452 tristate "OpenCores I2C Controller"
444 depends on EXPERIMENTAL 453 depends on EXPERIMENTAL
@@ -564,12 +573,33 @@ config I2C_VERSATILE
564 This driver can also be built as a module. If so, the module 573 This driver can also be built as a module. If so, the module
565 will be called i2c-versatile. 574 will be called i2c-versatile.
566 575
576config I2C_OCTEON
577 tristate "Cavium OCTEON I2C bus support"
578 depends on CPU_CAVIUM_OCTEON
579 help
580 Say yes if you want to support the I2C serial bus on Cavium
581 OCTEON SOC.
582
583 This driver can also be built as a module. If so, the module
584 will be called i2c-octeon.
585
586config I2C_XILINX
587 tristate "Xilinx I2C Controller"
588 depends on EXPERIMENTAL && HAS_IOMEM
589 help
590 If you say yes to this option, support will be included for the
591 Xilinx I2C controller.
592
593 This driver can also be built as a module. If so, the module
594 will be called xilinx_i2c.
595
567comment "External I2C/SMBus adapter drivers" 596comment "External I2C/SMBus adapter drivers"
568 597
569config I2C_PARPORT 598config I2C_PARPORT
570 tristate "Parallel port adapter" 599 tristate "Parallel port adapter"
571 depends on PARPORT 600 depends on PARPORT
572 select I2C_ALGOBIT 601 select I2C_ALGOBIT
602 select I2C_SMBUS
573 help 603 help
574 This supports parallel port I2C adapters such as the ones made by 604 This supports parallel port I2C adapters such as the ones made by
575 Philips or Velleman, Analog Devices evaluation boards, and more. 605 Philips or Velleman, Analog Devices evaluation boards, and more.
@@ -593,6 +623,7 @@ config I2C_PARPORT
593config I2C_PARPORT_LIGHT 623config I2C_PARPORT_LIGHT
594 tristate "Parallel port adapter (light)" 624 tristate "Parallel port adapter (light)"
595 select I2C_ALGOBIT 625 select I2C_ALGOBIT
626 select I2C_SMBUS
596 help 627 help
597 This supports parallel port I2C adapters such as the ones made by 628 This supports parallel port I2C adapters such as the ones made by
598 Philips or Velleman, Analog Devices evaluation boards, and more. 629 Philips or Velleman, Analog Devices evaluation boards, and more.
diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
index 302c551977bb..097236f631e8 100644
--- a/drivers/i2c/busses/Makefile
+++ b/drivers/i2c/busses/Makefile
@@ -42,6 +42,7 @@ obj-$(CONFIG_I2C_IOP3XX) += i2c-iop3xx.o
42obj-$(CONFIG_I2C_IXP2000) += i2c-ixp2000.o 42obj-$(CONFIG_I2C_IXP2000) += i2c-ixp2000.o
43obj-$(CONFIG_I2C_MPC) += i2c-mpc.o 43obj-$(CONFIG_I2C_MPC) += i2c-mpc.o
44obj-$(CONFIG_I2C_MV64XXX) += i2c-mv64xxx.o 44obj-$(CONFIG_I2C_MV64XXX) += i2c-mv64xxx.o
45obj-$(CONFIG_I2C_NOMADIK) += i2c-nomadik.o
45obj-$(CONFIG_I2C_OCORES) += i2c-ocores.o 46obj-$(CONFIG_I2C_OCORES) += i2c-ocores.o
46obj-$(CONFIG_I2C_OMAP) += i2c-omap.o 47obj-$(CONFIG_I2C_OMAP) += i2c-omap.o
47obj-$(CONFIG_I2C_PASEMI) += i2c-pasemi.o 48obj-$(CONFIG_I2C_PASEMI) += i2c-pasemi.o
@@ -54,6 +55,8 @@ obj-$(CONFIG_I2C_SH_MOBILE) += i2c-sh_mobile.o
54obj-$(CONFIG_I2C_SIMTEC) += i2c-simtec.o 55obj-$(CONFIG_I2C_SIMTEC) += i2c-simtec.o
55obj-$(CONFIG_I2C_STU300) += i2c-stu300.o 56obj-$(CONFIG_I2C_STU300) += i2c-stu300.o
56obj-$(CONFIG_I2C_VERSATILE) += i2c-versatile.o 57obj-$(CONFIG_I2C_VERSATILE) += i2c-versatile.o
58obj-$(CONFIG_I2C_OCTEON) += i2c-octeon.o
59obj-$(CONFIG_I2C_XILINX) += i2c-xiic.o
57 60
58# External I2C/SMBus adapter drivers 61# External I2C/SMBus adapter drivers
59obj-$(CONFIG_I2C_PARPORT) += i2c-parport.o 62obj-$(CONFIG_I2C_PARPORT) += i2c-parport.o
diff --git a/drivers/i2c/busses/i2c-ali1535.c b/drivers/i2c/busses/i2c-ali1535.c
index 8de7d7b87bb0..bd8f1e4d9e6c 100644
--- a/drivers/i2c/busses/i2c-ali1535.c
+++ b/drivers/i2c/busses/i2c-ali1535.c
@@ -480,7 +480,7 @@ static struct i2c_adapter ali1535_adapter = {
480 .algo = &smbus_algorithm, 480 .algo = &smbus_algorithm,
481}; 481};
482 482
483static struct pci_device_id ali1535_ids[] = { 483static const struct pci_device_id ali1535_ids[] = {
484 { PCI_DEVICE(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M7101) }, 484 { PCI_DEVICE(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M7101) },
485 { }, 485 { },
486}; 486};
diff --git a/drivers/i2c/busses/i2c-ali1563.c b/drivers/i2c/busses/i2c-ali1563.c
index 4687af40dd50..a409cfcf0629 100644
--- a/drivers/i2c/busses/i2c-ali1563.c
+++ b/drivers/i2c/busses/i2c-ali1563.c
@@ -417,7 +417,7 @@ static void __devexit ali1563_remove(struct pci_dev * dev)
417 ali1563_shutdown(dev); 417 ali1563_shutdown(dev);
418} 418}
419 419
420static struct pci_device_id __devinitdata ali1563_id_table[] = { 420static const struct pci_device_id ali1563_id_table[] __devinitconst = {
421 { PCI_DEVICE(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1563) }, 421 { PCI_DEVICE(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1563) },
422 {}, 422 {},
423}; 423};
diff --git a/drivers/i2c/busses/i2c-ali15x3.c b/drivers/i2c/busses/i2c-ali15x3.c
index e7e3205f1286..659f63f5e4af 100644
--- a/drivers/i2c/busses/i2c-ali15x3.c
+++ b/drivers/i2c/busses/i2c-ali15x3.c
@@ -477,7 +477,7 @@ static struct i2c_adapter ali15x3_adapter = {
477 .algo = &smbus_algorithm, 477 .algo = &smbus_algorithm,
478}; 478};
479 479
480static struct pci_device_id ali15x3_ids[] = { 480static const struct pci_device_id ali15x3_ids[] = {
481 { PCI_DEVICE(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M7101) }, 481 { PCI_DEVICE(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M7101) },
482 { 0, } 482 { 0, }
483}; 483};
diff --git a/drivers/i2c/busses/i2c-amd756.c b/drivers/i2c/busses/i2c-amd756.c
index 8f0b90ef8c76..c5a9fa488e7f 100644
--- a/drivers/i2c/busses/i2c-amd756.c
+++ b/drivers/i2c/busses/i2c-amd756.c
@@ -308,7 +308,7 @@ static const char* chipname[] = {
308 "nVidia nForce", "AMD8111", 308 "nVidia nForce", "AMD8111",
309}; 309};
310 310
311static struct pci_device_id amd756_ids[] = { 311static const struct pci_device_id amd756_ids[] = {
312 { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_740B), 312 { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_740B),
313 .driver_data = AMD756 }, 313 .driver_data = AMD756 },
314 { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_7413), 314 { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_7413),
diff --git a/drivers/i2c/busses/i2c-amd8111.c b/drivers/i2c/busses/i2c-amd8111.c
index 5b4ad86ca166..2fbef27b6cd6 100644
--- a/drivers/i2c/busses/i2c-amd8111.c
+++ b/drivers/i2c/busses/i2c-amd8111.c
@@ -17,6 +17,7 @@
17#include <linux/i2c.h> 17#include <linux/i2c.h>
18#include <linux/delay.h> 18#include <linux/delay.h>
19#include <linux/acpi.h> 19#include <linux/acpi.h>
20#include <linux/slab.h>
20#include <asm/io.h> 21#include <asm/io.h>
21 22
22MODULE_LICENSE("GPL"); 23MODULE_LICENSE("GPL");
@@ -351,7 +352,7 @@ static const struct i2c_algorithm smbus_algorithm = {
351}; 352};
352 353
353 354
354static struct pci_device_id amd8111_ids[] = { 355static const struct pci_device_id amd8111_ids[] = {
355 { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8111_SMBUS2) }, 356 { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8111_SMBUS2) },
356 { 0, } 357 { 0, }
357}; 358};
diff --git a/drivers/i2c/busses/i2c-bfin-twi.c b/drivers/i2c/busses/i2c-bfin-twi.c
index fe3fb567317d..f1e14dd590c9 100644
--- a/drivers/i2c/busses/i2c-bfin-twi.c
+++ b/drivers/i2c/busses/i2c-bfin-twi.c
@@ -12,6 +12,7 @@
12#include <linux/kernel.h> 12#include <linux/kernel.h>
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/i2c.h> 14#include <linux/i2c.h>
15#include <linux/slab.h>
15#include <linux/io.h> 16#include <linux/io.h>
16#include <linux/mm.h> 17#include <linux/mm.h>
17#include <linux/timer.h> 18#include <linux/timer.h>
diff --git a/drivers/i2c/busses/i2c-davinci.c b/drivers/i2c/busses/i2c-davinci.c
index c89687a10835..4523364e6722 100644
--- a/drivers/i2c/busses/i2c-davinci.c
+++ b/drivers/i2c/busses/i2c-davinci.c
@@ -35,6 +35,7 @@
35#include <linux/interrupt.h> 35#include <linux/interrupt.h>
36#include <linux/platform_device.h> 36#include <linux/platform_device.h>
37#include <linux/io.h> 37#include <linux/io.h>
38#include <linux/slab.h>
38 39
39#include <mach/hardware.h> 40#include <mach/hardware.h>
40 41
diff --git a/drivers/i2c/busses/i2c-designware.c b/drivers/i2c/busses/i2c-designware.c
index 9e18ef97f156..b664ed8bbdb3 100644
--- a/drivers/i2c/busses/i2c-designware.c
+++ b/drivers/i2c/busses/i2c-designware.c
@@ -36,6 +36,7 @@
36#include <linux/interrupt.h> 36#include <linux/interrupt.h>
37#include <linux/platform_device.h> 37#include <linux/platform_device.h>
38#include <linux/io.h> 38#include <linux/io.h>
39#include <linux/slab.h>
39 40
40/* 41/*
41 * Registers offset 42 * Registers offset
@@ -497,13 +498,13 @@ static int i2c_dw_handle_tx_abort(struct dw_i2c_dev *dev)
497 int i; 498 int i;
498 499
499 if (abort_source & DW_IC_TX_ABRT_NOACK) { 500 if (abort_source & DW_IC_TX_ABRT_NOACK) {
500 for_each_bit(i, &abort_source, ARRAY_SIZE(abort_sources)) 501 for_each_set_bit(i, &abort_source, ARRAY_SIZE(abort_sources))
501 dev_dbg(dev->dev, 502 dev_dbg(dev->dev,
502 "%s: %s\n", __func__, abort_sources[i]); 503 "%s: %s\n", __func__, abort_sources[i]);
503 return -EREMOTEIO; 504 return -EREMOTEIO;
504 } 505 }
505 506
506 for_each_bit(i, &abort_source, ARRAY_SIZE(abort_sources)) 507 for_each_set_bit(i, &abort_source, ARRAY_SIZE(abort_sources))
507 dev_err(dev->dev, "%s: %s\n", __func__, abort_sources[i]); 508 dev_err(dev->dev, "%s: %s\n", __func__, abort_sources[i]);
508 509
509 if (abort_source & DW_IC_TX_ARB_LOST) 510 if (abort_source & DW_IC_TX_ARB_LOST)
diff --git a/drivers/i2c/busses/i2c-elektor.c b/drivers/i2c/busses/i2c-elektor.c
index 448b4bf35eb7..612255614a66 100644
--- a/drivers/i2c/busses/i2c-elektor.c
+++ b/drivers/i2c/busses/i2c-elektor.c
@@ -29,7 +29,6 @@
29#include <linux/ioport.h> 29#include <linux/ioport.h>
30#include <linux/module.h> 30#include <linux/module.h>
31#include <linux/delay.h> 31#include <linux/delay.h>
32#include <linux/slab.h>
33#include <linux/init.h> 32#include <linux/init.h>
34#include <linux/interrupt.h> 33#include <linux/interrupt.h>
35#include <linux/pci.h> 34#include <linux/pci.h>
diff --git a/drivers/i2c/busses/i2c-gpio.c b/drivers/i2c/busses/i2c-gpio.c
index 32104eac8d3d..c21077d248af 100644
--- a/drivers/i2c/busses/i2c-gpio.c
+++ b/drivers/i2c/busses/i2c-gpio.c
@@ -12,6 +12,7 @@
12#include <linux/i2c-gpio.h> 12#include <linux/i2c-gpio.h>
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/module.h> 14#include <linux/module.h>
15#include <linux/slab.h>
15#include <linux/platform_device.h> 16#include <linux/platform_device.h>
16 17
17#include <asm/gpio.h> 18#include <asm/gpio.h>
diff --git a/drivers/i2c/busses/i2c-highlander.c b/drivers/i2c/busses/i2c-highlander.c
index 87ecace415da..ce87a902c94d 100644
--- a/drivers/i2c/busses/i2c-highlander.c
+++ b/drivers/i2c/busses/i2c-highlander.c
@@ -19,6 +19,7 @@
19#include <linux/completion.h> 19#include <linux/completion.h>
20#include <linux/io.h> 20#include <linux/io.h>
21#include <linux/delay.h> 21#include <linux/delay.h>
22#include <linux/slab.h>
22 23
23#define SMCR 0x00 24#define SMCR 0x00
24#define SMCR_START (1 << 0) 25#define SMCR_START (1 << 0)
diff --git a/drivers/i2c/busses/i2c-hydra.c b/drivers/i2c/busses/i2c-hydra.c
index bec9b845dd16..c767295ad1fb 100644
--- a/drivers/i2c/busses/i2c-hydra.c
+++ b/drivers/i2c/busses/i2c-hydra.c
@@ -105,7 +105,7 @@ static struct i2c_adapter hydra_adap = {
105 .algo_data = &hydra_bit_data, 105 .algo_data = &hydra_bit_data,
106}; 106};
107 107
108static struct pci_device_id hydra_ids[] = { 108static const struct pci_device_id hydra_ids[] = {
109 { PCI_DEVICE(PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_HYDRA) }, 109 { PCI_DEVICE(PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_HYDRA) },
110 { 0, } 110 { 0, }
111}; 111};
diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c
index df6ab553f975..299b918455a3 100644
--- a/drivers/i2c/busses/i2c-i801.c
+++ b/drivers/i2c/busses/i2c-i801.c
@@ -41,7 +41,8 @@
41 Tolapai 0x5032 32 hard yes yes yes 41 Tolapai 0x5032 32 hard yes yes yes
42 ICH10 0x3a30 32 hard yes yes yes 42 ICH10 0x3a30 32 hard yes yes yes
43 ICH10 0x3a60 32 hard yes yes yes 43 ICH10 0x3a60 32 hard yes yes yes
44 PCH 0x3b30 32 hard yes yes yes 44 3400/5 Series (PCH) 0x3b30 32 hard yes yes yes
45 Cougar Point (PCH) 0x1c22 32 hard yes yes yes
45 46
46 Features supported by this driver: 47 Features supported by this driver:
47 Software PEC no 48 Software PEC no
@@ -415,9 +416,11 @@ static int i801_block_transaction(union i2c_smbus_data *data, char read_write,
415 data->block[0] = 32; /* max for SMBus block reads */ 416 data->block[0] = 32; /* max for SMBus block reads */
416 } 417 }
417 418
419 /* Experience has shown that the block buffer can only be used for
420 SMBus (not I2C) block transactions, even though the datasheet
421 doesn't mention this limitation. */
418 if ((i801_features & FEATURE_BLOCK_BUFFER) 422 if ((i801_features & FEATURE_BLOCK_BUFFER)
419 && !(command == I2C_SMBUS_I2C_BLOCK_DATA 423 && command != I2C_SMBUS_I2C_BLOCK_DATA
420 && read_write == I2C_SMBUS_READ)
421 && i801_set_block_buffer_mode() == 0) 424 && i801_set_block_buffer_mode() == 0)
422 result = i801_block_transaction_by_block(data, read_write, 425 result = i801_block_transaction_by_block(data, read_write,
423 hwpec); 426 hwpec);
@@ -561,7 +564,7 @@ static struct i2c_adapter i801_adapter = {
561 .algo = &smbus_algorithm, 564 .algo = &smbus_algorithm,
562}; 565};
563 566
564static struct pci_device_id i801_ids[] = { 567static const struct pci_device_id i801_ids[] = {
565 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AA_3) }, 568 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AA_3) },
566 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AB_3) }, 569 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AB_3) },
567 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_2) }, 570 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_2) },
@@ -578,6 +581,7 @@ static struct pci_device_id i801_ids[] = {
578 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10_4) }, 581 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10_4) },
579 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10_5) }, 582 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10_5) },
580 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PCH_SMBUS) }, 583 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PCH_SMBUS) },
584 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CPT_SMBUS) },
581 { 0, } 585 { 0, }
582}; 586};
583 587
@@ -707,6 +711,7 @@ static int __devinit i801_probe(struct pci_dev *dev, const struct pci_device_id
707 case PCI_DEVICE_ID_INTEL_ICH10_4: 711 case PCI_DEVICE_ID_INTEL_ICH10_4:
708 case PCI_DEVICE_ID_INTEL_ICH10_5: 712 case PCI_DEVICE_ID_INTEL_ICH10_5:
709 case PCI_DEVICE_ID_INTEL_PCH_SMBUS: 713 case PCI_DEVICE_ID_INTEL_PCH_SMBUS:
714 case PCI_DEVICE_ID_INTEL_CPT_SMBUS:
710 i801_features |= FEATURE_I2C_BLOCK_READ; 715 i801_features |= FEATURE_I2C_BLOCK_READ;
711 /* fall through */ 716 /* fall through */
712 case PCI_DEVICE_ID_INTEL_82801DB_3: 717 case PCI_DEVICE_ID_INTEL_82801DB_3:
diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c
index 75bf820e7ccb..d1ff9408dc1f 100644
--- a/drivers/i2c/busses/i2c-imx.c
+++ b/drivers/i2c/busses/i2c-imx.c
@@ -47,6 +47,7 @@
47#include <linux/sched.h> 47#include <linux/sched.h>
48#include <linux/platform_device.h> 48#include <linux/platform_device.h>
49#include <linux/clk.h> 49#include <linux/clk.h>
50#include <linux/slab.h>
50 51
51#include <mach/irqs.h> 52#include <mach/irqs.h>
52#include <mach/hardware.h> 53#include <mach/hardware.h>
@@ -145,10 +146,10 @@ static int i2c_imx_bus_busy(struct imx_i2c_struct *i2c_imx, int for_busy)
145 "<%s> I2C Interrupted\n", __func__); 146 "<%s> I2C Interrupted\n", __func__);
146 return -EINTR; 147 return -EINTR;
147 } 148 }
148 if (time_after(jiffies, orig_jiffies + HZ / 1000)) { 149 if (time_after(jiffies, orig_jiffies + msecs_to_jiffies(500))) {
149 dev_dbg(&i2c_imx->adapter.dev, 150 dev_dbg(&i2c_imx->adapter.dev,
150 "<%s> I2C bus is busy\n", __func__); 151 "<%s> I2C bus is busy\n", __func__);
151 return -EIO; 152 return -ETIMEDOUT;
152 } 153 }
153 schedule(); 154 schedule();
154 } 155 }
@@ -443,6 +444,8 @@ static int i2c_imx_xfer(struct i2c_adapter *adapter,
443 result = i2c_imx_read(i2c_imx, &msgs[i]); 444 result = i2c_imx_read(i2c_imx, &msgs[i]);
444 else 445 else
445 result = i2c_imx_write(i2c_imx, &msgs[i]); 446 result = i2c_imx_write(i2c_imx, &msgs[i]);
447 if (result)
448 goto fail0;
446 } 449 }
447 450
448fail0: 451fail0:
@@ -627,7 +630,6 @@ static int __exit i2c_imx_remove(struct platform_device *pdev)
627} 630}
628 631
629static struct platform_driver i2c_imx_driver = { 632static struct platform_driver i2c_imx_driver = {
630 .probe = i2c_imx_probe,
631 .remove = __exit_p(i2c_imx_remove), 633 .remove = __exit_p(i2c_imx_remove),
632 .driver = { 634 .driver = {
633 .name = DRIVER_NAME, 635 .name = DRIVER_NAME,
diff --git a/drivers/i2c/busses/i2c-isch.c b/drivers/i2c/busses/i2c-isch.c
index dba6eb053e2f..ddc258edb34f 100644
--- a/drivers/i2c/busses/i2c-isch.c
+++ b/drivers/i2c/busses/i2c-isch.c
@@ -27,7 +27,7 @@
27*/ 27*/
28 28
29#include <linux/module.h> 29#include <linux/module.h>
30#include <linux/pci.h> 30#include <linux/platform_device.h>
31#include <linux/kernel.h> 31#include <linux/kernel.h>
32#include <linux/delay.h> 32#include <linux/delay.h>
33#include <linux/stddef.h> 33#include <linux/stddef.h>
@@ -46,12 +46,6 @@
46#define SMBHSTDAT1 (7 + sch_smba) 46#define SMBHSTDAT1 (7 + sch_smba)
47#define SMBBLKDAT (0x20 + sch_smba) 47#define SMBBLKDAT (0x20 + sch_smba)
48 48
49/* count for request_region */
50#define SMBIOSIZE 64
51
52/* PCI Address Constants */
53#define SMBBA_SCH 0x40
54
55/* Other settings */ 49/* Other settings */
56#define MAX_TIMEOUT 500 50#define MAX_TIMEOUT 500
57 51
@@ -63,7 +57,6 @@
63#define SCH_BLOCK_DATA 0x05 57#define SCH_BLOCK_DATA 0x05
64 58
65static unsigned short sch_smba; 59static unsigned short sch_smba;
66static struct pci_driver sch_driver;
67static struct i2c_adapter sch_adapter; 60static struct i2c_adapter sch_adapter;
68 61
69/* 62/*
@@ -256,37 +249,23 @@ static struct i2c_adapter sch_adapter = {
256 .algo = &smbus_algorithm, 249 .algo = &smbus_algorithm,
257}; 250};
258 251
259static struct pci_device_id sch_ids[] = { 252static int __devinit smbus_sch_probe(struct platform_device *dev)
260 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SCH_LPC) },
261 { 0, }
262};
263
264MODULE_DEVICE_TABLE(pci, sch_ids);
265
266static int __devinit sch_probe(struct pci_dev *dev,
267 const struct pci_device_id *id)
268{ 253{
254 struct resource *res;
269 int retval; 255 int retval;
270 unsigned int smba;
271 256
272 pci_read_config_dword(dev, SMBBA_SCH, &smba); 257 res = platform_get_resource(dev, IORESOURCE_IO, 0);
273 if (!(smba & (1 << 31))) { 258 if (!res)
274 dev_err(&dev->dev, "SMBus I/O space disabled!\n"); 259 return -EBUSY;
275 return -ENODEV;
276 }
277 260
278 sch_smba = (unsigned short)smba; 261 if (!request_region(res->start, resource_size(res), dev->name)) {
279 if (sch_smba == 0) {
280 dev_err(&dev->dev, "SMBus base address uninitialized!\n");
281 return -ENODEV;
282 }
283 if (acpi_check_region(sch_smba, SMBIOSIZE, sch_driver.name))
284 return -ENODEV;
285 if (!request_region(sch_smba, SMBIOSIZE, sch_driver.name)) {
286 dev_err(&dev->dev, "SMBus region 0x%x already in use!\n", 262 dev_err(&dev->dev, "SMBus region 0x%x already in use!\n",
287 sch_smba); 263 sch_smba);
288 return -EBUSY; 264 return -EBUSY;
289 } 265 }
266
267 sch_smba = res->start;
268
290 dev_dbg(&dev->dev, "SMBA = 0x%X\n", sch_smba); 269 dev_dbg(&dev->dev, "SMBA = 0x%X\n", sch_smba);
291 270
292 /* set up the sysfs linkage to our parent device */ 271 /* set up the sysfs linkage to our parent device */
@@ -298,37 +277,43 @@ static int __devinit sch_probe(struct pci_dev *dev,
298 retval = i2c_add_adapter(&sch_adapter); 277 retval = i2c_add_adapter(&sch_adapter);
299 if (retval) { 278 if (retval) {
300 dev_err(&dev->dev, "Couldn't register adapter!\n"); 279 dev_err(&dev->dev, "Couldn't register adapter!\n");
301 release_region(sch_smba, SMBIOSIZE); 280 release_region(res->start, resource_size(res));
302 sch_smba = 0; 281 sch_smba = 0;
303 } 282 }
304 283
305 return retval; 284 return retval;
306} 285}
307 286
308static void __devexit sch_remove(struct pci_dev *dev) 287static int __devexit smbus_sch_remove(struct platform_device *pdev)
309{ 288{
289 struct resource *res;
310 if (sch_smba) { 290 if (sch_smba) {
311 i2c_del_adapter(&sch_adapter); 291 i2c_del_adapter(&sch_adapter);
312 release_region(sch_smba, SMBIOSIZE); 292 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
293 release_region(res->start, resource_size(res));
313 sch_smba = 0; 294 sch_smba = 0;
314 } 295 }
296
297 return 0;
315} 298}
316 299
317static struct pci_driver sch_driver = { 300static struct platform_driver smbus_sch_driver = {
318 .name = "isch_smbus", 301 .driver = {
319 .id_table = sch_ids, 302 .name = "isch_smbus",
320 .probe = sch_probe, 303 .owner = THIS_MODULE,
321 .remove = __devexit_p(sch_remove), 304 },
305 .probe = smbus_sch_probe,
306 .remove = __devexit_p(smbus_sch_remove),
322}; 307};
323 308
324static int __init i2c_sch_init(void) 309static int __init i2c_sch_init(void)
325{ 310{
326 return pci_register_driver(&sch_driver); 311 return platform_driver_register(&smbus_sch_driver);
327} 312}
328 313
329static void __exit i2c_sch_exit(void) 314static void __exit i2c_sch_exit(void)
330{ 315{
331 pci_unregister_driver(&sch_driver); 316 platform_driver_unregister(&smbus_sch_driver);
332} 317}
333 318
334MODULE_AUTHOR("Jacob Pan <jacob.jun.pan@intel.com>"); 319MODULE_AUTHOR("Jacob Pan <jacob.jun.pan@intel.com>");
@@ -337,3 +322,4 @@ MODULE_LICENSE("GPL");
337 322
338module_init(i2c_sch_init); 323module_init(i2c_sch_init);
339module_exit(i2c_sch_exit); 324module_exit(i2c_sch_exit);
325MODULE_ALIAS("platform:isch_smbus");
diff --git a/drivers/i2c/busses/i2c-ixp2000.c b/drivers/i2c/busses/i2c-ixp2000.c
index c016f7a2c5fc..5d8aed5ec21b 100644
--- a/drivers/i2c/busses/i2c-ixp2000.c
+++ b/drivers/i2c/busses/i2c-ixp2000.c
@@ -32,6 +32,7 @@
32#include <linux/module.h> 32#include <linux/module.h>
33#include <linux/i2c.h> 33#include <linux/i2c.h>
34#include <linux/i2c-algo-bit.h> 34#include <linux/i2c-algo-bit.h>
35#include <linux/slab.h>
35 36
36#include <mach/hardware.h> /* Pick up IXP2000-specific bits */ 37#include <mach/hardware.h> /* Pick up IXP2000-specific bits */
37#include <mach/gpio.h> 38#include <mach/gpio.h>
diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c
index f627001108b8..f1321f763789 100644
--- a/drivers/i2c/busses/i2c-mpc.c
+++ b/drivers/i2c/busses/i2c-mpc.c
@@ -19,6 +19,7 @@
19#include <linux/init.h> 19#include <linux/init.h>
20#include <linux/of_platform.h> 20#include <linux/of_platform.h>
21#include <linux/of_i2c.h> 21#include <linux/of_i2c.h>
22#include <linux/slab.h>
22 23
23#include <linux/io.h> 24#include <linux/io.h>
24#include <linux/fsl_devices.h> 25#include <linux/fsl_devices.h>
@@ -31,6 +32,9 @@
31 32
32#define DRV_NAME "mpc-i2c" 33#define DRV_NAME "mpc-i2c"
33 34
35#define MPC_I2C_CLOCK_LEGACY 0
36#define MPC_I2C_CLOCK_PRESERVE (~0U)
37
34#define MPC_I2C_FDR 0x04 38#define MPC_I2C_FDR 0x04
35#define MPC_I2C_CR 0x08 39#define MPC_I2C_CR 0x08
36#define MPC_I2C_SR 0x0c 40#define MPC_I2C_SR 0x0c
@@ -66,10 +70,9 @@ struct mpc_i2c_divider {
66 u16 fdr; /* including dfsrr */ 70 u16 fdr; /* including dfsrr */
67}; 71};
68 72
69struct mpc_i2c_match_data { 73struct mpc_i2c_data {
70 void (*setclock)(struct device_node *node, 74 void (*setup)(struct device_node *node, struct mpc_i2c *i2c,
71 struct mpc_i2c *i2c, 75 u32 clock, u32 prescaler);
72 u32 clock, u32 prescaler);
73 u32 prescaler; 76 u32 prescaler;
74}; 77};
75 78
@@ -164,8 +167,8 @@ static int i2c_wait(struct mpc_i2c *i2c, unsigned timeout, int writing)
164 return 0; 167 return 0;
165} 168}
166 169
167#ifdef CONFIG_PPC_MPC52xx 170#if defined(CONFIG_PPC_MPC52xx) || defined(CONFIG_PPC_MPC512x)
168static const struct mpc_i2c_divider mpc_i2c_dividers_52xx[] = { 171static const struct mpc_i2c_divider mpc_i2c_dividers_52xx[] __devinitconst = {
169 {20, 0x20}, {22, 0x21}, {24, 0x22}, {26, 0x23}, 172 {20, 0x20}, {22, 0x21}, {24, 0x22}, {26, 0x23},
170 {28, 0x24}, {30, 0x01}, {32, 0x25}, {34, 0x02}, 173 {28, 0x24}, {30, 0x01}, {32, 0x25}, {34, 0x02},
171 {36, 0x26}, {40, 0x27}, {44, 0x04}, {48, 0x28}, 174 {36, 0x26}, {40, 0x27}, {44, 0x04}, {48, 0x28},
@@ -186,14 +189,15 @@ static const struct mpc_i2c_divider mpc_i2c_dividers_52xx[] = {
186 {10240, 0x9d}, {12288, 0x9e}, {15360, 0x9f} 189 {10240, 0x9d}, {12288, 0x9e}, {15360, 0x9f}
187}; 190};
188 191
189int mpc_i2c_get_fdr_52xx(struct device_node *node, u32 clock, int prescaler) 192static int __devinit mpc_i2c_get_fdr_52xx(struct device_node *node, u32 clock,
193 int prescaler)
190{ 194{
191 const struct mpc_i2c_divider *div = NULL; 195 const struct mpc_i2c_divider *div = NULL;
192 unsigned int pvr = mfspr(SPRN_PVR); 196 unsigned int pvr = mfspr(SPRN_PVR);
193 u32 divider; 197 u32 divider;
194 int i; 198 int i;
195 199
196 if (!clock) 200 if (clock == MPC_I2C_CLOCK_LEGACY)
197 return -EINVAL; 201 return -EINVAL;
198 202
199 /* Determine divider value */ 203 /* Determine divider value */
@@ -215,12 +219,18 @@ int mpc_i2c_get_fdr_52xx(struct device_node *node, u32 clock, int prescaler)
215 return div ? (int)div->fdr : -EINVAL; 219 return div ? (int)div->fdr : -EINVAL;
216} 220}
217 221
218static void mpc_i2c_setclock_52xx(struct device_node *node, 222static void __devinit mpc_i2c_setup_52xx(struct device_node *node,
219 struct mpc_i2c *i2c, 223 struct mpc_i2c *i2c,
220 u32 clock, u32 prescaler) 224 u32 clock, u32 prescaler)
221{ 225{
222 int ret, fdr; 226 int ret, fdr;
223 227
228 if (clock == MPC_I2C_CLOCK_PRESERVE) {
229 dev_dbg(i2c->dev, "using fdr %d\n",
230 readb(i2c->base + MPC_I2C_FDR));
231 return;
232 }
233
224 ret = mpc_i2c_get_fdr_52xx(node, clock, prescaler); 234 ret = mpc_i2c_get_fdr_52xx(node, clock, prescaler);
225 fdr = (ret >= 0) ? ret : 0x3f; /* backward compatibility */ 235 fdr = (ret >= 0) ? ret : 0x3f; /* backward compatibility */
226 236
@@ -229,16 +239,52 @@ static void mpc_i2c_setclock_52xx(struct device_node *node,
229 if (ret >= 0) 239 if (ret >= 0)
230 dev_info(i2c->dev, "clock %d Hz (fdr=%d)\n", clock, fdr); 240 dev_info(i2c->dev, "clock %d Hz (fdr=%d)\n", clock, fdr);
231} 241}
232#else /* !CONFIG_PPC_MPC52xx */ 242#else /* !(CONFIG_PPC_MPC52xx || CONFIG_PPC_MPC512x) */
233static void mpc_i2c_setclock_52xx(struct device_node *node, 243static void __devinit mpc_i2c_setup_52xx(struct device_node *node,
234 struct mpc_i2c *i2c, 244 struct mpc_i2c *i2c,
235 u32 clock, u32 prescaler) 245 u32 clock, u32 prescaler)
246{
247}
248#endif /* CONFIG_PPC_MPC52xx || CONFIG_PPC_MPC512x */
249
250#ifdef CONFIG_PPC_MPC512x
251static void __devinit mpc_i2c_setup_512x(struct device_node *node,
252 struct mpc_i2c *i2c,
253 u32 clock, u32 prescaler)
254{
255 struct device_node *node_ctrl;
256 void __iomem *ctrl;
257 const u32 *pval;
258 u32 idx;
259
260 /* Enable I2C interrupts for mpc5121 */
261 node_ctrl = of_find_compatible_node(NULL, NULL,
262 "fsl,mpc5121-i2c-ctrl");
263 if (node_ctrl) {
264 ctrl = of_iomap(node_ctrl, 0);
265 if (ctrl) {
266 /* Interrupt enable bits for i2c-0/1/2: bit 24/26/28 */
267 pval = of_get_property(node, "reg", NULL);
268 idx = (*pval & 0xff) / 0x20;
269 setbits32(ctrl, 1 << (24 + idx * 2));
270 iounmap(ctrl);
271 }
272 of_node_put(node_ctrl);
273 }
274
275 /* The clock setup for the 52xx works also fine for the 512x */
276 mpc_i2c_setup_52xx(node, i2c, clock, prescaler);
277}
278#else /* CONFIG_PPC_MPC512x */
279static void __devinit mpc_i2c_setup_512x(struct device_node *node,
280 struct mpc_i2c *i2c,
281 u32 clock, u32 prescaler)
236{ 282{
237} 283}
238#endif /* CONFIG_PPC_MPC52xx*/ 284#endif /* CONFIG_PPC_MPC512x */
239 285
240#ifdef CONFIG_FSL_SOC 286#ifdef CONFIG_FSL_SOC
241static const struct mpc_i2c_divider mpc_i2c_dividers_8xxx[] = { 287static const struct mpc_i2c_divider mpc_i2c_dividers_8xxx[] __devinitconst = {
242 {160, 0x0120}, {192, 0x0121}, {224, 0x0122}, {256, 0x0123}, 288 {160, 0x0120}, {192, 0x0121}, {224, 0x0122}, {256, 0x0123},
243 {288, 0x0100}, {320, 0x0101}, {352, 0x0601}, {384, 0x0102}, 289 {288, 0x0100}, {320, 0x0101}, {352, 0x0601}, {384, 0x0102},
244 {416, 0x0602}, {448, 0x0126}, {480, 0x0103}, {512, 0x0127}, 290 {416, 0x0602}, {448, 0x0126}, {480, 0x0103}, {512, 0x0127},
@@ -258,7 +304,7 @@ static const struct mpc_i2c_divider mpc_i2c_dividers_8xxx[] = {
258 {49152, 0x011e}, {61440, 0x011f} 304 {49152, 0x011e}, {61440, 0x011f}
259}; 305};
260 306
261u32 mpc_i2c_get_sec_cfg_8xxx(void) 307static u32 __devinit mpc_i2c_get_sec_cfg_8xxx(void)
262{ 308{
263 struct device_node *node = NULL; 309 struct device_node *node = NULL;
264 u32 __iomem *reg; 310 u32 __iomem *reg;
@@ -287,13 +333,14 @@ u32 mpc_i2c_get_sec_cfg_8xxx(void)
287 return val; 333 return val;
288} 334}
289 335
290int mpc_i2c_get_fdr_8xxx(struct device_node *node, u32 clock, u32 prescaler) 336static int __devinit mpc_i2c_get_fdr_8xxx(struct device_node *node, u32 clock,
337 u32 prescaler)
291{ 338{
292 const struct mpc_i2c_divider *div = NULL; 339 const struct mpc_i2c_divider *div = NULL;
293 u32 divider; 340 u32 divider;
294 int i; 341 int i;
295 342
296 if (!clock) 343 if (clock == MPC_I2C_CLOCK_LEGACY)
297 return -EINVAL; 344 return -EINVAL;
298 345
299 /* Determine proper divider value */ 346 /* Determine proper divider value */
@@ -320,12 +367,19 @@ int mpc_i2c_get_fdr_8xxx(struct device_node *node, u32 clock, u32 prescaler)
320 return div ? (int)div->fdr : -EINVAL; 367 return div ? (int)div->fdr : -EINVAL;
321} 368}
322 369
323static void mpc_i2c_setclock_8xxx(struct device_node *node, 370static void __devinit mpc_i2c_setup_8xxx(struct device_node *node,
324 struct mpc_i2c *i2c, 371 struct mpc_i2c *i2c,
325 u32 clock, u32 prescaler) 372 u32 clock, u32 prescaler)
326{ 373{
327 int ret, fdr; 374 int ret, fdr;
328 375
376 if (clock == MPC_I2C_CLOCK_PRESERVE) {
377 dev_dbg(i2c->dev, "using dfsrr %d, fdr %d\n",
378 readb(i2c->base + MPC_I2C_DFSRR),
379 readb(i2c->base + MPC_I2C_FDR));
380 return;
381 }
382
329 ret = mpc_i2c_get_fdr_8xxx(node, clock, prescaler); 383 ret = mpc_i2c_get_fdr_8xxx(node, clock, prescaler);
330 fdr = (ret >= 0) ? ret : 0x1031; /* backward compatibility */ 384 fdr = (ret >= 0) ? ret : 0x1031; /* backward compatibility */
331 385
@@ -338,9 +392,9 @@ static void mpc_i2c_setclock_8xxx(struct device_node *node,
338} 392}
339 393
340#else /* !CONFIG_FSL_SOC */ 394#else /* !CONFIG_FSL_SOC */
341static void mpc_i2c_setclock_8xxx(struct device_node *node, 395static void __devinit mpc_i2c_setup_8xxx(struct device_node *node,
342 struct mpc_i2c *i2c, 396 struct mpc_i2c *i2c,
343 u32 clock, u32 prescaler) 397 u32 clock, u32 prescaler)
344{ 398{
345} 399}
346#endif /* CONFIG_FSL_SOC */ 400#endif /* CONFIG_FSL_SOC */
@@ -494,7 +548,7 @@ static int __devinit fsl_i2c_probe(struct of_device *op,
494{ 548{
495 struct mpc_i2c *i2c; 549 struct mpc_i2c *i2c;
496 const u32 *prop; 550 const u32 *prop;
497 u32 clock = 0; 551 u32 clock = MPC_I2C_CLOCK_LEGACY;
498 int result = 0; 552 int result = 0;
499 int plen; 553 int plen;
500 554
@@ -523,21 +577,21 @@ static int __devinit fsl_i2c_probe(struct of_device *op,
523 } 577 }
524 } 578 }
525 579
526 if (!of_get_property(op->node, "fsl,preserve-clocking", NULL)) { 580 if (of_get_property(op->node, "fsl,preserve-clocking", NULL)) {
581 clock = MPC_I2C_CLOCK_PRESERVE;
582 } else {
527 prop = of_get_property(op->node, "clock-frequency", &plen); 583 prop = of_get_property(op->node, "clock-frequency", &plen);
528 if (prop && plen == sizeof(u32)) 584 if (prop && plen == sizeof(u32))
529 clock = *prop; 585 clock = *prop;
586 }
530 587
531 if (match->data) { 588 if (match->data) {
532 struct mpc_i2c_match_data *data = 589 struct mpc_i2c_data *data = match->data;
533 (struct mpc_i2c_match_data *)match->data; 590 data->setup(op->node, i2c, clock, data->prescaler);
534 data->setclock(op->node, i2c, clock, data->prescaler); 591 } else {
535 } else { 592 /* Backwards compatibility */
536 /* Backwards compatibility */ 593 if (of_get_property(op->node, "dfsrr", NULL))
537 if (of_get_property(op->node, "dfsrr", NULL)) 594 mpc_i2c_setup_8xxx(op->node, i2c, clock, 0);
538 mpc_i2c_setclock_8xxx(op->node, i2c,
539 clock, 0);
540 }
541 } 595 }
542 596
543 dev_set_drvdata(&op->dev, i2c); 597 dev_set_drvdata(&op->dev, i2c);
@@ -582,47 +636,42 @@ static int __devexit fsl_i2c_remove(struct of_device *op)
582 return 0; 636 return 0;
583}; 637};
584 638
639static struct mpc_i2c_data mpc_i2c_data_512x __devinitdata = {
640 .setup = mpc_i2c_setup_512x,
641};
642
643static struct mpc_i2c_data mpc_i2c_data_52xx __devinitdata = {
644 .setup = mpc_i2c_setup_52xx,
645};
646
647static struct mpc_i2c_data mpc_i2c_data_8313 __devinitdata = {
648 .setup = mpc_i2c_setup_8xxx,
649};
650
651static struct mpc_i2c_data mpc_i2c_data_8543 __devinitdata = {
652 .setup = mpc_i2c_setup_8xxx,
653 .prescaler = 2,
654};
655
656static struct mpc_i2c_data mpc_i2c_data_8544 __devinitdata = {
657 .setup = mpc_i2c_setup_8xxx,
658 .prescaler = 3,
659};
660
585static const struct of_device_id mpc_i2c_of_match[] = { 661static const struct of_device_id mpc_i2c_of_match[] = {
586 {.compatible = "mpc5200-i2c", 662 {.compatible = "mpc5200-i2c", .data = &mpc_i2c_data_52xx, },
587 .data = &(struct mpc_i2c_match_data) { 663 {.compatible = "fsl,mpc5200b-i2c", .data = &mpc_i2c_data_52xx, },
588 .setclock = mpc_i2c_setclock_52xx, 664 {.compatible = "fsl,mpc5200-i2c", .data = &mpc_i2c_data_52xx, },
589 }, 665 {.compatible = "fsl,mpc5121-i2c", .data = &mpc_i2c_data_512x, },
590 }, 666 {.compatible = "fsl,mpc8313-i2c", .data = &mpc_i2c_data_8313, },
591 {.compatible = "fsl,mpc5200b-i2c", 667 {.compatible = "fsl,mpc8543-i2c", .data = &mpc_i2c_data_8543, },
592 .data = &(struct mpc_i2c_match_data) { 668 {.compatible = "fsl,mpc8544-i2c", .data = &mpc_i2c_data_8544, },
593 .setclock = mpc_i2c_setclock_52xx,
594 },
595 },
596 {.compatible = "fsl,mpc5200-i2c",
597 .data = &(struct mpc_i2c_match_data) {
598 .setclock = mpc_i2c_setclock_52xx,
599 },
600 },
601 {.compatible = "fsl,mpc8313-i2c",
602 .data = &(struct mpc_i2c_match_data) {
603 .setclock = mpc_i2c_setclock_8xxx,
604 },
605 },
606 {.compatible = "fsl,mpc8543-i2c",
607 .data = &(struct mpc_i2c_match_data) {
608 .setclock = mpc_i2c_setclock_8xxx,
609 .prescaler = 2,
610 },
611 },
612 {.compatible = "fsl,mpc8544-i2c",
613 .data = &(struct mpc_i2c_match_data) {
614 .setclock = mpc_i2c_setclock_8xxx,
615 .prescaler = 3,
616 },
617 /* Backward compatibility */ 669 /* Backward compatibility */
618 },
619 {.compatible = "fsl-i2c", }, 670 {.compatible = "fsl-i2c", },
620 {}, 671 {},
621}; 672};
622
623MODULE_DEVICE_TABLE(of, mpc_i2c_of_match); 673MODULE_DEVICE_TABLE(of, mpc_i2c_of_match);
624 674
625
626/* Structure for a device driver */ 675/* Structure for a device driver */
627static struct of_platform_driver mpc_i2c_driver = { 676static struct of_platform_driver mpc_i2c_driver = {
628 .match_table = mpc_i2c_of_match, 677 .match_table = mpc_i2c_of_match,
@@ -655,5 +704,5 @@ module_exit(fsl_i2c_exit);
655 704
656MODULE_AUTHOR("Adrian Cox <adrian@humboldt.co.uk>"); 705MODULE_AUTHOR("Adrian Cox <adrian@humboldt.co.uk>");
657MODULE_DESCRIPTION("I2C-Bus adapter for MPC107 bridge and " 706MODULE_DESCRIPTION("I2C-Bus adapter for MPC107 bridge and "
658 "MPC824x/85xx/52xx processors"); 707 "MPC824x/83xx/85xx/86xx/512x/52xx processors");
659MODULE_LICENSE("GPL"); 708MODULE_LICENSE("GPL");
diff --git a/drivers/i2c/busses/i2c-mv64xxx.c b/drivers/i2c/busses/i2c-mv64xxx.c
index ed387ffa4730..3623a4499084 100644
--- a/drivers/i2c/busses/i2c-mv64xxx.c
+++ b/drivers/i2c/busses/i2c-mv64xxx.c
@@ -10,6 +10,7 @@
10 * or implied. 10 * or implied.
11 */ 11 */
12#include <linux/kernel.h> 12#include <linux/kernel.h>
13#include <linux/slab.h>
13#include <linux/module.h> 14#include <linux/module.h>
14#include <linux/spinlock.h> 15#include <linux/spinlock.h>
15#include <linux/i2c.h> 16#include <linux/i2c.h>
diff --git a/drivers/i2c/busses/i2c-nforce2.c b/drivers/i2c/busses/i2c-nforce2.c
index ec11d1c4e77b..4a48dd4ef787 100644
--- a/drivers/i2c/busses/i2c-nforce2.c
+++ b/drivers/i2c/busses/i2c-nforce2.c
@@ -56,6 +56,7 @@
56#include <linux/delay.h> 56#include <linux/delay.h>
57#include <linux/dmi.h> 57#include <linux/dmi.h>
58#include <linux/acpi.h> 58#include <linux/acpi.h>
59#include <linux/slab.h>
59#include <asm/io.h> 60#include <asm/io.h>
60 61
61MODULE_LICENSE("GPL"); 62MODULE_LICENSE("GPL");
@@ -308,7 +309,7 @@ static struct i2c_algorithm smbus_algorithm = {
308}; 309};
309 310
310 311
311static struct pci_device_id nforce2_ids[] = { 312static const struct pci_device_id nforce2_ids[] = {
312 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS) }, 313 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS) },
313 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_SMBUS) }, 314 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_SMBUS) },
314 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3_SMBUS) }, 315 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3_SMBUS) },
diff --git a/drivers/i2c/busses/i2c-nomadik.c b/drivers/i2c/busses/i2c-nomadik.c
new file mode 100644
index 000000000000..a4f8d33fa389
--- /dev/null
+++ b/drivers/i2c/busses/i2c-nomadik.c
@@ -0,0 +1,960 @@
1/*
2 * Copyright (C) 2009 ST-Ericsson
3 * Copyright (C) 2009 STMicroelectronics
4 *
5 * I2C master mode controller driver, used in Nomadik 8815
6 * and Ux500 platforms.
7 *
8 * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
9 * Author: Sachin Verma <sachin.verma@st.com>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2, as
13 * published by the Free Software Foundation.
14 */
15#include <linux/init.h>
16#include <linux/module.h>
17#include <linux/platform_device.h>
18#include <linux/delay.h>
19#include <linux/slab.h>
20#include <linux/interrupt.h>
21#include <linux/i2c.h>
22#include <linux/err.h>
23#include <linux/clk.h>
24#include <linux/io.h>
25
26#include <plat/i2c.h>
27
28#define DRIVER_NAME "nmk-i2c"
29
30/* I2C Controller register offsets */
31#define I2C_CR (0x000)
32#define I2C_SCR (0x004)
33#define I2C_HSMCR (0x008)
34#define I2C_MCR (0x00C)
35#define I2C_TFR (0x010)
36#define I2C_SR (0x014)
37#define I2C_RFR (0x018)
38#define I2C_TFTR (0x01C)
39#define I2C_RFTR (0x020)
40#define I2C_DMAR (0x024)
41#define I2C_BRCR (0x028)
42#define I2C_IMSCR (0x02C)
43#define I2C_RISR (0x030)
44#define I2C_MISR (0x034)
45#define I2C_ICR (0x038)
46
47/* Control registers */
48#define I2C_CR_PE (0x1 << 0) /* Peripheral Enable */
49#define I2C_CR_OM (0x3 << 1) /* Operating mode */
50#define I2C_CR_SAM (0x1 << 3) /* Slave addressing mode */
51#define I2C_CR_SM (0x3 << 4) /* Speed mode */
52#define I2C_CR_SGCM (0x1 << 6) /* Slave general call mode */
53#define I2C_CR_FTX (0x1 << 7) /* Flush Transmit */
54#define I2C_CR_FRX (0x1 << 8) /* Flush Receive */
55#define I2C_CR_DMA_TX_EN (0x1 << 9) /* DMA Tx enable */
56#define I2C_CR_DMA_RX_EN (0x1 << 10) /* DMA Rx Enable */
57#define I2C_CR_DMA_SLE (0x1 << 11) /* DMA sync. logic enable */
58#define I2C_CR_LM (0x1 << 12) /* Loopback mode */
59#define I2C_CR_FON (0x3 << 13) /* Filtering on */
60#define I2C_CR_FS (0x3 << 15) /* Force stop enable */
61
62/* Master controller (MCR) register */
63#define I2C_MCR_OP (0x1 << 0) /* Operation */
64#define I2C_MCR_A7 (0x7f << 1) /* 7-bit address */
65#define I2C_MCR_EA10 (0x7 << 8) /* 10-bit Extended address */
66#define I2C_MCR_SB (0x1 << 11) /* Extended address */
67#define I2C_MCR_AM (0x3 << 12) /* Address type */
68#define I2C_MCR_STOP (0x1 << 14) /* Stop condition */
69#define I2C_MCR_LENGTH (0x7ff << 15) /* Transaction length */
70
71/* Status register (SR) */
72#define I2C_SR_OP (0x3 << 0) /* Operation */
73#define I2C_SR_STATUS (0x3 << 2) /* controller status */
74#define I2C_SR_CAUSE (0x7 << 4) /* Abort cause */
75#define I2C_SR_TYPE (0x3 << 7) /* Receive type */
76#define I2C_SR_LENGTH (0x7ff << 9) /* Transfer length */
77
78/* Interrupt mask set/clear (IMSCR) bits */
79#define I2C_IT_TXFE (0x1 << 0)
80#define I2C_IT_TXFNE (0x1 << 1)
81#define I2C_IT_TXFF (0x1 << 2)
82#define I2C_IT_TXFOVR (0x1 << 3)
83#define I2C_IT_RXFE (0x1 << 4)
84#define I2C_IT_RXFNF (0x1 << 5)
85#define I2C_IT_RXFF (0x1 << 6)
86#define I2C_IT_RFSR (0x1 << 16)
87#define I2C_IT_RFSE (0x1 << 17)
88#define I2C_IT_WTSR (0x1 << 18)
89#define I2C_IT_MTD (0x1 << 19)
90#define I2C_IT_STD (0x1 << 20)
91#define I2C_IT_MAL (0x1 << 24)
92#define I2C_IT_BERR (0x1 << 25)
93#define I2C_IT_MTDWS (0x1 << 28)
94
95#define GEN_MASK(val, mask, sb) (((val) << (sb)) & (mask))
96
97/* some bits in ICR are reserved */
98#define I2C_CLEAR_ALL_INTS 0x131f007f
99
100/* first three msb bits are reserved */
101#define IRQ_MASK(mask) (mask & 0x1fffffff)
102
103/* maximum threshold value */
104#define MAX_I2C_FIFO_THRESHOLD 15
105
106enum i2c_status {
107 I2C_NOP,
108 I2C_ON_GOING,
109 I2C_OK,
110 I2C_ABORT
111};
112
113/* operation */
114enum i2c_operation {
115 I2C_NO_OPERATION = 0xff,
116 I2C_WRITE = 0x00,
117 I2C_READ = 0x01
118};
119
120/* controller response timeout in ms */
121#define I2C_TIMEOUT_MS 500
122
123/**
124 * struct i2c_nmk_client - client specific data
125 * @slave_adr: 7-bit slave address
126 * @count: no. bytes to be transfered
127 * @buffer: client data buffer
128 * @xfer_bytes: bytes transfered till now
129 * @operation: current I2C operation
130 */
131struct i2c_nmk_client {
132 unsigned short slave_adr;
133 unsigned long count;
134 unsigned char *buffer;
135 unsigned long xfer_bytes;
136 enum i2c_operation operation;
137};
138
139/**
140 * struct nmk_i2c_dev - private data structure of the controller
141 * @pdev: parent platform device
142 * @adap: corresponding I2C adapter
143 * @irq: interrupt line for the controller
144 * @virtbase: virtual io memory area
145 * @clk: hardware i2c block clock
146 * @cfg: machine provided controller configuration
147 * @cli: holder of client specific data
148 * @stop: stop condition
149 * @xfer_complete: acknowledge completion for a I2C message
150 * @result: controller propogated result
151 */
152struct nmk_i2c_dev {
153 struct platform_device *pdev;
154 struct i2c_adapter adap;
155 int irq;
156 void __iomem *virtbase;
157 struct clk *clk;
158 struct nmk_i2c_controller cfg;
159 struct i2c_nmk_client cli;
160 int stop;
161 struct completion xfer_complete;
162 int result;
163};
164
165/* controller's abort causes */
166static const char *abort_causes[] = {
167 "no ack received after address transmission",
168 "no ack received during data phase",
169 "ack received after xmission of master code",
170 "master lost arbitration",
171 "slave restarts",
172 "slave reset",
173 "overflow, maxsize is 2047 bytes",
174};
175
176static inline void i2c_set_bit(void __iomem *reg, u32 mask)
177{
178 writel(readl(reg) | mask, reg);
179}
180
181static inline void i2c_clr_bit(void __iomem *reg, u32 mask)
182{
183 writel(readl(reg) & ~mask, reg);
184}
185
186/**
187 * flush_i2c_fifo() - This function flushes the I2C FIFO
188 * @dev: private data of I2C Driver
189 *
190 * This function flushes the I2C Tx and Rx FIFOs. It returns
191 * 0 on successful flushing of FIFO
192 */
193static int flush_i2c_fifo(struct nmk_i2c_dev *dev)
194{
195#define LOOP_ATTEMPTS 10
196 int i;
197 unsigned long timeout;
198
199 /*
200 * flush the transmit and receive FIFO. The flushing
201 * operation takes several cycles before to be completed.
202 * On the completion, the I2C internal logic clears these
203 * bits, until then no one must access Tx, Rx FIFO and
204 * should poll on these bits waiting for the completion.
205 */
206 writel((I2C_CR_FTX | I2C_CR_FRX), dev->virtbase + I2C_CR);
207
208 for (i = 0; i < LOOP_ATTEMPTS; i++) {
209 timeout = jiffies + msecs_to_jiffies(I2C_TIMEOUT_MS);
210
211 while (!time_after(jiffies, timeout)) {
212 if ((readl(dev->virtbase + I2C_CR) &
213 (I2C_CR_FTX | I2C_CR_FRX)) == 0)
214 return 0;
215 }
216 }
217
218 dev_err(&dev->pdev->dev, "flushing operation timed out "
219 "giving up after %d attempts", LOOP_ATTEMPTS);
220
221 return -ETIMEDOUT;
222}
223
224/**
225 * disable_all_interrupts() - Disable all interrupts of this I2c Bus
226 * @dev: private data of I2C Driver
227 */
228static void disable_all_interrupts(struct nmk_i2c_dev *dev)
229{
230 u32 mask = IRQ_MASK(0);
231 writel(mask, dev->virtbase + I2C_IMSCR);
232}
233
234/**
235 * clear_all_interrupts() - Clear all interrupts of I2C Controller
236 * @dev: private data of I2C Driver
237 */
238static void clear_all_interrupts(struct nmk_i2c_dev *dev)
239{
240 u32 mask;
241 mask = IRQ_MASK(I2C_CLEAR_ALL_INTS);
242 writel(mask, dev->virtbase + I2C_ICR);
243}
244
245/**
246 * init_hw() - initialize the I2C hardware
247 * @dev: private data of I2C Driver
248 */
249static int init_hw(struct nmk_i2c_dev *dev)
250{
251 int stat;
252
253 stat = flush_i2c_fifo(dev);
254 if (stat)
255 return stat;
256
257 /* disable the controller */
258 i2c_clr_bit(dev->virtbase + I2C_CR , I2C_CR_PE);
259
260 disable_all_interrupts(dev);
261
262 clear_all_interrupts(dev);
263
264 dev->cli.operation = I2C_NO_OPERATION;
265
266 return 0;
267}
268
269/* enable peripheral, master mode operation */
270#define DEFAULT_I2C_REG_CR ((1 << 1) | I2C_CR_PE)
271
272/**
273 * load_i2c_mcr_reg() - load the MCR register
274 * @dev: private data of controller
275 */
276static u32 load_i2c_mcr_reg(struct nmk_i2c_dev *dev)
277{
278 u32 mcr = 0;
279
280 /* 7-bit address transaction */
281 mcr |= GEN_MASK(1, I2C_MCR_AM, 12);
282 mcr |= GEN_MASK(dev->cli.slave_adr, I2C_MCR_A7, 1);
283
284 /* start byte procedure not applied */
285 mcr |= GEN_MASK(0, I2C_MCR_SB, 11);
286
287 /* check the operation, master read/write? */
288 if (dev->cli.operation == I2C_WRITE)
289 mcr |= GEN_MASK(I2C_WRITE, I2C_MCR_OP, 0);
290 else
291 mcr |= GEN_MASK(I2C_READ, I2C_MCR_OP, 0);
292
293 /* stop or repeated start? */
294 if (dev->stop)
295 mcr |= GEN_MASK(1, I2C_MCR_STOP, 14);
296 else
297 mcr &= ~(GEN_MASK(1, I2C_MCR_STOP, 14));
298
299 mcr |= GEN_MASK(dev->cli.count, I2C_MCR_LENGTH, 15);
300
301 return mcr;
302}
303
304/**
305 * setup_i2c_controller() - setup the controller
306 * @dev: private data of controller
307 */
308static void setup_i2c_controller(struct nmk_i2c_dev *dev)
309{
310 u32 brcr1, brcr2;
311 u32 i2c_clk, div;
312
313 writel(0x0, dev->virtbase + I2C_CR);
314 writel(0x0, dev->virtbase + I2C_HSMCR);
315 writel(0x0, dev->virtbase + I2C_TFTR);
316 writel(0x0, dev->virtbase + I2C_RFTR);
317 writel(0x0, dev->virtbase + I2C_DMAR);
318
319 /*
320 * set the slsu:
321 *
322 * slsu defines the data setup time after SCL clock
323 * stretching in terms of i2c clk cycles. The
324 * needed setup time for the three modes are 250ns,
325 * 100ns, 10ns repectively thus leading to the values
326 * of 14, 6, 2 for a 48 MHz i2c clk.
327 */
328 writel(dev->cfg.slsu << 16, dev->virtbase + I2C_SCR);
329
330 i2c_clk = clk_get_rate(dev->clk);
331
332 /* fallback to std. mode if machine has not provided it */
333 if (dev->cfg.clk_freq == 0)
334 dev->cfg.clk_freq = 100000;
335
336 /*
337 * The spec says, in case of std. mode the divider is
338 * 2 whereas it is 3 for fast and fastplus mode of
339 * operation. TODO - high speed support.
340 */
341 div = (dev->cfg.clk_freq > 100000) ? 3 : 2;
342
343 /*
344 * generate the mask for baud rate counters. The controller
345 * has two baud rate counters. One is used for High speed
346 * operation, and the other is for std, fast mode, fast mode
347 * plus operation. Currently we do not supprt high speed mode
348 * so set brcr1 to 0.
349 */
350 brcr1 = 0 << 16;
351 brcr2 = (i2c_clk/(dev->cfg.clk_freq * div)) & 0xffff;
352
353 /* set the baud rate counter register */
354 writel((brcr1 | brcr2), dev->virtbase + I2C_BRCR);
355
356 /*
357 * set the speed mode. Currently we support
358 * only standard and fast mode of operation
359 * TODO - support for fast mode plus (upto 1Mb/s)
360 * and high speed (up to 3.4 Mb/s)
361 */
362 if (dev->cfg.sm > I2C_FREQ_MODE_FAST) {
363 dev_err(&dev->pdev->dev, "do not support this mode "
364 "defaulting to std. mode\n");
365 brcr2 = i2c_clk/(100000 * 2) & 0xffff;
366 writel((brcr1 | brcr2), dev->virtbase + I2C_BRCR);
367 writel(I2C_FREQ_MODE_STANDARD << 4,
368 dev->virtbase + I2C_CR);
369 }
370 writel(dev->cfg.sm << 4, dev->virtbase + I2C_CR);
371
372 /* set the Tx and Rx FIFO threshold */
373 writel(dev->cfg.tft, dev->virtbase + I2C_TFTR);
374 writel(dev->cfg.rft, dev->virtbase + I2C_RFTR);
375}
376
377/**
378 * read_i2c() - Read from I2C client device
379 * @dev: private data of I2C Driver
380 *
381 * This function reads from i2c client device when controller is in
382 * master mode. There is a completion timeout. If there is no transfer
383 * before timeout error is returned.
384 */
385static int read_i2c(struct nmk_i2c_dev *dev)
386{
387 u32 status = 0;
388 u32 mcr;
389 u32 irq_mask = 0;
390 int timeout;
391
392 mcr = load_i2c_mcr_reg(dev);
393 writel(mcr, dev->virtbase + I2C_MCR);
394
395 /* load the current CR value */
396 writel(readl(dev->virtbase + I2C_CR) | DEFAULT_I2C_REG_CR,
397 dev->virtbase + I2C_CR);
398
399 /* enable the controller */
400 i2c_set_bit(dev->virtbase + I2C_CR, I2C_CR_PE);
401
402 init_completion(&dev->xfer_complete);
403
404 /* enable interrupts by setting the mask */
405 irq_mask = (I2C_IT_RXFNF | I2C_IT_RXFF |
406 I2C_IT_MAL | I2C_IT_BERR);
407
408 if (dev->stop)
409 irq_mask |= I2C_IT_MTD;
410 else
411 irq_mask |= I2C_IT_MTDWS;
412
413 irq_mask = I2C_CLEAR_ALL_INTS & IRQ_MASK(irq_mask);
414
415 writel(readl(dev->virtbase + I2C_IMSCR) | irq_mask,
416 dev->virtbase + I2C_IMSCR);
417
418 timeout = wait_for_completion_interruptible_timeout(
419 &dev->xfer_complete, msecs_to_jiffies(I2C_TIMEOUT_MS));
420
421 if (timeout < 0) {
422 dev_err(&dev->pdev->dev,
423 "wait_for_completion_interruptible_timeout"
424 "returned %d waiting for event\n", timeout);
425 status = timeout;
426 }
427
428 if (timeout == 0) {
429 /* controler has timedout, re-init the h/w */
430 dev_err(&dev->pdev->dev, "controller timed out, re-init h/w\n");
431 (void) init_hw(dev);
432 status = -ETIMEDOUT;
433 }
434
435 return status;
436}
437
438/**
439 * write_i2c() - Write data to I2C client.
440 * @dev: private data of I2C Driver
441 *
442 * This function writes data to I2C client
443 */
444static int write_i2c(struct nmk_i2c_dev *dev)
445{
446 u32 status = 0;
447 u32 mcr;
448 u32 irq_mask = 0;
449 int timeout;
450
451 mcr = load_i2c_mcr_reg(dev);
452
453 writel(mcr, dev->virtbase + I2C_MCR);
454
455 /* load the current CR value */
456 writel(readl(dev->virtbase + I2C_CR) | DEFAULT_I2C_REG_CR,
457 dev->virtbase + I2C_CR);
458
459 /* enable the controller */
460 i2c_set_bit(dev->virtbase + I2C_CR , I2C_CR_PE);
461
462 init_completion(&dev->xfer_complete);
463
464 /* enable interrupts by settings the masks */
465 irq_mask = (I2C_IT_TXFNE | I2C_IT_TXFOVR |
466 I2C_IT_MAL | I2C_IT_BERR);
467
468 /*
469 * check if we want to transfer a single or multiple bytes, if so
470 * set the MTDWS bit (Master Transaction Done Without Stop)
471 * to start repeated start operation
472 */
473 if (dev->stop)
474 irq_mask |= I2C_IT_MTD;
475 else
476 irq_mask |= I2C_IT_MTDWS;
477
478 irq_mask = I2C_CLEAR_ALL_INTS & IRQ_MASK(irq_mask);
479
480 writel(readl(dev->virtbase + I2C_IMSCR) | irq_mask,
481 dev->virtbase + I2C_IMSCR);
482
483 timeout = wait_for_completion_interruptible_timeout(
484 &dev->xfer_complete, msecs_to_jiffies(I2C_TIMEOUT_MS));
485
486 if (timeout < 0) {
487 dev_err(&dev->pdev->dev,
488 "wait_for_completion_interruptible_timeout"
489 "returned %d waiting for event\n", timeout);
490 status = timeout;
491 }
492
493 if (timeout == 0) {
494 /* controler has timedout, re-init the h/w */
495 dev_err(&dev->pdev->dev, "controller timed out, re-init h/w\n");
496 (void) init_hw(dev);
497 status = -ETIMEDOUT;
498 }
499
500 return status;
501}
502
503/**
504 * nmk_i2c_xfer() - I2C transfer function used by kernel framework
505 * @i2c_adap - Adapter pointer to the controller
506 * @msgs[] - Pointer to data to be written.
507 * @num_msgs - Number of messages to be executed
508 *
509 * This is the function called by the generic kernel i2c_transfer()
510 * or i2c_smbus...() API calls. Note that this code is protected by the
511 * semaphore set in the kernel i2c_transfer() function.
512 *
513 * NOTE:
514 * READ TRANSFER : We impose a restriction of the first message to be the
515 * index message for any read transaction.
516 * - a no index is coded as '0',
517 * - 2byte big endian index is coded as '3'
518 * !!! msg[0].buf holds the actual index.
519 * This is compatible with generic messages of smbus emulator
520 * that send a one byte index.
521 * eg. a I2C transation to read 2 bytes from index 0
522 * idx = 0;
523 * msg[0].addr = client->addr;
524 * msg[0].flags = 0x0;
525 * msg[0].len = 1;
526 * msg[0].buf = &idx;
527 *
528 * msg[1].addr = client->addr;
529 * msg[1].flags = I2C_M_RD;
530 * msg[1].len = 2;
531 * msg[1].buf = rd_buff
532 * i2c_transfer(adap, msg, 2);
533 *
534 * WRITE TRANSFER : The I2C standard interface interprets all data as payload.
535 * If you want to emulate an SMBUS write transaction put the
536 * index as first byte(or first and second) in the payload.
537 * eg. a I2C transation to write 2 bytes from index 1
538 * wr_buff[0] = 0x1;
539 * wr_buff[1] = 0x23;
540 * wr_buff[2] = 0x46;
541 * msg[0].flags = 0x0;
542 * msg[0].len = 3;
543 * msg[0].buf = wr_buff;
544 * i2c_transfer(adap, msg, 1);
545 *
546 * To read or write a block of data (multiple bytes) using SMBUS emulation
547 * please use the i2c_smbus_read_i2c_block_data()
548 * or i2c_smbus_write_i2c_block_data() API
549 */
550static int nmk_i2c_xfer(struct i2c_adapter *i2c_adap,
551 struct i2c_msg msgs[], int num_msgs)
552{
553 int status;
554 int i;
555 u32 cause;
556 struct nmk_i2c_dev *dev = i2c_get_adapdata(i2c_adap);
557
558 status = init_hw(dev);
559 if (status)
560 return status;
561
562 /* setup the i2c controller */
563 setup_i2c_controller(dev);
564
565 for (i = 0; i < num_msgs; i++) {
566 if (unlikely(msgs[i].flags & I2C_M_TEN)) {
567 dev_err(&dev->pdev->dev, "10 bit addressing"
568 "not supported\n");
569 return -EINVAL;
570 }
571 dev->cli.slave_adr = msgs[i].addr;
572 dev->cli.buffer = msgs[i].buf;
573 dev->cli.count = msgs[i].len;
574 dev->stop = (i < (num_msgs - 1)) ? 0 : 1;
575 dev->result = 0;
576
577 if (msgs[i].flags & I2C_M_RD) {
578 /* it is a read operation */
579 dev->cli.operation = I2C_READ;
580 status = read_i2c(dev);
581 } else {
582 /* write operation */
583 dev->cli.operation = I2C_WRITE;
584 status = write_i2c(dev);
585 }
586 if (status || (dev->result)) {
587 /* get the abort cause */
588 cause = (readl(dev->virtbase + I2C_SR) >> 4) & 0x7;
589 dev_err(&dev->pdev->dev, "error during I2C"
590 "message xfer: %d\n", cause);
591 dev_err(&dev->pdev->dev, "%s\n",
592 cause >= ARRAY_SIZE(abort_causes)
593 ? "unknown reason" : abort_causes[cause]);
594 return status;
595 }
596 mdelay(1);
597 }
598 /* return the no. messages processed */
599 if (status)
600 return status;
601 else
602 return num_msgs;
603}
604
605/**
606 * disable_interrupts() - disable the interrupts
607 * @dev: private data of controller
608 */
609static int disable_interrupts(struct nmk_i2c_dev *dev, u32 irq)
610{
611 irq = IRQ_MASK(irq);
612 writel(readl(dev->virtbase + I2C_IMSCR) & ~(I2C_CLEAR_ALL_INTS & irq),
613 dev->virtbase + I2C_IMSCR);
614 return 0;
615}
616
617/**
618 * i2c_irq_handler() - interrupt routine
619 * @irq: interrupt number
620 * @arg: data passed to the handler
621 *
622 * This is the interrupt handler for the i2c driver. Currently
623 * it handles the major interrupts like Rx & Tx FIFO management
624 * interrupts, master transaction interrupts, arbitration and
625 * bus error interrupts. The rest of the interrupts are treated as
626 * unhandled.
627 */
628static irqreturn_t i2c_irq_handler(int irq, void *arg)
629{
630 struct nmk_i2c_dev *dev = arg;
631 u32 tft, rft;
632 u32 count;
633 u32 misr;
634 u32 src = 0;
635
636 /* load Tx FIFO and Rx FIFO threshold values */
637 tft = readl(dev->virtbase + I2C_TFTR);
638 rft = readl(dev->virtbase + I2C_RFTR);
639
640 /* read interrupt status register */
641 misr = readl(dev->virtbase + I2C_MISR);
642
643 src = __ffs(misr);
644 switch ((1 << src)) {
645
646 /* Transmit FIFO nearly empty interrupt */
647 case I2C_IT_TXFNE:
648 {
649 if (dev->cli.operation == I2C_READ) {
650 /*
651 * in read operation why do we care for writing?
652 * so disable the Transmit FIFO interrupt
653 */
654 disable_interrupts(dev, I2C_IT_TXFNE);
655 } else {
656 for (count = (MAX_I2C_FIFO_THRESHOLD - tft - 2);
657 (count > 0) &&
658 (dev->cli.count != 0);
659 count--) {
660 /* write to the Tx FIFO */
661 writeb(*dev->cli.buffer,
662 dev->virtbase + I2C_TFR);
663 dev->cli.buffer++;
664 dev->cli.count--;
665 dev->cli.xfer_bytes++;
666 }
667 /*
668 * if done, close the transfer by disabling the
669 * corresponding TXFNE interrupt
670 */
671 if (dev->cli.count == 0)
672 disable_interrupts(dev, I2C_IT_TXFNE);
673 }
674 }
675 break;
676
677 /*
678 * Rx FIFO nearly full interrupt.
679 * This is set when the numer of entries in Rx FIFO is
680 * greater or equal than the threshold value programmed
681 * in RFT
682 */
683 case I2C_IT_RXFNF:
684 for (count = rft; count > 0; count--) {
685 /* Read the Rx FIFO */
686 *dev->cli.buffer = readb(dev->virtbase + I2C_RFR);
687 dev->cli.buffer++;
688 }
689 dev->cli.count -= rft;
690 dev->cli.xfer_bytes += rft;
691 break;
692
693 /* Rx FIFO full */
694 case I2C_IT_RXFF:
695 for (count = MAX_I2C_FIFO_THRESHOLD; count > 0; count--) {
696 *dev->cli.buffer = readb(dev->virtbase + I2C_RFR);
697 dev->cli.buffer++;
698 }
699 dev->cli.count -= MAX_I2C_FIFO_THRESHOLD;
700 dev->cli.xfer_bytes += MAX_I2C_FIFO_THRESHOLD;
701 break;
702
703 /* Master Transaction Done with/without stop */
704 case I2C_IT_MTD:
705 case I2C_IT_MTDWS:
706 if (dev->cli.operation == I2C_READ) {
707 while (!readl(dev->virtbase + I2C_RISR) & I2C_IT_RXFE) {
708 if (dev->cli.count == 0)
709 break;
710 *dev->cli.buffer =
711 readb(dev->virtbase + I2C_RFR);
712 dev->cli.buffer++;
713 dev->cli.count--;
714 dev->cli.xfer_bytes++;
715 }
716 }
717
718 i2c_set_bit(dev->virtbase + I2C_ICR, I2C_IT_MTD);
719 i2c_set_bit(dev->virtbase + I2C_ICR, I2C_IT_MTDWS);
720
721 disable_interrupts(dev,
722 (I2C_IT_TXFNE | I2C_IT_TXFE | I2C_IT_TXFF
723 | I2C_IT_TXFOVR | I2C_IT_RXFNF
724 | I2C_IT_RXFF | I2C_IT_RXFE));
725
726 if (dev->cli.count) {
727 dev->result = -1;
728 dev_err(&dev->pdev->dev, "%lu bytes still remain to be"
729 "xfered\n", dev->cli.count);
730 (void) init_hw(dev);
731 }
732 complete(&dev->xfer_complete);
733
734 break;
735
736 /* Master Arbitration lost interrupt */
737 case I2C_IT_MAL:
738 dev->result = -1;
739 (void) init_hw(dev);
740
741 i2c_set_bit(dev->virtbase + I2C_ICR, I2C_IT_MAL);
742 complete(&dev->xfer_complete);
743
744 break;
745
746 /*
747 * Bus Error interrupt.
748 * This happens when an unexpected start/stop condition occurs
749 * during the transaction.
750 */
751 case I2C_IT_BERR:
752 dev->result = -1;
753 /* get the status */
754 if (((readl(dev->virtbase + I2C_SR) >> 2) & 0x3) == I2C_ABORT)
755 (void) init_hw(dev);
756
757 i2c_set_bit(dev->virtbase + I2C_ICR, I2C_IT_BERR);
758 complete(&dev->xfer_complete);
759
760 break;
761
762 /*
763 * Tx FIFO overrun interrupt.
764 * This is set when a write operation in Tx FIFO is performed and
765 * the Tx FIFO is full.
766 */
767 case I2C_IT_TXFOVR:
768 dev->result = -1;
769 (void) init_hw(dev);
770
771 dev_err(&dev->pdev->dev, "Tx Fifo Over run\n");
772 complete(&dev->xfer_complete);
773
774 break;
775
776 /* unhandled interrupts by this driver - TODO*/
777 case I2C_IT_TXFE:
778 case I2C_IT_TXFF:
779 case I2C_IT_RXFE:
780 case I2C_IT_RFSR:
781 case I2C_IT_RFSE:
782 case I2C_IT_WTSR:
783 case I2C_IT_STD:
784 dev_err(&dev->pdev->dev, "unhandled Interrupt\n");
785 break;
786 default:
787 dev_err(&dev->pdev->dev, "spurious Interrupt..\n");
788 break;
789 }
790
791 return IRQ_HANDLED;
792}
793
794static unsigned int nmk_i2c_functionality(struct i2c_adapter *adap)
795{
796 return I2C_FUNC_I2C
797 | I2C_FUNC_SMBUS_BYTE_DATA
798 | I2C_FUNC_SMBUS_WORD_DATA
799 | I2C_FUNC_SMBUS_I2C_BLOCK;
800}
801
802static const struct i2c_algorithm nmk_i2c_algo = {
803 .master_xfer = nmk_i2c_xfer,
804 .functionality = nmk_i2c_functionality
805};
806
807static int __devinit nmk_i2c_probe(struct platform_device *pdev)
808{
809 int ret = 0;
810 struct resource *res;
811 struct nmk_i2c_controller *pdata =
812 pdev->dev.platform_data;
813 struct nmk_i2c_dev *dev;
814 struct i2c_adapter *adap;
815
816 dev = kzalloc(sizeof(struct nmk_i2c_dev), GFP_KERNEL);
817 if (!dev) {
818 dev_err(&pdev->dev, "cannot allocate memory\n");
819 ret = -ENOMEM;
820 goto err_no_mem;
821 }
822
823 dev->pdev = pdev;
824 platform_set_drvdata(pdev, dev);
825
826 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
827 if (!res) {
828 ret = -ENOENT;
829 goto err_no_resource;
830 }
831
832 if (request_mem_region(res->start, resource_size(res),
833 DRIVER_NAME "I/O region") == NULL) {
834 ret = -EBUSY;
835 goto err_no_region;
836 }
837
838 dev->virtbase = ioremap(res->start, resource_size(res));
839 if (!dev->virtbase) {
840 ret = -ENOMEM;
841 goto err_no_ioremap;
842 }
843
844 dev->irq = platform_get_irq(pdev, 0);
845 ret = request_irq(dev->irq, i2c_irq_handler, IRQF_DISABLED,
846 DRIVER_NAME, dev);
847 if (ret) {
848 dev_err(&pdev->dev, "cannot claim the irq %d\n", dev->irq);
849 goto err_irq;
850 }
851
852 dev->clk = clk_get(&pdev->dev, NULL);
853 if (IS_ERR(dev->clk)) {
854 dev_err(&pdev->dev, "could not get i2c clock\n");
855 ret = PTR_ERR(dev->clk);
856 goto err_no_clk;
857 }
858
859 clk_enable(dev->clk);
860
861 adap = &dev->adap;
862 adap->dev.parent = &pdev->dev;
863 adap->owner = THIS_MODULE;
864 adap->class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
865 adap->algo = &nmk_i2c_algo;
866
867 /* fetch the controller id */
868 adap->nr = pdev->id;
869
870 /* fetch the controller configuration from machine */
871 dev->cfg.clk_freq = pdata->clk_freq;
872 dev->cfg.slsu = pdata->slsu;
873 dev->cfg.tft = pdata->tft;
874 dev->cfg.rft = pdata->rft;
875 dev->cfg.sm = pdata->sm;
876
877 i2c_set_adapdata(adap, dev);
878
879 ret = init_hw(dev);
880 if (ret != 0) {
881 dev_err(&pdev->dev, "error in initializing i2c hardware\n");
882 goto err_init_hw;
883 }
884
885 dev_dbg(&pdev->dev, "initialize I2C%d bus on virtual "
886 "base %p\n", pdev->id, dev->virtbase);
887
888 ret = i2c_add_numbered_adapter(adap);
889 if (ret) {
890 dev_err(&pdev->dev, "failed to add adapter\n");
891 goto err_add_adap;
892 }
893
894 return 0;
895
896 err_init_hw:
897 clk_disable(dev->clk);
898 err_add_adap:
899 clk_put(dev->clk);
900 err_no_clk:
901 free_irq(dev->irq, dev);
902 err_irq:
903 iounmap(dev->virtbase);
904 err_no_ioremap:
905 release_mem_region(res->start, resource_size(res));
906 err_no_region:
907 platform_set_drvdata(pdev, NULL);
908 err_no_resource:
909 kfree(dev);
910 err_no_mem:
911
912 return ret;
913}
914
915static int __devexit nmk_i2c_remove(struct platform_device *pdev)
916{
917 struct nmk_i2c_dev *dev = platform_get_drvdata(pdev);
918
919 i2c_del_adapter(&dev->adap);
920 flush_i2c_fifo(dev);
921 disable_all_interrupts(dev);
922 clear_all_interrupts(dev);
923 /* disable the controller */
924 i2c_clr_bit(dev->virtbase + I2C_CR, I2C_CR_PE);
925 free_irq(dev->irq, dev);
926 iounmap(dev->virtbase);
927 clk_disable(dev->clk);
928 clk_put(dev->clk);
929 platform_set_drvdata(pdev, NULL);
930 kfree(dev);
931
932 return 0;
933}
934
935static struct platform_driver nmk_i2c_driver = {
936 .driver = {
937 .owner = THIS_MODULE,
938 .name = DRIVER_NAME,
939 },
940 .probe = nmk_i2c_probe,
941 .remove = __devexit_p(nmk_i2c_remove),
942};
943
944static int __init nmk_i2c_init(void)
945{
946 return platform_driver_register(&nmk_i2c_driver);
947}
948
949static void __exit nmk_i2c_exit(void)
950{
951 platform_driver_unregister(&nmk_i2c_driver);
952}
953
954subsys_initcall(nmk_i2c_init);
955module_exit(nmk_i2c_exit);
956
957MODULE_AUTHOR("Sachin Verma, Srinidhi KASAGAR");
958MODULE_DESCRIPTION("Nomadik/Ux500 I2C driver");
959MODULE_LICENSE("GPL");
960MODULE_ALIAS("platform:" DRIVER_NAME);
diff --git a/drivers/i2c/busses/i2c-ocores.c b/drivers/i2c/busses/i2c-ocores.c
index 0dabe643ec51..b4ed4ca802ed 100644
--- a/drivers/i2c/busses/i2c-ocores.c
+++ b/drivers/i2c/busses/i2c-ocores.c
@@ -18,6 +18,7 @@
18#include <linux/interrupt.h> 18#include <linux/interrupt.h>
19#include <linux/wait.h> 19#include <linux/wait.h>
20#include <linux/i2c-ocores.h> 20#include <linux/i2c-ocores.h>
21#include <linux/slab.h>
21#include <asm/io.h> 22#include <asm/io.h>
22 23
23struct ocores_i2c { 24struct ocores_i2c {
diff --git a/drivers/i2c/busses/i2c-octeon.c b/drivers/i2c/busses/i2c-octeon.c
new file mode 100644
index 000000000000..0e9f85d0a835
--- /dev/null
+++ b/drivers/i2c/busses/i2c-octeon.c
@@ -0,0 +1,652 @@
1/*
2 * (C) Copyright 2009-2010
3 * Nokia Siemens Networks, michael.lawnick.ext@nsn.com
4 *
5 * Portions Copyright (C) 2010 Cavium Networks, Inc.
6 *
7 * This is a driver for the i2c adapter in Cavium Networks' OCTEON processors.
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#include <linux/kernel.h>
15#include <linux/module.h>
16#include <linux/sched.h>
17#include <linux/slab.h>
18#include <linux/init.h>
19
20#include <linux/io.h>
21#include <linux/i2c.h>
22#include <linux/interrupt.h>
23#include <linux/delay.h>
24#include <linux/platform_device.h>
25
26#include <asm/octeon/octeon.h>
27
28#define DRV_NAME "i2c-octeon"
29
30/* The previous out-of-tree version was implicitly version 1.0. */
31#define DRV_VERSION "2.0"
32
33/* register offsets */
34#define SW_TWSI 0x00
35#define TWSI_INT 0x10
36
37/* Controller command patterns */
38#define SW_TWSI_V 0x8000000000000000ull
39#define SW_TWSI_EOP_TWSI_DATA 0x0C00000100000000ull
40#define SW_TWSI_EOP_TWSI_CTL 0x0C00000200000000ull
41#define SW_TWSI_EOP_TWSI_CLKCTL 0x0C00000300000000ull
42#define SW_TWSI_EOP_TWSI_STAT 0x0C00000300000000ull
43#define SW_TWSI_EOP_TWSI_RST 0x0C00000700000000ull
44#define SW_TWSI_OP_TWSI_CLK 0x0800000000000000ull
45#define SW_TWSI_R 0x0100000000000000ull
46
47/* Controller command and status bits */
48#define TWSI_CTL_CE 0x80
49#define TWSI_CTL_ENAB 0x40
50#define TWSI_CTL_STA 0x20
51#define TWSI_CTL_STP 0x10
52#define TWSI_CTL_IFLG 0x08
53#define TWSI_CTL_AAK 0x04
54
55/* Some status values */
56#define STAT_START 0x08
57#define STAT_RSTART 0x10
58#define STAT_TXADDR_ACK 0x18
59#define STAT_TXDATA_ACK 0x28
60#define STAT_RXADDR_ACK 0x40
61#define STAT_RXDATA_ACK 0x50
62#define STAT_IDLE 0xF8
63
64struct octeon_i2c {
65 wait_queue_head_t queue;
66 struct i2c_adapter adap;
67 int irq;
68 int twsi_freq;
69 int sys_freq;
70 resource_size_t twsi_phys;
71 void __iomem *twsi_base;
72 resource_size_t regsize;
73 struct device *dev;
74};
75
76/**
77 * octeon_i2c_write_sw - write an I2C core register.
78 * @i2c: The struct octeon_i2c.
79 * @eop_reg: Register selector.
80 * @data: Value to be written.
81 *
82 * The I2C core registers are accessed indirectly via the SW_TWSI CSR.
83 */
84static void octeon_i2c_write_sw(struct octeon_i2c *i2c,
85 u64 eop_reg,
86 u8 data)
87{
88 u64 tmp;
89
90 __raw_writeq(SW_TWSI_V | eop_reg | data, i2c->twsi_base + SW_TWSI);
91 do {
92 tmp = __raw_readq(i2c->twsi_base + SW_TWSI);
93 } while ((tmp & SW_TWSI_V) != 0);
94}
95
96/**
97 * octeon_i2c_read_sw - write an I2C core register.
98 * @i2c: The struct octeon_i2c.
99 * @eop_reg: Register selector.
100 *
101 * Returns the data.
102 *
103 * The I2C core registers are accessed indirectly via the SW_TWSI CSR.
104 */
105static u8 octeon_i2c_read_sw(struct octeon_i2c *i2c, u64 eop_reg)
106{
107 u64 tmp;
108
109 __raw_writeq(SW_TWSI_V | eop_reg | SW_TWSI_R, i2c->twsi_base + SW_TWSI);
110 do {
111 tmp = __raw_readq(i2c->twsi_base + SW_TWSI);
112 } while ((tmp & SW_TWSI_V) != 0);
113
114 return tmp & 0xFF;
115}
116
117/**
118 * octeon_i2c_write_int - write the TWSI_INT register
119 * @i2c: The struct octeon_i2c.
120 * @data: Value to be written.
121 */
122static void octeon_i2c_write_int(struct octeon_i2c *i2c, u64 data)
123{
124 u64 tmp;
125
126 __raw_writeq(data, i2c->twsi_base + TWSI_INT);
127 tmp = __raw_readq(i2c->twsi_base + TWSI_INT);
128}
129
130/**
131 * octeon_i2c_int_enable - enable the TS interrupt.
132 * @i2c: The struct octeon_i2c.
133 *
134 * The interrupt will be asserted when there is non-STAT_IDLE state in
135 * the SW_TWSI_EOP_TWSI_STAT register.
136 */
137static void octeon_i2c_int_enable(struct octeon_i2c *i2c)
138{
139 octeon_i2c_write_int(i2c, 0x40);
140}
141
142/**
143 * octeon_i2c_int_disable - disable the TS interrupt.
144 * @i2c: The struct octeon_i2c.
145 */
146static void octeon_i2c_int_disable(struct octeon_i2c *i2c)
147{
148 octeon_i2c_write_int(i2c, 0);
149}
150
151/**
152 * octeon_i2c_unblock - unblock the bus.
153 * @i2c: The struct octeon_i2c.
154 *
155 * If there was a reset while a device was driving 0 to bus,
156 * bus is blocked. We toggle it free manually by some clock
157 * cycles and send a stop.
158 */
159static void octeon_i2c_unblock(struct octeon_i2c *i2c)
160{
161 int i;
162
163 dev_dbg(i2c->dev, "%s\n", __func__);
164 for (i = 0; i < 9; i++) {
165 octeon_i2c_write_int(i2c, 0x0);
166 udelay(5);
167 octeon_i2c_write_int(i2c, 0x200);
168 udelay(5);
169 }
170 octeon_i2c_write_int(i2c, 0x300);
171 udelay(5);
172 octeon_i2c_write_int(i2c, 0x100);
173 udelay(5);
174 octeon_i2c_write_int(i2c, 0x0);
175}
176
177/**
178 * octeon_i2c_isr - the interrupt service routine.
179 * @int: The irq, unused.
180 * @dev_id: Our struct octeon_i2c.
181 */
182static irqreturn_t octeon_i2c_isr(int irq, void *dev_id)
183{
184 struct octeon_i2c *i2c = dev_id;
185
186 octeon_i2c_int_disable(i2c);
187 wake_up_interruptible(&i2c->queue);
188
189 return IRQ_HANDLED;
190}
191
192
193static int octeon_i2c_test_iflg(struct octeon_i2c *i2c)
194{
195 return (octeon_i2c_read_sw(i2c, SW_TWSI_EOP_TWSI_CTL) & TWSI_CTL_IFLG) != 0;
196}
197
198/**
199 * octeon_i2c_wait - wait for the IFLG to be set.
200 * @i2c: The struct octeon_i2c.
201 *
202 * Returns 0 on success, otherwise a negative errno.
203 */
204static int octeon_i2c_wait(struct octeon_i2c *i2c)
205{
206 int result;
207
208 octeon_i2c_int_enable(i2c);
209
210 result = wait_event_interruptible_timeout(i2c->queue,
211 octeon_i2c_test_iflg(i2c),
212 i2c->adap.timeout);
213
214 octeon_i2c_int_disable(i2c);
215
216 if (result < 0) {
217 dev_dbg(i2c->dev, "%s: wait interrupted\n", __func__);
218 return result;
219 } else if (result == 0) {
220 dev_dbg(i2c->dev, "%s: timeout\n", __func__);
221 result = -ETIMEDOUT;
222 }
223
224 return 0;
225}
226
227/**
228 * octeon_i2c_start - send START to the bus.
229 * @i2c: The struct octeon_i2c.
230 *
231 * Returns 0 on success, otherwise a negative errno.
232 */
233static int octeon_i2c_start(struct octeon_i2c *i2c)
234{
235 u8 data;
236 int result;
237
238 octeon_i2c_write_sw(i2c, SW_TWSI_EOP_TWSI_CTL,
239 TWSI_CTL_ENAB | TWSI_CTL_STA);
240
241 result = octeon_i2c_wait(i2c);
242 if (result) {
243 if (octeon_i2c_read_sw(i2c, SW_TWSI_EOP_TWSI_STAT) == STAT_IDLE) {
244 /*
245 * Controller refused to send start flag May
246 * be a client is holding SDA low - let's try
247 * to free it.
248 */
249 octeon_i2c_unblock(i2c);
250 octeon_i2c_write_sw(i2c, SW_TWSI_EOP_TWSI_CTL,
251 TWSI_CTL_ENAB | TWSI_CTL_STA);
252
253 result = octeon_i2c_wait(i2c);
254 }
255 if (result)
256 return result;
257 }
258
259 data = octeon_i2c_read_sw(i2c, SW_TWSI_EOP_TWSI_STAT);
260 if ((data != STAT_START) && (data != STAT_RSTART)) {
261 dev_err(i2c->dev, "%s: bad status (0x%x)\n", __func__, data);
262 return -EIO;
263 }
264
265 return 0;
266}
267
268/**
269 * octeon_i2c_stop - send STOP to the bus.
270 * @i2c: The struct octeon_i2c.
271 *
272 * Returns 0 on success, otherwise a negative errno.
273 */
274static int octeon_i2c_stop(struct octeon_i2c *i2c)
275{
276 u8 data;
277
278 octeon_i2c_write_sw(i2c, SW_TWSI_EOP_TWSI_CTL,
279 TWSI_CTL_ENAB | TWSI_CTL_STP);
280
281 data = octeon_i2c_read_sw(i2c, SW_TWSI_EOP_TWSI_STAT);
282
283 if (data != STAT_IDLE) {
284 dev_err(i2c->dev, "%s: bad status(0x%x)\n", __func__, data);
285 return -EIO;
286 }
287 return 0;
288}
289
290/**
291 * octeon_i2c_write - send data to the bus.
292 * @i2c: The struct octeon_i2c.
293 * @target: Target address.
294 * @data: Pointer to the data to be sent.
295 * @length: Length of the data.
296 *
297 * The address is sent over the bus, then the data.
298 *
299 * Returns 0 on success, otherwise a negative errno.
300 */
301static int octeon_i2c_write(struct octeon_i2c *i2c, int target,
302 const u8 *data, int length)
303{
304 int i, result;
305 u8 tmp;
306
307 result = octeon_i2c_start(i2c);
308 if (result)
309 return result;
310
311 octeon_i2c_write_sw(i2c, SW_TWSI_EOP_TWSI_DATA, target << 1);
312 octeon_i2c_write_sw(i2c, SW_TWSI_EOP_TWSI_CTL, TWSI_CTL_ENAB);
313
314 result = octeon_i2c_wait(i2c);
315 if (result)
316 return result;
317
318 for (i = 0; i < length; i++) {
319 tmp = octeon_i2c_read_sw(i2c, SW_TWSI_EOP_TWSI_STAT);
320 if ((tmp != STAT_TXADDR_ACK) && (tmp != STAT_TXDATA_ACK)) {
321 dev_err(i2c->dev,
322 "%s: bad status before write (0x%x)\n",
323 __func__, tmp);
324 return -EIO;
325 }
326
327 octeon_i2c_write_sw(i2c, SW_TWSI_EOP_TWSI_DATA, data[i]);
328 octeon_i2c_write_sw(i2c, SW_TWSI_EOP_TWSI_CTL, TWSI_CTL_ENAB);
329
330 result = octeon_i2c_wait(i2c);
331 if (result)
332 return result;
333 }
334
335 return 0;
336}
337
338/**
339 * octeon_i2c_read - receive data from the bus.
340 * @i2c: The struct octeon_i2c.
341 * @target: Target address.
342 * @data: Pointer to the location to store the datae .
343 * @length: Length of the data.
344 *
345 * The address is sent over the bus, then the data is read.
346 *
347 * Returns 0 on success, otherwise a negative errno.
348 */
349static int octeon_i2c_read(struct octeon_i2c *i2c, int target,
350 u8 *data, int length)
351{
352 int i, result;
353 u8 tmp;
354
355 if (length < 1)
356 return -EINVAL;
357
358 result = octeon_i2c_start(i2c);
359 if (result)
360 return result;
361
362 octeon_i2c_write_sw(i2c, SW_TWSI_EOP_TWSI_DATA, (target<<1) | 1);
363 octeon_i2c_write_sw(i2c, SW_TWSI_EOP_TWSI_CTL, TWSI_CTL_ENAB);
364
365 result = octeon_i2c_wait(i2c);
366 if (result)
367 return result;
368
369 for (i = 0; i < length; i++) {
370 tmp = octeon_i2c_read_sw(i2c, SW_TWSI_EOP_TWSI_STAT);
371 if ((tmp != STAT_RXDATA_ACK) && (tmp != STAT_RXADDR_ACK)) {
372 dev_err(i2c->dev,
373 "%s: bad status before read (0x%x)\n",
374 __func__, tmp);
375 return -EIO;
376 }
377
378 if (i+1 < length)
379 octeon_i2c_write_sw(i2c, SW_TWSI_EOP_TWSI_CTL,
380 TWSI_CTL_ENAB | TWSI_CTL_AAK);
381 else
382 octeon_i2c_write_sw(i2c, SW_TWSI_EOP_TWSI_CTL,
383 TWSI_CTL_ENAB);
384
385 result = octeon_i2c_wait(i2c);
386 if (result)
387 return result;
388
389 data[i] = octeon_i2c_read_sw(i2c, SW_TWSI_EOP_TWSI_DATA);
390 }
391 return 0;
392}
393
394/**
395 * octeon_i2c_xfer - The driver's master_xfer function.
396 * @adap: Pointer to the i2c_adapter structure.
397 * @msgs: Pointer to the messages to be processed.
398 * @num: Length of the MSGS array.
399 *
400 * Returns the number of messages processed, or a negative errno on
401 * failure.
402 */
403static int octeon_i2c_xfer(struct i2c_adapter *adap,
404 struct i2c_msg *msgs,
405 int num)
406{
407 struct i2c_msg *pmsg;
408 int i;
409 int ret = 0;
410 struct octeon_i2c *i2c = i2c_get_adapdata(adap);
411
412 for (i = 0; ret == 0 && i < num; i++) {
413 pmsg = &msgs[i];
414 dev_dbg(i2c->dev,
415 "Doing %s %d byte(s) to/from 0x%02x - %d of %d messages\n",
416 pmsg->flags & I2C_M_RD ? "read" : "write",
417 pmsg->len, pmsg->addr, i + 1, num);
418 if (pmsg->flags & I2C_M_RD)
419 ret = octeon_i2c_read(i2c, pmsg->addr, pmsg->buf,
420 pmsg->len);
421 else
422 ret = octeon_i2c_write(i2c, pmsg->addr, pmsg->buf,
423 pmsg->len);
424 }
425 octeon_i2c_stop(i2c);
426
427 return (ret != 0) ? ret : num;
428}
429
430static u32 octeon_i2c_functionality(struct i2c_adapter *adap)
431{
432 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
433}
434
435static const struct i2c_algorithm octeon_i2c_algo = {
436 .master_xfer = octeon_i2c_xfer,
437 .functionality = octeon_i2c_functionality,
438};
439
440static struct i2c_adapter octeon_i2c_ops = {
441 .owner = THIS_MODULE,
442 .name = "OCTEON adapter",
443 .algo = &octeon_i2c_algo,
444 .timeout = 2,
445};
446
447/**
448 * octeon_i2c_setclock - Calculate and set clock divisors.
449 */
450static int __devinit octeon_i2c_setclock(struct octeon_i2c *i2c)
451{
452 int tclk, thp_base, inc, thp_idx, mdiv_idx, ndiv_idx, foscl, diff;
453 int thp = 0x18, mdiv = 2, ndiv = 0, delta_hz = 1000000;
454
455 for (ndiv_idx = 0; ndiv_idx < 8 && delta_hz != 0; ndiv_idx++) {
456 /*
457 * An mdiv value of less than 2 seems to not work well
458 * with ds1337 RTCs, so we constrain it to larger
459 * values.
460 */
461 for (mdiv_idx = 15; mdiv_idx >= 2 && delta_hz != 0; mdiv_idx--) {
462 /*
463 * For given ndiv and mdiv values check the
464 * two closest thp values.
465 */
466 tclk = i2c->twsi_freq * (mdiv_idx + 1) * 10;
467 tclk *= (1 << ndiv_idx);
468 thp_base = (i2c->sys_freq / (tclk * 2)) - 1;
469 for (inc = 0; inc <= 1; inc++) {
470 thp_idx = thp_base + inc;
471 if (thp_idx < 5 || thp_idx > 0xff)
472 continue;
473
474 foscl = i2c->sys_freq / (2 * (thp_idx + 1));
475 foscl = foscl / (1 << ndiv_idx);
476 foscl = foscl / (mdiv_idx + 1) / 10;
477 diff = abs(foscl - i2c->twsi_freq);
478 if (diff < delta_hz) {
479 delta_hz = diff;
480 thp = thp_idx;
481 mdiv = mdiv_idx;
482 ndiv = ndiv_idx;
483 }
484 }
485 }
486 }
487 octeon_i2c_write_sw(i2c, SW_TWSI_OP_TWSI_CLK, thp);
488 octeon_i2c_write_sw(i2c, SW_TWSI_EOP_TWSI_CLKCTL, (mdiv << 3) | ndiv);
489
490 return 0;
491}
492
493static int __devinit octeon_i2c_initlowlevel(struct octeon_i2c *i2c)
494{
495 u8 status;
496 int tries;
497
498 /* disable high level controller, enable bus access */
499 octeon_i2c_write_sw(i2c, SW_TWSI_EOP_TWSI_CTL, TWSI_CTL_ENAB);
500
501 /* reset controller */
502 octeon_i2c_write_sw(i2c, SW_TWSI_EOP_TWSI_RST, 0);
503
504 for (tries = 10; tries; tries--) {
505 udelay(1);
506 status = octeon_i2c_read_sw(i2c, SW_TWSI_EOP_TWSI_STAT);
507 if (status == STAT_IDLE)
508 return 0;
509 }
510 dev_err(i2c->dev, "%s: TWSI_RST failed! (0x%x)\n", __func__, status);
511 return -EIO;
512}
513
514static int __devinit octeon_i2c_probe(struct platform_device *pdev)
515{
516 int irq, result = 0;
517 struct octeon_i2c *i2c;
518 struct octeon_i2c_data *i2c_data;
519 struct resource *res_mem;
520
521 /* All adaptors have an irq. */
522 irq = platform_get_irq(pdev, 0);
523 if (irq < 0)
524 return irq;
525
526 i2c = kzalloc(sizeof(*i2c), GFP_KERNEL);
527 if (!i2c) {
528 dev_err(&pdev->dev, "kzalloc failed\n");
529 result = -ENOMEM;
530 goto out;
531 }
532 i2c->dev = &pdev->dev;
533 i2c_data = pdev->dev.platform_data;
534
535 res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
536
537 if (res_mem == NULL) {
538 dev_err(i2c->dev, "found no memory resource\n");
539 result = -ENXIO;
540 goto fail_region;
541 }
542
543 if (i2c_data == NULL) {
544 dev_err(i2c->dev, "no I2C frequency data\n");
545 result = -ENXIO;
546 goto fail_region;
547 }
548
549 i2c->twsi_phys = res_mem->start;
550 i2c->regsize = resource_size(res_mem);
551 i2c->twsi_freq = i2c_data->i2c_freq;
552 i2c->sys_freq = i2c_data->sys_freq;
553
554 if (!request_mem_region(i2c->twsi_phys, i2c->regsize, res_mem->name)) {
555 dev_err(i2c->dev, "request_mem_region failed\n");
556 goto fail_region;
557 }
558 i2c->twsi_base = ioremap(i2c->twsi_phys, i2c->regsize);
559
560 init_waitqueue_head(&i2c->queue);
561
562 i2c->irq = irq;
563
564 result = request_irq(i2c->irq, octeon_i2c_isr, 0, DRV_NAME, i2c);
565 if (result < 0) {
566 dev_err(i2c->dev, "failed to attach interrupt\n");
567 goto fail_irq;
568 }
569
570 result = octeon_i2c_initlowlevel(i2c);
571 if (result) {
572 dev_err(i2c->dev, "init low level failed\n");
573 goto fail_add;
574 }
575
576 result = octeon_i2c_setclock(i2c);
577 if (result) {
578 dev_err(i2c->dev, "clock init failed\n");
579 goto fail_add;
580 }
581
582 i2c->adap = octeon_i2c_ops;
583 i2c->adap.dev.parent = &pdev->dev;
584 i2c->adap.nr = pdev->id >= 0 ? pdev->id : 0;
585 i2c_set_adapdata(&i2c->adap, i2c);
586 platform_set_drvdata(pdev, i2c);
587
588 result = i2c_add_numbered_adapter(&i2c->adap);
589 if (result < 0) {
590 dev_err(i2c->dev, "failed to add adapter\n");
591 goto fail_add;
592 }
593
594 dev_info(i2c->dev, "version %s\n", DRV_VERSION);
595
596 return result;
597
598fail_add:
599 platform_set_drvdata(pdev, NULL);
600 free_irq(i2c->irq, i2c);
601fail_irq:
602 iounmap(i2c->twsi_base);
603 release_mem_region(i2c->twsi_phys, i2c->regsize);
604fail_region:
605 kfree(i2c);
606out:
607 return result;
608};
609
610static int __devexit octeon_i2c_remove(struct platform_device *pdev)
611{
612 struct octeon_i2c *i2c = platform_get_drvdata(pdev);
613
614 i2c_del_adapter(&i2c->adap);
615 platform_set_drvdata(pdev, NULL);
616 free_irq(i2c->irq, i2c);
617 iounmap(i2c->twsi_base);
618 release_mem_region(i2c->twsi_phys, i2c->regsize);
619 kfree(i2c);
620 return 0;
621};
622
623static struct platform_driver octeon_i2c_driver = {
624 .probe = octeon_i2c_probe,
625 .remove = __devexit_p(octeon_i2c_remove),
626 .driver = {
627 .owner = THIS_MODULE,
628 .name = DRV_NAME,
629 },
630};
631
632static int __init octeon_i2c_init(void)
633{
634 int rv;
635
636 rv = platform_driver_register(&octeon_i2c_driver);
637 return rv;
638}
639
640static void __exit octeon_i2c_exit(void)
641{
642 platform_driver_unregister(&octeon_i2c_driver);
643}
644
645MODULE_AUTHOR("Michael Lawnick <michael.lawnick.ext@nsn.com>");
646MODULE_DESCRIPTION("I2C-Bus adapter for Cavium OCTEON processors");
647MODULE_LICENSE("GPL");
648MODULE_VERSION(DRV_VERSION);
649MODULE_ALIAS("platform:" DRV_NAME);
650
651module_init(octeon_i2c_init);
652module_exit(octeon_i2c_exit);
diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index 0037e31076ba..389ac6032a7b 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -37,6 +37,7 @@
37#include <linux/platform_device.h> 37#include <linux/platform_device.h>
38#include <linux/clk.h> 38#include <linux/clk.h>
39#include <linux/io.h> 39#include <linux/io.h>
40#include <linux/slab.h>
40 41
41/* I2C controller revisions */ 42/* I2C controller revisions */
42#define OMAP_I2C_REV_2 0x20 43#define OMAP_I2C_REV_2 0x20
@@ -49,24 +50,24 @@
49#define OMAP_I2C_TIMEOUT (msecs_to_jiffies(1000)) 50#define OMAP_I2C_TIMEOUT (msecs_to_jiffies(1000))
50 51
51#define OMAP_I2C_REV_REG 0x00 52#define OMAP_I2C_REV_REG 0x00
52#define OMAP_I2C_IE_REG 0x04 53#define OMAP_I2C_IE_REG 0x01
53#define OMAP_I2C_STAT_REG 0x08 54#define OMAP_I2C_STAT_REG 0x02
54#define OMAP_I2C_IV_REG 0x0c 55#define OMAP_I2C_IV_REG 0x03
55/* For OMAP3 I2C_IV has changed to I2C_WE (wakeup enable) */ 56/* For OMAP3 I2C_IV has changed to I2C_WE (wakeup enable) */
56#define OMAP_I2C_WE_REG 0x0c 57#define OMAP_I2C_WE_REG 0x03
57#define OMAP_I2C_SYSS_REG 0x10 58#define OMAP_I2C_SYSS_REG 0x04
58#define OMAP_I2C_BUF_REG 0x14 59#define OMAP_I2C_BUF_REG 0x05
59#define OMAP_I2C_CNT_REG 0x18 60#define OMAP_I2C_CNT_REG 0x06
60#define OMAP_I2C_DATA_REG 0x1c 61#define OMAP_I2C_DATA_REG 0x07
61#define OMAP_I2C_SYSC_REG 0x20 62#define OMAP_I2C_SYSC_REG 0x08
62#define OMAP_I2C_CON_REG 0x24 63#define OMAP_I2C_CON_REG 0x09
63#define OMAP_I2C_OA_REG 0x28 64#define OMAP_I2C_OA_REG 0x0a
64#define OMAP_I2C_SA_REG 0x2c 65#define OMAP_I2C_SA_REG 0x0b
65#define OMAP_I2C_PSC_REG 0x30 66#define OMAP_I2C_PSC_REG 0x0c
66#define OMAP_I2C_SCLL_REG 0x34 67#define OMAP_I2C_SCLL_REG 0x0d
67#define OMAP_I2C_SCLH_REG 0x38 68#define OMAP_I2C_SCLH_REG 0x0e
68#define OMAP_I2C_SYSTEST_REG 0x3c 69#define OMAP_I2C_SYSTEST_REG 0x0f
69#define OMAP_I2C_BUFSTAT_REG 0x40 70#define OMAP_I2C_BUFSTAT_REG 0x10
70 71
71/* I2C Interrupt Enable Register (OMAP_I2C_IE): */ 72/* I2C Interrupt Enable Register (OMAP_I2C_IE): */
72#define OMAP_I2C_IE_XDR (1 << 14) /* TX Buffer drain int enable */ 73#define OMAP_I2C_IE_XDR (1 << 14) /* TX Buffer drain int enable */
@@ -161,6 +162,7 @@ struct omap_i2c_dev {
161 struct device *dev; 162 struct device *dev;
162 void __iomem *base; /* virtual */ 163 void __iomem *base; /* virtual */
163 int irq; 164 int irq;
165 int reg_shift; /* bit shift for I2C register addresses */
164 struct clk *iclk; /* Interface clock */ 166 struct clk *iclk; /* Interface clock */
165 struct clk *fclk; /* Functional clock */ 167 struct clk *fclk; /* Functional clock */
166 struct completion cmd_complete; 168 struct completion cmd_complete;
@@ -189,12 +191,12 @@ struct omap_i2c_dev {
189static inline void omap_i2c_write_reg(struct omap_i2c_dev *i2c_dev, 191static inline void omap_i2c_write_reg(struct omap_i2c_dev *i2c_dev,
190 int reg, u16 val) 192 int reg, u16 val)
191{ 193{
192 __raw_writew(val, i2c_dev->base + reg); 194 __raw_writew(val, i2c_dev->base + (reg << i2c_dev->reg_shift));
193} 195}
194 196
195static inline u16 omap_i2c_read_reg(struct omap_i2c_dev *i2c_dev, int reg) 197static inline u16 omap_i2c_read_reg(struct omap_i2c_dev *i2c_dev, int reg)
196{ 198{
197 return __raw_readw(i2c_dev->base + reg); 199 return __raw_readw(i2c_dev->base + (reg << i2c_dev->reg_shift));
198} 200}
199 201
200static int __init omap_i2c_get_clocks(struct omap_i2c_dev *dev) 202static int __init omap_i2c_get_clocks(struct omap_i2c_dev *dev)
@@ -849,7 +851,7 @@ static const struct i2c_algorithm omap_i2c_algo = {
849 .functionality = omap_i2c_func, 851 .functionality = omap_i2c_func,
850}; 852};
851 853
852static int __init 854static int __devinit
853omap_i2c_probe(struct platform_device *pdev) 855omap_i2c_probe(struct platform_device *pdev)
854{ 856{
855 struct omap_i2c_dev *dev; 857 struct omap_i2c_dev *dev;
@@ -901,6 +903,11 @@ omap_i2c_probe(struct platform_device *pdev)
901 903
902 platform_set_drvdata(pdev, dev); 904 platform_set_drvdata(pdev, dev);
903 905
906 if (cpu_is_omap7xx())
907 dev->reg_shift = 1;
908 else
909 dev->reg_shift = 2;
910
904 if ((r = omap_i2c_get_clocks(dev)) != 0) 911 if ((r = omap_i2c_get_clocks(dev)) != 0)
905 goto err_iounmap; 912 goto err_iounmap;
906 913
diff --git a/drivers/i2c/busses/i2c-parport-light.c b/drivers/i2c/busses/i2c-parport-light.c
index 322c5691e38e..5f41ec0f72d2 100644
--- a/drivers/i2c/busses/i2c-parport-light.c
+++ b/drivers/i2c/busses/i2c-parport-light.c
@@ -1,7 +1,7 @@
1/* ------------------------------------------------------------------------ * 1/* ------------------------------------------------------------------------ *
2 * i2c-parport-light.c I2C bus over parallel port * 2 * i2c-parport-light.c I2C bus over parallel port *
3 * ------------------------------------------------------------------------ * 3 * ------------------------------------------------------------------------ *
4 Copyright (C) 2003-2007 Jean Delvare <khali@linux-fr.org> 4 Copyright (C) 2003-2010 Jean Delvare <khali@linux-fr.org>
5 5
6 Based on older i2c-velleman.c driver 6 Based on older i2c-velleman.c driver
7 Copyright (C) 1995-2000 Simon G. Vogl 7 Copyright (C) 1995-2000 Simon G. Vogl
@@ -27,10 +27,12 @@
27#include <linux/kernel.h> 27#include <linux/kernel.h>
28#include <linux/module.h> 28#include <linux/module.h>
29#include <linux/init.h> 29#include <linux/init.h>
30#include <linux/delay.h>
30#include <linux/platform_device.h> 31#include <linux/platform_device.h>
31#include <linux/ioport.h> 32#include <linux/ioport.h>
32#include <linux/i2c.h> 33#include <linux/i2c.h>
33#include <linux/i2c-algo-bit.h> 34#include <linux/i2c-algo-bit.h>
35#include <linux/i2c-smbus.h>
34#include <asm/io.h> 36#include <asm/io.h>
35#include "i2c-parport.h" 37#include "i2c-parport.h"
36 38
@@ -43,6 +45,10 @@ static u16 base;
43module_param(base, ushort, 0); 45module_param(base, ushort, 0);
44MODULE_PARM_DESC(base, "Base I/O address"); 46MODULE_PARM_DESC(base, "Base I/O address");
45 47
48static int irq;
49module_param(irq, int, 0);
50MODULE_PARM_DESC(irq, "IRQ (optional)");
51
46/* ----- Low-level parallel port access ----------------------------------- */ 52/* ----- Low-level parallel port access ----------------------------------- */
47 53
48static inline void port_write(unsigned char p, unsigned char d) 54static inline void port_write(unsigned char p, unsigned char d)
@@ -119,6 +125,16 @@ static struct i2c_adapter parport_adapter = {
119 .name = "Parallel port adapter (light)", 125 .name = "Parallel port adapter (light)",
120}; 126};
121 127
128/* SMBus alert support */
129static struct i2c_smbus_alert_setup alert_data = {
130 .alert_edge_triggered = 1,
131};
132static struct i2c_client *ara;
133static struct lineop parport_ctrl_irq = {
134 .val = (1 << 4),
135 .port = CTRL,
136};
137
122static int __devinit i2c_parport_probe(struct platform_device *pdev) 138static int __devinit i2c_parport_probe(struct platform_device *pdev)
123{ 139{
124 int err; 140 int err;
@@ -127,18 +143,39 @@ static int __devinit i2c_parport_probe(struct platform_device *pdev)
127 parport_setsda(NULL, 1); 143 parport_setsda(NULL, 1);
128 parport_setscl(NULL, 1); 144 parport_setscl(NULL, 1);
129 /* Other init if needed (power on...) */ 145 /* Other init if needed (power on...) */
130 if (adapter_parm[type].init.val) 146 if (adapter_parm[type].init.val) {
131 line_set(1, &adapter_parm[type].init); 147 line_set(1, &adapter_parm[type].init);
148 /* Give powered devices some time to settle */
149 msleep(100);
150 }
132 151
133 parport_adapter.dev.parent = &pdev->dev; 152 parport_adapter.dev.parent = &pdev->dev;
134 err = i2c_bit_add_bus(&parport_adapter); 153 err = i2c_bit_add_bus(&parport_adapter);
135 if (err) 154 if (err) {
136 dev_err(&pdev->dev, "Unable to register with I2C\n"); 155 dev_err(&pdev->dev, "Unable to register with I2C\n");
137 return err; 156 return err;
157 }
158
159 /* Setup SMBus alert if supported */
160 if (adapter_parm[type].smbus_alert && irq) {
161 alert_data.irq = irq;
162 ara = i2c_setup_smbus_alert(&parport_adapter, &alert_data);
163 if (ara)
164 line_set(1, &parport_ctrl_irq);
165 else
166 dev_warn(&pdev->dev, "Failed to register ARA client\n");
167 }
168
169 return 0;
138} 170}
139 171
140static int __devexit i2c_parport_remove(struct platform_device *pdev) 172static int __devexit i2c_parport_remove(struct platform_device *pdev)
141{ 173{
174 if (ara) {
175 line_set(0, &parport_ctrl_irq);
176 i2c_unregister_device(ara);
177 ara = NULL;
178 }
142 i2c_del_adapter(&parport_adapter); 179 i2c_del_adapter(&parport_adapter);
143 180
144 /* Un-init if needed (power off...) */ 181 /* Un-init if needed (power off...) */
@@ -205,6 +242,9 @@ static int __init i2c_parport_init(void)
205 if (!request_region(base, 3, DRVNAME)) 242 if (!request_region(base, 3, DRVNAME))
206 return -EBUSY; 243 return -EBUSY;
207 244
245 if (irq != 0)
246 pr_info(DRVNAME ": using irq %d\n", irq);
247
208 if (!adapter_parm[type].getscl.val) 248 if (!adapter_parm[type].getscl.val)
209 parport_algo_data.getscl = NULL; 249 parport_algo_data.getscl = NULL;
210 250
diff --git a/drivers/i2c/busses/i2c-parport.c b/drivers/i2c/busses/i2c-parport.c
index 0d8998610c74..846583ed4763 100644
--- a/drivers/i2c/busses/i2c-parport.c
+++ b/drivers/i2c/busses/i2c-parport.c
@@ -1,7 +1,7 @@
1/* ------------------------------------------------------------------------ * 1/* ------------------------------------------------------------------------ *
2 * i2c-parport.c I2C bus over parallel port * 2 * i2c-parport.c I2C bus over parallel port *
3 * ------------------------------------------------------------------------ * 3 * ------------------------------------------------------------------------ *
4 Copyright (C) 2003-2007 Jean Delvare <khali@linux-fr.org> 4 Copyright (C) 2003-2010 Jean Delvare <khali@linux-fr.org>
5 5
6 Based on older i2c-philips-par.c driver 6 Based on older i2c-philips-par.c driver
7 Copyright (C) 1995-2000 Simon G. Vogl 7 Copyright (C) 1995-2000 Simon G. Vogl
@@ -27,9 +27,12 @@
27#include <linux/kernel.h> 27#include <linux/kernel.h>
28#include <linux/module.h> 28#include <linux/module.h>
29#include <linux/init.h> 29#include <linux/init.h>
30#include <linux/delay.h>
30#include <linux/parport.h> 31#include <linux/parport.h>
31#include <linux/i2c.h> 32#include <linux/i2c.h>
32#include <linux/i2c-algo-bit.h> 33#include <linux/i2c-algo-bit.h>
34#include <linux/i2c-smbus.h>
35#include <linux/slab.h>
33#include "i2c-parport.h" 36#include "i2c-parport.h"
34 37
35/* ----- Device list ------------------------------------------------------ */ 38/* ----- Device list ------------------------------------------------------ */
@@ -38,6 +41,8 @@ struct i2c_par {
38 struct pardevice *pdev; 41 struct pardevice *pdev;
39 struct i2c_adapter adapter; 42 struct i2c_adapter adapter;
40 struct i2c_algo_bit_data algo_data; 43 struct i2c_algo_bit_data algo_data;
44 struct i2c_smbus_alert_setup alert_data;
45 struct i2c_client *ara;
41 struct i2c_par *next; 46 struct i2c_par *next;
42}; 47};
43 48
@@ -143,6 +148,19 @@ static struct i2c_algo_bit_data parport_algo_data = {
143 148
144/* ----- I2c and parallel port call-back functions and structures --------- */ 149/* ----- I2c and parallel port call-back functions and structures --------- */
145 150
151void i2c_parport_irq(void *data)
152{
153 struct i2c_par *adapter = data;
154 struct i2c_client *ara = adapter->ara;
155
156 if (ara) {
157 dev_dbg(&ara->dev, "SMBus alert received\n");
158 i2c_handle_smbus_alert(ara);
159 } else
160 dev_dbg(&adapter->adapter.dev,
161 "SMBus alert received but no ARA client!\n");
162}
163
146static void i2c_parport_attach (struct parport *port) 164static void i2c_parport_attach (struct parport *port)
147{ 165{
148 struct i2c_par *adapter; 166 struct i2c_par *adapter;
@@ -154,8 +172,9 @@ static void i2c_parport_attach (struct parport *port)
154 } 172 }
155 173
156 pr_debug("i2c-parport: attaching to %s\n", port->name); 174 pr_debug("i2c-parport: attaching to %s\n", port->name);
175 parport_disable_irq(port);
157 adapter->pdev = parport_register_device(port, "i2c-parport", 176 adapter->pdev = parport_register_device(port, "i2c-parport",
158 NULL, NULL, NULL, PARPORT_FLAG_EXCL, NULL); 177 NULL, NULL, i2c_parport_irq, PARPORT_FLAG_EXCL, adapter);
159 if (!adapter->pdev) { 178 if (!adapter->pdev) {
160 printk(KERN_ERR "i2c-parport: Unable to register with parport\n"); 179 printk(KERN_ERR "i2c-parport: Unable to register with parport\n");
161 goto ERROR0; 180 goto ERROR0;
@@ -185,14 +204,29 @@ static void i2c_parport_attach (struct parport *port)
185 parport_setsda(port, 1); 204 parport_setsda(port, 1);
186 parport_setscl(port, 1); 205 parport_setscl(port, 1);
187 /* Other init if needed (power on...) */ 206 /* Other init if needed (power on...) */
188 if (adapter_parm[type].init.val) 207 if (adapter_parm[type].init.val) {
189 line_set(port, 1, &adapter_parm[type].init); 208 line_set(port, 1, &adapter_parm[type].init);
209 /* Give powered devices some time to settle */
210 msleep(100);
211 }
190 212
191 if (i2c_bit_add_bus(&adapter->adapter) < 0) { 213 if (i2c_bit_add_bus(&adapter->adapter) < 0) {
192 printk(KERN_ERR "i2c-parport: Unable to register with I2C\n"); 214 printk(KERN_ERR "i2c-parport: Unable to register with I2C\n");
193 goto ERROR1; 215 goto ERROR1;
194 } 216 }
195 217
218 /* Setup SMBus alert if supported */
219 if (adapter_parm[type].smbus_alert) {
220 adapter->alert_data.alert_edge_triggered = 1;
221 adapter->ara = i2c_setup_smbus_alert(&adapter->adapter,
222 &adapter->alert_data);
223 if (adapter->ara)
224 parport_enable_irq(port);
225 else
226 printk(KERN_WARNING "i2c-parport: Failed to register "
227 "ARA client\n");
228 }
229
196 /* Add the new adapter to the list */ 230 /* Add the new adapter to the list */
197 adapter->next = adapter_list; 231 adapter->next = adapter_list;
198 adapter_list = adapter; 232 adapter_list = adapter;
@@ -213,6 +247,10 @@ static void i2c_parport_detach (struct parport *port)
213 for (prev = NULL, adapter = adapter_list; adapter; 247 for (prev = NULL, adapter = adapter_list; adapter;
214 prev = adapter, adapter = adapter->next) { 248 prev = adapter, adapter = adapter->next) {
215 if (adapter->pdev->port == port) { 249 if (adapter->pdev->port == port) {
250 if (adapter->ara) {
251 parport_disable_irq(port);
252 i2c_unregister_device(adapter->ara);
253 }
216 i2c_del_adapter(&adapter->adapter); 254 i2c_del_adapter(&adapter->adapter);
217 255
218 /* Un-init if needed (power off...) */ 256 /* Un-init if needed (power off...) */
diff --git a/drivers/i2c/busses/i2c-parport.h b/drivers/i2c/busses/i2c-parport.h
index ed69d846cb95..a9f66816546c 100644
--- a/drivers/i2c/busses/i2c-parport.h
+++ b/drivers/i2c/busses/i2c-parport.h
@@ -1,7 +1,7 @@
1/* ------------------------------------------------------------------------ * 1/* ------------------------------------------------------------------------ *
2 * i2c-parport.h I2C bus over parallel port * 2 * i2c-parport.h I2C bus over parallel port *
3 * ------------------------------------------------------------------------ * 3 * ------------------------------------------------------------------------ *
4 Copyright (C) 2003-2004 Jean Delvare <khali@linux-fr.org> 4 Copyright (C) 2003-2010 Jean Delvare <khali@linux-fr.org>
5 5
6 This program is free software; you can redistribute it and/or modify 6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by 7 it under the terms of the GNU General Public License as published by
@@ -38,6 +38,7 @@ struct adapter_parm {
38 struct lineop getsda; 38 struct lineop getsda;
39 struct lineop getscl; 39 struct lineop getscl;
40 struct lineop init; 40 struct lineop init;
41 unsigned int smbus_alert:1;
41}; 42};
42 43
43static struct adapter_parm adapter_parm[] = { 44static struct adapter_parm adapter_parm[] = {
@@ -73,6 +74,7 @@ static struct adapter_parm adapter_parm[] = {
73 .setscl = { 0x01, DATA, 1 }, 74 .setscl = { 0x01, DATA, 1 },
74 .getsda = { 0x10, STAT, 1 }, 75 .getsda = { 0x10, STAT, 1 },
75 .init = { 0xf0, DATA, 0 }, 76 .init = { 0xf0, DATA, 0 },
77 .smbus_alert = 1,
76 }, 78 },
77 /* type 5: ADM1025, ADM1030 and ADM1031 evaluation boards */ 79 /* type 5: ADM1025, ADM1030 and ADM1031 evaluation boards */
78 { 80 {
diff --git a/drivers/i2c/busses/i2c-pasemi.c b/drivers/i2c/busses/i2c-pasemi.c
index adf0fbb902f0..d3d4a4b43a1d 100644
--- a/drivers/i2c/busses/i2c-pasemi.c
+++ b/drivers/i2c/busses/i2c-pasemi.c
@@ -24,6 +24,7 @@
24#include <linux/sched.h> 24#include <linux/sched.h>
25#include <linux/i2c.h> 25#include <linux/i2c.h>
26#include <linux/delay.h> 26#include <linux/delay.h>
27#include <linux/slab.h>
27#include <asm/io.h> 28#include <asm/io.h>
28 29
29static struct pci_driver pasemi_smb_driver; 30static struct pci_driver pasemi_smb_driver;
@@ -400,7 +401,7 @@ static void __devexit pasemi_smb_remove(struct pci_dev *dev)
400 kfree(smbus); 401 kfree(smbus);
401} 402}
402 403
403static struct pci_device_id pasemi_smb_ids[] = { 404static const struct pci_device_id pasemi_smb_ids[] = {
404 { PCI_DEVICE(0x1959, 0xa003) }, 405 { PCI_DEVICE(0x1959, 0xa003) },
405 { 0, } 406 { 0, }
406}; 407};
diff --git a/drivers/i2c/busses/i2c-piix4.c b/drivers/i2c/busses/i2c-piix4.c
index e56e4b6823ca..ee9da6fcf69a 100644
--- a/drivers/i2c/busses/i2c-piix4.c
+++ b/drivers/i2c/busses/i2c-piix4.c
@@ -472,7 +472,7 @@ static struct i2c_adapter piix4_adapter = {
472 .algo = &smbus_algorithm, 472 .algo = &smbus_algorithm,
473}; 473};
474 474
475static struct pci_device_id piix4_ids[] = { 475static const struct pci_device_id piix4_ids[] = {
476 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_3) }, 476 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_3) },
477 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443MX_3) }, 477 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443MX_3) },
478 { PCI_DEVICE(PCI_VENDOR_ID_EFAR, PCI_DEVICE_ID_EFAR_SLC90E66_3) }, 478 { PCI_DEVICE(PCI_VENDOR_ID_EFAR, PCI_DEVICE_ID_EFAR_SLC90E66_3) },
diff --git a/drivers/i2c/busses/i2c-pnx.c b/drivers/i2c/busses/i2c-pnx.c
index 5d1c2603a130..a97e3fec8148 100644
--- a/drivers/i2c/busses/i2c-pnx.c
+++ b/drivers/i2c/busses/i2c-pnx.c
@@ -20,15 +20,16 @@
20#include <linux/platform_device.h> 20#include <linux/platform_device.h>
21#include <linux/i2c-pnx.h> 21#include <linux/i2c-pnx.h>
22#include <linux/io.h> 22#include <linux/io.h>
23#include <linux/err.h>
24#include <linux/clk.h>
25#include <linux/slab.h>
26
23#include <mach/hardware.h> 27#include <mach/hardware.h>
24#include <mach/i2c.h> 28#include <mach/i2c.h>
25#include <asm/irq.h>
26#include <asm/uaccess.h>
27 29
28#define I2C_PNX_TIMEOUT 10 /* msec */ 30#define I2C_PNX_TIMEOUT 10 /* msec */
29#define I2C_PNX_SPEED_KHZ 100 31#define I2C_PNX_SPEED_KHZ 100
30#define I2C_PNX_REGION_SIZE 0x100 32#define I2C_PNX_REGION_SIZE 0x100
31#define PNX_DEFAULT_FREQ 13 /* MHz */
32 33
33static inline int wait_timeout(long timeout, struct i2c_pnx_algo_data *data) 34static inline int wait_timeout(long timeout, struct i2c_pnx_algo_data *data)
34{ 35{
@@ -50,22 +51,21 @@ static inline int wait_reset(long timeout, struct i2c_pnx_algo_data *data)
50 return (timeout <= 0); 51 return (timeout <= 0);
51} 52}
52 53
53static inline void i2c_pnx_arm_timer(struct i2c_adapter *adap) 54static inline void i2c_pnx_arm_timer(struct i2c_pnx_algo_data *alg_data)
54{ 55{
55 struct i2c_pnx_algo_data *data = adap->algo_data; 56 struct timer_list *timer = &alg_data->mif.timer;
56 struct timer_list *timer = &data->mif.timer; 57 unsigned long expires = msecs_to_jiffies(I2C_PNX_TIMEOUT);
57 int expires = I2C_PNX_TIMEOUT / (1000 / HZ);
58 58
59 if (expires <= 1) 59 if (expires <= 1)
60 expires = 2; 60 expires = 2;
61 61
62 del_timer_sync(timer); 62 del_timer_sync(timer);
63 63
64 dev_dbg(&adap->dev, "Timer armed at %lu plus %u jiffies.\n", 64 dev_dbg(&alg_data->adapter.dev, "Timer armed at %lu plus %lu jiffies.\n",
65 jiffies, expires); 65 jiffies, expires);
66 66
67 timer->expires = jiffies + expires; 67 timer->expires = jiffies + expires;
68 timer->data = (unsigned long)adap; 68 timer->data = (unsigned long)&alg_data;
69 69
70 add_timer(timer); 70 add_timer(timer);
71} 71}
@@ -77,34 +77,34 @@ static inline void i2c_pnx_arm_timer(struct i2c_adapter *adap)
77 * 77 *
78 * Generate a START signal in the desired mode. 78 * Generate a START signal in the desired mode.
79 */ 79 */
80static int i2c_pnx_start(unsigned char slave_addr, struct i2c_adapter *adap) 80static int i2c_pnx_start(unsigned char slave_addr,
81 struct i2c_pnx_algo_data *alg_data)
81{ 82{
82 struct i2c_pnx_algo_data *alg_data = adap->algo_data; 83 dev_dbg(&alg_data->adapter.dev, "%s(): addr 0x%x mode %d\n", __func__,
83
84 dev_dbg(&adap->dev, "%s(): addr 0x%x mode %d\n", __func__,
85 slave_addr, alg_data->mif.mode); 84 slave_addr, alg_data->mif.mode);
86 85
87 /* Check for 7 bit slave addresses only */ 86 /* Check for 7 bit slave addresses only */
88 if (slave_addr & ~0x7f) { 87 if (slave_addr & ~0x7f) {
89 dev_err(&adap->dev, "%s: Invalid slave address %x. " 88 dev_err(&alg_data->adapter.dev,
90 "Only 7-bit addresses are supported\n", 89 "%s: Invalid slave address %x. Only 7-bit addresses are supported\n",
91 adap->name, slave_addr); 90 alg_data->adapter.name, slave_addr);
92 return -EINVAL; 91 return -EINVAL;
93 } 92 }
94 93
95 /* First, make sure bus is idle */ 94 /* First, make sure bus is idle */
96 if (wait_timeout(I2C_PNX_TIMEOUT, alg_data)) { 95 if (wait_timeout(I2C_PNX_TIMEOUT, alg_data)) {
97 /* Somebody else is monopolizing the bus */ 96 /* Somebody else is monopolizing the bus */
98 dev_err(&adap->dev, "%s: Bus busy. Slave addr = %02x, " 97 dev_err(&alg_data->adapter.dev,
99 "cntrl = %x, stat = %x\n", 98 "%s: Bus busy. Slave addr = %02x, cntrl = %x, stat = %x\n",
100 adap->name, slave_addr, 99 alg_data->adapter.name, slave_addr,
101 ioread32(I2C_REG_CTL(alg_data)), 100 ioread32(I2C_REG_CTL(alg_data)),
102 ioread32(I2C_REG_STS(alg_data))); 101 ioread32(I2C_REG_STS(alg_data)));
103 return -EBUSY; 102 return -EBUSY;
104 } else if (ioread32(I2C_REG_STS(alg_data)) & mstatus_afi) { 103 } else if (ioread32(I2C_REG_STS(alg_data)) & mstatus_afi) {
105 /* Sorry, we lost the bus */ 104 /* Sorry, we lost the bus */
106 dev_err(&adap->dev, "%s: Arbitration failure. " 105 dev_err(&alg_data->adapter.dev,
107 "Slave addr = %02x\n", adap->name, slave_addr); 106 "%s: Arbitration failure. Slave addr = %02x\n",
107 alg_data->adapter.name, slave_addr);
108 return -EIO; 108 return -EIO;
109 } 109 }
110 110
@@ -115,14 +115,14 @@ static int i2c_pnx_start(unsigned char slave_addr, struct i2c_adapter *adap)
115 iowrite32(ioread32(I2C_REG_STS(alg_data)) | mstatus_tdi | mstatus_afi, 115 iowrite32(ioread32(I2C_REG_STS(alg_data)) | mstatus_tdi | mstatus_afi,
116 I2C_REG_STS(alg_data)); 116 I2C_REG_STS(alg_data));
117 117
118 dev_dbg(&adap->dev, "%s(): sending %#x\n", __func__, 118 dev_dbg(&alg_data->adapter.dev, "%s(): sending %#x\n", __func__,
119 (slave_addr << 1) | start_bit | alg_data->mif.mode); 119 (slave_addr << 1) | start_bit | alg_data->mif.mode);
120 120
121 /* Write the slave address, START bit and R/W bit */ 121 /* Write the slave address, START bit and R/W bit */
122 iowrite32((slave_addr << 1) | start_bit | alg_data->mif.mode, 122 iowrite32((slave_addr << 1) | start_bit | alg_data->mif.mode,
123 I2C_REG_TX(alg_data)); 123 I2C_REG_TX(alg_data));
124 124
125 dev_dbg(&adap->dev, "%s(): exit\n", __func__); 125 dev_dbg(&alg_data->adapter.dev, "%s(): exit\n", __func__);
126 126
127 return 0; 127 return 0;
128} 128}
@@ -133,13 +133,12 @@ static int i2c_pnx_start(unsigned char slave_addr, struct i2c_adapter *adap)
133 * 133 *
134 * Generate a STOP signal to terminate the master transaction. 134 * Generate a STOP signal to terminate the master transaction.
135 */ 135 */
136static void i2c_pnx_stop(struct i2c_adapter *adap) 136static void i2c_pnx_stop(struct i2c_pnx_algo_data *alg_data)
137{ 137{
138 struct i2c_pnx_algo_data *alg_data = adap->algo_data;
139 /* Only 1 msec max timeout due to interrupt context */ 138 /* Only 1 msec max timeout due to interrupt context */
140 long timeout = 1000; 139 long timeout = 1000;
141 140
142 dev_dbg(&adap->dev, "%s(): entering: stat = %04x.\n", 141 dev_dbg(&alg_data->adapter.dev, "%s(): entering: stat = %04x.\n",
143 __func__, ioread32(I2C_REG_STS(alg_data))); 142 __func__, ioread32(I2C_REG_STS(alg_data)));
144 143
145 /* Write a STOP bit to TX FIFO */ 144 /* Write a STOP bit to TX FIFO */
@@ -153,7 +152,7 @@ static void i2c_pnx_stop(struct i2c_adapter *adap)
153 timeout--; 152 timeout--;
154 } 153 }
155 154
156 dev_dbg(&adap->dev, "%s(): exiting: stat = %04x.\n", 155 dev_dbg(&alg_data->adapter.dev, "%s(): exiting: stat = %04x.\n",
157 __func__, ioread32(I2C_REG_STS(alg_data))); 156 __func__, ioread32(I2C_REG_STS(alg_data)));
158} 157}
159 158
@@ -163,36 +162,32 @@ static void i2c_pnx_stop(struct i2c_adapter *adap)
163 * 162 *
164 * Sends one byte of data to the slave 163 * Sends one byte of data to the slave
165 */ 164 */
166static int i2c_pnx_master_xmit(struct i2c_adapter *adap) 165static int i2c_pnx_master_xmit(struct i2c_pnx_algo_data *alg_data)
167{ 166{
168 struct i2c_pnx_algo_data *alg_data = adap->algo_data;
169 u32 val; 167 u32 val;
170 168
171 dev_dbg(&adap->dev, "%s(): entering: stat = %04x.\n", 169 dev_dbg(&alg_data->adapter.dev, "%s(): entering: stat = %04x.\n",
172 __func__, ioread32(I2C_REG_STS(alg_data))); 170 __func__, ioread32(I2C_REG_STS(alg_data)));
173 171
174 if (alg_data->mif.len > 0) { 172 if (alg_data->mif.len > 0) {
175 /* We still have something to talk about... */ 173 /* We still have something to talk about... */
176 val = *alg_data->mif.buf++; 174 val = *alg_data->mif.buf++;
177 175
178 if (alg_data->mif.len == 1) { 176 if (alg_data->mif.len == 1)
179 val |= stop_bit; 177 val |= stop_bit;
180 if (!alg_data->last)
181 val |= start_bit;
182 }
183 178
184 alg_data->mif.len--; 179 alg_data->mif.len--;
185 iowrite32(val, I2C_REG_TX(alg_data)); 180 iowrite32(val, I2C_REG_TX(alg_data));
186 181
187 dev_dbg(&adap->dev, "%s(): xmit %#x [%d]\n", __func__, 182 dev_dbg(&alg_data->adapter.dev, "%s(): xmit %#x [%d]\n",
188 val, alg_data->mif.len + 1); 183 __func__, val, alg_data->mif.len + 1);
189 184
190 if (alg_data->mif.len == 0) { 185 if (alg_data->mif.len == 0) {
191 if (alg_data->last) { 186 if (alg_data->last) {
192 /* Wait until the STOP is seen. */ 187 /* Wait until the STOP is seen. */
193 if (wait_timeout(I2C_PNX_TIMEOUT, alg_data)) 188 if (wait_timeout(I2C_PNX_TIMEOUT, alg_data))
194 dev_err(&adap->dev, "The bus is still " 189 dev_err(&alg_data->adapter.dev,
195 "active after timeout\n"); 190 "The bus is still active after timeout\n");
196 } 191 }
197 /* Disable master interrupts */ 192 /* Disable master interrupts */
198 iowrite32(ioread32(I2C_REG_CTL(alg_data)) & 193 iowrite32(ioread32(I2C_REG_CTL(alg_data)) &
@@ -201,14 +196,15 @@ static int i2c_pnx_master_xmit(struct i2c_adapter *adap)
201 196
202 del_timer_sync(&alg_data->mif.timer); 197 del_timer_sync(&alg_data->mif.timer);
203 198
204 dev_dbg(&adap->dev, "%s(): Waking up xfer routine.\n", 199 dev_dbg(&alg_data->adapter.dev,
200 "%s(): Waking up xfer routine.\n",
205 __func__); 201 __func__);
206 202
207 complete(&alg_data->mif.complete); 203 complete(&alg_data->mif.complete);
208 } 204 }
209 } else if (alg_data->mif.len == 0) { 205 } else if (alg_data->mif.len == 0) {
210 /* zero-sized transfer */ 206 /* zero-sized transfer */
211 i2c_pnx_stop(adap); 207 i2c_pnx_stop(alg_data);
212 208
213 /* Disable master interrupts. */ 209 /* Disable master interrupts. */
214 iowrite32(ioread32(I2C_REG_CTL(alg_data)) & 210 iowrite32(ioread32(I2C_REG_CTL(alg_data)) &
@@ -217,13 +213,14 @@ static int i2c_pnx_master_xmit(struct i2c_adapter *adap)
217 213
218 /* Stop timer. */ 214 /* Stop timer. */
219 del_timer_sync(&alg_data->mif.timer); 215 del_timer_sync(&alg_data->mif.timer);
220 dev_dbg(&adap->dev, "%s(): Waking up xfer routine after " 216 dev_dbg(&alg_data->adapter.dev,
221 "zero-xfer.\n", __func__); 217 "%s(): Waking up xfer routine after zero-xfer.\n",
218 __func__);
222 219
223 complete(&alg_data->mif.complete); 220 complete(&alg_data->mif.complete);
224 } 221 }
225 222
226 dev_dbg(&adap->dev, "%s(): exiting: stat = %04x.\n", 223 dev_dbg(&alg_data->adapter.dev, "%s(): exiting: stat = %04x.\n",
227 __func__, ioread32(I2C_REG_STS(alg_data))); 224 __func__, ioread32(I2C_REG_STS(alg_data)));
228 225
229 return 0; 226 return 0;
@@ -235,27 +232,25 @@ static int i2c_pnx_master_xmit(struct i2c_adapter *adap)
235 * 232 *
236 * Reads one byte data from the slave 233 * Reads one byte data from the slave
237 */ 234 */
238static int i2c_pnx_master_rcv(struct i2c_adapter *adap) 235static int i2c_pnx_master_rcv(struct i2c_pnx_algo_data *alg_data)
239{ 236{
240 struct i2c_pnx_algo_data *alg_data = adap->algo_data;
241 unsigned int val = 0; 237 unsigned int val = 0;
242 u32 ctl = 0; 238 u32 ctl = 0;
243 239
244 dev_dbg(&adap->dev, "%s(): entering: stat = %04x.\n", 240 dev_dbg(&alg_data->adapter.dev, "%s(): entering: stat = %04x.\n",
245 __func__, ioread32(I2C_REG_STS(alg_data))); 241 __func__, ioread32(I2C_REG_STS(alg_data)));
246 242
247 /* Check, whether there is already data, 243 /* Check, whether there is already data,
248 * or we didn't 'ask' for it yet. 244 * or we didn't 'ask' for it yet.
249 */ 245 */
250 if (ioread32(I2C_REG_STS(alg_data)) & mstatus_rfe) { 246 if (ioread32(I2C_REG_STS(alg_data)) & mstatus_rfe) {
251 dev_dbg(&adap->dev, "%s(): Write dummy data to fill " 247 dev_dbg(&alg_data->adapter.dev,
252 "Rx-fifo...\n", __func__); 248 "%s(): Write dummy data to fill Rx-fifo...\n",
249 __func__);
253 250
254 if (alg_data->mif.len == 1) { 251 if (alg_data->mif.len == 1) {
255 /* Last byte, do not acknowledge next rcv. */ 252 /* Last byte, do not acknowledge next rcv. */
256 val |= stop_bit; 253 val |= stop_bit;
257 if (!alg_data->last)
258 val |= start_bit;
259 254
260 /* 255 /*
261 * Enable interrupt RFDAIE (data in Rx fifo), 256 * Enable interrupt RFDAIE (data in Rx fifo),
@@ -281,16 +276,16 @@ static int i2c_pnx_master_rcv(struct i2c_adapter *adap)
281 if (alg_data->mif.len > 0) { 276 if (alg_data->mif.len > 0) {
282 val = ioread32(I2C_REG_RX(alg_data)); 277 val = ioread32(I2C_REG_RX(alg_data));
283 *alg_data->mif.buf++ = (u8) (val & 0xff); 278 *alg_data->mif.buf++ = (u8) (val & 0xff);
284 dev_dbg(&adap->dev, "%s(): rcv 0x%x [%d]\n", __func__, val, 279 dev_dbg(&alg_data->adapter.dev, "%s(): rcv 0x%x [%d]\n",
285 alg_data->mif.len); 280 __func__, val, alg_data->mif.len);
286 281
287 alg_data->mif.len--; 282 alg_data->mif.len--;
288 if (alg_data->mif.len == 0) { 283 if (alg_data->mif.len == 0) {
289 if (alg_data->last) 284 if (alg_data->last)
290 /* Wait until the STOP is seen. */ 285 /* Wait until the STOP is seen. */
291 if (wait_timeout(I2C_PNX_TIMEOUT, alg_data)) 286 if (wait_timeout(I2C_PNX_TIMEOUT, alg_data))
292 dev_err(&adap->dev, "The bus is still " 287 dev_err(&alg_data->adapter.dev,
293 "active after timeout\n"); 288 "The bus is still active after timeout\n");
294 289
295 /* Disable master interrupts */ 290 /* Disable master interrupts */
296 ctl = ioread32(I2C_REG_CTL(alg_data)); 291 ctl = ioread32(I2C_REG_CTL(alg_data));
@@ -304,7 +299,7 @@ static int i2c_pnx_master_rcv(struct i2c_adapter *adap)
304 } 299 }
305 } 300 }
306 301
307 dev_dbg(&adap->dev, "%s(): exiting: stat = %04x.\n", 302 dev_dbg(&alg_data->adapter.dev, "%s(): exiting: stat = %04x.\n",
308 __func__, ioread32(I2C_REG_STS(alg_data))); 303 __func__, ioread32(I2C_REG_STS(alg_data)));
309 304
310 return 0; 305 return 0;
@@ -312,11 +307,11 @@ static int i2c_pnx_master_rcv(struct i2c_adapter *adap)
312 307
313static irqreturn_t i2c_pnx_interrupt(int irq, void *dev_id) 308static irqreturn_t i2c_pnx_interrupt(int irq, void *dev_id)
314{ 309{
310 struct i2c_pnx_algo_data *alg_data = dev_id;
315 u32 stat, ctl; 311 u32 stat, ctl;
316 struct i2c_adapter *adap = dev_id;
317 struct i2c_pnx_algo_data *alg_data = adap->algo_data;
318 312
319 dev_dbg(&adap->dev, "%s(): mstat = %x mctrl = %x, mode = %d\n", 313 dev_dbg(&alg_data->adapter.dev,
314 "%s(): mstat = %x mctrl = %x, mode = %d\n",
320 __func__, 315 __func__,
321 ioread32(I2C_REG_STS(alg_data)), 316 ioread32(I2C_REG_STS(alg_data)),
322 ioread32(I2C_REG_CTL(alg_data)), 317 ioread32(I2C_REG_CTL(alg_data)),
@@ -339,10 +334,10 @@ static irqreturn_t i2c_pnx_interrupt(int irq, void *dev_id)
339 complete(&alg_data->mif.complete); 334 complete(&alg_data->mif.complete);
340 } else if (stat & mstatus_nai) { 335 } else if (stat & mstatus_nai) {
341 /* Slave did not acknowledge, generate a STOP */ 336 /* Slave did not acknowledge, generate a STOP */
342 dev_dbg(&adap->dev, "%s(): " 337 dev_dbg(&alg_data->adapter.dev,
343 "Slave did not acknowledge, generating a STOP.\n", 338 "%s(): Slave did not acknowledge, generating a STOP.\n",
344 __func__); 339 __func__);
345 i2c_pnx_stop(adap); 340 i2c_pnx_stop(alg_data);
346 341
347 /* Disable master interrupts. */ 342 /* Disable master interrupts. */
348 ctl = ioread32(I2C_REG_CTL(alg_data)); 343 ctl = ioread32(I2C_REG_CTL(alg_data));
@@ -368,9 +363,9 @@ static irqreturn_t i2c_pnx_interrupt(int irq, void *dev_id)
368 */ 363 */
369 if ((stat & mstatus_drmi) || !(stat & mstatus_rfe)) { 364 if ((stat & mstatus_drmi) || !(stat & mstatus_rfe)) {
370 if (alg_data->mif.mode == I2C_SMBUS_WRITE) { 365 if (alg_data->mif.mode == I2C_SMBUS_WRITE) {
371 i2c_pnx_master_xmit(adap); 366 i2c_pnx_master_xmit(alg_data);
372 } else if (alg_data->mif.mode == I2C_SMBUS_READ) { 367 } else if (alg_data->mif.mode == I2C_SMBUS_READ) {
373 i2c_pnx_master_rcv(adap); 368 i2c_pnx_master_rcv(alg_data);
374 } 369 }
375 } 370 }
376 } 371 }
@@ -379,7 +374,8 @@ static irqreturn_t i2c_pnx_interrupt(int irq, void *dev_id)
379 stat = ioread32(I2C_REG_STS(alg_data)); 374 stat = ioread32(I2C_REG_STS(alg_data));
380 iowrite32(stat | mstatus_tdi | mstatus_afi, I2C_REG_STS(alg_data)); 375 iowrite32(stat | mstatus_tdi | mstatus_afi, I2C_REG_STS(alg_data));
381 376
382 dev_dbg(&adap->dev, "%s(): exiting, stat = %x ctrl = %x.\n", 377 dev_dbg(&alg_data->adapter.dev,
378 "%s(): exiting, stat = %x ctrl = %x.\n",
383 __func__, ioread32(I2C_REG_STS(alg_data)), 379 __func__, ioread32(I2C_REG_STS(alg_data)),
384 ioread32(I2C_REG_CTL(alg_data))); 380 ioread32(I2C_REG_CTL(alg_data)));
385 381
@@ -388,14 +384,13 @@ static irqreturn_t i2c_pnx_interrupt(int irq, void *dev_id)
388 384
389static void i2c_pnx_timeout(unsigned long data) 385static void i2c_pnx_timeout(unsigned long data)
390{ 386{
391 struct i2c_adapter *adap = (struct i2c_adapter *)data; 387 struct i2c_pnx_algo_data *alg_data = (struct i2c_pnx_algo_data *)data;
392 struct i2c_pnx_algo_data *alg_data = adap->algo_data;
393 u32 ctl; 388 u32 ctl;
394 389
395 dev_err(&adap->dev, "Master timed out. stat = %04x, cntrl = %04x. " 390 dev_err(&alg_data->adapter.dev,
396 "Resetting master...\n", 391 "Master timed out. stat = %04x, cntrl = %04x. Resetting master...\n",
397 ioread32(I2C_REG_STS(alg_data)), 392 ioread32(I2C_REG_STS(alg_data)),
398 ioread32(I2C_REG_CTL(alg_data))); 393 ioread32(I2C_REG_CTL(alg_data)));
399 394
400 /* Reset master and disable interrupts */ 395 /* Reset master and disable interrupts */
401 ctl = ioread32(I2C_REG_CTL(alg_data)); 396 ctl = ioread32(I2C_REG_CTL(alg_data));
@@ -409,15 +404,14 @@ static void i2c_pnx_timeout(unsigned long data)
409 complete(&alg_data->mif.complete); 404 complete(&alg_data->mif.complete);
410} 405}
411 406
412static inline void bus_reset_if_active(struct i2c_adapter *adap) 407static inline void bus_reset_if_active(struct i2c_pnx_algo_data *alg_data)
413{ 408{
414 struct i2c_pnx_algo_data *alg_data = adap->algo_data;
415 u32 stat; 409 u32 stat;
416 410
417 if ((stat = ioread32(I2C_REG_STS(alg_data))) & mstatus_active) { 411 if ((stat = ioread32(I2C_REG_STS(alg_data))) & mstatus_active) {
418 dev_err(&adap->dev, 412 dev_err(&alg_data->adapter.dev,
419 "%s: Bus is still active after xfer. Reset it...\n", 413 "%s: Bus is still active after xfer. Reset it...\n",
420 adap->name); 414 alg_data->adapter.name);
421 iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_reset, 415 iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_reset,
422 I2C_REG_CTL(alg_data)); 416 I2C_REG_CTL(alg_data));
423 wait_reset(I2C_PNX_TIMEOUT, alg_data); 417 wait_reset(I2C_PNX_TIMEOUT, alg_data);
@@ -451,10 +445,11 @@ i2c_pnx_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
451 struct i2c_pnx_algo_data *alg_data = adap->algo_data; 445 struct i2c_pnx_algo_data *alg_data = adap->algo_data;
452 u32 stat = ioread32(I2C_REG_STS(alg_data)); 446 u32 stat = ioread32(I2C_REG_STS(alg_data));
453 447
454 dev_dbg(&adap->dev, "%s(): entering: %d messages, stat = %04x.\n", 448 dev_dbg(&alg_data->adapter.dev,
449 "%s(): entering: %d messages, stat = %04x.\n",
455 __func__, num, ioread32(I2C_REG_STS(alg_data))); 450 __func__, num, ioread32(I2C_REG_STS(alg_data)));
456 451
457 bus_reset_if_active(adap); 452 bus_reset_if_active(alg_data);
458 453
459 /* Process transactions in a loop. */ 454 /* Process transactions in a loop. */
460 for (i = 0; rc >= 0 && i < num; i++) { 455 for (i = 0; rc >= 0 && i < num; i++) {
@@ -464,9 +459,9 @@ i2c_pnx_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
464 addr = pmsg->addr; 459 addr = pmsg->addr;
465 460
466 if (pmsg->flags & I2C_M_TEN) { 461 if (pmsg->flags & I2C_M_TEN) {
467 dev_err(&adap->dev, 462 dev_err(&alg_data->adapter.dev,
468 "%s: 10 bits addr not supported!\n", 463 "%s: 10 bits addr not supported!\n",
469 adap->name); 464 alg_data->adapter.name);
470 rc = -EINVAL; 465 rc = -EINVAL;
471 break; 466 break;
472 } 467 }
@@ -478,11 +473,10 @@ i2c_pnx_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
478 alg_data->mif.ret = 0; 473 alg_data->mif.ret = 0;
479 alg_data->last = (i == num - 1); 474 alg_data->last = (i == num - 1);
480 475
481 dev_dbg(&adap->dev, "%s(): mode %d, %d bytes\n", __func__, 476 dev_dbg(&alg_data->adapter.dev, "%s(): mode %d, %d bytes\n",
482 alg_data->mif.mode, 477 __func__, alg_data->mif.mode, alg_data->mif.len);
483 alg_data->mif.len);
484 478
485 i2c_pnx_arm_timer(adap); 479 i2c_pnx_arm_timer(alg_data);
486 480
487 /* initialize the completion var */ 481 /* initialize the completion var */
488 init_completion(&alg_data->mif.complete); 482 init_completion(&alg_data->mif.complete);
@@ -493,7 +487,7 @@ i2c_pnx_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
493 I2C_REG_CTL(alg_data)); 487 I2C_REG_CTL(alg_data));
494 488
495 /* Put start-code and slave-address on the bus. */ 489 /* Put start-code and slave-address on the bus. */
496 rc = i2c_pnx_start(addr, adap); 490 rc = i2c_pnx_start(addr, alg_data);
497 if (rc < 0) 491 if (rc < 0)
498 break; 492 break;
499 493
@@ -502,31 +496,32 @@ i2c_pnx_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
502 496
503 if (!(rc = alg_data->mif.ret)) 497 if (!(rc = alg_data->mif.ret))
504 completed++; 498 completed++;
505 dev_dbg(&adap->dev, "%s(): Complete, return code = %d.\n", 499 dev_dbg(&alg_data->adapter.dev,
500 "%s(): Complete, return code = %d.\n",
506 __func__, rc); 501 __func__, rc);
507 502
508 /* Clear TDI and AFI bits in case they are set. */ 503 /* Clear TDI and AFI bits in case they are set. */
509 if ((stat = ioread32(I2C_REG_STS(alg_data))) & mstatus_tdi) { 504 if ((stat = ioread32(I2C_REG_STS(alg_data))) & mstatus_tdi) {
510 dev_dbg(&adap->dev, 505 dev_dbg(&alg_data->adapter.dev,
511 "%s: TDI still set... clearing now.\n", 506 "%s: TDI still set... clearing now.\n",
512 adap->name); 507 alg_data->adapter.name);
513 iowrite32(stat, I2C_REG_STS(alg_data)); 508 iowrite32(stat, I2C_REG_STS(alg_data));
514 } 509 }
515 if ((stat = ioread32(I2C_REG_STS(alg_data))) & mstatus_afi) { 510 if ((stat = ioread32(I2C_REG_STS(alg_data))) & mstatus_afi) {
516 dev_dbg(&adap->dev, 511 dev_dbg(&alg_data->adapter.dev,
517 "%s: AFI still set... clearing now.\n", 512 "%s: AFI still set... clearing now.\n",
518 adap->name); 513 alg_data->adapter.name);
519 iowrite32(stat, I2C_REG_STS(alg_data)); 514 iowrite32(stat, I2C_REG_STS(alg_data));
520 } 515 }
521 } 516 }
522 517
523 bus_reset_if_active(adap); 518 bus_reset_if_active(alg_data);
524 519
525 /* Cleanup to be sure... */ 520 /* Cleanup to be sure... */
526 alg_data->mif.buf = NULL; 521 alg_data->mif.buf = NULL;
527 alg_data->mif.len = 0; 522 alg_data->mif.len = 0;
528 523
529 dev_dbg(&adap->dev, "%s(): exiting, stat = %x\n", 524 dev_dbg(&alg_data->adapter.dev, "%s(): exiting, stat = %x\n",
530 __func__, ioread32(I2C_REG_STS(alg_data))); 525 __func__, ioread32(I2C_REG_STS(alg_data)));
531 526
532 if (completed != num) 527 if (completed != num)
@@ -545,69 +540,92 @@ static struct i2c_algorithm pnx_algorithm = {
545 .functionality = i2c_pnx_func, 540 .functionality = i2c_pnx_func,
546}; 541};
547 542
543#ifdef CONFIG_PM
548static int i2c_pnx_controller_suspend(struct platform_device *pdev, 544static int i2c_pnx_controller_suspend(struct platform_device *pdev,
549 pm_message_t state) 545 pm_message_t state)
550{ 546{
551 struct i2c_pnx_data *i2c_pnx = platform_get_drvdata(pdev); 547 struct i2c_pnx_algo_data *alg_data = platform_get_drvdata(pdev);
552 return i2c_pnx->suspend(pdev, state); 548
549 /* FIXME: shouldn't this be clk_disable? */
550 clk_enable(alg_data->clk);
551
552 return 0;
553} 553}
554 554
555static int i2c_pnx_controller_resume(struct platform_device *pdev) 555static int i2c_pnx_controller_resume(struct platform_device *pdev)
556{ 556{
557 struct i2c_pnx_data *i2c_pnx = platform_get_drvdata(pdev); 557 struct i2c_pnx_algo_data *alg_data = platform_get_drvdata(pdev);
558 return i2c_pnx->resume(pdev); 558
559 return clk_enable(alg_data->clk);
559} 560}
561#else
562#define i2c_pnx_controller_suspend NULL
563#define i2c_pnx_controller_resume NULL
564#endif
560 565
561static int __devinit i2c_pnx_probe(struct platform_device *pdev) 566static int __devinit i2c_pnx_probe(struct platform_device *pdev)
562{ 567{
563 unsigned long tmp; 568 unsigned long tmp;
564 int ret = 0; 569 int ret = 0;
565 struct i2c_pnx_algo_data *alg_data; 570 struct i2c_pnx_algo_data *alg_data;
566 int freq_mhz; 571 unsigned long freq;
567 struct i2c_pnx_data *i2c_pnx = pdev->dev.platform_data; 572 struct i2c_pnx_data *i2c_pnx = pdev->dev.platform_data;
568 573
569 if (!i2c_pnx || !i2c_pnx->adapter) { 574 if (!i2c_pnx || !i2c_pnx->name) {
570 dev_err(&pdev->dev, "%s: no platform data supplied\n", 575 dev_err(&pdev->dev, "%s: no platform data supplied\n",
571 __func__); 576 __func__);
572 ret = -EINVAL; 577 ret = -EINVAL;
573 goto out; 578 goto out;
574 } 579 }
575 580
576 platform_set_drvdata(pdev, i2c_pnx); 581 alg_data = kzalloc(sizeof(*alg_data), GFP_KERNEL);
577 582 if (!alg_data) {
578 if (i2c_pnx->calculate_input_freq) 583 ret = -ENOMEM;
579 freq_mhz = i2c_pnx->calculate_input_freq(pdev); 584 goto err_kzalloc;
580 else {
581 freq_mhz = PNX_DEFAULT_FREQ;
582 dev_info(&pdev->dev, "Setting bus frequency to default value: "
583 "%d MHz\n", freq_mhz);
584 } 585 }
585 586
586 i2c_pnx->adapter->algo = &pnx_algorithm; 587 platform_set_drvdata(pdev, alg_data);
588
589 strlcpy(alg_data->adapter.name, i2c_pnx->name,
590 sizeof(alg_data->adapter.name));
591 alg_data->adapter.dev.parent = &pdev->dev;
592 alg_data->adapter.algo = &pnx_algorithm;
593 alg_data->adapter.algo_data = alg_data;
594 alg_data->adapter.nr = pdev->id;
595 alg_data->i2c_pnx = i2c_pnx;
596
597 alg_data->clk = clk_get(&pdev->dev, NULL);
598 if (IS_ERR(alg_data->clk)) {
599 ret = PTR_ERR(alg_data->clk);
600 goto out_drvdata;
601 }
587 602
588 alg_data = i2c_pnx->adapter->algo_data;
589 init_timer(&alg_data->mif.timer); 603 init_timer(&alg_data->mif.timer);
590 alg_data->mif.timer.function = i2c_pnx_timeout; 604 alg_data->mif.timer.function = i2c_pnx_timeout;
591 alg_data->mif.timer.data = (unsigned long)i2c_pnx->adapter; 605 alg_data->mif.timer.data = (unsigned long)alg_data;
592 606
593 /* Register I/O resource */ 607 /* Register I/O resource */
594 if (!request_mem_region(alg_data->base, I2C_PNX_REGION_SIZE, 608 if (!request_mem_region(i2c_pnx->base, I2C_PNX_REGION_SIZE,
595 pdev->name)) { 609 pdev->name)) {
596 dev_err(&pdev->dev, 610 dev_err(&pdev->dev,
597 "I/O region 0x%08x for I2C already in use.\n", 611 "I/O region 0x%08x for I2C already in use.\n",
598 alg_data->base); 612 i2c_pnx->base);
599 ret = -ENODEV; 613 ret = -ENODEV;
600 goto out_drvdata; 614 goto out_clkget;
601 } 615 }
602 616
603 if (!(alg_data->ioaddr = 617 alg_data->ioaddr = ioremap(i2c_pnx->base, I2C_PNX_REGION_SIZE);
604 (u32)ioremap(alg_data->base, I2C_PNX_REGION_SIZE))) { 618 if (!alg_data->ioaddr) {
605 dev_err(&pdev->dev, "Couldn't ioremap I2C I/O region\n"); 619 dev_err(&pdev->dev, "Couldn't ioremap I2C I/O region\n");
606 ret = -ENOMEM; 620 ret = -ENOMEM;
607 goto out_release; 621 goto out_release;
608 } 622 }
609 623
610 i2c_pnx->set_clock_run(pdev); 624 ret = clk_enable(alg_data->clk);
625 if (ret)
626 goto out_unmap;
627
628 freq = clk_get_rate(alg_data->clk);
611 629
612 /* 630 /*
613 * Clock Divisor High This value is the number of system clocks 631 * Clock Divisor High This value is the number of system clocks
@@ -620,45 +638,49 @@ static int __devinit i2c_pnx_probe(struct platform_device *pdev)
620 * the deglitching filter length. 638 * the deglitching filter length.
621 */ 639 */
622 640
623 tmp = ((freq_mhz * 1000) / I2C_PNX_SPEED_KHZ) / 2 - 2; 641 tmp = ((freq / 1000) / I2C_PNX_SPEED_KHZ) / 2 - 2;
642 if (tmp > 0x3FF)
643 tmp = 0x3FF;
624 iowrite32(tmp, I2C_REG_CKH(alg_data)); 644 iowrite32(tmp, I2C_REG_CKH(alg_data));
625 iowrite32(tmp, I2C_REG_CKL(alg_data)); 645 iowrite32(tmp, I2C_REG_CKL(alg_data));
626 646
627 iowrite32(mcntrl_reset, I2C_REG_CTL(alg_data)); 647 iowrite32(mcntrl_reset, I2C_REG_CTL(alg_data));
628 if (wait_reset(I2C_PNX_TIMEOUT, alg_data)) { 648 if (wait_reset(I2C_PNX_TIMEOUT, alg_data)) {
629 ret = -ENODEV; 649 ret = -ENODEV;
630 goto out_unmap; 650 goto out_clock;
631 } 651 }
632 init_completion(&alg_data->mif.complete); 652 init_completion(&alg_data->mif.complete);
633 653
634 ret = request_irq(alg_data->irq, i2c_pnx_interrupt, 654 ret = request_irq(i2c_pnx->irq, i2c_pnx_interrupt,
635 0, pdev->name, i2c_pnx->adapter); 655 0, pdev->name, alg_data);
636 if (ret) 656 if (ret)
637 goto out_clock; 657 goto out_clock;
638 658
639 /* Register this adapter with the I2C subsystem */ 659 /* Register this adapter with the I2C subsystem */
640 i2c_pnx->adapter->dev.parent = &pdev->dev; 660 ret = i2c_add_numbered_adapter(&alg_data->adapter);
641 i2c_pnx->adapter->nr = pdev->id;
642 ret = i2c_add_numbered_adapter(i2c_pnx->adapter);
643 if (ret < 0) { 661 if (ret < 0) {
644 dev_err(&pdev->dev, "I2C: Failed to add bus\n"); 662 dev_err(&pdev->dev, "I2C: Failed to add bus\n");
645 goto out_irq; 663 goto out_irq;
646 } 664 }
647 665
648 dev_dbg(&pdev->dev, "%s: Master at %#8x, irq %d.\n", 666 dev_dbg(&pdev->dev, "%s: Master at %#8x, irq %d.\n",
649 i2c_pnx->adapter->name, alg_data->base, alg_data->irq); 667 alg_data->adapter.name, i2c_pnx->base, i2c_pnx->irq);
650 668
651 return 0; 669 return 0;
652 670
653out_irq: 671out_irq:
654 free_irq(alg_data->irq, i2c_pnx->adapter); 672 free_irq(i2c_pnx->irq, alg_data);
655out_clock: 673out_clock:
656 i2c_pnx->set_clock_stop(pdev); 674 clk_disable(alg_data->clk);
657out_unmap: 675out_unmap:
658 iounmap((void *)alg_data->ioaddr); 676 iounmap(alg_data->ioaddr);
659out_release: 677out_release:
660 release_mem_region(alg_data->base, I2C_PNX_REGION_SIZE); 678 release_mem_region(i2c_pnx->base, I2C_PNX_REGION_SIZE);
679out_clkget:
680 clk_put(alg_data->clk);
661out_drvdata: 681out_drvdata:
682 kfree(alg_data);
683err_kzalloc:
662 platform_set_drvdata(pdev, NULL); 684 platform_set_drvdata(pdev, NULL);
663out: 685out:
664 return ret; 686 return ret;
@@ -666,15 +688,16 @@ out:
666 688
667static int __devexit i2c_pnx_remove(struct platform_device *pdev) 689static int __devexit i2c_pnx_remove(struct platform_device *pdev)
668{ 690{
669 struct i2c_pnx_data *i2c_pnx = platform_get_drvdata(pdev); 691 struct i2c_pnx_algo_data *alg_data = platform_get_drvdata(pdev);
670 struct i2c_adapter *adap = i2c_pnx->adapter; 692 struct i2c_pnx_data *i2c_pnx = alg_data->i2c_pnx;
671 struct i2c_pnx_algo_data *alg_data = adap->algo_data; 693
672 694 free_irq(i2c_pnx->irq, alg_data);
673 free_irq(alg_data->irq, i2c_pnx->adapter); 695 i2c_del_adapter(&alg_data->adapter);
674 i2c_del_adapter(adap); 696 clk_disable(alg_data->clk);
675 i2c_pnx->set_clock_stop(pdev); 697 iounmap(alg_data->ioaddr);
676 iounmap((void *)alg_data->ioaddr); 698 release_mem_region(i2c_pnx->base, I2C_PNX_REGION_SIZE);
677 release_mem_region(alg_data->base, I2C_PNX_REGION_SIZE); 699 clk_put(alg_data->clk);
700 kfree(alg_data);
678 platform_set_drvdata(pdev, NULL); 701 platform_set_drvdata(pdev, NULL);
679 702
680 return 0; 703 return 0;
diff --git a/drivers/i2c/busses/i2c-powermac.c b/drivers/i2c/busses/i2c-powermac.c
index 1c440a70ec61..b289ec99eeba 100644
--- a/drivers/i2c/busses/i2c-powermac.c
+++ b/drivers/i2c/busses/i2c-powermac.c
@@ -122,9 +122,14 @@ static s32 i2c_powermac_smbus_xfer( struct i2c_adapter* adap,
122 122
123 rc = pmac_i2c_xfer(bus, addrdir, subsize, subaddr, buf, len); 123 rc = pmac_i2c_xfer(bus, addrdir, subsize, subaddr, buf, len);
124 if (rc) { 124 if (rc) {
125 dev_err(&adap->dev, 125 if (rc == -ENXIO)
126 "I2C transfer at 0x%02x failed, size %d, err %d\n", 126 dev_dbg(&adap->dev,
127 addrdir >> 1, size, rc); 127 "I2C transfer at 0x%02x failed, size %d, "
128 "err %d\n", addrdir >> 1, size, rc);
129 else
130 dev_err(&adap->dev,
131 "I2C transfer at 0x%02x failed, size %d, "
132 "err %d\n", addrdir >> 1, size, rc);
128 goto bail; 133 goto bail;
129 } 134 }
130 135
@@ -175,10 +180,16 @@ static int i2c_powermac_master_xfer( struct i2c_adapter *adap,
175 goto bail; 180 goto bail;
176 } 181 }
177 rc = pmac_i2c_xfer(bus, addrdir, 0, 0, msgs->buf, msgs->len); 182 rc = pmac_i2c_xfer(bus, addrdir, 0, 0, msgs->buf, msgs->len);
178 if (rc < 0) 183 if (rc < 0) {
179 dev_err(&adap->dev, "I2C %s 0x%02x failed, err %d\n", 184 if (rc == -ENXIO)
180 addrdir & 1 ? "read from" : "write to", addrdir >> 1, 185 dev_dbg(&adap->dev, "I2C %s 0x%02x failed, err %d\n",
181 rc); 186 addrdir & 1 ? "read from" : "write to",
187 addrdir >> 1, rc);
188 else
189 dev_err(&adap->dev, "I2C %s 0x%02x failed, err %d\n",
190 addrdir & 1 ? "read from" : "write to",
191 addrdir >> 1, rc);
192 }
182 bail: 193 bail:
183 pmac_i2c_close(bus); 194 pmac_i2c_close(bus);
184 return rc < 0 ? rc : 1; 195 return rc < 0 ? rc : 1;
diff --git a/drivers/i2c/busses/i2c-pxa.c b/drivers/i2c/busses/i2c-pxa.c
index 7647a20523a0..14d249f5ed3f 100644
--- a/drivers/i2c/busses/i2c-pxa.c
+++ b/drivers/i2c/busses/i2c-pxa.c
@@ -12,7 +12,7 @@
12 * 12 *
13 * History: 13 * History:
14 * Apr 2002: Initial version [CS] 14 * Apr 2002: Initial version [CS]
15 * Jun 2002: Properly seperated algo/adap [FB] 15 * Jun 2002: Properly separated algo/adap [FB]
16 * Jan 2003: Fixed several bugs concerning interrupt handling [Kai-Uwe Bloem] 16 * Jan 2003: Fixed several bugs concerning interrupt handling [Kai-Uwe Bloem]
17 * Jan 2003: added limited signal handling [Kai-Uwe Bloem] 17 * Jan 2003: added limited signal handling [Kai-Uwe Bloem]
18 * Sep 2004: Major rework to ensure efficient bus handling [RMK] 18 * Sep 2004: Major rework to ensure efficient bus handling [RMK]
@@ -33,6 +33,7 @@
33#include <linux/platform_device.h> 33#include <linux/platform_device.h>
34#include <linux/err.h> 34#include <linux/err.h>
35#include <linux/clk.h> 35#include <linux/clk.h>
36#include <linux/slab.h>
36 37
37#include <asm/irq.h> 38#include <asm/irq.h>
38#include <asm/io.h> 39#include <asm/io.h>
diff --git a/drivers/i2c/busses/i2c-s3c2410.c b/drivers/i2c/busses/i2c-s3c2410.c
index 1d8c98613fa0..d27072b2249f 100644
--- a/drivers/i2c/busses/i2c-s3c2410.c
+++ b/drivers/i2c/busses/i2c-s3c2410.c
@@ -34,6 +34,7 @@
34#include <linux/platform_device.h> 34#include <linux/platform_device.h>
35#include <linux/clk.h> 35#include <linux/clk.h>
36#include <linux/cpufreq.h> 36#include <linux/cpufreq.h>
37#include <linux/slab.h>
37 38
38#include <asm/irq.h> 39#include <asm/irq.h>
39#include <asm/io.h> 40#include <asm/io.h>
diff --git a/drivers/i2c/busses/i2c-scmi.c b/drivers/i2c/busses/i2c-scmi.c
index 365e0becaf12..388cbdc96db7 100644
--- a/drivers/i2c/busses/i2c-scmi.c
+++ b/drivers/i2c/busses/i2c-scmi.c
@@ -33,6 +33,7 @@ struct acpi_smbus_cmi {
33 u8 cap_info:1; 33 u8 cap_info:1;
34 u8 cap_read:1; 34 u8 cap_read:1;
35 u8 cap_write:1; 35 u8 cap_write:1;
36 struct smbus_methods_t *methods;
36}; 37};
37 38
38static const struct smbus_methods_t smbus_methods = { 39static const struct smbus_methods_t smbus_methods = {
@@ -41,10 +42,19 @@ static const struct smbus_methods_t smbus_methods = {
41 .mt_sbw = "_SBW", 42 .mt_sbw = "_SBW",
42}; 43};
43 44
45/* Some IBM BIOSes omit the leading underscore */
46static const struct smbus_methods_t ibm_smbus_methods = {
47 .mt_info = "SBI_",
48 .mt_sbr = "SBR_",
49 .mt_sbw = "SBW_",
50};
51
44static const struct acpi_device_id acpi_smbus_cmi_ids[] = { 52static const struct acpi_device_id acpi_smbus_cmi_ids[] = {
45 {"SMBUS01", 0}, 53 {"SMBUS01", (kernel_ulong_t)&smbus_methods},
54 {ACPI_SMBUS_IBM_HID, (kernel_ulong_t)&ibm_smbus_methods},
46 {"", 0} 55 {"", 0}
47}; 56};
57MODULE_DEVICE_TABLE(acpi, acpi_smbus_cmi_ids);
48 58
49#define ACPI_SMBUS_STATUS_OK 0x00 59#define ACPI_SMBUS_STATUS_OK 0x00
50#define ACPI_SMBUS_STATUS_FAIL 0x07 60#define ACPI_SMBUS_STATUS_FAIL 0x07
@@ -150,11 +160,11 @@ acpi_smbus_cmi_access(struct i2c_adapter *adap, u16 addr, unsigned short flags,
150 160
151 if (read_write == I2C_SMBUS_READ) { 161 if (read_write == I2C_SMBUS_READ) {
152 protocol |= ACPI_SMBUS_PRTCL_READ; 162 protocol |= ACPI_SMBUS_PRTCL_READ;
153 method = smbus_methods.mt_sbr; 163 method = smbus_cmi->methods->mt_sbr;
154 input.count = 3; 164 input.count = 3;
155 } else { 165 } else {
156 protocol |= ACPI_SMBUS_PRTCL_WRITE; 166 protocol |= ACPI_SMBUS_PRTCL_WRITE;
157 method = smbus_methods.mt_sbw; 167 method = smbus_cmi->methods->mt_sbw;
158 input.count = 5; 168 input.count = 5;
159 } 169 }
160 170
@@ -290,13 +300,13 @@ static int acpi_smbus_cmi_add_cap(struct acpi_smbus_cmi *smbus_cmi,
290 union acpi_object *obj; 300 union acpi_object *obj;
291 acpi_status status; 301 acpi_status status;
292 302
293 if (!strcmp(name, smbus_methods.mt_info)) { 303 if (!strcmp(name, smbus_cmi->methods->mt_info)) {
294 status = acpi_evaluate_object(smbus_cmi->handle, 304 status = acpi_evaluate_object(smbus_cmi->handle,
295 smbus_methods.mt_info, 305 smbus_cmi->methods->mt_info,
296 NULL, &buffer); 306 NULL, &buffer);
297 if (ACPI_FAILURE(status)) { 307 if (ACPI_FAILURE(status)) {
298 ACPI_ERROR((AE_INFO, "Evaluating %s: %i", 308 ACPI_ERROR((AE_INFO, "Evaluating %s: %i",
299 smbus_methods.mt_info, status)); 309 smbus_cmi->methods->mt_info, status));
300 return -EIO; 310 return -EIO;
301 } 311 }
302 312
@@ -319,9 +329,9 @@ static int acpi_smbus_cmi_add_cap(struct acpi_smbus_cmi *smbus_cmi,
319 329
320 kfree(buffer.pointer); 330 kfree(buffer.pointer);
321 smbus_cmi->cap_info = 1; 331 smbus_cmi->cap_info = 1;
322 } else if (!strcmp(name, smbus_methods.mt_sbr)) 332 } else if (!strcmp(name, smbus_cmi->methods->mt_sbr))
323 smbus_cmi->cap_read = 1; 333 smbus_cmi->cap_read = 1;
324 else if (!strcmp(name, smbus_methods.mt_sbw)) 334 else if (!strcmp(name, smbus_cmi->methods->mt_sbw))
325 smbus_cmi->cap_write = 1; 335 smbus_cmi->cap_write = 1;
326 else 336 else
327 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Unsupported CMI method: %s\n", 337 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Unsupported CMI method: %s\n",
@@ -349,6 +359,7 @@ static acpi_status acpi_smbus_cmi_query_methods(acpi_handle handle, u32 level,
349static int acpi_smbus_cmi_add(struct acpi_device *device) 359static int acpi_smbus_cmi_add(struct acpi_device *device)
350{ 360{
351 struct acpi_smbus_cmi *smbus_cmi; 361 struct acpi_smbus_cmi *smbus_cmi;
362 const struct acpi_device_id *id;
352 363
353 smbus_cmi = kzalloc(sizeof(struct acpi_smbus_cmi), GFP_KERNEL); 364 smbus_cmi = kzalloc(sizeof(struct acpi_smbus_cmi), GFP_KERNEL);
354 if (!smbus_cmi) 365 if (!smbus_cmi)
@@ -362,6 +373,11 @@ static int acpi_smbus_cmi_add(struct acpi_device *device)
362 smbus_cmi->cap_read = 0; 373 smbus_cmi->cap_read = 0;
363 smbus_cmi->cap_write = 0; 374 smbus_cmi->cap_write = 0;
364 375
376 for (id = acpi_smbus_cmi_ids; id->id[0]; id++)
377 if (!strcmp(id->id, acpi_device_hid(device)))
378 smbus_cmi->methods =
379 (struct smbus_methods_t *) id->driver_data;
380
365 acpi_walk_namespace(ACPI_TYPE_METHOD, smbus_cmi->handle, 1, 381 acpi_walk_namespace(ACPI_TYPE_METHOD, smbus_cmi->handle, 1,
366 acpi_smbus_cmi_query_methods, NULL, smbus_cmi, NULL); 382 acpi_smbus_cmi_query_methods, NULL, smbus_cmi, NULL);
367 383
diff --git a/drivers/i2c/busses/i2c-sh_mobile.c b/drivers/i2c/busses/i2c-sh_mobile.c
index ccc46418ef7f..ffb405d7c6f2 100644
--- a/drivers/i2c/busses/i2c-sh_mobile.c
+++ b/drivers/i2c/busses/i2c-sh_mobile.c
@@ -31,6 +31,7 @@
31#include <linux/pm_runtime.h> 31#include <linux/pm_runtime.h>
32#include <linux/clk.h> 32#include <linux/clk.h>
33#include <linux/io.h> 33#include <linux/io.h>
34#include <linux/slab.h>
34 35
35/* Transmit operation: */ 36/* Transmit operation: */
36/* */ 37/* */
diff --git a/drivers/i2c/busses/i2c-simtec.c b/drivers/i2c/busses/i2c-simtec.c
index 6407f47bda82..78b06107342c 100644
--- a/drivers/i2c/busses/i2c-simtec.c
+++ b/drivers/i2c/busses/i2c-simtec.c
@@ -23,6 +23,7 @@
23#include <linux/init.h> 23#include <linux/init.h>
24#include <linux/delay.h> 24#include <linux/delay.h>
25#include <linux/platform_device.h> 25#include <linux/platform_device.h>
26#include <linux/slab.h>
26 27
27#include <linux/i2c.h> 28#include <linux/i2c.h>
28#include <linux/i2c-algo-bit.h> 29#include <linux/i2c-algo-bit.h>
diff --git a/drivers/i2c/busses/i2c-sis5595.c b/drivers/i2c/busses/i2c-sis5595.c
index 844569f7d8b7..55a71370c79b 100644
--- a/drivers/i2c/busses/i2c-sis5595.c
+++ b/drivers/i2c/busses/i2c-sis5595.c
@@ -369,7 +369,7 @@ static struct i2c_adapter sis5595_adapter = {
369 .algo = &smbus_algorithm, 369 .algo = &smbus_algorithm,
370}; 370};
371 371
372static struct pci_device_id sis5595_ids[] __devinitdata = { 372static const struct pci_device_id sis5595_ids[] __devinitconst = {
373 { PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_503) }, 373 { PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_503) },
374 { 0, } 374 { 0, }
375}; 375};
diff --git a/drivers/i2c/busses/i2c-sis630.c b/drivers/i2c/busses/i2c-sis630.c
index 68cff7af7013..2309c7f1bde2 100644
--- a/drivers/i2c/busses/i2c-sis630.c
+++ b/drivers/i2c/busses/i2c-sis630.c
@@ -468,7 +468,7 @@ static struct i2c_adapter sis630_adapter = {
468 .algo = &smbus_algorithm, 468 .algo = &smbus_algorithm,
469}; 469};
470 470
471static struct pci_device_id sis630_ids[] __devinitdata = { 471static const struct pci_device_id sis630_ids[] __devinitconst = {
472 { PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_503) }, 472 { PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_503) },
473 { PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_LPC) }, 473 { PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_LPC) },
474 { 0, } 474 { 0, }
diff --git a/drivers/i2c/busses/i2c-sis96x.c b/drivers/i2c/busses/i2c-sis96x.c
index 1649963b00dc..d43d8f8943dd 100644
--- a/drivers/i2c/busses/i2c-sis96x.c
+++ b/drivers/i2c/busses/i2c-sis96x.c
@@ -245,7 +245,7 @@ static struct i2c_adapter sis96x_adapter = {
245 .algo = &smbus_algorithm, 245 .algo = &smbus_algorithm,
246}; 246};
247 247
248static struct pci_device_id sis96x_ids[] = { 248static const struct pci_device_id sis96x_ids[] = {
249 { PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_SMBUS) }, 249 { PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_SMBUS) },
250 { 0, } 250 { 0, }
251}; 251};
diff --git a/drivers/i2c/busses/i2c-stu300.c b/drivers/i2c/busses/i2c-stu300.c
index d2728a28a8db..495be451d326 100644
--- a/drivers/i2c/busses/i2c-stu300.c
+++ b/drivers/i2c/busses/i2c-stu300.c
@@ -16,6 +16,7 @@
16#include <linux/interrupt.h> 16#include <linux/interrupt.h>
17#include <linux/clk.h> 17#include <linux/clk.h>
18#include <linux/io.h> 18#include <linux/io.h>
19#include <linux/slab.h>
19 20
20/* the name of this kernel module */ 21/* the name of this kernel module */
21#define NAME "stu300" 22#define NAME "stu300"
@@ -497,7 +498,7 @@ static int stu300_set_clk(struct stu300_dev *dev, unsigned long clkrate)
497 int i = 0; 498 int i = 0;
498 499
499 /* Locate the apropriate clock setting */ 500 /* Locate the apropriate clock setting */
500 while (i < ARRAY_SIZE(stu300_clktable) && 501 while (i < ARRAY_SIZE(stu300_clktable) - 1 &&
501 stu300_clktable[i].rate < clkrate) 502 stu300_clktable[i].rate < clkrate)
502 i++; 503 i++;
503 504
diff --git a/drivers/i2c/busses/i2c-tiny-usb.c b/drivers/i2c/busses/i2c-tiny-usb.c
index e29b6d5ba8ef..d03b04002f0d 100644
--- a/drivers/i2c/busses/i2c-tiny-usb.c
+++ b/drivers/i2c/busses/i2c-tiny-usb.c
@@ -13,6 +13,7 @@
13#include <linux/kernel.h> 13#include <linux/kernel.h>
14#include <linux/errno.h> 14#include <linux/errno.h>
15#include <linux/module.h> 15#include <linux/module.h>
16#include <linux/slab.h>
16#include <linux/types.h> 17#include <linux/types.h>
17 18
18/* include interfaces to usb layer */ 19/* include interfaces to usb layer */
@@ -31,11 +32,13 @@
31#define CMD_I2C_IO_BEGIN (1<<0) 32#define CMD_I2C_IO_BEGIN (1<<0)
32#define CMD_I2C_IO_END (1<<1) 33#define CMD_I2C_IO_END (1<<1)
33 34
34/* i2c bit delay, default is 10us -> 100kHz */ 35/* i2c bit delay, default is 10us -> 100kHz max
36 (in practice, due to additional delays in the i2c bitbanging
37 code this results in a i2c clock of about 50kHz) */
35static unsigned short delay = 10; 38static unsigned short delay = 10;
36module_param(delay, ushort, 0); 39module_param(delay, ushort, 0);
37MODULE_PARM_DESC(delay, "bit delay in microseconds, " 40MODULE_PARM_DESC(delay, "bit delay in microseconds "
38 "e.g. 10 for 100kHz (default is 100kHz)"); 41 "(default is 10us for 100kHz max)");
39 42
40static int usb_read(struct i2c_adapter *adapter, int cmd, 43static int usb_read(struct i2c_adapter *adapter, int cmd,
41 int value, int index, void *data, int len); 44 int value, int index, void *data, int len);
@@ -137,7 +140,7 @@ static const struct i2c_algorithm usb_algorithm = {
137 * Future Technology Devices International Ltd., later a pair was 140 * Future Technology Devices International Ltd., later a pair was
138 * bought from EZPrototypes 141 * bought from EZPrototypes
139 */ 142 */
140static struct usb_device_id i2c_tiny_usb_table [] = { 143static const struct usb_device_id i2c_tiny_usb_table[] = {
141 { USB_DEVICE(0x0403, 0xc631) }, /* FTDI */ 144 { USB_DEVICE(0x0403, 0xc631) }, /* FTDI */
142 { USB_DEVICE(0x1c40, 0x0534) }, /* EZPrototypes */ 145 { USB_DEVICE(0x1c40, 0x0534) }, /* EZPrototypes */
143 { } /* Terminating entry */ 146 { } /* Terminating entry */
diff --git a/drivers/i2c/busses/i2c-versatile.c b/drivers/i2c/busses/i2c-versatile.c
index 70de82163463..5c473833d948 100644
--- a/drivers/i2c/busses/i2c-versatile.c
+++ b/drivers/i2c/busses/i2c-versatile.c
@@ -14,6 +14,7 @@
14#include <linux/i2c-algo-bit.h> 14#include <linux/i2c-algo-bit.h>
15#include <linux/init.h> 15#include <linux/init.h>
16#include <linux/platform_device.h> 16#include <linux/platform_device.h>
17#include <linux/slab.h>
17 18
18#include <asm/io.h> 19#include <asm/io.h>
19 20
diff --git a/drivers/i2c/busses/i2c-via.c b/drivers/i2c/busses/i2c-via.c
index 8b24f192103a..de78283bddbe 100644
--- a/drivers/i2c/busses/i2c-via.c
+++ b/drivers/i2c/busses/i2c-via.c
@@ -89,7 +89,7 @@ static struct i2c_adapter vt586b_adapter = {
89}; 89};
90 90
91 91
92static struct pci_device_id vt586b_ids[] __devinitdata = { 92static const struct pci_device_id vt586b_ids[] __devinitconst = {
93 { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_3) }, 93 { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_3) },
94 { 0, } 94 { 0, }
95}; 95};
diff --git a/drivers/i2c/busses/i2c-viapro.c b/drivers/i2c/busses/i2c-viapro.c
index a84a909e1234..d57292e5dae0 100644
--- a/drivers/i2c/busses/i2c-viapro.c
+++ b/drivers/i2c/busses/i2c-viapro.c
@@ -444,7 +444,7 @@ release_region:
444 return error; 444 return error;
445} 445}
446 446
447static struct pci_device_id vt596_ids[] = { 447static const struct pci_device_id vt596_ids[] = {
448 { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C596_3), 448 { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C596_3),
449 .driver_data = SMBBA1 }, 449 .driver_data = SMBBA1 },
450 { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C596B_3), 450 { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C596B_3),
diff --git a/drivers/i2c/busses/i2c-xiic.c b/drivers/i2c/busses/i2c-xiic.c
new file mode 100644
index 000000000000..a9c419e075a5
--- /dev/null
+++ b/drivers/i2c/busses/i2c-xiic.c
@@ -0,0 +1,826 @@
1/*
2 * i2c-xiic.c
3 * Copyright (c) 2002-2007 Xilinx Inc.
4 * Copyright (c) 2009-2010 Intel Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18 *
19 *
20 * This code was implemented by Mocean Laboratories AB when porting linux
21 * to the automotive development board Russellville. The copyright holder
22 * as seen in the header is Intel corporation.
23 * Mocean Laboratories forked off the GNU/Linux platform work into a
24 * separate company called Pelagicore AB, which commited the code to the
25 * kernel.
26 */
27
28/* Supports:
29 * Xilinx IIC
30 */
31#include <linux/kernel.h>
32#include <linux/module.h>
33#include <linux/init.h>
34#include <linux/errno.h>
35#include <linux/delay.h>
36#include <linux/platform_device.h>
37#include <linux/i2c.h>
38#include <linux/interrupt.h>
39#include <linux/wait.h>
40#include <linux/i2c-xiic.h>
41#include <linux/io.h>
42#include <linux/slab.h>
43
44#define DRIVER_NAME "xiic-i2c"
45
46enum xilinx_i2c_state {
47 STATE_DONE,
48 STATE_ERROR,
49 STATE_START
50};
51
52/**
53 * struct xiic_i2c - Internal representation of the XIIC I2C bus
54 * @base: Memory base of the HW registers
55 * @wait: Wait queue for callers
56 * @adap: Kernel adapter representation
57 * @tx_msg: Messages from above to be sent
58 * @lock: Mutual exclusion
59 * @tx_pos: Current pos in TX message
60 * @nmsgs: Number of messages in tx_msg
61 * @state: See STATE_
62 * @rx_msg: Current RX message
63 * @rx_pos: Position within current RX message
64 */
65struct xiic_i2c {
66 void __iomem *base;
67 wait_queue_head_t wait;
68 struct i2c_adapter adap;
69 struct i2c_msg *tx_msg;
70 spinlock_t lock;
71 unsigned int tx_pos;
72 unsigned int nmsgs;
73 enum xilinx_i2c_state state;
74 struct i2c_msg *rx_msg;
75 int rx_pos;
76};
77
78
79#define XIIC_MSB_OFFSET 0
80#define XIIC_REG_OFFSET (0x100+XIIC_MSB_OFFSET)
81
82/*
83 * Register offsets in bytes from RegisterBase. Three is added to the
84 * base offset to access LSB (IBM style) of the word
85 */
86#define XIIC_CR_REG_OFFSET (0x00+XIIC_REG_OFFSET) /* Control Register */
87#define XIIC_SR_REG_OFFSET (0x04+XIIC_REG_OFFSET) /* Status Register */
88#define XIIC_DTR_REG_OFFSET (0x08+XIIC_REG_OFFSET) /* Data Tx Register */
89#define XIIC_DRR_REG_OFFSET (0x0C+XIIC_REG_OFFSET) /* Data Rx Register */
90#define XIIC_ADR_REG_OFFSET (0x10+XIIC_REG_OFFSET) /* Address Register */
91#define XIIC_TFO_REG_OFFSET (0x14+XIIC_REG_OFFSET) /* Tx FIFO Occupancy */
92#define XIIC_RFO_REG_OFFSET (0x18+XIIC_REG_OFFSET) /* Rx FIFO Occupancy */
93#define XIIC_TBA_REG_OFFSET (0x1C+XIIC_REG_OFFSET) /* 10 Bit Address reg */
94#define XIIC_RFD_REG_OFFSET (0x20+XIIC_REG_OFFSET) /* Rx FIFO Depth reg */
95#define XIIC_GPO_REG_OFFSET (0x24+XIIC_REG_OFFSET) /* Output Register */
96
97/* Control Register masks */
98#define XIIC_CR_ENABLE_DEVICE_MASK 0x01 /* Device enable = 1 */
99#define XIIC_CR_TX_FIFO_RESET_MASK 0x02 /* Transmit FIFO reset=1 */
100#define XIIC_CR_MSMS_MASK 0x04 /* Master starts Txing=1 */
101#define XIIC_CR_DIR_IS_TX_MASK 0x08 /* Dir of tx. Txing=1 */
102#define XIIC_CR_NO_ACK_MASK 0x10 /* Tx Ack. NO ack = 1 */
103#define XIIC_CR_REPEATED_START_MASK 0x20 /* Repeated start = 1 */
104#define XIIC_CR_GENERAL_CALL_MASK 0x40 /* Gen Call enabled = 1 */
105
106/* Status Register masks */
107#define XIIC_SR_GEN_CALL_MASK 0x01 /* 1=a mstr issued a GC */
108#define XIIC_SR_ADDR_AS_SLAVE_MASK 0x02 /* 1=when addr as slave */
109#define XIIC_SR_BUS_BUSY_MASK 0x04 /* 1 = bus is busy */
110#define XIIC_SR_MSTR_RDING_SLAVE_MASK 0x08 /* 1=Dir: mstr <-- slave */
111#define XIIC_SR_TX_FIFO_FULL_MASK 0x10 /* 1 = Tx FIFO full */
112#define XIIC_SR_RX_FIFO_FULL_MASK 0x20 /* 1 = Rx FIFO full */
113#define XIIC_SR_RX_FIFO_EMPTY_MASK 0x40 /* 1 = Rx FIFO empty */
114#define XIIC_SR_TX_FIFO_EMPTY_MASK 0x80 /* 1 = Tx FIFO empty */
115
116/* Interrupt Status Register masks Interrupt occurs when... */
117#define XIIC_INTR_ARB_LOST_MASK 0x01 /* 1 = arbitration lost */
118#define XIIC_INTR_TX_ERROR_MASK 0x02 /* 1=Tx error/msg complete */
119#define XIIC_INTR_TX_EMPTY_MASK 0x04 /* 1 = Tx FIFO/reg empty */
120#define XIIC_INTR_RX_FULL_MASK 0x08 /* 1=Rx FIFO/reg=OCY level */
121#define XIIC_INTR_BNB_MASK 0x10 /* 1 = Bus not busy */
122#define XIIC_INTR_AAS_MASK 0x20 /* 1 = when addr as slave */
123#define XIIC_INTR_NAAS_MASK 0x40 /* 1 = not addr as slave */
124#define XIIC_INTR_TX_HALF_MASK 0x80 /* 1 = TX FIFO half empty */
125
126/* The following constants specify the depth of the FIFOs */
127#define IIC_RX_FIFO_DEPTH 16 /* Rx fifo capacity */
128#define IIC_TX_FIFO_DEPTH 16 /* Tx fifo capacity */
129
130/* The following constants specify groups of interrupts that are typically
131 * enabled or disables at the same time
132 */
133#define XIIC_TX_INTERRUPTS \
134(XIIC_INTR_TX_ERROR_MASK | XIIC_INTR_TX_EMPTY_MASK | XIIC_INTR_TX_HALF_MASK)
135
136#define XIIC_TX_RX_INTERRUPTS (XIIC_INTR_RX_FULL_MASK | XIIC_TX_INTERRUPTS)
137
138/* The following constants are used with the following macros to specify the
139 * operation, a read or write operation.
140 */
141#define XIIC_READ_OPERATION 1
142#define XIIC_WRITE_OPERATION 0
143
144/*
145 * Tx Fifo upper bit masks.
146 */
147#define XIIC_TX_DYN_START_MASK 0x0100 /* 1 = Set dynamic start */
148#define XIIC_TX_DYN_STOP_MASK 0x0200 /* 1 = Set dynamic stop */
149
150/*
151 * The following constants define the register offsets for the Interrupt
152 * registers. There are some holes in the memory map for reserved addresses
153 * to allow other registers to be added and still match the memory map of the
154 * interrupt controller registers
155 */
156#define XIIC_DGIER_OFFSET 0x1C /* Device Global Interrupt Enable Register */
157#define XIIC_IISR_OFFSET 0x20 /* Interrupt Status Register */
158#define XIIC_IIER_OFFSET 0x28 /* Interrupt Enable Register */
159#define XIIC_RESETR_OFFSET 0x40 /* Reset Register */
160
161#define XIIC_RESET_MASK 0xAUL
162
163/*
164 * The following constant is used for the device global interrupt enable
165 * register, to enable all interrupts for the device, this is the only bit
166 * in the register
167 */
168#define XIIC_GINTR_ENABLE_MASK 0x80000000UL
169
170#define xiic_tx_space(i2c) ((i2c)->tx_msg->len - (i2c)->tx_pos)
171#define xiic_rx_space(i2c) ((i2c)->rx_msg->len - (i2c)->rx_pos)
172
173static void xiic_start_xfer(struct xiic_i2c *i2c);
174static void __xiic_start_xfer(struct xiic_i2c *i2c);
175
176static inline void xiic_setreg8(struct xiic_i2c *i2c, int reg, u8 value)
177{
178 iowrite8(value, i2c->base + reg);
179}
180
181static inline u8 xiic_getreg8(struct xiic_i2c *i2c, int reg)
182{
183 return ioread8(i2c->base + reg);
184}
185
186static inline void xiic_setreg16(struct xiic_i2c *i2c, int reg, u16 value)
187{
188 iowrite16(value, i2c->base + reg);
189}
190
191static inline void xiic_setreg32(struct xiic_i2c *i2c, int reg, int value)
192{
193 iowrite32(value, i2c->base + reg);
194}
195
196static inline int xiic_getreg32(struct xiic_i2c *i2c, int reg)
197{
198 return ioread32(i2c->base + reg);
199}
200
201static inline void xiic_irq_dis(struct xiic_i2c *i2c, u32 mask)
202{
203 u32 ier = xiic_getreg32(i2c, XIIC_IIER_OFFSET);
204 xiic_setreg32(i2c, XIIC_IIER_OFFSET, ier & ~mask);
205}
206
207static inline void xiic_irq_en(struct xiic_i2c *i2c, u32 mask)
208{
209 u32 ier = xiic_getreg32(i2c, XIIC_IIER_OFFSET);
210 xiic_setreg32(i2c, XIIC_IIER_OFFSET, ier | mask);
211}
212
213static inline void xiic_irq_clr(struct xiic_i2c *i2c, u32 mask)
214{
215 u32 isr = xiic_getreg32(i2c, XIIC_IISR_OFFSET);
216 xiic_setreg32(i2c, XIIC_IISR_OFFSET, isr & mask);
217}
218
219static inline void xiic_irq_clr_en(struct xiic_i2c *i2c, u32 mask)
220{
221 xiic_irq_clr(i2c, mask);
222 xiic_irq_en(i2c, mask);
223}
224
225static void xiic_clear_rx_fifo(struct xiic_i2c *i2c)
226{
227 u8 sr;
228 for (sr = xiic_getreg8(i2c, XIIC_SR_REG_OFFSET);
229 !(sr & XIIC_SR_RX_FIFO_EMPTY_MASK);
230 sr = xiic_getreg8(i2c, XIIC_SR_REG_OFFSET))
231 xiic_getreg8(i2c, XIIC_DRR_REG_OFFSET);
232}
233
234static void xiic_reinit(struct xiic_i2c *i2c)
235{
236 xiic_setreg32(i2c, XIIC_RESETR_OFFSET, XIIC_RESET_MASK);
237
238 /* Set receive Fifo depth to maximum (zero based). */
239 xiic_setreg8(i2c, XIIC_RFD_REG_OFFSET, IIC_RX_FIFO_DEPTH - 1);
240
241 /* Reset Tx Fifo. */
242 xiic_setreg8(i2c, XIIC_CR_REG_OFFSET, XIIC_CR_TX_FIFO_RESET_MASK);
243
244 /* Enable IIC Device, remove Tx Fifo reset & disable general call. */
245 xiic_setreg8(i2c, XIIC_CR_REG_OFFSET, XIIC_CR_ENABLE_DEVICE_MASK);
246
247 /* make sure RX fifo is empty */
248 xiic_clear_rx_fifo(i2c);
249
250 /* Enable interrupts */
251 xiic_setreg32(i2c, XIIC_DGIER_OFFSET, XIIC_GINTR_ENABLE_MASK);
252
253 xiic_irq_clr_en(i2c, XIIC_INTR_AAS_MASK | XIIC_INTR_ARB_LOST_MASK);
254}
255
256static void xiic_deinit(struct xiic_i2c *i2c)
257{
258 u8 cr;
259
260 xiic_setreg32(i2c, XIIC_RESETR_OFFSET, XIIC_RESET_MASK);
261
262 /* Disable IIC Device. */
263 cr = xiic_getreg8(i2c, XIIC_CR_REG_OFFSET);
264 xiic_setreg8(i2c, XIIC_CR_REG_OFFSET, cr & ~XIIC_CR_ENABLE_DEVICE_MASK);
265}
266
267static void xiic_read_rx(struct xiic_i2c *i2c)
268{
269 u8 bytes_in_fifo;
270 int i;
271
272 bytes_in_fifo = xiic_getreg8(i2c, XIIC_RFO_REG_OFFSET) + 1;
273
274 dev_dbg(i2c->adap.dev.parent, "%s entry, bytes in fifo: %d, msg: %d"
275 ", SR: 0x%x, CR: 0x%x\n",
276 __func__, bytes_in_fifo, xiic_rx_space(i2c),
277 xiic_getreg8(i2c, XIIC_SR_REG_OFFSET),
278 xiic_getreg8(i2c, XIIC_CR_REG_OFFSET));
279
280 if (bytes_in_fifo > xiic_rx_space(i2c))
281 bytes_in_fifo = xiic_rx_space(i2c);
282
283 for (i = 0; i < bytes_in_fifo; i++)
284 i2c->rx_msg->buf[i2c->rx_pos++] =
285 xiic_getreg8(i2c, XIIC_DRR_REG_OFFSET);
286
287 xiic_setreg8(i2c, XIIC_RFD_REG_OFFSET,
288 (xiic_rx_space(i2c) > IIC_RX_FIFO_DEPTH) ?
289 IIC_RX_FIFO_DEPTH - 1 : xiic_rx_space(i2c) - 1);
290}
291
292static int xiic_tx_fifo_space(struct xiic_i2c *i2c)
293{
294 /* return the actual space left in the FIFO */
295 return IIC_TX_FIFO_DEPTH - xiic_getreg8(i2c, XIIC_TFO_REG_OFFSET) - 1;
296}
297
298static void xiic_fill_tx_fifo(struct xiic_i2c *i2c)
299{
300 u8 fifo_space = xiic_tx_fifo_space(i2c);
301 int len = xiic_tx_space(i2c);
302
303 len = (len > fifo_space) ? fifo_space : len;
304
305 dev_dbg(i2c->adap.dev.parent, "%s entry, len: %d, fifo space: %d\n",
306 __func__, len, fifo_space);
307
308 while (len--) {
309 u16 data = i2c->tx_msg->buf[i2c->tx_pos++];
310 if ((xiic_tx_space(i2c) == 0) && (i2c->nmsgs == 1)) {
311 /* last message in transfer -> STOP */
312 data |= XIIC_TX_DYN_STOP_MASK;
313 dev_dbg(i2c->adap.dev.parent, "%s TX STOP\n", __func__);
314
315 xiic_setreg16(i2c, XIIC_DTR_REG_OFFSET, data);
316 } else
317 xiic_setreg8(i2c, XIIC_DTR_REG_OFFSET, data);
318 }
319}
320
321static void xiic_wakeup(struct xiic_i2c *i2c, int code)
322{
323 i2c->tx_msg = NULL;
324 i2c->rx_msg = NULL;
325 i2c->nmsgs = 0;
326 i2c->state = code;
327 wake_up(&i2c->wait);
328}
329
330static void xiic_process(struct xiic_i2c *i2c)
331{
332 u32 pend, isr, ier;
333 u32 clr = 0;
334
335 /* Get the interrupt Status from the IPIF. There is no clearing of
336 * interrupts in the IPIF. Interrupts must be cleared at the source.
337 * To find which interrupts are pending; AND interrupts pending with
338 * interrupts masked.
339 */
340 isr = xiic_getreg32(i2c, XIIC_IISR_OFFSET);
341 ier = xiic_getreg32(i2c, XIIC_IIER_OFFSET);
342 pend = isr & ier;
343
344 dev_dbg(i2c->adap.dev.parent, "%s entry, IER: 0x%x, ISR: 0x%x, "
345 "pend: 0x%x, SR: 0x%x, msg: %p, nmsgs: %d\n",
346 __func__, ier, isr, pend, xiic_getreg8(i2c, XIIC_SR_REG_OFFSET),
347 i2c->tx_msg, i2c->nmsgs);
348
349 /* Do not processes a devices interrupts if the device has no
350 * interrupts pending
351 */
352 if (!pend)
353 return;
354
355 /* Service requesting interrupt */
356 if ((pend & XIIC_INTR_ARB_LOST_MASK) ||
357 ((pend & XIIC_INTR_TX_ERROR_MASK) &&
358 !(pend & XIIC_INTR_RX_FULL_MASK))) {
359 /* bus arbritration lost, or...
360 * Transmit error _OR_ RX completed
361 * if this happens when RX_FULL is not set
362 * this is probably a TX error
363 */
364
365 dev_dbg(i2c->adap.dev.parent, "%s error\n", __func__);
366
367 /* dynamic mode seem to suffer from problems if we just flushes
368 * fifos and the next message is a TX with len 0 (only addr)
369 * reset the IP instead of just flush fifos
370 */
371 xiic_reinit(i2c);
372
373 if (i2c->tx_msg)
374 xiic_wakeup(i2c, STATE_ERROR);
375
376 } else if (pend & XIIC_INTR_RX_FULL_MASK) {
377 /* Receive register/FIFO is full */
378
379 clr = XIIC_INTR_RX_FULL_MASK;
380 if (!i2c->rx_msg) {
381 dev_dbg(i2c->adap.dev.parent,
382 "%s unexpexted RX IRQ\n", __func__);
383 xiic_clear_rx_fifo(i2c);
384 goto out;
385 }
386
387 xiic_read_rx(i2c);
388 if (xiic_rx_space(i2c) == 0) {
389 /* this is the last part of the message */
390 i2c->rx_msg = NULL;
391
392 /* also clear TX error if there (RX complete) */
393 clr |= (isr & XIIC_INTR_TX_ERROR_MASK);
394
395 dev_dbg(i2c->adap.dev.parent,
396 "%s end of message, nmsgs: %d\n",
397 __func__, i2c->nmsgs);
398
399 /* send next message if this wasn't the last,
400 * otherwise the transfer will be finialise when
401 * receiving the bus not busy interrupt
402 */
403 if (i2c->nmsgs > 1) {
404 i2c->nmsgs--;
405 i2c->tx_msg++;
406 dev_dbg(i2c->adap.dev.parent,
407 "%s will start next...\n", __func__);
408
409 __xiic_start_xfer(i2c);
410 }
411 }
412 } else if (pend & XIIC_INTR_BNB_MASK) {
413 /* IIC bus has transitioned to not busy */
414 clr = XIIC_INTR_BNB_MASK;
415
416 /* The bus is not busy, disable BusNotBusy interrupt */
417 xiic_irq_dis(i2c, XIIC_INTR_BNB_MASK);
418
419 if (!i2c->tx_msg)
420 goto out;
421
422 if ((i2c->nmsgs == 1) && !i2c->rx_msg &&
423 xiic_tx_space(i2c) == 0)
424 xiic_wakeup(i2c, STATE_DONE);
425 else
426 xiic_wakeup(i2c, STATE_ERROR);
427
428 } else if (pend & (XIIC_INTR_TX_EMPTY_MASK | XIIC_INTR_TX_HALF_MASK)) {
429 /* Transmit register/FIFO is empty or ½ empty */
430
431 clr = pend &
432 (XIIC_INTR_TX_EMPTY_MASK | XIIC_INTR_TX_HALF_MASK);
433
434 if (!i2c->tx_msg) {
435 dev_dbg(i2c->adap.dev.parent,
436 "%s unexpexted TX IRQ\n", __func__);
437 goto out;
438 }
439
440 xiic_fill_tx_fifo(i2c);
441
442 /* current message sent and there is space in the fifo */
443 if (!xiic_tx_space(i2c) && xiic_tx_fifo_space(i2c) >= 2) {
444 dev_dbg(i2c->adap.dev.parent,
445 "%s end of message sent, nmsgs: %d\n",
446 __func__, i2c->nmsgs);
447 if (i2c->nmsgs > 1) {
448 i2c->nmsgs--;
449 i2c->tx_msg++;
450 __xiic_start_xfer(i2c);
451 } else {
452 xiic_irq_dis(i2c, XIIC_INTR_TX_HALF_MASK);
453
454 dev_dbg(i2c->adap.dev.parent,
455 "%s Got TX IRQ but no more to do...\n",
456 __func__);
457 }
458 } else if (!xiic_tx_space(i2c) && (i2c->nmsgs == 1))
459 /* current frame is sent and is last,
460 * make sure to disable tx half
461 */
462 xiic_irq_dis(i2c, XIIC_INTR_TX_HALF_MASK);
463 } else {
464 /* got IRQ which is not acked */
465 dev_err(i2c->adap.dev.parent, "%s Got unexpected IRQ\n",
466 __func__);
467 clr = pend;
468 }
469out:
470 dev_dbg(i2c->adap.dev.parent, "%s clr: 0x%x\n", __func__, clr);
471
472 xiic_setreg32(i2c, XIIC_IISR_OFFSET, clr);
473}
474
475static int xiic_bus_busy(struct xiic_i2c *i2c)
476{
477 u8 sr = xiic_getreg8(i2c, XIIC_SR_REG_OFFSET);
478
479 return (sr & XIIC_SR_BUS_BUSY_MASK) ? -EBUSY : 0;
480}
481
482static int xiic_busy(struct xiic_i2c *i2c)
483{
484 int tries = 3;
485 int err;
486
487 if (i2c->tx_msg)
488 return -EBUSY;
489
490 /* for instance if previous transfer was terminated due to TX error
491 * it might be that the bus is on it's way to become available
492 * give it at most 3 ms to wake
493 */
494 err = xiic_bus_busy(i2c);
495 while (err && tries--) {
496 mdelay(1);
497 err = xiic_bus_busy(i2c);
498 }
499
500 return err;
501}
502
503static void xiic_start_recv(struct xiic_i2c *i2c)
504{
505 u8 rx_watermark;
506 struct i2c_msg *msg = i2c->rx_msg = i2c->tx_msg;
507
508 /* Clear and enable Rx full interrupt. */
509 xiic_irq_clr_en(i2c, XIIC_INTR_RX_FULL_MASK | XIIC_INTR_TX_ERROR_MASK);
510
511 /* we want to get all but last byte, because the TX_ERROR IRQ is used
512 * to inidicate error ACK on the address, and negative ack on the last
513 * received byte, so to not mix them receive all but last.
514 * In the case where there is only one byte to receive
515 * we can check if ERROR and RX full is set at the same time
516 */
517 rx_watermark = msg->len;
518 if (rx_watermark > IIC_RX_FIFO_DEPTH)
519 rx_watermark = IIC_RX_FIFO_DEPTH;
520 xiic_setreg8(i2c, XIIC_RFD_REG_OFFSET, rx_watermark - 1);
521
522 if (!(msg->flags & I2C_M_NOSTART))
523 /* write the address */
524 xiic_setreg16(i2c, XIIC_DTR_REG_OFFSET,
525 (msg->addr << 1) | XIIC_READ_OPERATION |
526 XIIC_TX_DYN_START_MASK);
527
528 xiic_irq_clr_en(i2c, XIIC_INTR_BNB_MASK);
529
530 xiic_setreg16(i2c, XIIC_DTR_REG_OFFSET,
531 msg->len | ((i2c->nmsgs == 1) ? XIIC_TX_DYN_STOP_MASK : 0));
532 if (i2c->nmsgs == 1)
533 /* very last, enable bus not busy as well */
534 xiic_irq_clr_en(i2c, XIIC_INTR_BNB_MASK);
535
536 /* the message is tx:ed */
537 i2c->tx_pos = msg->len;
538}
539
540static void xiic_start_send(struct xiic_i2c *i2c)
541{
542 struct i2c_msg *msg = i2c->tx_msg;
543
544 xiic_irq_clr(i2c, XIIC_INTR_TX_ERROR_MASK);
545
546 dev_dbg(i2c->adap.dev.parent, "%s entry, msg: %p, len: %d, "
547 "ISR: 0x%x, CR: 0x%x\n",
548 __func__, msg, msg->len, xiic_getreg32(i2c, XIIC_IISR_OFFSET),
549 xiic_getreg8(i2c, XIIC_CR_REG_OFFSET));
550
551 if (!(msg->flags & I2C_M_NOSTART)) {
552 /* write the address */
553 u16 data = ((msg->addr << 1) & 0xfe) | XIIC_WRITE_OPERATION |
554 XIIC_TX_DYN_START_MASK;
555 if ((i2c->nmsgs == 1) && msg->len == 0)
556 /* no data and last message -> add STOP */
557 data |= XIIC_TX_DYN_STOP_MASK;
558
559 xiic_setreg16(i2c, XIIC_DTR_REG_OFFSET, data);
560 }
561
562 xiic_fill_tx_fifo(i2c);
563
564 /* Clear any pending Tx empty, Tx Error and then enable them. */
565 xiic_irq_clr_en(i2c, XIIC_INTR_TX_EMPTY_MASK | XIIC_INTR_TX_ERROR_MASK |
566 XIIC_INTR_BNB_MASK);
567}
568
569static irqreturn_t xiic_isr(int irq, void *dev_id)
570{
571 struct xiic_i2c *i2c = dev_id;
572
573 spin_lock(&i2c->lock);
574 /* disable interrupts globally */
575 xiic_setreg32(i2c, XIIC_DGIER_OFFSET, 0);
576
577 dev_dbg(i2c->adap.dev.parent, "%s entry\n", __func__);
578
579 xiic_process(i2c);
580
581 xiic_setreg32(i2c, XIIC_DGIER_OFFSET, XIIC_GINTR_ENABLE_MASK);
582 spin_unlock(&i2c->lock);
583
584 return IRQ_HANDLED;
585}
586
587static void __xiic_start_xfer(struct xiic_i2c *i2c)
588{
589 int first = 1;
590 int fifo_space = xiic_tx_fifo_space(i2c);
591 dev_dbg(i2c->adap.dev.parent, "%s entry, msg: %p, fifos space: %d\n",
592 __func__, i2c->tx_msg, fifo_space);
593
594 if (!i2c->tx_msg)
595 return;
596
597 i2c->rx_pos = 0;
598 i2c->tx_pos = 0;
599 i2c->state = STATE_START;
600 while ((fifo_space >= 2) && (first || (i2c->nmsgs > 1))) {
601 if (!first) {
602 i2c->nmsgs--;
603 i2c->tx_msg++;
604 i2c->tx_pos = 0;
605 } else
606 first = 0;
607
608 if (i2c->tx_msg->flags & I2C_M_RD) {
609 /* we dont date putting several reads in the FIFO */
610 xiic_start_recv(i2c);
611 return;
612 } else {
613 xiic_start_send(i2c);
614 if (xiic_tx_space(i2c) != 0) {
615 /* the message could not be completely sent */
616 break;
617 }
618 }
619
620 fifo_space = xiic_tx_fifo_space(i2c);
621 }
622
623 /* there are more messages or the current one could not be completely
624 * put into the FIFO, also enable the half empty interrupt
625 */
626 if (i2c->nmsgs > 1 || xiic_tx_space(i2c))
627 xiic_irq_clr_en(i2c, XIIC_INTR_TX_HALF_MASK);
628
629}
630
631static void xiic_start_xfer(struct xiic_i2c *i2c)
632{
633 unsigned long flags;
634
635 spin_lock_irqsave(&i2c->lock, flags);
636 xiic_reinit(i2c);
637 /* disable interrupts globally */
638 xiic_setreg32(i2c, XIIC_DGIER_OFFSET, 0);
639 spin_unlock_irqrestore(&i2c->lock, flags);
640
641 __xiic_start_xfer(i2c);
642 xiic_setreg32(i2c, XIIC_DGIER_OFFSET, XIIC_GINTR_ENABLE_MASK);
643}
644
645static int xiic_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
646{
647 struct xiic_i2c *i2c = i2c_get_adapdata(adap);
648 int err;
649
650 dev_dbg(adap->dev.parent, "%s entry SR: 0x%x\n", __func__,
651 xiic_getreg8(i2c, XIIC_SR_REG_OFFSET));
652
653 err = xiic_busy(i2c);
654 if (err)
655 return err;
656
657 i2c->tx_msg = msgs;
658 i2c->nmsgs = num;
659
660 xiic_start_xfer(i2c);
661
662 if (wait_event_timeout(i2c->wait, (i2c->state == STATE_ERROR) ||
663 (i2c->state == STATE_DONE), HZ))
664 return (i2c->state == STATE_DONE) ? num : -EIO;
665 else {
666 i2c->tx_msg = NULL;
667 i2c->rx_msg = NULL;
668 i2c->nmsgs = 0;
669 return -ETIMEDOUT;
670 }
671}
672
673static u32 xiic_func(struct i2c_adapter *adap)
674{
675 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
676}
677
678static const struct i2c_algorithm xiic_algorithm = {
679 .master_xfer = xiic_xfer,
680 .functionality = xiic_func,
681};
682
683static struct i2c_adapter xiic_adapter = {
684 .owner = THIS_MODULE,
685 .name = DRIVER_NAME,
686 .class = I2C_CLASS_HWMON | I2C_CLASS_SPD,
687 .algo = &xiic_algorithm,
688};
689
690
691static int __devinit xiic_i2c_probe(struct platform_device *pdev)
692{
693 struct xiic_i2c *i2c;
694 struct xiic_i2c_platform_data *pdata;
695 struct resource *res;
696 int ret, irq;
697 u8 i;
698
699 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
700 if (!res)
701 goto resource_missing;
702
703 irq = platform_get_irq(pdev, 0);
704 if (irq < 0)
705 goto resource_missing;
706
707 pdata = (struct xiic_i2c_platform_data *) pdev->dev.platform_data;
708 if (!pdata)
709 return -EINVAL;
710
711 i2c = kzalloc(sizeof(*i2c), GFP_KERNEL);
712 if (!i2c)
713 return -ENOMEM;
714
715 if (!request_mem_region(res->start, resource_size(res), pdev->name)) {
716 dev_err(&pdev->dev, "Memory region busy\n");
717 ret = -EBUSY;
718 goto request_mem_failed;
719 }
720
721 i2c->base = ioremap(res->start, resource_size(res));
722 if (!i2c->base) {
723 dev_err(&pdev->dev, "Unable to map registers\n");
724 ret = -EIO;
725 goto map_failed;
726 }
727
728 /* hook up driver to tree */
729 platform_set_drvdata(pdev, i2c);
730 i2c->adap = xiic_adapter;
731 i2c_set_adapdata(&i2c->adap, i2c);
732 i2c->adap.dev.parent = &pdev->dev;
733
734 xiic_reinit(i2c);
735
736 spin_lock_init(&i2c->lock);
737 init_waitqueue_head(&i2c->wait);
738 ret = request_irq(irq, xiic_isr, 0, pdev->name, i2c);
739 if (ret) {
740 dev_err(&pdev->dev, "Cannot claim IRQ\n");
741 goto request_irq_failed;
742 }
743
744 /* add i2c adapter to i2c tree */
745 ret = i2c_add_adapter(&i2c->adap);
746 if (ret) {
747 dev_err(&pdev->dev, "Failed to add adapter\n");
748 goto add_adapter_failed;
749 }
750
751 /* add in known devices to the bus */
752 for (i = 0; i < pdata->num_devices; i++)
753 i2c_new_device(&i2c->adap, pdata->devices + i);
754
755 return 0;
756
757add_adapter_failed:
758 free_irq(irq, i2c);
759request_irq_failed:
760 xiic_deinit(i2c);
761 iounmap(i2c->base);
762map_failed:
763 release_mem_region(res->start, resource_size(res));
764request_mem_failed:
765 kfree(i2c);
766
767 return ret;
768resource_missing:
769 dev_err(&pdev->dev, "IRQ or Memory resource is missing\n");
770 return -ENOENT;
771}
772
773static int __devexit xiic_i2c_remove(struct platform_device* pdev)
774{
775 struct xiic_i2c *i2c = platform_get_drvdata(pdev);
776 struct resource *res;
777
778 /* remove adapter & data */
779 i2c_del_adapter(&i2c->adap);
780
781 xiic_deinit(i2c);
782
783 platform_set_drvdata(pdev, NULL);
784
785 free_irq(platform_get_irq(pdev, 0), i2c);
786
787 iounmap(i2c->base);
788
789 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
790 if (res)
791 release_mem_region(res->start, resource_size(res));
792
793 kfree(i2c);
794
795 return 0;
796}
797
798
799/* work with hotplug and coldplug */
800MODULE_ALIAS("platform:"DRIVER_NAME);
801
802static struct platform_driver xiic_i2c_driver = {
803 .probe = xiic_i2c_probe,
804 .remove = __devexit_p(xiic_i2c_remove),
805 .driver = {
806 .owner = THIS_MODULE,
807 .name = DRIVER_NAME,
808 },
809};
810
811static int __init xiic_i2c_init(void)
812{
813 return platform_driver_register(&xiic_i2c_driver);
814}
815
816static void __exit xiic_i2c_exit(void)
817{
818 platform_driver_unregister(&xiic_i2c_driver);
819}
820
821module_init(xiic_i2c_init);
822module_exit(xiic_i2c_exit);
823
824MODULE_AUTHOR("info@mocean-labs.com");
825MODULE_DESCRIPTION("Xilinx I2C bus driver");
826MODULE_LICENSE("GPL v2");
diff --git a/drivers/i2c/busses/scx200_acb.c b/drivers/i2c/busses/scx200_acb.c
index cf994bd01d9c..684395b6f3e2 100644
--- a/drivers/i2c/busses/scx200_acb.c
+++ b/drivers/i2c/busses/scx200_acb.c
@@ -31,6 +31,7 @@
31#include <linux/pci.h> 31#include <linux/pci.h>
32#include <linux/delay.h> 32#include <linux/delay.h>
33#include <linux/mutex.h> 33#include <linux/mutex.h>
34#include <linux/slab.h>
34#include <asm/io.h> 35#include <asm/io.h>
35 36
36#include <linux/scx200.h> 37#include <linux/scx200.h>
diff --git a/drivers/i2c/chips/Kconfig b/drivers/i2c/chips/Kconfig
deleted file mode 100644
index ae4539d99bef..000000000000
--- a/drivers/i2c/chips/Kconfig
+++ /dev/null
@@ -1,19 +0,0 @@
1#
2# Miscellaneous I2C chip drivers configuration
3#
4# *** DEPRECATED! Do not add new entries! See Makefile ***
5#
6
7menu "Miscellaneous I2C Chip support"
8
9config SENSORS_TSL2550
10 tristate "Taos TSL2550 ambient light sensor"
11 depends on EXPERIMENTAL
12 help
13 If you say yes here you get support for the Taos TSL2550
14 ambient light sensor.
15
16 This driver can also be built as a module. If so, the module
17 will be called tsl2550.
18
19endmenu
diff --git a/drivers/i2c/chips/Makefile b/drivers/i2c/chips/Makefile
deleted file mode 100644
index fe0af0f81f2d..000000000000
--- a/drivers/i2c/chips/Makefile
+++ /dev/null
@@ -1,18 +0,0 @@
1#
2# Makefile for miscellaneous I2C chip drivers.
3#
4# Do not add new drivers to this directory! It is DEPRECATED.
5#
6# Device drivers are better grouped according to the functionality they
7# implement rather than to the bus they are connected to. In particular:
8# * Hardware monitoring chip drivers go to drivers/hwmon
9# * RTC chip drivers go to drivers/rtc
10# * I/O expander drivers go to drivers/gpio
11#
12
13obj-$(CONFIG_SENSORS_TSL2550) += tsl2550.o
14
15ifeq ($(CONFIG_I2C_DEBUG_CHIP),y)
16EXTRA_CFLAGS += -DDEBUG
17endif
18
diff --git a/drivers/i2c/chips/tsl2550.c b/drivers/i2c/chips/tsl2550.c
deleted file mode 100644
index a0702f36a72f..000000000000
--- a/drivers/i2c/chips/tsl2550.c
+++ /dev/null
@@ -1,473 +0,0 @@
1/*
2 * tsl2550.c - Linux kernel modules for ambient light sensor
3 *
4 * Copyright (C) 2007 Rodolfo Giometti <giometti@linux.it>
5 * Copyright (C) 2007 Eurotech S.p.A. <info@eurotech.it>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22#include <linux/module.h>
23#include <linux/init.h>
24#include <linux/slab.h>
25#include <linux/i2c.h>
26#include <linux/mutex.h>
27
28#define TSL2550_DRV_NAME "tsl2550"
29#define DRIVER_VERSION "1.2"
30
31/*
32 * Defines
33 */
34
35#define TSL2550_POWER_DOWN 0x00
36#define TSL2550_POWER_UP 0x03
37#define TSL2550_STANDARD_RANGE 0x18
38#define TSL2550_EXTENDED_RANGE 0x1d
39#define TSL2550_READ_ADC0 0x43
40#define TSL2550_READ_ADC1 0x83
41
42/*
43 * Structs
44 */
45
46struct tsl2550_data {
47 struct i2c_client *client;
48 struct mutex update_lock;
49
50 unsigned int power_state : 1;
51 unsigned int operating_mode : 1;
52};
53
54/*
55 * Global data
56 */
57
58static const u8 TSL2550_MODE_RANGE[2] = {
59 TSL2550_STANDARD_RANGE, TSL2550_EXTENDED_RANGE,
60};
61
62/*
63 * Management functions
64 */
65
66static int tsl2550_set_operating_mode(struct i2c_client *client, int mode)
67{
68 struct tsl2550_data *data = i2c_get_clientdata(client);
69
70 int ret = i2c_smbus_write_byte(client, TSL2550_MODE_RANGE[mode]);
71
72 data->operating_mode = mode;
73
74 return ret;
75}
76
77static int tsl2550_set_power_state(struct i2c_client *client, int state)
78{
79 struct tsl2550_data *data = i2c_get_clientdata(client);
80 int ret;
81
82 if (state == 0)
83 ret = i2c_smbus_write_byte(client, TSL2550_POWER_DOWN);
84 else {
85 ret = i2c_smbus_write_byte(client, TSL2550_POWER_UP);
86
87 /* On power up we should reset operating mode also... */
88 tsl2550_set_operating_mode(client, data->operating_mode);
89 }
90
91 data->power_state = state;
92
93 return ret;
94}
95
96static int tsl2550_get_adc_value(struct i2c_client *client, u8 cmd)
97{
98 int ret;
99
100 ret = i2c_smbus_read_byte_data(client, cmd);
101 if (ret < 0)
102 return ret;
103 if (!(ret & 0x80))
104 return -EAGAIN;
105 return ret & 0x7f; /* remove the "valid" bit */
106}
107
108/*
109 * LUX calculation
110 */
111
112#define TSL2550_MAX_LUX 1846
113
114static const u8 ratio_lut[] = {
115 100, 100, 100, 100, 100, 100, 100, 100,
116 100, 100, 100, 100, 100, 100, 99, 99,
117 99, 99, 99, 99, 99, 99, 99, 99,
118 99, 99, 99, 98, 98, 98, 98, 98,
119 98, 98, 97, 97, 97, 97, 97, 96,
120 96, 96, 96, 95, 95, 95, 94, 94,
121 93, 93, 93, 92, 92, 91, 91, 90,
122 89, 89, 88, 87, 87, 86, 85, 84,
123 83, 82, 81, 80, 79, 78, 77, 75,
124 74, 73, 71, 69, 68, 66, 64, 62,
125 60, 58, 56, 54, 52, 49, 47, 44,
126 42, 41, 40, 40, 39, 39, 38, 38,
127 37, 37, 37, 36, 36, 36, 35, 35,
128 35, 35, 34, 34, 34, 34, 33, 33,
129 33, 33, 32, 32, 32, 32, 32, 31,
130 31, 31, 31, 31, 30, 30, 30, 30,
131 30,
132};
133
134static const u16 count_lut[] = {
135 0, 1, 2, 3, 4, 5, 6, 7,
136 8, 9, 10, 11, 12, 13, 14, 15,
137 16, 18, 20, 22, 24, 26, 28, 30,
138 32, 34, 36, 38, 40, 42, 44, 46,
139 49, 53, 57, 61, 65, 69, 73, 77,
140 81, 85, 89, 93, 97, 101, 105, 109,
141 115, 123, 131, 139, 147, 155, 163, 171,
142 179, 187, 195, 203, 211, 219, 227, 235,
143 247, 263, 279, 295, 311, 327, 343, 359,
144 375, 391, 407, 423, 439, 455, 471, 487,
145 511, 543, 575, 607, 639, 671, 703, 735,
146 767, 799, 831, 863, 895, 927, 959, 991,
147 1039, 1103, 1167, 1231, 1295, 1359, 1423, 1487,
148 1551, 1615, 1679, 1743, 1807, 1871, 1935, 1999,
149 2095, 2223, 2351, 2479, 2607, 2735, 2863, 2991,
150 3119, 3247, 3375, 3503, 3631, 3759, 3887, 4015,
151};
152
153/*
154 * This function is described into Taos TSL2550 Designer's Notebook
155 * pages 2, 3.
156 */
157static int tsl2550_calculate_lux(u8 ch0, u8 ch1)
158{
159 unsigned int lux;
160
161 /* Look up count from channel values */
162 u16 c0 = count_lut[ch0];
163 u16 c1 = count_lut[ch1];
164
165 /*
166 * Calculate ratio.
167 * Note: the "128" is a scaling factor
168 */
169 u8 r = 128;
170
171 /* Avoid division by 0 and count 1 cannot be greater than count 0 */
172 if (c1 <= c0)
173 if (c0) {
174 r = c1 * 128 / c0;
175
176 /* Calculate LUX */
177 lux = ((c0 - c1) * ratio_lut[r]) / 256;
178 } else
179 lux = 0;
180 else
181 return -EAGAIN;
182
183 /* LUX range check */
184 return lux > TSL2550_MAX_LUX ? TSL2550_MAX_LUX : lux;
185}
186
187/*
188 * SysFS support
189 */
190
191static ssize_t tsl2550_show_power_state(struct device *dev,
192 struct device_attribute *attr, char *buf)
193{
194 struct tsl2550_data *data = i2c_get_clientdata(to_i2c_client(dev));
195
196 return sprintf(buf, "%u\n", data->power_state);
197}
198
199static ssize_t tsl2550_store_power_state(struct device *dev,
200 struct device_attribute *attr, const char *buf, size_t count)
201{
202 struct i2c_client *client = to_i2c_client(dev);
203 struct tsl2550_data *data = i2c_get_clientdata(client);
204 unsigned long val = simple_strtoul(buf, NULL, 10);
205 int ret;
206
207 if (val < 0 || val > 1)
208 return -EINVAL;
209
210 mutex_lock(&data->update_lock);
211 ret = tsl2550_set_power_state(client, val);
212 mutex_unlock(&data->update_lock);
213
214 if (ret < 0)
215 return ret;
216
217 return count;
218}
219
220static DEVICE_ATTR(power_state, S_IWUSR | S_IRUGO,
221 tsl2550_show_power_state, tsl2550_store_power_state);
222
223static ssize_t tsl2550_show_operating_mode(struct device *dev,
224 struct device_attribute *attr, char *buf)
225{
226 struct tsl2550_data *data = i2c_get_clientdata(to_i2c_client(dev));
227
228 return sprintf(buf, "%u\n", data->operating_mode);
229}
230
231static ssize_t tsl2550_store_operating_mode(struct device *dev,
232 struct device_attribute *attr, const char *buf, size_t count)
233{
234 struct i2c_client *client = to_i2c_client(dev);
235 struct tsl2550_data *data = i2c_get_clientdata(client);
236 unsigned long val = simple_strtoul(buf, NULL, 10);
237 int ret;
238
239 if (val < 0 || val > 1)
240 return -EINVAL;
241
242 if (data->power_state == 0)
243 return -EBUSY;
244
245 mutex_lock(&data->update_lock);
246 ret = tsl2550_set_operating_mode(client, val);
247 mutex_unlock(&data->update_lock);
248
249 if (ret < 0)
250 return ret;
251
252 return count;
253}
254
255static DEVICE_ATTR(operating_mode, S_IWUSR | S_IRUGO,
256 tsl2550_show_operating_mode, tsl2550_store_operating_mode);
257
258static ssize_t __tsl2550_show_lux(struct i2c_client *client, char *buf)
259{
260 struct tsl2550_data *data = i2c_get_clientdata(client);
261 u8 ch0, ch1;
262 int ret;
263
264 ret = tsl2550_get_adc_value(client, TSL2550_READ_ADC0);
265 if (ret < 0)
266 return ret;
267 ch0 = ret;
268
269 ret = tsl2550_get_adc_value(client, TSL2550_READ_ADC1);
270 if (ret < 0)
271 return ret;
272 ch1 = ret;
273
274 /* Do the job */
275 ret = tsl2550_calculate_lux(ch0, ch1);
276 if (ret < 0)
277 return ret;
278 if (data->operating_mode == 1)
279 ret *= 5;
280
281 return sprintf(buf, "%d\n", ret);
282}
283
284static ssize_t tsl2550_show_lux1_input(struct device *dev,
285 struct device_attribute *attr, char *buf)
286{
287 struct i2c_client *client = to_i2c_client(dev);
288 struct tsl2550_data *data = i2c_get_clientdata(client);
289 int ret;
290
291 /* No LUX data if not operational */
292 if (!data->power_state)
293 return -EBUSY;
294
295 mutex_lock(&data->update_lock);
296 ret = __tsl2550_show_lux(client, buf);
297 mutex_unlock(&data->update_lock);
298
299 return ret;
300}
301
302static DEVICE_ATTR(lux1_input, S_IRUGO,
303 tsl2550_show_lux1_input, NULL);
304
305static struct attribute *tsl2550_attributes[] = {
306 &dev_attr_power_state.attr,
307 &dev_attr_operating_mode.attr,
308 &dev_attr_lux1_input.attr,
309 NULL
310};
311
312static const struct attribute_group tsl2550_attr_group = {
313 .attrs = tsl2550_attributes,
314};
315
316/*
317 * Initialization function
318 */
319
320static int tsl2550_init_client(struct i2c_client *client)
321{
322 struct tsl2550_data *data = i2c_get_clientdata(client);
323 int err;
324
325 /*
326 * Probe the chip. To do so we try to power up the device and then to
327 * read back the 0x03 code
328 */
329 err = i2c_smbus_read_byte_data(client, TSL2550_POWER_UP);
330 if (err < 0)
331 return err;
332 if (err != TSL2550_POWER_UP)
333 return -ENODEV;
334 data->power_state = 1;
335
336 /* Set the default operating mode */
337 err = i2c_smbus_write_byte(client,
338 TSL2550_MODE_RANGE[data->operating_mode]);
339 if (err < 0)
340 return err;
341
342 return 0;
343}
344
345/*
346 * I2C init/probing/exit functions
347 */
348
349static struct i2c_driver tsl2550_driver;
350static int __devinit tsl2550_probe(struct i2c_client *client,
351 const struct i2c_device_id *id)
352{
353 struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
354 struct tsl2550_data *data;
355 int *opmode, err = 0;
356
357 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WRITE_BYTE
358 | I2C_FUNC_SMBUS_READ_BYTE_DATA)) {
359 err = -EIO;
360 goto exit;
361 }
362
363 data = kzalloc(sizeof(struct tsl2550_data), GFP_KERNEL);
364 if (!data) {
365 err = -ENOMEM;
366 goto exit;
367 }
368 data->client = client;
369 i2c_set_clientdata(client, data);
370
371 /* Check platform data */
372 opmode = client->dev.platform_data;
373 if (opmode) {
374 if (*opmode < 0 || *opmode > 1) {
375 dev_err(&client->dev, "invalid operating_mode (%d)\n",
376 *opmode);
377 err = -EINVAL;
378 goto exit_kfree;
379 }
380 data->operating_mode = *opmode;
381 } else
382 data->operating_mode = 0; /* default mode is standard */
383 dev_info(&client->dev, "%s operating mode\n",
384 data->operating_mode ? "extended" : "standard");
385
386 mutex_init(&data->update_lock);
387
388 /* Initialize the TSL2550 chip */
389 err = tsl2550_init_client(client);
390 if (err)
391 goto exit_kfree;
392
393 /* Register sysfs hooks */
394 err = sysfs_create_group(&client->dev.kobj, &tsl2550_attr_group);
395 if (err)
396 goto exit_kfree;
397
398 dev_info(&client->dev, "support ver. %s enabled\n", DRIVER_VERSION);
399
400 return 0;
401
402exit_kfree:
403 kfree(data);
404exit:
405 return err;
406}
407
408static int __devexit tsl2550_remove(struct i2c_client *client)
409{
410 sysfs_remove_group(&client->dev.kobj, &tsl2550_attr_group);
411
412 /* Power down the device */
413 tsl2550_set_power_state(client, 0);
414
415 kfree(i2c_get_clientdata(client));
416
417 return 0;
418}
419
420#ifdef CONFIG_PM
421
422static int tsl2550_suspend(struct i2c_client *client, pm_message_t mesg)
423{
424 return tsl2550_set_power_state(client, 0);
425}
426
427static int tsl2550_resume(struct i2c_client *client)
428{
429 return tsl2550_set_power_state(client, 1);
430}
431
432#else
433
434#define tsl2550_suspend NULL
435#define tsl2550_resume NULL
436
437#endif /* CONFIG_PM */
438
439static const struct i2c_device_id tsl2550_id[] = {
440 { "tsl2550", 0 },
441 { }
442};
443MODULE_DEVICE_TABLE(i2c, tsl2550_id);
444
445static struct i2c_driver tsl2550_driver = {
446 .driver = {
447 .name = TSL2550_DRV_NAME,
448 .owner = THIS_MODULE,
449 },
450 .suspend = tsl2550_suspend,
451 .resume = tsl2550_resume,
452 .probe = tsl2550_probe,
453 .remove = __devexit_p(tsl2550_remove),
454 .id_table = tsl2550_id,
455};
456
457static int __init tsl2550_init(void)
458{
459 return i2c_add_driver(&tsl2550_driver);
460}
461
462static void __exit tsl2550_exit(void)
463{
464 i2c_del_driver(&tsl2550_driver);
465}
466
467MODULE_AUTHOR("Rodolfo Giometti <giometti@linux.it>");
468MODULE_DESCRIPTION("TSL2550 ambient light sensor driver");
469MODULE_LICENSE("GPL");
470MODULE_VERSION(DRIVER_VERSION);
471
472module_init(tsl2550_init);
473module_exit(tsl2550_exit);
diff --git a/drivers/i2c/i2c-boardinfo.c b/drivers/i2c/i2c-boardinfo.c
index a26a34a06641..7e6a63b57165 100644
--- a/drivers/i2c/i2c-boardinfo.c
+++ b/drivers/i2c/i2c-boardinfo.c
@@ -18,6 +18,7 @@
18 18
19#include <linux/kernel.h> 19#include <linux/kernel.h>
20#include <linux/i2c.h> 20#include <linux/i2c.h>
21#include <linux/slab.h>
21#include <linux/rwsem.h> 22#include <linux/rwsem.h>
22 23
23#include "i2c-core.h" 24#include "i2c-core.h"
diff --git a/drivers/i2c/i2c-core.c b/drivers/i2c/i2c-core.c
index 10be7b5fbe97..c2258a51fe0c 100644
--- a/drivers/i2c/i2c-core.c
+++ b/drivers/i2c/i2c-core.c
@@ -34,17 +34,17 @@
34#include <linux/hardirq.h> 34#include <linux/hardirq.h>
35#include <linux/irqflags.h> 35#include <linux/irqflags.h>
36#include <linux/rwsem.h> 36#include <linux/rwsem.h>
37#include <linux/pm_runtime.h>
37#include <asm/uaccess.h> 38#include <asm/uaccess.h>
38 39
39#include "i2c-core.h" 40#include "i2c-core.h"
40 41
41 42
42/* core_lock protects i2c_adapter_idr, userspace_devices, and guarantees 43/* core_lock protects i2c_adapter_idr, and guarantees
43 that device detection, deletion of detected devices, and attach_adapter 44 that device detection, deletion of detected devices, and attach_adapter
44 and detach_adapter calls are serialized */ 45 and detach_adapter calls are serialized */
45static DEFINE_MUTEX(core_lock); 46static DEFINE_MUTEX(core_lock);
46static DEFINE_IDR(i2c_adapter_idr); 47static DEFINE_IDR(i2c_adapter_idr);
47static LIST_HEAD(userspace_devices);
48 48
49static struct device_type i2c_client_type; 49static struct device_type i2c_client_type;
50static int i2c_check_addr(struct i2c_adapter *adapter, int addr); 50static int i2c_check_addr(struct i2c_adapter *adapter, int addr);
@@ -116,8 +116,10 @@ static int i2c_device_probe(struct device *dev)
116 dev_dbg(dev, "probe\n"); 116 dev_dbg(dev, "probe\n");
117 117
118 status = driver->probe(client, i2c_match_id(driver->id_table, client)); 118 status = driver->probe(client, i2c_match_id(driver->id_table, client));
119 if (status) 119 if (status) {
120 client->driver = NULL; 120 client->driver = NULL;
121 i2c_set_clientdata(client, NULL);
122 }
121 return status; 123 return status;
122} 124}
123 125
@@ -138,8 +140,10 @@ static int i2c_device_remove(struct device *dev)
138 dev->driver = NULL; 140 dev->driver = NULL;
139 status = 0; 141 status = 0;
140 } 142 }
141 if (status == 0) 143 if (status == 0) {
142 client->driver = NULL; 144 client->driver = NULL;
145 i2c_set_clientdata(client, NULL);
146 }
143 return status; 147 return status;
144} 148}
145 149
@@ -184,6 +188,52 @@ static int i2c_device_pm_resume(struct device *dev)
184#define i2c_device_pm_resume NULL 188#define i2c_device_pm_resume NULL
185#endif 189#endif
186 190
191#ifdef CONFIG_PM_RUNTIME
192static int i2c_device_runtime_suspend(struct device *dev)
193{
194 const struct dev_pm_ops *pm;
195
196 if (!dev->driver)
197 return 0;
198 pm = dev->driver->pm;
199 if (!pm || !pm->runtime_suspend)
200 return 0;
201 return pm->runtime_suspend(dev);
202}
203
204static int i2c_device_runtime_resume(struct device *dev)
205{
206 const struct dev_pm_ops *pm;
207
208 if (!dev->driver)
209 return 0;
210 pm = dev->driver->pm;
211 if (!pm || !pm->runtime_resume)
212 return 0;
213 return pm->runtime_resume(dev);
214}
215
216static int i2c_device_runtime_idle(struct device *dev)
217{
218 const struct dev_pm_ops *pm = NULL;
219 int ret;
220
221 if (dev->driver)
222 pm = dev->driver->pm;
223 if (pm && pm->runtime_idle) {
224 ret = pm->runtime_idle(dev);
225 if (ret)
226 return ret;
227 }
228
229 return pm_runtime_suspend(dev);
230}
231#else
232#define i2c_device_runtime_suspend NULL
233#define i2c_device_runtime_resume NULL
234#define i2c_device_runtime_idle NULL
235#endif
236
187static int i2c_device_suspend(struct device *dev, pm_message_t mesg) 237static int i2c_device_suspend(struct device *dev, pm_message_t mesg)
188{ 238{
189 struct i2c_client *client = i2c_verify_client(dev); 239 struct i2c_client *client = i2c_verify_client(dev);
@@ -251,6 +301,9 @@ static const struct attribute_group *i2c_dev_attr_groups[] = {
251static const struct dev_pm_ops i2c_device_pm_ops = { 301static const struct dev_pm_ops i2c_device_pm_ops = {
252 .suspend = i2c_device_pm_suspend, 302 .suspend = i2c_device_pm_suspend,
253 .resume = i2c_device_pm_resume, 303 .resume = i2c_device_pm_resume,
304 .runtime_suspend = i2c_device_runtime_suspend,
305 .runtime_resume = i2c_device_runtime_resume,
306 .runtime_idle = i2c_device_runtime_idle,
254}; 307};
255 308
256struct bus_type i2c_bus_type = { 309struct bus_type i2c_bus_type = {
@@ -488,9 +541,9 @@ i2c_sysfs_new_device(struct device *dev, struct device_attribute *attr,
488 return -EEXIST; 541 return -EEXIST;
489 542
490 /* Keep track of the added device */ 543 /* Keep track of the added device */
491 mutex_lock(&core_lock); 544 i2c_lock_adapter(adap);
492 list_add_tail(&client->detected, &userspace_devices); 545 list_add_tail(&client->detected, &adap->userspace_clients);
493 mutex_unlock(&core_lock); 546 i2c_unlock_adapter(adap);
494 dev_info(dev, "%s: Instantiated device %s at 0x%02hx\n", "new_device", 547 dev_info(dev, "%s: Instantiated device %s at 0x%02hx\n", "new_device",
495 info.type, info.addr); 548 info.type, info.addr);
496 549
@@ -529,9 +582,10 @@ i2c_sysfs_delete_device(struct device *dev, struct device_attribute *attr,
529 582
530 /* Make sure the device was added through sysfs */ 583 /* Make sure the device was added through sysfs */
531 res = -ENOENT; 584 res = -ENOENT;
532 mutex_lock(&core_lock); 585 i2c_lock_adapter(adap);
533 list_for_each_entry_safe(client, next, &userspace_devices, detected) { 586 list_for_each_entry_safe(client, next, &adap->userspace_clients,
534 if (client->addr == addr && client->adapter == adap) { 587 detected) {
588 if (client->addr == addr) {
535 dev_info(dev, "%s: Deleting device %s at 0x%02hx\n", 589 dev_info(dev, "%s: Deleting device %s at 0x%02hx\n",
536 "delete_device", client->name, client->addr); 590 "delete_device", client->name, client->addr);
537 591
@@ -541,7 +595,7 @@ i2c_sysfs_delete_device(struct device *dev, struct device_attribute *attr,
541 break; 595 break;
542 } 596 }
543 } 597 }
544 mutex_unlock(&core_lock); 598 i2c_unlock_adapter(adap);
545 599
546 if (res < 0) 600 if (res < 0)
547 dev_err(dev, "%s: Can't find device in list\n", 601 dev_err(dev, "%s: Can't find device in list\n",
@@ -623,6 +677,7 @@ static int i2c_register_adapter(struct i2c_adapter *adap)
623 } 677 }
624 678
625 rt_mutex_init(&adap->bus_lock); 679 rt_mutex_init(&adap->bus_lock);
680 INIT_LIST_HEAD(&adap->userspace_clients);
626 681
627 /* Set default timeout to 1 second if not already set */ 682 /* Set default timeout to 1 second if not already set */
628 if (adap->timeout == 0) 683 if (adap->timeout == 0)
@@ -825,14 +880,15 @@ int i2c_del_adapter(struct i2c_adapter *adap)
825 return res; 880 return res;
826 881
827 /* Remove devices instantiated from sysfs */ 882 /* Remove devices instantiated from sysfs */
828 list_for_each_entry_safe(client, next, &userspace_devices, detected) { 883 i2c_lock_adapter(adap);
829 if (client->adapter == adap) { 884 list_for_each_entry_safe(client, next, &adap->userspace_clients,
830 dev_dbg(&adap->dev, "Removing %s at 0x%x\n", 885 detected) {
831 client->name, client->addr); 886 dev_dbg(&adap->dev, "Removing %s at 0x%x\n", client->name,
832 list_del(&client->detected); 887 client->addr);
833 i2c_unregister_device(client); 888 list_del(&client->detected);
834 } 889 i2c_unregister_device(client);
835 } 890 }
891 i2c_unlock_adapter(adap);
836 892
837 /* Detach any active clients. This can't fail, thus we do not 893 /* Detach any active clients. This can't fail, thus we do not
838 checking the returned value. */ 894 checking the returned value. */
@@ -1133,7 +1189,7 @@ EXPORT_SYMBOL(i2c_transfer);
1133 * i2c_master_send - issue a single I2C message in master transmit mode 1189 * i2c_master_send - issue a single I2C message in master transmit mode
1134 * @client: Handle to slave device 1190 * @client: Handle to slave device
1135 * @buf: Data that will be written to the slave 1191 * @buf: Data that will be written to the slave
1136 * @count: How many bytes to write 1192 * @count: How many bytes to write, must be less than 64k since msg.len is u16
1137 * 1193 *
1138 * Returns negative errno, or else the number of bytes written. 1194 * Returns negative errno, or else the number of bytes written.
1139 */ 1195 */
@@ -1160,7 +1216,7 @@ EXPORT_SYMBOL(i2c_master_send);
1160 * i2c_master_recv - issue a single I2C message in master receive mode 1216 * i2c_master_recv - issue a single I2C message in master receive mode
1161 * @client: Handle to slave device 1217 * @client: Handle to slave device
1162 * @buf: Where to store data read from slave 1218 * @buf: Where to store data read from slave
1163 * @count: How many bytes to read 1219 * @count: How many bytes to read, must be less than 64k since msg.len is u16
1164 * 1220 *
1165 * Returns negative errno, or else the number of bytes read. 1221 * Returns negative errno, or else the number of bytes read.
1166 */ 1222 */
@@ -1210,12 +1266,23 @@ static int i2c_detect_address(struct i2c_client *temp_client,
1210 return 0; 1266 return 0;
1211 1267
1212 /* Make sure there is something at this address */ 1268 /* Make sure there is something at this address */
1213 if (i2c_smbus_xfer(adapter, addr, 0, 0, 0, I2C_SMBUS_QUICK, NULL) < 0) 1269 if (addr == 0x73 && (adapter->class & I2C_CLASS_HWMON)) {
1214 return 0; 1270 /* Special probe for FSC hwmon chips */
1271 union i2c_smbus_data dummy;
1215 1272
1216 /* Prevent 24RF08 corruption */ 1273 if (i2c_smbus_xfer(adapter, addr, 0, I2C_SMBUS_READ, 0,
1217 if ((addr & ~0x0f) == 0x50) 1274 I2C_SMBUS_BYTE_DATA, &dummy) < 0)
1218 i2c_smbus_xfer(adapter, addr, 0, 0, 0, I2C_SMBUS_QUICK, NULL); 1275 return 0;
1276 } else {
1277 if (i2c_smbus_xfer(adapter, addr, 0, I2C_SMBUS_WRITE, 0,
1278 I2C_SMBUS_QUICK, NULL) < 0)
1279 return 0;
1280
1281 /* Prevent 24RF08 corruption */
1282 if ((addr & ~0x0f) == 0x50)
1283 i2c_smbus_xfer(adapter, addr, 0, I2C_SMBUS_WRITE, 0,
1284 I2C_SMBUS_QUICK, NULL);
1285 }
1219 1286
1220 /* Finally call the custom detection function */ 1287 /* Finally call the custom detection function */
1221 memset(&info, 0, sizeof(struct i2c_board_info)); 1288 memset(&info, 0, sizeof(struct i2c_board_info));
diff --git a/drivers/i2c/i2c-smbus.c b/drivers/i2c/i2c-smbus.c
new file mode 100644
index 000000000000..a24e0bfe9201
--- /dev/null
+++ b/drivers/i2c/i2c-smbus.c
@@ -0,0 +1,263 @@
1/*
2 * i2c-smbus.c - SMBus extensions to the I2C protocol
3 *
4 * Copyright (C) 2008 David Brownell
5 * Copyright (C) 2010 Jean Delvare <khali@linux-fr.org>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22#include <linux/kernel.h>
23#include <linux/module.h>
24#include <linux/device.h>
25#include <linux/interrupt.h>
26#include <linux/workqueue.h>
27#include <linux/i2c.h>
28#include <linux/i2c-smbus.h>
29#include <linux/slab.h>
30
31struct i2c_smbus_alert {
32 unsigned int alert_edge_triggered:1;
33 int irq;
34 struct work_struct alert;
35 struct i2c_client *ara; /* Alert response address */
36};
37
38struct alert_data {
39 unsigned short addr;
40 u8 flag:1;
41};
42
43/* If this is the alerting device, notify its driver */
44static int smbus_do_alert(struct device *dev, void *addrp)
45{
46 struct i2c_client *client = i2c_verify_client(dev);
47 struct alert_data *data = addrp;
48
49 if (!client || client->addr != data->addr)
50 return 0;
51 if (client->flags & I2C_CLIENT_TEN)
52 return 0;
53
54 /*
55 * Drivers should either disable alerts, or provide at least
56 * a minimal handler. Lock so client->driver won't change.
57 */
58 device_lock(dev);
59 if (client->driver) {
60 if (client->driver->alert)
61 client->driver->alert(client, data->flag);
62 else
63 dev_warn(&client->dev, "no driver alert()!\n");
64 } else
65 dev_dbg(&client->dev, "alert with no driver\n");
66 device_unlock(dev);
67
68 /* Stop iterating after we find the device */
69 return -EBUSY;
70}
71
72/*
73 * The alert IRQ handler needs to hand work off to a task which can issue
74 * SMBus calls, because those sleeping calls can't be made in IRQ context.
75 */
76static void smbus_alert(struct work_struct *work)
77{
78 struct i2c_smbus_alert *alert;
79 struct i2c_client *ara;
80 unsigned short prev_addr = 0; /* Not a valid address */
81
82 alert = container_of(work, struct i2c_smbus_alert, alert);
83 ara = alert->ara;
84
85 for (;;) {
86 s32 status;
87 struct alert_data data;
88
89 /*
90 * Devices with pending alerts reply in address order, low
91 * to high, because of slave transmit arbitration. After
92 * responding, an SMBus device stops asserting SMBALERT#.
93 *
94 * Note that SMBus 2.0 reserves 10-bit addresess for future
95 * use. We neither handle them, nor try to use PEC here.
96 */
97 status = i2c_smbus_read_byte(ara);
98 if (status < 0)
99 break;
100
101 data.flag = status & 1;
102 data.addr = status >> 1;
103
104 if (data.addr == prev_addr) {
105 dev_warn(&ara->dev, "Duplicate SMBALERT# from dev "
106 "0x%02x, skipping\n", data.addr);
107 break;
108 }
109 dev_dbg(&ara->dev, "SMBALERT# from dev 0x%02x, flag %d\n",
110 data.addr, data.flag);
111
112 /* Notify driver for the device which issued the alert */
113 device_for_each_child(&ara->adapter->dev, &data,
114 smbus_do_alert);
115 prev_addr = data.addr;
116 }
117
118 /* We handled all alerts; re-enable level-triggered IRQs */
119 if (!alert->alert_edge_triggered)
120 enable_irq(alert->irq);
121}
122
123static irqreturn_t smbalert_irq(int irq, void *d)
124{
125 struct i2c_smbus_alert *alert = d;
126
127 /* Disable level-triggered IRQs until we handle them */
128 if (!alert->alert_edge_triggered)
129 disable_irq_nosync(irq);
130
131 schedule_work(&alert->alert);
132 return IRQ_HANDLED;
133}
134
135/* Setup SMBALERT# infrastructure */
136static int smbalert_probe(struct i2c_client *ara,
137 const struct i2c_device_id *id)
138{
139 struct i2c_smbus_alert_setup *setup = ara->dev.platform_data;
140 struct i2c_smbus_alert *alert;
141 struct i2c_adapter *adapter = ara->adapter;
142 int res;
143
144 alert = kzalloc(sizeof(struct i2c_smbus_alert), GFP_KERNEL);
145 if (!alert)
146 return -ENOMEM;
147
148 alert->alert_edge_triggered = setup->alert_edge_triggered;
149 alert->irq = setup->irq;
150 INIT_WORK(&alert->alert, smbus_alert);
151 alert->ara = ara;
152
153 if (setup->irq > 0) {
154 res = devm_request_irq(&ara->dev, setup->irq, smbalert_irq,
155 0, "smbus_alert", alert);
156 if (res) {
157 kfree(alert);
158 return res;
159 }
160 }
161
162 i2c_set_clientdata(ara, alert);
163 dev_info(&adapter->dev, "supports SMBALERT#, %s trigger\n",
164 setup->alert_edge_triggered ? "edge" : "level");
165
166 return 0;
167}
168
169/* IRQ resource is managed so it is freed automatically */
170static int smbalert_remove(struct i2c_client *ara)
171{
172 struct i2c_smbus_alert *alert = i2c_get_clientdata(ara);
173
174 cancel_work_sync(&alert->alert);
175
176 i2c_set_clientdata(ara, NULL);
177 kfree(alert);
178 return 0;
179}
180
181static const struct i2c_device_id smbalert_ids[] = {
182 { "smbus_alert", 0 },
183 { /* LIST END */ }
184};
185MODULE_DEVICE_TABLE(i2c, smbalert_ids);
186
187static struct i2c_driver smbalert_driver = {
188 .driver = {
189 .name = "smbus_alert",
190 },
191 .probe = smbalert_probe,
192 .remove = smbalert_remove,
193 .id_table = smbalert_ids,
194};
195
196/**
197 * i2c_setup_smbus_alert - Setup SMBus alert support
198 * @adapter: the target adapter
199 * @setup: setup data for the SMBus alert handler
200 * Context: can sleep
201 *
202 * Setup handling of the SMBus alert protocol on a given I2C bus segment.
203 *
204 * Handling can be done either through our IRQ handler, or by the
205 * adapter (from its handler, periodic polling, or whatever).
206 *
207 * NOTE that if we manage the IRQ, we *MUST* know if it's level or
208 * edge triggered in order to hand it to the workqueue correctly.
209 * If triggering the alert seems to wedge the system, you probably
210 * should have said it's level triggered.
211 *
212 * This returns the ara client, which should be saved for later use with
213 * i2c_handle_smbus_alert() and ultimately i2c_unregister_device(); or NULL
214 * to indicate an error.
215 */
216struct i2c_client *i2c_setup_smbus_alert(struct i2c_adapter *adapter,
217 struct i2c_smbus_alert_setup *setup)
218{
219 struct i2c_board_info ara_board_info = {
220 I2C_BOARD_INFO("smbus_alert", 0x0c),
221 .platform_data = setup,
222 };
223
224 return i2c_new_device(adapter, &ara_board_info);
225}
226EXPORT_SYMBOL_GPL(i2c_setup_smbus_alert);
227
228/**
229 * i2c_handle_smbus_alert - Handle an SMBus alert
230 * @ara: the ARA client on the relevant adapter
231 * Context: can't sleep
232 *
233 * Helper function to be called from an I2C bus driver's interrupt
234 * handler. It will schedule the alert work, in turn calling the
235 * corresponding I2C device driver's alert function.
236 *
237 * It is assumed that ara is a valid i2c client previously returned by
238 * i2c_setup_smbus_alert().
239 */
240int i2c_handle_smbus_alert(struct i2c_client *ara)
241{
242 struct i2c_smbus_alert *alert = i2c_get_clientdata(ara);
243
244 return schedule_work(&alert->alert);
245}
246EXPORT_SYMBOL_GPL(i2c_handle_smbus_alert);
247
248static int __init i2c_smbus_init(void)
249{
250 return i2c_add_driver(&smbalert_driver);
251}
252
253static void __exit i2c_smbus_exit(void)
254{
255 i2c_del_driver(&smbalert_driver);
256}
257
258module_init(i2c_smbus_init);
259module_exit(i2c_smbus_exit);
260
261MODULE_AUTHOR("Jean Delvare <khali@linux-fr.org>");
262MODULE_DESCRIPTION("SMBus protocol extensions support");
263MODULE_LICENSE("GPL");
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-14 21:34:40 -0400