Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/torvalds/linux-2.6 into common/serial-rework

Conflicts:
	arch/sh/kernel/cpu/sh2/setup-sh7619.c
	arch/sh/kernel/cpu/sh2a/setup-mxg.c
	arch/sh/kernel/cpu/sh2a/setup-sh7201.c
	arch/sh/kernel/cpu/sh2a/setup-sh7203.c
	arch/sh/kernel/cpu/sh2a/setup-sh7206.c
	arch/sh/kernel/cpu/sh3/setup-sh7705.c
	arch/sh/kernel/cpu/sh3/setup-sh770x.c
	arch/sh/kernel/cpu/sh3/setup-sh7710.c
	arch/sh/kernel/cpu/sh3/setup-sh7720.c
	arch/sh/kernel/cpu/sh4/setup-sh4-202.c
	arch/sh/kernel/cpu/sh4/setup-sh7750.c
	arch/sh/kernel/cpu/sh4/setup-sh7760.c
	arch/sh/kernel/cpu/sh4a/setup-sh7343.c
	arch/sh/kernel/cpu/sh4a/setup-sh7366.c
	arch/sh/kernel/cpu/sh4a/setup-sh7722.c
	arch/sh/kernel/cpu/sh4a/setup-sh7723.c
	arch/sh/kernel/cpu/sh4a/setup-sh7724.c
	arch/sh/kernel/cpu/sh4a/setup-sh7763.c
	arch/sh/kernel/cpu/sh4a/setup-sh7770.c
	arch/sh/kernel/cpu/sh4a/setup-sh7780.c
	arch/sh/kernel/cpu/sh4a/setup-sh7785.c
	arch/sh/kernel/cpu/sh4a/setup-sh7786.c
	arch/sh/kernel/cpu/sh4a/setup-shx3.c
	arch/sh/kernel/cpu/sh5/setup-sh5.c
	drivers/serial/sh-sci.c
	drivers/serial/sh-sci.h
	include/linux/serial_sci.h

87 files changed, 10042 insertions, 3461 deletions

diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig
index 711ca08ab776..30f06e956bfb 100644
--- a/drivers/i2c/Kconfig
+++ b/drivers/i2c/Kconfig
@@ -5,6 +5,7 @@
 menuconfig I2C
         tristate "I2C support"
         depends on HAS_IOMEM
+        select RT_MUTEXES
         ---help---
           I2C (pronounce: I-square-C) is a slow serial bus protocol used in
           many micro controller applications and developed by Philips.  SMBus,
@@ -27,6 +28,14 @@ config I2C_BOARDINFO
         boolean
         default y
 
+config I2C_COMPAT
+        boolean "Enable compatibility bits for old user-space"
+        default y
+        help
+          Say Y here if you intend to run lm-sensors 3.1.1 or older, or any
+          other user-space package which expects i2c adapters to be class
+          devices. If you don't know, say Y.
+
 config I2C_CHARDEV
         tristate "I2C device interface"
         help
@@ -38,6 +47,19 @@ config I2C_CHARDEV
           This support is also available as a module.  If so, the module 
           will be called i2c-dev.
 
+config I2C_MUX
+        tristate "I2C bus multiplexing support"
+        depends on EXPERIMENTAL
+        help
+          Say Y here if you want the I2C core to support the ability to
+          handle multiplexed I2C bus topologies, by presenting each
+          multiplexed segment as a I2C adapter.
+
+          This support is also available as a module.  If so, the module
+          will be called i2c-mux.
+
+source drivers/i2c/muxes/Kconfig
+
 config I2C_HELPER_AUTO
         bool "Autoselect pertinent helper modules"
         default y
@@ -52,9 +74,18 @@ config I2C_HELPER_AUTO
 
           In doubt, say Y.
 
+config I2C_SMBUS
+        tristate "SMBus-specific protocols" if !I2C_HELPER_AUTO
+        help
+          Say Y here if you want support for SMBus extensions to the I2C
+          specification. At the moment, the only supported extension is
+          the SMBus alert protocol.
+
+          This support is also available as a module.  If so, the module
+          will be called i2c-smbus.
+
 source drivers/i2c/algos/Kconfig
 source drivers/i2c/busses/Kconfig
-source drivers/i2c/chips/Kconfig
 
 config I2C_DEBUG_CORE
         bool "I2C Core debugging messages"
@@ -79,12 +110,4 @@ config I2C_DEBUG_BUS
           a problem with I2C support and want to see more of what is going
           on.
 
-config I2C_DEBUG_CHIP
-        bool "I2C Chip debugging messages"
-        help
-          Say Y here if you want the I2C chip drivers to produce a bunch of
-          debug messages to the system log.  Select this if you are having
-          a problem with I2C support and want to see more of what is going
-          on.
-
 endif # I2C
diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile
index ba26e6cbe74e..23ac61e2db39 100644
--- a/drivers/i2c/Makefile
+++ b/drivers/i2c/Makefile
@@ -4,9 +4,9 @@
 
 obj-$(CONFIG_I2C_BOARDINFO)     += i2c-boardinfo.o
 obj-$(CONFIG_I2C)               += i2c-core.o
+obj-$(CONFIG_I2C_SMBUS)         += i2c-smbus.o
 obj-$(CONFIG_I2C_CHARDEV)       += i2c-dev.o
-obj-y                           += busses/ chips/ algos/
+obj-$(CONFIG_I2C_MUX)           += i2c-mux.o
+obj-y                           += algos/ busses/ muxes/
 
-ifeq ($(CONFIG_I2C_DEBUG_CORE),y)
-EXTRA_CFLAGS += -DDEBUG
-endif
+ccflags-$(CONFIG_I2C_DEBUG_CORE) := -DDEBUG
diff --git a/drivers/i2c/algos/Kconfig b/drivers/i2c/algos/Kconfig
index 7b2ce4a08524..f1cfe7e5508b 100644
--- a/drivers/i2c/algos/Kconfig
+++ b/drivers/i2c/algos/Kconfig
@@ -3,7 +3,7 @@
 #
 
 menu "I2C Algorithms"
-        depends on !I2C_HELPER_AUTO
+        visible if !I2C_HELPER_AUTO
 
 config I2C_ALGOBIT
         tristate "I2C bit-banging interfaces"
diff --git a/drivers/i2c/algos/Makefile b/drivers/i2c/algos/Makefile
index 18b3e962ec09..215303f60d61 100644
--- a/drivers/i2c/algos/Makefile
+++ b/drivers/i2c/algos/Makefile
@@ -6,6 +6,4 @@ obj-$(CONFIG_I2C_ALGOBIT)	+= i2c-algo-bit.o
 obj-$(CONFIG_I2C_ALGOPCF)       += i2c-algo-pcf.o
 obj-$(CONFIG_I2C_ALGOPCA)       += i2c-algo-pca.o
 
-ifeq ($(CONFIG_I2C_DEBUG_ALGO),y)
-EXTRA_CFLAGS += -DDEBUG
-endif
+ccflags-$(CONFIG_I2C_DEBUG_ALGO) := -DDEBUG
diff --git a/drivers/i2c/algos/i2c-algo-bit.c b/drivers/i2c/algos/i2c-algo-bit.c
index e25e13980af3..38319a69bd0a 100644
--- a/drivers/i2c/algos/i2c-algo-bit.c
+++ b/drivers/i2c/algos/i2c-algo-bit.c
@@ -24,7 +24,6 @@
 #include <linux/kernel.h>
 #include <linux/module.h>
 #include <linux/delay.h>
-#include <linux/slab.h>
 #include <linux/init.h>
 #include <linux/errno.h>
 #include <linux/sched.h>
@@ -522,6 +521,12 @@ static int bit_xfer(struct i2c_adapter *i2c_adap,
         int i, ret;
         unsigned short nak_ok;
 
+        if (adap->pre_xfer) {
+                ret = adap->pre_xfer(i2c_adap);
+                if (ret < 0)
+                        return ret;
+        }
+
         bit_dbg(3, &i2c_adap->dev, "emitting start condition\n");
         i2c_start(adap);
         for (i = 0; i < num; i++) {
@@ -570,6 +575,9 @@ static int bit_xfer(struct i2c_adapter *i2c_adap,
 bailout:
         bit_dbg(3, &i2c_adap->dev, "emitting stop condition\n");
         i2c_stop(adap);
+
+        if (adap->post_xfer)
+                adap->post_xfer(i2c_adap);
         return ret;
 }
 
@@ -592,12 +600,14 @@ static const struct i2c_algorithm i2c_bit_algo = {
 /*
  * registering functions to load algorithms at runtime
  */
-static int i2c_bit_prepare_bus(struct i2c_adapter *adap)
+static int __i2c_bit_add_bus(struct i2c_adapter *adap,
+                             int (*add_adapter)(struct i2c_adapter *))
 {
         struct i2c_algo_bit_data *bit_adap = adap->algo_data;
+        int ret;
 
         if (bit_test) {
-                int ret = test_bus(bit_adap, adap->name);
+                ret = test_bus(bit_adap, adap->name);
                 if (ret < 0)
                         return -ENODEV;
         }
@@ -606,30 +616,27 @@ static int i2c_bit_prepare_bus(struct i2c_adapter *adap)
         adap->algo = &i2c_bit_algo;
         adap->retries = 3;
 
+        ret = add_adapter(adap);
+        if (ret < 0)
+                return ret;
+
+        /* Complain if SCL can't be read */
+        if (bit_adap->getscl == NULL) {
+                dev_warn(&adap->dev, "Not I2C compliant: can't read SCL\n");
+                dev_warn(&adap->dev, "Bus may be unreliable\n");
+        }
         return 0;
 }
 
 int i2c_bit_add_bus(struct i2c_adapter *adap)
 {
-        int err;
-
-        err = i2c_bit_prepare_bus(adap);
-        if (err)
-                return err;
-
-        return i2c_add_adapter(adap);
+        return __i2c_bit_add_bus(adap, i2c_add_adapter);
 }
 EXPORT_SYMBOL(i2c_bit_add_bus);
 
 int i2c_bit_add_numbered_bus(struct i2c_adapter *adap)
 {
-        int err;
-
-        err = i2c_bit_prepare_bus(adap);
-        if (err)
-                return err;
-
-        return i2c_add_numbered_adapter(adap);
+        return __i2c_bit_add_bus(adap, i2c_add_numbered_adapter);
 }
 EXPORT_SYMBOL(i2c_bit_add_numbered_bus);
 
diff --git a/drivers/i2c/algos/i2c-algo-pca.c b/drivers/i2c/algos/i2c-algo-pca.c
index 78d42aae0089..2b9a8f54bb2c 100644
--- a/drivers/i2c/algos/i2c-algo-pca.c
+++ b/drivers/i2c/algos/i2c-algo-pca.c
@@ -109,13 +109,13 @@ static void pca_stop(struct i2c_algo_pca_data *adap)
  * returns after the address has been sent
  */
 static int pca_address(struct i2c_algo_pca_data *adap,
-                        struct i2c_msg *msg)
+                       struct i2c_msg *msg)
 {
         int sta = pca_get_con(adap);
         int addr;
 
-        addr = ( (0x7f & msg->addr) << 1 );
-        if (msg->flags & I2C_M_RD )
+        addr = ((0x7f & msg->addr) << 1);
+        if (msg->flags & I2C_M_RD)
                 addr |= 1;
         DEB2("=== SLAVE ADDRESS %#04x+%c=%#04x\n",
              msg->addr, msg->flags & I2C_M_RD ? 'R' : 'W', addr);
@@ -134,7 +134,7 @@ static int pca_address(struct i2c_algo_pca_data *adap,
  * Returns after the byte has been transmitted
  */
 static int pca_tx_byte(struct i2c_algo_pca_data *adap,
-                        __u8 b)
+                       __u8 b)
 {
         int sta = pca_get_con(adap);
         DEB2("=== WRITE %#04x\n", b);
@@ -164,13 +164,13 @@ static void pca_rx_byte(struct i2c_algo_pca_data *adap,
  * Returns after next byte has arrived.
  */
 static int pca_rx_ack(struct i2c_algo_pca_data *adap,
-                       int ack)
+                      int ack)
 {
         int sta = pca_get_con(adap);
 
         sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI|I2C_PCA_CON_AA);
 
-        if ( ack )
+        if (ack)
                 sta |= I2C_PCA_CON_AA;
 
         pca_set_con(adap, sta);
@@ -178,12 +178,12 @@ static int pca_rx_ack(struct i2c_algo_pca_data *adap,
 }
 
 static int pca_xfer(struct i2c_adapter *i2c_adap,
-                    struct i2c_msg *msgs,
-                    int num)
+                    struct i2c_msg *msgs,
+                    int num)
 {
-        struct i2c_algo_pca_data *adap = i2c_adap->algo_data;
-        struct i2c_msg *msg = NULL;
-        int curmsg;
+        struct i2c_algo_pca_data *adap = i2c_adap->algo_data;
+        struct i2c_msg *msg = NULL;
+        int curmsg;
         int numbytes = 0;
         int state;
         int ret;
@@ -202,21 +202,21 @@ static int pca_xfer(struct i2c_adapter *i2c_adap,
 
         DEB1("{{{ XFER %d messages\n", num);
 
-        if (i2c_debug>=2) {
+        if (i2c_debug >= 2) {
                 for (curmsg = 0; curmsg < num; curmsg++) {
                         int addr, i;
                         msg = &msgs[curmsg];
 
                         addr = (0x7f & msg->addr) ;
 
-                        if (msg->flags & I2C_M_RD )
+                        if (msg->flags & I2C_M_RD)
                                 printk(KERN_INFO "    [%02d] RD %d bytes from %#02x [%#02x, ...]\n",
-                                       curmsg, msg->len, addr, (addr<<1) | 1);
+                                       curmsg, msg->len, addr, (addr << 1) | 1);
                         else {
                                 printk(KERN_INFO "    [%02d] WR %d bytes to %#02x [%#02x%s",
-                                       curmsg, msg->len, addr, addr<<1,
+                                       curmsg, msg->len, addr, addr << 1,
                                        msg->len == 0 ? "" : ", ");
-                                for(i=0; i < msg->len; i++)
+                                for (i = 0; i < msg->len; i++)
                                         printk("%#04x%s", msg->buf[i], i == msg->len - 1 ? "" : ", ");
                                 printk("]\n");
                         }
@@ -305,7 +305,7 @@ static int pca_xfer(struct i2c_adapter *i2c_adap,
                         goto out;
 
                 case 0x58: /* Data byte has been received; NOT ACK has been returned */
-                        if ( numbytes == msg->len - 1 ) {
+                        if (numbytes == msg->len - 1) {
                                 pca_rx_byte(adap, &msg->buf[numbytes], 0);
                                 curmsg++; numbytes = 0;
                                 if (curmsg == num)
@@ -352,7 +352,7 @@ static int pca_xfer(struct i2c_adapter *i2c_adap,
 
 static u32 pca_func(struct i2c_adapter *adap)
 {
-        return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
+        return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
 }
 
 static const struct i2c_algorithm pca_algo = {
@@ -453,8 +453,6 @@ static int pca_init(struct i2c_adapter *adap)
                  */
                 int raise_fall_time;
 
-                struct i2c_algo_pca_data *pca_data = adap->algo_data;
-
                 /* Ignore the reset function from the module,
                  * we can use the parallel bus reset
                  */
diff --git a/drivers/i2c/algos/i2c-algo-pcf.c b/drivers/i2c/algos/i2c-algo-pcf.c
index 7ce75775ec73..5eebf562ff31 100644
--- a/drivers/i2c/algos/i2c-algo-pcf.c
+++ b/drivers/i2c/algos/i2c-algo-pcf.c
@@ -29,7 +29,6 @@
 #include <linux/kernel.h>
 #include <linux/module.h>
 #include <linux/delay.h>
-#include <linux/slab.h>
 #include <linux/init.h>
 #include <linux/errno.h>
 #include <linux/i2c.h>
@@ -176,7 +175,7 @@ static int pcf_init_8584 (struct i2c_algo_pcf_data *adap)
          */
         if (((temp = get_pcf(adap, 1)) & 0x7f) != (0)) {
                 DEB2(printk(KERN_ERR "i2c-algo-pcf.o: PCF detection failed -- can't select S0 (0x%02x).\n", temp));
-                return -ENXIO; /* definetly not PCF8584 */
+                return -ENXIO; /* definitely not PCF8584 */
         }
 
         /* load own address in S0, effective address is (own << 1) */
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index 3c259ee7ddda..3a6321cb8030 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -77,7 +77,7 @@ config I2C_AMD8111
           will be called i2c-amd8111.
 
 config I2C_I801
-        tristate "Intel 82801 (ICH)"
+        tristate "Intel 82801 (ICH/PCH)"
         depends on PCI
         help
           If you say yes to this option, support will be included for the Intel
@@ -95,9 +95,11 @@ config I2C_I801
             ESB2
             ICH8
             ICH9
-            Tolapai
+            EP80579 (Tolapai)
             ICH10
-            PCH
+            5/3400 Series (PCH)
+            Cougar Point (PCH)
+            Patsburg (PCH)
 
           This driver can also be built as a module.  If so, the module
           will be called i2c-i801.
@@ -105,6 +107,8 @@ config I2C_I801
 config I2C_ISCH
         tristate "Intel SCH SMBus 1.0"
         depends on PCI
+        select MFD_CORE
+        select LPC_SCH
         help
           Say Y here if you want to use SMBus controller on the Intel SCH
           based systems.
@@ -113,7 +117,7 @@ config I2C_ISCH
           will be called i2c-isch.
 
 config I2C_PIIX4
-        tristate "Intel PIIX4 and compatible (ATI/Serverworks/Broadcom/SMSC)"
+        tristate "Intel PIIX4 and compatible (ATI/AMD/Serverworks/Broadcom/SMSC)"
         depends on PCI
         help
           If you say yes to this option, support will be included for the Intel
@@ -128,6 +132,7 @@ config I2C_PIIX4
             ATI SB600
             ATI SB700
             ATI SB800
+            AMD Hudson-2
             Serverworks OSB4
             Serverworks CSB5
             Serverworks CSB6
@@ -231,6 +236,22 @@ config I2C_VIAPRO
           This driver can also be built as a module.  If so, the module
           will be called i2c-viapro.
 
+if ACPI
+
+comment "ACPI drivers"
+
+config I2C_SCMI
+        tristate "SMBus Control Method Interface"
+        help
+          This driver supports the SMBus Control Method Interface. It needs the
+          BIOS to declare ACPI control methods as described in the SMBus Control
+          Method Interface specification.
+
+          To compile this driver as a module, choose M here:
+          the module will be called i2c-scmi.
+
+endif # ACPI
+
 comment "Mac SMBus host controller drivers"
         depends on PPC_CHRP || PPC_PMAC
 
@@ -326,6 +347,16 @@ config I2C_DAVINCI
           devices such as DaVinci NIC.
           For details please see http://www.ti.com/davinci
 
+config I2C_DESIGNWARE
+        tristate "Synopsys DesignWare"
+        depends on HAVE_CLK
+        help
+          If you say yes to this option, support will be included for the
+          Synopsys DesignWare I2C adapter. Only master mode is supported.
+
+          This driver can also be built as a module.  If so, the module
+          will be called i2c-designware.
+
 config I2C_GPIO
         tristate "GPIO-based bitbanging I2C"
         depends on GENERIC_GPIO
@@ -366,6 +397,16 @@ config I2C_IMX
           This driver can also be built as a module.  If so, the module
           will be called i2c-imx.
 
+config I2C_INTEL_MID
+        tristate "Intel Moorestown/Medfield Platform I2C controller"
+        depends on PCI
+        help
+          Say Y here if you have an Intel Moorestown/Medfield platform I2C
+          controller.
+
+          This support is also available as a module. If so, the module
+          will be called i2c-intel-mid.
+
 config I2C_IOP3XX
         tristate "Intel IOPx3xx and IXP4xx on-chip I2C interface"
         depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IXP4XX || ARCH_IOP13XX
@@ -391,13 +432,12 @@ config I2C_IXP2000
           instead.
 
 config I2C_MPC
-        tristate "MPC107/824x/85xx/52xx/86xx"
+        tristate "MPC107/824x/85xx/512x/52xx/83xx/86xx"
         depends on PPC32
         help
           If you say yes to this option, support will be included for the
-          built-in I2C interface on the MPC107/Tsi107/MPC8240/MPC8245 and
-          MPC85xx/MPC8641 family processors. The driver may also work on 52xx
-          family processors, though interrupts are known not to work.
+          built-in I2C interface on the MPC107, Tsi107, MPC512x, MPC52xx,
+          MPC8240, MPC8245, MPC83xx, MPC85xx and MPC8641 family processors.
 
           This driver can also be built as a module.  If so, the module
           will be called i2c-mpc.
@@ -412,6 +452,20 @@ config I2C_MV64XXX
           This driver can also be built as a module.  If so, the module
           will be called i2c-mv64xxx.
 
+config I2C_NOMADIK
+        tristate "ST-Ericsson Nomadik/Ux500 I2C Controller"
+        depends on PLAT_NOMADIK
+        help
+          If you say yes to this option, support will be included for the
+          I2C interface from ST-Ericsson's Nomadik and Ux500 architectures.
+
+config I2C_NUC900
+        tristate "NUC900 I2C Driver"
+        depends on ARCH_W90X900
+        help
+          Say Y here to include support for I2C controller in the
+          Winbond/Nuvoton NUC900 based System-on-Chip devices.
+
 config I2C_OCORES
         tristate "OpenCores I2C Controller"
         depends on EXPERIMENTAL
@@ -439,9 +493,29 @@ config I2C_PASEMI
         help
           Supports the PA Semi PWRficient on-chip SMBus interfaces.
 
+config I2C_PCA_PLATFORM
+        tristate "PCA9564/PCA9665 as platform device"
+        select I2C_ALGOPCA
+        default n
+        help
+          This driver supports a memory mapped Philips PCA9564/PCA9665
+          parallel bus to I2C bus controller.
+
+          This driver can also be built as a module.  If so, the module
+          will be called i2c-pca-platform.
+
+config I2C_PMCMSP
+        tristate "PMC MSP I2C TWI Controller"
+        depends on PMC_MSP
+        help
+          This driver supports the PMC TWI controller on MSP devices.
+
+          This driver can also be built as module. If so, the module
+          will be called i2c-pmcmsp.
+
 config I2C_PNX
-        tristate "I2C bus support for Philips PNX targets"
-        depends on ARCH_PNX4008
+        tristate "I2C bus support for Philips PNX and NXP LPC targets"
+        depends on ARCH_PNX4008 || ARCH_LPC32XX
         help
           This driver supports the Philips IP3204 I2C IP block master and/or
           slave controller
@@ -450,8 +524,8 @@ config I2C_PNX
           will be called i2c-pnx.
 
 config I2C_PXA
-        tristate "Intel PXA2XX I2C adapter (EXPERIMENTAL)"
-        depends on EXPERIMENTAL && ARCH_PXA
+        tristate "Intel PXA2XX I2C adapter"
+        depends on ARCH_PXA || ARCH_MMP
         help
           If you have devices in the PXA I2C bus, say yes to this option.
           This driver can also be built as a module.  If so, the module
@@ -465,12 +539,19 @@ config I2C_PXA_SLAVE
           is necessary for systems where the PXA may be a target on the
           I2C bus.
 
+config HAVE_S3C2410_I2C
+        bool
+        help
+          This will include I2C support for Samsung SoCs. If you want to
+          include I2C support for any machine, kindly select this in the
+          respective Kconfig file.
+
 config I2C_S3C2410
         tristate "S3C2410 I2C Driver"
-        depends on ARCH_S3C2410 || ARCH_S3C64XX
+        depends on HAVE_S3C2410_I2C
         help
           Say Y here to include support for I2C controller in the
-          Samsung S3C2410 based System-on-Chip devices.
+          Samsung SoCs.
 
 config I2C_S6000
         tristate "S6000 I2C support"
@@ -493,7 +574,7 @@ config I2C_SH7760
 
 config I2C_SH_MOBILE
         tristate "SuperH Mobile I2C Controller"
-        depends on SUPERH
+        depends on SUPERH || ARCH_SHMOBILE
         help
           If you say yes to this option, support will be included for the
           built-in I2C interface on the Renesas SH-Mobile processor.
@@ -528,7 +609,7 @@ config I2C_STU300
 
 config I2C_VERSATILE
         tristate "ARM Versatile/Realview I2C bus support"
-        depends on ARCH_VERSATILE || ARCH_REALVIEW
+        depends on ARCH_VERSATILE || ARCH_REALVIEW || ARCH_VEXPRESS
         select I2C_ALGOBIT
         help
           Say yes if you want to support the I2C serial bus on ARMs Versatile
@@ -537,12 +618,33 @@ config I2C_VERSATILE
           This driver can also be built as a module.  If so, the module
           will be called i2c-versatile.
 
+config I2C_OCTEON
+        tristate "Cavium OCTEON I2C bus support"
+        depends on CPU_CAVIUM_OCTEON
+        help
+          Say yes if you want to support the I2C serial bus on Cavium
+          OCTEON SOC.
+
+          This driver can also be built as a module.  If so, the module
+          will be called i2c-octeon.
+
+config I2C_XILINX
+        tristate "Xilinx I2C Controller"
+        depends on EXPERIMENTAL && HAS_IOMEM
+        help
+          If you say yes to this option, support will be included for the
+          Xilinx I2C controller.
+
+          This driver can also be built as a module.  If so, the module
+          will be called xilinx_i2c.
+
 comment "External I2C/SMBus adapter drivers"
 
 config I2C_PARPORT
         tristate "Parallel port adapter"
         depends on PARPORT
         select I2C_ALGOBIT
+        select I2C_SMBUS
         help
           This supports parallel port I2C adapters such as the ones made by
           Philips or Velleman, Analog Devices evaluation boards, and more.
@@ -566,6 +668,7 @@ config I2C_PARPORT
 config I2C_PARPORT_LIGHT
         tristate "Parallel port adapter (light)"
         select I2C_ALGOBIT
+        select I2C_SMBUS
         help
           This supports parallel port I2C adapters such as the ones made by
           Philips or Velleman, Analog Devices evaluation boards, and more.
@@ -613,22 +716,6 @@ config I2C_TINY_USB
           This driver can also be built as a module.  If so, the module
           will be called i2c-tiny-usb.
 
-comment "Graphics adapter I2C/DDC channel drivers"
-        depends on PCI
-
-config I2C_VOODOO3
-        tristate "Voodoo 3 (DEPRECATED)"
-        depends on PCI
-        select I2C_ALGOBIT
-        help
-          If you say yes to this option, support will be included for the
-          Voodoo 3 I2C interface. This driver is deprecated and you should
-          use the tdfxfb driver instead, which additionally provides
-          framebuffer support.
-
-          This driver can also be built as a module.  If so, the module
-          will be called i2c-voodoo3.
-
 comment "Other I2C/SMBus bus drivers"
 
 config I2C_ACORN
@@ -669,26 +756,6 @@ config I2C_PCA_ISA
           delays when I2C/SMBus chip drivers are loaded (e.g. at boot
           time).  If unsure, say N.
 
-config I2C_PCA_PLATFORM
-        tristate "PCA9564/PCA9665 as platform device"
-        select I2C_ALGOPCA
-        default n
-        help
-          This driver supports a memory mapped Philips PCA9564/PCA9665
-          parallel bus to I2C bus controller.
-
-          This driver can also be built as a module.  If so, the module
-          will be called i2c-pca-platform.
-
-config I2C_PMCMSP
-        tristate "PMC MSP I2C TWI Controller"
-        depends on PMC_MSP
-        help
-          This driver supports the PMC TWI controller on MSP devices.
-
-          This driver can also be built as module. If so, the module
-          will be called i2c-pmcmsp.
-
 config I2C_SIBYTE
         tristate "SiByte SMBus interface"
         depends on SIBYTE_SB1xxx_SOC
diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
index edeabf003106..84cb16ae6f9e 100644
--- a/drivers/i2c/busses/Makefile
+++ b/drivers/i2c/busses/Makefile
@@ -2,6 +2,9 @@
 # Makefile for the i2c bus drivers.
 #
 
+# ACPI drivers
+obj-$(CONFIG_I2C_SCMI)          += i2c-scmi.o
+
 # PC SMBus host controller drivers
 obj-$(CONFIG_I2C_ALI1535)       += i2c-ali1535.o
 obj-$(CONFIG_I2C_ALI1563)       += i2c-ali1563.o
@@ -24,23 +27,29 @@ obj-$(CONFIG_I2C_VIAPRO)	+= i2c-viapro.o
 obj-$(CONFIG_I2C_HYDRA)         += i2c-hydra.o
 obj-$(CONFIG_I2C_POWERMAC)      += i2c-powermac.o
 
-# Embebbed system I2C/SMBus host controller drivers
+# Embedded system I2C/SMBus host controller drivers
 obj-$(CONFIG_I2C_AT91)          += i2c-at91.o
 obj-$(CONFIG_I2C_AU1550)        += i2c-au1550.o
 obj-$(CONFIG_I2C_BLACKFIN_TWI)  += i2c-bfin-twi.o
 obj-$(CONFIG_I2C_CPM)           += i2c-cpm.o
 obj-$(CONFIG_I2C_DAVINCI)       += i2c-davinci.o
+obj-$(CONFIG_I2C_DESIGNWARE)    += i2c-designware.o
 obj-$(CONFIG_I2C_GPIO)          += i2c-gpio.o
 obj-$(CONFIG_I2C_HIGHLANDER)    += i2c-highlander.o
 obj-$(CONFIG_I2C_IBM_IIC)       += i2c-ibm_iic.o
 obj-$(CONFIG_I2C_IMX)           += i2c-imx.o
+obj-$(CONFIG_I2C_INTEL_MID)     += i2c-intel-mid.o
 obj-$(CONFIG_I2C_IOP3XX)        += i2c-iop3xx.o
 obj-$(CONFIG_I2C_IXP2000)       += i2c-ixp2000.o
 obj-$(CONFIG_I2C_MPC)           += i2c-mpc.o
 obj-$(CONFIG_I2C_MV64XXX)       += i2c-mv64xxx.o
+obj-$(CONFIG_I2C_NOMADIK)       += i2c-nomadik.o
+obj-$(CONFIG_I2C_NUC900)        += i2c-nuc900.o
 obj-$(CONFIG_I2C_OCORES)        += i2c-ocores.o
 obj-$(CONFIG_I2C_OMAP)          += i2c-omap.o
 obj-$(CONFIG_I2C_PASEMI)        += i2c-pasemi.o
+obj-$(CONFIG_I2C_PCA_PLATFORM)  += i2c-pca-platform.o
+obj-$(CONFIG_I2C_PMCMSP)        += i2c-pmcmsp.o
 obj-$(CONFIG_I2C_PNX)           += i2c-pnx.o
 obj-$(CONFIG_I2C_PXA)           += i2c-pxa.o
 obj-$(CONFIG_I2C_S3C2410)       += i2c-s3c2410.o
@@ -50,6 +59,8 @@ obj-$(CONFIG_I2C_SH_MOBILE)	+= i2c-sh_mobile.o
 obj-$(CONFIG_I2C_SIMTEC)        += i2c-simtec.o
 obj-$(CONFIG_I2C_STU300)        += i2c-stu300.o
 obj-$(CONFIG_I2C_VERSATILE)     += i2c-versatile.o
+obj-$(CONFIG_I2C_OCTEON)        += i2c-octeon.o
+obj-$(CONFIG_I2C_XILINX)        += i2c-xiic.o
 
 # External I2C/SMBus adapter drivers
 obj-$(CONFIG_I2C_PARPORT)       += i2c-parport.o
@@ -57,20 +68,13 @@ obj-$(CONFIG_I2C_PARPORT_LIGHT)	+= i2c-parport-light.o
 obj-$(CONFIG_I2C_TAOS_EVM)      += i2c-taos-evm.o
 obj-$(CONFIG_I2C_TINY_USB)      += i2c-tiny-usb.o
 
-# Graphics adapter I2C/DDC channel drivers
-obj-$(CONFIG_I2C_VOODOO3)       += i2c-voodoo3.o
-
 # Other I2C/SMBus bus drivers
 obj-$(CONFIG_I2C_ACORN)         += i2c-acorn.o
 obj-$(CONFIG_I2C_ELEKTOR)       += i2c-elektor.o
 obj-$(CONFIG_I2C_PCA_ISA)       += i2c-pca-isa.o
-obj-$(CONFIG_I2C_PCA_PLATFORM)  += i2c-pca-platform.o
-obj-$(CONFIG_I2C_PMCMSP)        += i2c-pmcmsp.o
 obj-$(CONFIG_I2C_SIBYTE)        += i2c-sibyte.o
 obj-$(CONFIG_I2C_STUB)          += i2c-stub.o
 obj-$(CONFIG_SCx200_ACB)        += scx200_acb.o
 obj-$(CONFIG_SCx200_I2C)        += scx200_i2c.o
 
-ifeq ($(CONFIG_I2C_DEBUG_BUS),y)
-EXTRA_CFLAGS += -DDEBUG
-endif
+ccflags-$(CONFIG_I2C_DEBUG_BUS) := -DDEBUG
diff --git a/drivers/i2c/busses/i2c-ali1535.c b/drivers/i2c/busses/i2c-ali1535.c
index d108450df064..906a3ca50db6 100644
--- a/drivers/i2c/busses/i2c-ali1535.c
+++ b/drivers/i2c/busses/i2c-ali1535.c
@@ -60,7 +60,7 @@
 #include <linux/i2c.h>
 #include <linux/init.h>
 #include <linux/acpi.h>
-#include <asm/io.h>
+#include <linux/io.h>
 
 
 /* ALI1535 SMBus address offsets */
@@ -138,7 +138,7 @@ static unsigned short ali1535_smba;
    Note the differences between kernels with the old PCI BIOS interface and
    newer kernels with the real PCI interface. In compat.h some things are
    defined to make the transition easier. */
-static int ali1535_setup(struct pci_dev *dev)
+static int __devinit ali1535_setup(struct pci_dev *dev)
 {
         int retval = -ENODEV;
         unsigned char temp;
@@ -480,7 +480,7 @@ static struct i2c_adapter ali1535_adapter = {
         .algo           = &smbus_algorithm,
 };
 
-static struct pci_device_id ali1535_ids[] = {
+static const struct pci_device_id ali1535_ids[] = {
         { PCI_DEVICE(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M7101) },
         { },
 };
diff --git a/drivers/i2c/busses/i2c-ali1563.c b/drivers/i2c/busses/i2c-ali1563.c
index f70f46582c6c..a409cfcf0629 100644
--- a/drivers/i2c/busses/i2c-ali1563.c
+++ b/drivers/i2c/busses/i2c-ali1563.c
@@ -87,9 +87,9 @@ static int ali1563_transaction(struct i2c_adapter * a, int size)
         outb_p(inb_p(SMB_HST_CNTL2) | HST_CNTL2_START, SMB_HST_CNTL2);
 
         timeout = ALI1563_MAX_TIMEOUT;
-        do
+        do {
                 msleep(1);
-        while (((data = inb_p(SMB_HST_STS)) & HST_STS_BUSY) && --timeout);
+        } while (((data = inb_p(SMB_HST_STS)) & HST_STS_BUSY) && --timeout);
 
         dev_dbg(&a->dev, "Transaction (post): STS=%02x, CNTL1=%02x, "
                 "CNTL2=%02x, CMD=%02x, ADD=%02x, DAT0=%02x, DAT1=%02x\n",
@@ -157,9 +157,9 @@ static int ali1563_block_start(struct i2c_adapter * a)
         outb_p(inb_p(SMB_HST_CNTL2) | HST_CNTL2_START, SMB_HST_CNTL2);
 
         timeout = ALI1563_MAX_TIMEOUT;
-        do
+        do {
                 msleep(1);
-        while (!((data = inb_p(SMB_HST_STS)) & HST_STS_DONE) && --timeout);
+        } while (!((data = inb_p(SMB_HST_STS)) & HST_STS_DONE) && --timeout);
 
         dev_dbg(&a->dev, "Block (post): STS=%02x, CNTL1=%02x, "
                 "CNTL2=%02x, CMD=%02x, ADD=%02x, DAT0=%02x, DAT1=%02x\n",
@@ -417,7 +417,7 @@ static void __devexit ali1563_remove(struct pci_dev * dev)
         ali1563_shutdown(dev);
 }
 
-static struct pci_device_id __devinitdata ali1563_id_table[] = {
+static const struct pci_device_id ali1563_id_table[] __devinitconst = {
         { PCI_DEVICE(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1563) },
         {},
 };
diff --git a/drivers/i2c/busses/i2c-ali15x3.c b/drivers/i2c/busses/i2c-ali15x3.c
index d627fceb790b..b14f6d68221d 100644
--- a/drivers/i2c/busses/i2c-ali15x3.c
+++ b/drivers/i2c/busses/i2c-ali15x3.c
@@ -67,7 +67,7 @@
 #include <linux/i2c.h>
 #include <linux/init.h>
 #include <linux/acpi.h>
-#include <asm/io.h>
+#include <linux/io.h>
 
 /* ALI15X3 SMBus address offsets */
 #define SMBHSTSTS       (0 + ali15x3_smba)
@@ -131,7 +131,7 @@ MODULE_PARM_DESC(force_addr,
 static struct pci_driver ali15x3_driver;
 static unsigned short ali15x3_smba;
 
-static int ali15x3_setup(struct pci_dev *ALI15X3_dev)
+static int __devinit ali15x3_setup(struct pci_dev *ALI15X3_dev)
 {
         u16 a;
         unsigned char temp;
@@ -477,7 +477,7 @@ static struct i2c_adapter ali15x3_adapter = {
         .algo           = &smbus_algorithm,
 };
 
-static struct pci_device_id ali15x3_ids[] = {
+static const struct pci_device_id ali15x3_ids[] = {
         { PCI_DEVICE(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M7101) },
         { 0, }
 };
diff --git a/drivers/i2c/busses/i2c-amd756.c b/drivers/i2c/busses/i2c-amd756.c
index f7d6fe9c49ba..03bcd07c4697 100644
--- a/drivers/i2c/busses/i2c-amd756.c
+++ b/drivers/i2c/busses/i2c-amd756.c
@@ -43,7 +43,7 @@
 #include <linux/i2c.h>
 #include <linux/init.h>
 #include <linux/acpi.h>
-#include <asm/io.h>
+#include <linux/io.h>
 
 /* AMD756 SMBus address offsets */
 #define SMB_ADDR_OFFSET         0xE0
@@ -308,7 +308,7 @@ static const char* chipname[] = {
         "nVidia nForce", "AMD8111",
 };
 
-static struct pci_device_id amd756_ids[] = {
+static const struct pci_device_id amd756_ids[] = {
         { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_740B),
           .driver_data = AMD756 },
         { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_7413),
@@ -364,7 +364,7 @@ static int __devinit amd756_probe(struct pci_dev *pdev,
         error = acpi_check_region(amd756_ioport, SMB_IOSIZE,
                                   amd756_driver.name);
         if (error)
-                return error;
+                return -ENODEV;
 
         if (!request_region(amd756_ioport, SMB_IOSIZE, amd756_driver.name)) {
                 dev_err(&pdev->dev, "SMB region 0x%x already in use!\n",
diff --git a/drivers/i2c/busses/i2c-amd8111.c b/drivers/i2c/busses/i2c-amd8111.c
index a7c59908c457..6b6a6b1d7025 100644
--- a/drivers/i2c/busses/i2c-amd8111.c
+++ b/drivers/i2c/busses/i2c-amd8111.c
@@ -17,7 +17,8 @@
 #include <linux/i2c.h>
 #include <linux/delay.h>
 #include <linux/acpi.h>
-#include <asm/io.h>
+#include <linux/slab.h>
+#include <linux/io.h>
 
 MODULE_LICENSE("GPL");
 MODULE_AUTHOR ("Vojtech Pavlik <vojtech@suse.cz>");
@@ -68,7 +69,7 @@ static struct pci_driver amd8111_driver;
  * ACPI 2.0 chapter 13 access of registers of the EC
  */
 
-static unsigned int amd_ec_wait_write(struct amd_smbus *smbus)
+static int amd_ec_wait_write(struct amd_smbus *smbus)
 {
         int timeout = 500;
 
@@ -84,7 +85,7 @@ static unsigned int amd_ec_wait_write(struct amd_smbus *smbus)
         return 0;
 }
 
-static unsigned int amd_ec_wait_read(struct amd_smbus *smbus)
+static int amd_ec_wait_read(struct amd_smbus *smbus)
 {
         int timeout = 500;
 
@@ -100,7 +101,7 @@ static unsigned int amd_ec_wait_read(struct amd_smbus *smbus)
         return 0;
 }
 
-static unsigned int amd_ec_read(struct amd_smbus *smbus, unsigned char address,
+static int amd_ec_read(struct amd_smbus *smbus, unsigned char address,
                 unsigned char *data)
 {
         int status;
@@ -123,7 +124,7 @@ static unsigned int amd_ec_read(struct amd_smbus *smbus, unsigned char address,
         return 0;
 }
 
-static unsigned int amd_ec_write(struct amd_smbus *smbus, unsigned char address,
+static int amd_ec_write(struct amd_smbus *smbus, unsigned char address,
                 unsigned char data)
 {
         int status;
@@ -195,7 +196,7 @@ static s32 amd8111_access(struct i2c_adapter * adap, u16 addr,
 {
         struct amd_smbus *smbus = adap->algo_data;
         unsigned char protocol, len, pec, temp[2];
-        int i;
+        int i, status;
 
         protocol = (read_write == I2C_SMBUS_READ) ? AMD_SMB_PRTCL_READ
                                                   : AMD_SMB_PRTCL_WRITE;
@@ -208,38 +209,62 @@ static s32 amd8111_access(struct i2c_adapter * adap, u16 addr,
                         break;
 
                 case I2C_SMBUS_BYTE:
-                        if (read_write == I2C_SMBUS_WRITE)
-                                amd_ec_write(smbus, AMD_SMB_CMD, command);
+                        if (read_write == I2C_SMBUS_WRITE) {
+                                status = amd_ec_write(smbus, AMD_SMB_CMD,
+                                                      command);
+                                if (status)
+                                        return status;
+                        }
                         protocol |= AMD_SMB_PRTCL_BYTE;
                         break;
 
                 case I2C_SMBUS_BYTE_DATA:
-                        amd_ec_write(smbus, AMD_SMB_CMD, command);
-                        if (read_write == I2C_SMBUS_WRITE)
-                                amd_ec_write(smbus, AMD_SMB_DATA, data->byte);
+                        status = amd_ec_write(smbus, AMD_SMB_CMD, command);
+                        if (status)
+                                return status;
+                        if (read_write == I2C_SMBUS_WRITE) {
+                                status = amd_ec_write(smbus, AMD_SMB_DATA,
+                                                      data->byte);
+                                if (status)
+                                        return status;
+                        }
                         protocol |= AMD_SMB_PRTCL_BYTE_DATA;
                         break;
 
                 case I2C_SMBUS_WORD_DATA:
-                        amd_ec_write(smbus, AMD_SMB_CMD, command);
+                        status = amd_ec_write(smbus, AMD_SMB_CMD, command);
+                        if (status)
+                                return status;
                         if (read_write == I2C_SMBUS_WRITE) {
-                                amd_ec_write(smbus, AMD_SMB_DATA,
-                                             data->word & 0xff);
-                                amd_ec_write(smbus, AMD_SMB_DATA + 1,
-                                             data->word >> 8);
+                                status = amd_ec_write(smbus, AMD_SMB_DATA,
+                                                      data->word & 0xff);
+                                if (status)
+                                        return status;
+                                status = amd_ec_write(smbus, AMD_SMB_DATA + 1,
+                                                      data->word >> 8);
+                                if (status)
+                                        return status;
                         }
                         protocol |= AMD_SMB_PRTCL_WORD_DATA | pec;
                         break;
 
                 case I2C_SMBUS_BLOCK_DATA:
-                        amd_ec_write(smbus, AMD_SMB_CMD, command);
+                        status = amd_ec_write(smbus, AMD_SMB_CMD, command);
+                        if (status)
+                                return status;
                         if (read_write == I2C_SMBUS_WRITE) {
                                 len = min_t(u8, data->block[0],
                                             I2C_SMBUS_BLOCK_MAX);
-                                amd_ec_write(smbus, AMD_SMB_BCNT, len);
-                                for (i = 0; i < len; i++)
-                                        amd_ec_write(smbus, AMD_SMB_DATA + i,
-                                                     data->block[i + 1]);
+                                status = amd_ec_write(smbus, AMD_SMB_BCNT, len);
+                                if (status)
+                                        return status;
+                                for (i = 0; i < len; i++) {
+                                        status =
+                                          amd_ec_write(smbus, AMD_SMB_DATA + i,
+                                                       data->block[i + 1]);
+                                        if (status)
+                                                return status;
+                                }
                         }
                         protocol |= AMD_SMB_PRTCL_BLOCK_DATA | pec;
                         break;
@@ -247,19 +272,35 @@ static s32 amd8111_access(struct i2c_adapter * adap, u16 addr,
                 case I2C_SMBUS_I2C_BLOCK_DATA:
                         len = min_t(u8, data->block[0],
                                     I2C_SMBUS_BLOCK_MAX);
-                        amd_ec_write(smbus, AMD_SMB_CMD, command);
-                        amd_ec_write(smbus, AMD_SMB_BCNT, len);
+                        status = amd_ec_write(smbus, AMD_SMB_CMD, command);
+                        if (status)
+                                return status;
+                        status = amd_ec_write(smbus, AMD_SMB_BCNT, len);
+                        if (status)
+                                return status;
                         if (read_write == I2C_SMBUS_WRITE)
-                                for (i = 0; i < len; i++)
-                                        amd_ec_write(smbus, AMD_SMB_DATA + i,
-                                                     data->block[i + 1]);
+                                for (i = 0; i < len; i++) {
+                                        status =
+                                          amd_ec_write(smbus, AMD_SMB_DATA + i,
+                                                       data->block[i + 1]);
+                                        if (status)
+                                                return status;
+                                }
                         protocol |= AMD_SMB_PRTCL_I2C_BLOCK_DATA;
                         break;
 
                 case I2C_SMBUS_PROC_CALL:
-                        amd_ec_write(smbus, AMD_SMB_CMD, command);
-                        amd_ec_write(smbus, AMD_SMB_DATA, data->word & 0xff);
-                        amd_ec_write(smbus, AMD_SMB_DATA + 1, data->word >> 8);
+                        status = amd_ec_write(smbus, AMD_SMB_CMD, command);
+                        if (status)
+                                return status;
+                        status = amd_ec_write(smbus, AMD_SMB_DATA,
+                                              data->word & 0xff);
+                        if (status)
+                                return status;
+                        status = amd_ec_write(smbus, AMD_SMB_DATA + 1,
+                                              data->word >> 8);
+                        if (status)
+                                return status;
                         protocol = AMD_SMB_PRTCL_PROC_CALL | pec;
                         read_write = I2C_SMBUS_READ;
                         break;
@@ -267,11 +308,18 @@ static s32 amd8111_access(struct i2c_adapter * adap, u16 addr,
                 case I2C_SMBUS_BLOCK_PROC_CALL:
                         len = min_t(u8, data->block[0],
                                     I2C_SMBUS_BLOCK_MAX - 1);
-                        amd_ec_write(smbus, AMD_SMB_CMD, command);
-                        amd_ec_write(smbus, AMD_SMB_BCNT, len);
-                        for (i = 0; i < len; i++)
-                                amd_ec_write(smbus, AMD_SMB_DATA + i,
-                                             data->block[i + 1]);
+                        status = amd_ec_write(smbus, AMD_SMB_CMD, command);
+                        if (status)
+                                return status;
+                        status = amd_ec_write(smbus, AMD_SMB_BCNT, len);
+                        if (status)
+                                return status;
+                        for (i = 0; i < len; i++) {
+                                status = amd_ec_write(smbus, AMD_SMB_DATA + i,
+                                                      data->block[i + 1]);
+                                if (status)
+                                        return status;
+                        }
                         protocol = AMD_SMB_PRTCL_BLOCK_PROC_CALL | pec;
                         read_write = I2C_SMBUS_READ;
                         break;
@@ -281,24 +329,29 @@ static s32 amd8111_access(struct i2c_adapter * adap, u16 addr,
                         return -EOPNOTSUPP;
         }
 
-        amd_ec_write(smbus, AMD_SMB_ADDR, addr << 1);
-        amd_ec_write(smbus, AMD_SMB_PRTCL, protocol);
+        status = amd_ec_write(smbus, AMD_SMB_ADDR, addr << 1);
+        if (status)
+                return status;
+        status = amd_ec_write(smbus, AMD_SMB_PRTCL, protocol);
+        if (status)
+                return status;
 
-        /* FIXME this discards status from ec_read(); so temp[0] will
-         * hold stack garbage ... the rest of this routine will act
-         * nonsensically.  Ignored ec_write() status might explain
-         * some such failures...
-         */
-        amd_ec_read(smbus, AMD_SMB_STS, temp + 0);
+        status = amd_ec_read(smbus, AMD_SMB_STS, temp + 0);
+        if (status)
+                return status;
 
         if (~temp[0] & AMD_SMB_STS_DONE) {
                 udelay(500);
-                amd_ec_read(smbus, AMD_SMB_STS, temp + 0);
+                status = amd_ec_read(smbus, AMD_SMB_STS, temp + 0);
+                if (status)
+                        return status;
         }
 
         if (~temp[0] & AMD_SMB_STS_DONE) {
                 msleep(1);
-                amd_ec_read(smbus, AMD_SMB_STS, temp + 0);
+                status = amd_ec_read(smbus, AMD_SMB_STS, temp + 0);
+                if (status)
+                        return status;
         }
 
         if ((~temp[0] & AMD_SMB_STS_DONE) || (temp[0] & AMD_SMB_STS_STATUS))
@@ -310,24 +363,35 @@ static s32 amd8111_access(struct i2c_adapter * adap, u16 addr,
         switch (size) {
                 case I2C_SMBUS_BYTE:
                 case I2C_SMBUS_BYTE_DATA:
-                        amd_ec_read(smbus, AMD_SMB_DATA, &data->byte);
+                        status = amd_ec_read(smbus, AMD_SMB_DATA, &data->byte);
+                        if (status)
+                                return status;
                         break;
 
                 case I2C_SMBUS_WORD_DATA:
                 case I2C_SMBUS_PROC_CALL:
-                        amd_ec_read(smbus, AMD_SMB_DATA, temp + 0);
-                        amd_ec_read(smbus, AMD_SMB_DATA + 1, temp + 1);
+                        status = amd_ec_read(smbus, AMD_SMB_DATA, temp + 0);
+                        if (status)
+                                return status;
+                        status = amd_ec_read(smbus, AMD_SMB_DATA + 1, temp + 1);
+                        if (status)
+                                return status;
                         data->word = (temp[1] << 8) | temp[0];
                         break;
 
                 case I2C_SMBUS_BLOCK_DATA:
                 case I2C_SMBUS_BLOCK_PROC_CALL:
-                        amd_ec_read(smbus, AMD_SMB_BCNT, &len);
+                        status = amd_ec_read(smbus, AMD_SMB_BCNT, &len);
+                        if (status)
+                                return status;
                         len = min_t(u8, len, I2C_SMBUS_BLOCK_MAX);
                 case I2C_SMBUS_I2C_BLOCK_DATA:
-                        for (i = 0; i < len; i++)
-                                amd_ec_read(smbus, AMD_SMB_DATA + i,
-                                            data->block + i + 1);
+                        for (i = 0; i < len; i++) {
+                                status = amd_ec_read(smbus, AMD_SMB_DATA + i,
+                                                     data->block + i + 1);
+                                if (status)
+                                        return status;
+                        }
                         data->block[0] = len;
                         break;
         }
@@ -351,7 +415,7 @@ static const struct i2c_algorithm smbus_algorithm = {
 };
 
 
-static struct pci_device_id amd8111_ids[] = {
+static const struct pci_device_id amd8111_ids[] = {
         { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8111_SMBUS2) },
         { 0, }
 };
@@ -376,8 +440,10 @@ static int __devinit amd8111_probe(struct pci_dev *dev,
         smbus->size = pci_resource_len(dev, 0);
 
         error = acpi_check_resource_conflict(&dev->resource[0]);
-        if (error)
+        if (error) {
+                error = -ENODEV;
                 goto out_kfree;
+        }
 
         if (!request_region(smbus->base, smbus->size, amd8111_driver.name)) {
                 error = -EBUSY;
diff --git a/drivers/i2c/busses/i2c-at91.c b/drivers/i2c/busses/i2c-at91.c
index 06e1ecb4919f..305c07504f7e 100644
--- a/drivers/i2c/busses/i2c-at91.c
+++ b/drivers/i2c/busses/i2c-at91.c
@@ -23,8 +23,7 @@
 #include <linux/init.h>
 #include <linux/clk.h>
 #include <linux/platform_device.h>
-
-#include <asm/io.h>
+#include <linux/io.h>
 
 #include <mach/at91_twi.h>
 #include <mach/board.h>
diff --git a/drivers/i2c/busses/i2c-bfin-twi.c b/drivers/i2c/busses/i2c-bfin-twi.c
index b309ac2c3d5c..fb26e5c67515 100644
--- a/drivers/i2c/busses/i2c-bfin-twi.c
+++ b/drivers/i2c/busses/i2c-bfin-twi.c
@@ -12,6 +12,7 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/i2c.h>
+#include <linux/slab.h>
 #include <linux/io.h>
 #include <linux/mm.h>
 #include <linux/timer.h>
@@ -24,8 +25,6 @@
 #include <asm/portmux.h>
 #include <asm/irq.h>
 
-#define POLL_TIMEOUT       (2 * HZ)
-
 /* SMBus mode*/
 #define TWI_I2C_MODE_STANDARD           1
 #define TWI_I2C_MODE_STANDARDSUB        2
@@ -43,8 +42,6 @@ struct bfin_twi_iface {
         int                     cur_mode;
         int                     manual_stop;
         int                     result;
-        int                     timeout_count;
-        struct timer_list       timeout_timer;
         struct i2c_adapter      adap;
         struct completion       complete;
         struct i2c_msg          *pmsg;
@@ -84,14 +81,15 @@ static const u16 pin_req[2][3] = {
         {P_TWI1_SCL, P_TWI1_SDA, 0},
 };
 
-static void bfin_twi_handle_interrupt(struct bfin_twi_iface *iface)
+static void bfin_twi_handle_interrupt(struct bfin_twi_iface *iface,
+                                        unsigned short twi_int_status)
 {
-        unsigned short twi_int_status = read_INT_STAT(iface);
         unsigned short mast_stat = read_MASTER_STAT(iface);
 
         if (twi_int_status & XMTSERV) {
                 /* Transmit next data */
                 if (iface->writeNum > 0) {
+                        SSYNC();
                         write_XMT_DATA8(iface, *(iface->transPtr++));
                         iface->writeNum--;
                 }
@@ -113,10 +111,6 @@ static void bfin_twi_handle_interrupt(struct bfin_twi_iface *iface)
                                 write_MASTER_CTL(iface,
                                         (read_MASTER_CTL(iface) | RSTART) & ~MDIR);
                 }
-                SSYNC();
-                /* Clear status */
-                write_INT_STAT(iface, XMTSERV);
-                SSYNC();
         }
         if (twi_int_status & RCVSERV) {
                 if (iface->readNum > 0) {
@@ -138,7 +132,6 @@ static void bfin_twi_handle_interrupt(struct bfin_twi_iface *iface)
                 } else if (iface->manual_stop) {
                         write_MASTER_CTL(iface,
                                 read_MASTER_CTL(iface) | STOP);
-                        SSYNC();
                 } else if (iface->cur_mode == TWI_I2C_MODE_REPEAT &&
                            iface->cur_msg + 1 < iface->msg_num) {
                         if (iface->pmsg[iface->cur_msg + 1].flags & I2C_M_RD)
@@ -147,44 +140,37 @@ static void bfin_twi_handle_interrupt(struct bfin_twi_iface *iface)
                         else
                                 write_MASTER_CTL(iface,
                                         (read_MASTER_CTL(iface) | RSTART) & ~MDIR);
-                        SSYNC();
                 }
-                /* Clear interrupt source */
-                write_INT_STAT(iface, RCVSERV);
-                SSYNC();
         }
         if (twi_int_status & MERR) {
-                write_INT_STAT(iface, MERR);
                 write_INT_MASK(iface, 0);
                 write_MASTER_STAT(iface, 0x3e);
                 write_MASTER_CTL(iface, 0);
-                SSYNC();
                 iface->result = -EIO;
-                /* if both err and complete int stats are set, return proper
-                 * results.
+
+                if (mast_stat & LOSTARB)
+                        dev_dbg(&iface->adap.dev, "Lost Arbitration\n");
+                if (mast_stat & ANAK)
+                        dev_dbg(&iface->adap.dev, "Address Not Acknowledged\n");
+                if (mast_stat & DNAK)
+                        dev_dbg(&iface->adap.dev, "Data Not Acknowledged\n");
+                if (mast_stat & BUFRDERR)
+                        dev_dbg(&iface->adap.dev, "Buffer Read Error\n");
+                if (mast_stat & BUFWRERR)
+                        dev_dbg(&iface->adap.dev, "Buffer Write Error\n");
+
+                /* If it is a quick transfer, only address without data,
+                 * not an err, return 1.
                  */
-                if (twi_int_status & MCOMP) {
-                        write_INT_STAT(iface, MCOMP);
-                        write_INT_MASK(iface, 0);
-                        write_MASTER_CTL(iface, 0);
-                        SSYNC();
-                        /* If it is a quick transfer, only address bug no data,
-                         * not an err, return 1.
-                         */
-                        if (iface->writeNum == 0 && (mast_stat & BUFRDERR))
-                                iface->result = 1;
-                        /* If address not acknowledged return -1,
-                         * else return 0.
-                         */
-                        else if (!(mast_stat & ANAK))
-                                iface->result = 0;
-                }
+                if (iface->cur_mode == TWI_I2C_MODE_STANDARD &&
+                        iface->transPtr == NULL &&
+                        (twi_int_status & MCOMP) && (mast_stat & DNAK))
+                        iface->result = 1;
+
                 complete(&iface->complete);
                 return;
         }
         if (twi_int_status & MCOMP) {
-                write_INT_STAT(iface, MCOMP);
-                SSYNC();
                 if (iface->cur_mode == TWI_I2C_MODE_COMBINED) {
                         if (iface->readNum == 0) {
                                 /* set the read number to 1 and ask for manual
@@ -206,7 +192,6 @@ static void bfin_twi_handle_interrupt(struct bfin_twi_iface *iface)
                         /* remove restart bit and enable master receive */
                         write_MASTER_CTL(iface,
                                 read_MASTER_CTL(iface) & ~RSTART);
-                        SSYNC();
                 } else if (iface->cur_mode == TWI_I2C_MODE_REPEAT &&
                                 iface->cur_msg+1 < iface->msg_num) {
                         iface->cur_msg++;
@@ -225,7 +210,6 @@ static void bfin_twi_handle_interrupt(struct bfin_twi_iface *iface)
                                         write_XMT_DATA8(iface,
                                                 *(iface->transPtr++));
                                         iface->writeNum--;
-                                        SSYNC();
                                 }
                         }
 
@@ -243,15 +227,13 @@ static void bfin_twi_handle_interrupt(struct bfin_twi_iface *iface)
                         /* remove restart bit and enable master receive */
                         write_MASTER_CTL(iface,
                                 read_MASTER_CTL(iface) & ~RSTART);
-                        SSYNC();
                 } else {
                         iface->result = 1;
                         write_INT_MASK(iface, 0);
                         write_MASTER_CTL(iface, 0);
-                        SSYNC();
-                        complete(&iface->complete);
                 }
         }
+        complete(&iface->complete);
 }
 
 /* Interrupt handler */
@@ -259,38 +241,26 @@ static irqreturn_t bfin_twi_interrupt_entry(int irq, void *dev_id)
 {
         struct bfin_twi_iface *iface = dev_id;
         unsigned long flags;
+        unsigned short twi_int_status;
 
         spin_lock_irqsave(&iface->lock, flags);
-        del_timer(&iface->timeout_timer);
-        bfin_twi_handle_interrupt(iface);
-        spin_unlock_irqrestore(&iface->lock, flags);
-        return IRQ_HANDLED;
-}
-
-static void bfin_twi_timeout(unsigned long data)
-{
-        struct bfin_twi_iface *iface = (struct bfin_twi_iface *)data;
-        unsigned long flags;
-
-        spin_lock_irqsave(&iface->lock, flags);
-        bfin_twi_handle_interrupt(iface);
-        if (iface->result == 0) {
-                iface->timeout_count--;
-                if (iface->timeout_count > 0) {
-                        iface->timeout_timer.expires = jiffies + POLL_TIMEOUT;
-                        add_timer(&iface->timeout_timer);
-                } else {
-                        iface->result = -1;
-                        complete(&iface->complete);
-                }
+        while (1) {
+                twi_int_status = read_INT_STAT(iface);
+                if (!twi_int_status)
+                        break;
+                /* Clear interrupt status */
+                write_INT_STAT(iface, twi_int_status);
+                bfin_twi_handle_interrupt(iface, twi_int_status);
+                SSYNC();
         }
         spin_unlock_irqrestore(&iface->lock, flags);
+        return IRQ_HANDLED;
 }
 
 /*
- * Generic i2c master transfer entrypoint
+ * One i2c master transfer
  */
-static int bfin_twi_master_xfer(struct i2c_adapter *adap,
+static int bfin_twi_do_master_xfer(struct i2c_adapter *adap,
                                 struct i2c_msg *msgs, int num)
 {
         struct bfin_twi_iface *iface = adap->algo_data;
@@ -318,7 +288,6 @@ static int bfin_twi_master_xfer(struct i2c_adapter *adap,
         iface->transPtr = pmsg->buf;
         iface->writeNum = iface->readNum = pmsg->len;
         iface->result = 0;
-        iface->timeout_count = 10;
         init_completion(&(iface->complete));
         /* Set Transmit device address */
         write_MASTER_ADDR(iface, pmsg->addr);
@@ -357,30 +326,41 @@ static int bfin_twi_master_xfer(struct i2c_adapter *adap,
                 iface->manual_stop = 1;
         }
 
-        iface->timeout_timer.expires = jiffies + POLL_TIMEOUT;
-        add_timer(&iface->timeout_timer);
-
         /* Master enable */
         write_MASTER_CTL(iface, read_MASTER_CTL(iface) | MEN |
                 ((iface->read_write == I2C_SMBUS_READ) ? MDIR : 0) |
                 ((CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ > 100) ? FAST : 0));
         SSYNC();
 
-        wait_for_completion(&iface->complete);
-
-        rc = iface->result;
+        while (!iface->result) {
+                if (!wait_for_completion_timeout(&iface->complete,
+                        adap->timeout)) {
+                        iface->result = -1;
+                        dev_err(&adap->dev, "master transfer timeout\n");
+                }
+        }
 
-        if (rc == 1)
-                return num;
+        if (iface->result == 1)
+                rc = iface->cur_msg + 1;
         else
-                return rc;
+                rc = iface->result;
+
+        return rc;
 }
 
 /*
- * SMBus type transfer entrypoint
+ * Generic i2c master transfer entrypoint
  */
+static int bfin_twi_master_xfer(struct i2c_adapter *adap,
+                                struct i2c_msg *msgs, int num)
+{
+        return bfin_twi_do_master_xfer(adap, msgs, num);
+}
 
-int bfin_twi_smbus_xfer(struct i2c_adapter *adap, u16 addr,
+/*
+ * One I2C SMBus transfer
+ */
+int bfin_twi_do_smbus_xfer(struct i2c_adapter *adap, u16 addr,
                         unsigned short flags, char read_write,
                         u8 command, int size, union i2c_smbus_data *data)
 {
@@ -468,7 +448,6 @@ int bfin_twi_smbus_xfer(struct i2c_adapter *adap, u16 addr,
         iface->manual_stop = 0;
         iface->read_write = read_write;
         iface->command = command;
-        iface->timeout_count = 10;
         init_completion(&(iface->complete));
 
         /* FIFO Initiation. Data in FIFO should be discarded before
@@ -485,9 +464,6 @@ int bfin_twi_smbus_xfer(struct i2c_adapter *adap, u16 addr,
         write_MASTER_ADDR(iface, addr);
         SSYNC();
 
-        iface->timeout_timer.expires = jiffies + POLL_TIMEOUT;
-        add_timer(&iface->timeout_timer);
-
         switch (iface->cur_mode) {
         case TWI_I2C_MODE_STANDARDSUB:
                 write_XMT_DATA8(iface, iface->command);
@@ -549,10 +525,8 @@ int bfin_twi_smbus_xfer(struct i2c_adapter *adap, u16 addr,
                                 else if (iface->readNum > 255) {
                                         write_MASTER_CTL(iface, 0xff << 6);
                                         iface->manual_stop = 1;
-                                } else {
-                                        del_timer(&iface->timeout_timer);
+                                } else
                                         break;
-                                }
                         }
                 }
                 write_INT_MASK(iface, MCOMP | MERR |
@@ -568,7 +542,13 @@ int bfin_twi_smbus_xfer(struct i2c_adapter *adap, u16 addr,
         }
         SSYNC();
 
-        wait_for_completion(&iface->complete);
+        while (!iface->result) {
+                if (!wait_for_completion_timeout(&iface->complete,
+                        adap->timeout)) {
+                        iface->result = -1;
+                        dev_err(&adap->dev, "smbus transfer timeout\n");
+                }
+        }
 
         rc = (iface->result >= 0) ? 0 : -1;
 
@@ -576,6 +556,17 @@ int bfin_twi_smbus_xfer(struct i2c_adapter *adap, u16 addr,
 }
 
 /*
+ * Generic I2C SMBus transfer entrypoint
+ */
+int bfin_twi_smbus_xfer(struct i2c_adapter *adap, u16 addr,
+                        unsigned short flags, char read_write,
+                        u8 command, int size, union i2c_smbus_data *data)
+{
+        return bfin_twi_do_smbus_xfer(adap, addr, flags,
+                        read_write, command, size, data);
+}
+
+/*
  * Return what the adapter supports
  */
 static u32 bfin_twi_functionality(struct i2c_adapter *adap)
@@ -666,10 +657,6 @@ static int i2c_bfin_twi_probe(struct platform_device *pdev)
                 goto out_error_no_irq;
         }
 
-        init_timer(&(iface->timeout_timer));
-        iface->timeout_timer.function = bfin_twi_timeout;
-        iface->timeout_timer.data = (unsigned long)iface;
-
         p_adap = &iface->adap;
         p_adap->nr = pdev->id;
         strlcpy(p_adap->name, pdev->name, sizeof(p_adap->name));
@@ -677,6 +664,8 @@ static int i2c_bfin_twi_probe(struct platform_device *pdev)
         p_adap->algo_data = iface;
         p_adap->class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
         p_adap->dev.parent = &pdev->dev;
+        p_adap->timeout = 5 * HZ;
+        p_adap->retries = 3;
 
         rc = peripheral_request_list(pin_req[pdev->id], "i2c-bfin-twi");
         if (rc) {
@@ -693,13 +682,13 @@ static int i2c_bfin_twi_probe(struct platform_device *pdev)
         }
 
         /* Set TWI internal clock as 10MHz */
-        write_CONTROL(iface, ((get_sclk() / 1024 / 1024 + 5) / 10) & 0x7F);
+        write_CONTROL(iface, ((get_sclk() / 1000 / 1000 + 5) / 10) & 0x7F);
 
         /*
          * We will not end up with a CLKDIV=0 because no one will specify
-         * 20kHz SCL or less in Kconfig now. (5 * 1024 / 20 = 0x100)
+         * 20kHz SCL or less in Kconfig now. (5 * 1000 / 20 = 250)
          */
-        clkhilow = 5 * 1024 / CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ;
+        clkhilow = ((10 * 1000 / CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ) + 1) / 2;
 
         /* Set Twi interface clock as specified */
         write_CLKDIV(iface, (clkhilow << 8) | clkhilow);
diff --git a/drivers/i2c/busses/i2c-cpm.c b/drivers/i2c/busses/i2c-cpm.c
index 9c2e10082b79..f2de3be35df3 100644
--- a/drivers/i2c/busses/i2c-cpm.c
+++ b/drivers/i2c/busses/i2c-cpm.c
@@ -105,7 +105,7 @@ struct i2c_reg {
 
 struct cpm_i2c {
         char *base;
-        struct of_device *ofdev;
+        struct platform_device *ofdev;
         struct i2c_adapter adap;
         uint dp_addr;
         int version; /* CPM1=1, CPM2=2 */
@@ -428,7 +428,7 @@ static const struct i2c_adapter cpm_ops = {
 
 static int __devinit cpm_i2c_setup(struct cpm_i2c *cpm)
 {
-        struct of_device *ofdev = cpm->ofdev;
+        struct platform_device *ofdev = cpm->ofdev;
         const u32 *data;
         int len, ret, i;
         void __iomem *i2c_base;
@@ -440,8 +440,8 @@ static int __devinit cpm_i2c_setup(struct cpm_i2c *cpm)
 
         init_waitqueue_head(&cpm->i2c_wait);
 
-        cpm->irq = of_irq_to_resource(ofdev->node, 0, NULL);
-        if (cpm->irq == NO_IRQ)
+        cpm->irq = of_irq_to_resource(ofdev->dev.of_node, 0, NULL);
+        if (!cpm->irq)
                 return -EINVAL;
 
         /* Install interrupt handler. */
@@ -451,13 +451,13 @@ static int __devinit cpm_i2c_setup(struct cpm_i2c *cpm)
                 return ret;
 
         /* I2C parameter RAM */
-        i2c_base = of_iomap(ofdev->node, 1);
+        i2c_base = of_iomap(ofdev->dev.of_node, 1);
         if (i2c_base == NULL) {
                 ret = -EINVAL;
                 goto out_irq;
         }
 
-        if (of_device_is_compatible(ofdev->node, "fsl,cpm1-i2c")) {
+        if (of_device_is_compatible(ofdev->dev.of_node, "fsl,cpm1-i2c")) {
 
                 /* Check for and use a microcode relocation patch. */
                 cpm->i2c_ram = i2c_base;
@@ -474,7 +474,7 @@ static int __devinit cpm_i2c_setup(struct cpm_i2c *cpm)
 
                 cpm->version = 1;
 
-        } else if (of_device_is_compatible(ofdev->node, "fsl,cpm2-i2c")) {
+        } else if (of_device_is_compatible(ofdev->dev.of_node, "fsl,cpm2-i2c")) {
                 cpm->i2c_addr = cpm_muram_alloc(sizeof(struct i2c_ram), 64);
                 cpm->i2c_ram = cpm_muram_addr(cpm->i2c_addr);
                 out_be16(i2c_base, cpm->i2c_addr);
@@ -489,24 +489,24 @@ static int __devinit cpm_i2c_setup(struct cpm_i2c *cpm)
         }
 
         /* I2C control/status registers */
-        cpm->i2c_reg = of_iomap(ofdev->node, 0);
+        cpm->i2c_reg = of_iomap(ofdev->dev.of_node, 0);
         if (cpm->i2c_reg == NULL) {
                 ret = -EINVAL;
                 goto out_ram;
         }
 
-        data = of_get_property(ofdev->node, "fsl,cpm-command", &len);
+        data = of_get_property(ofdev->dev.of_node, "fsl,cpm-command", &len);
         if (!data || len != 4) {
                 ret = -EINVAL;
                 goto out_reg;
         }
         cpm->cp_command = *data;
 
-        data = of_get_property(ofdev->node, "linux,i2c-class", &len);
+        data = of_get_property(ofdev->dev.of_node, "linux,i2c-class", &len);
         if (data && len == 4)
                 cpm->adap.class = *data;
 
-        data = of_get_property(ofdev->node, "clock-frequency", &len);
+        data = of_get_property(ofdev->dev.of_node, "clock-frequency", &len);
         if (data && len == 4)
                 cpm->freq = *data;
         else
@@ -634,7 +634,7 @@ static void cpm_i2c_shutdown(struct cpm_i2c *cpm)
                 cpm_muram_free(cpm->i2c_addr);
 }
 
-static int __devinit cpm_i2c_probe(struct of_device *ofdev,
+static int __devinit cpm_i2c_probe(struct platform_device *ofdev,
                          const struct of_device_id *match)
 {
         int result, len;
@@ -652,6 +652,7 @@ static int __devinit cpm_i2c_probe(struct of_device *ofdev,
         cpm->adap = cpm_ops;
         i2c_set_adapdata(&cpm->adap, cpm);
         cpm->adap.dev.parent = &ofdev->dev;
+        cpm->adap.dev.of_node = of_node_get(ofdev->dev.of_node);
 
         result = cpm_i2c_setup(cpm);
         if (result) {
@@ -661,7 +662,7 @@ static int __devinit cpm_i2c_probe(struct of_device *ofdev,
 
         /* register new adapter to i2c module... */
 
-        data = of_get_property(ofdev->node, "linux,i2c-index", &len);
+        data = of_get_property(ofdev->dev.of_node, "linux,i2c-index", &len);
         if (data && len == 4) {
                 cpm->adap.nr = *data;
                 result = i2c_add_numbered_adapter(&cpm->adap);
@@ -679,7 +680,7 @@ static int __devinit cpm_i2c_probe(struct of_device *ofdev,
         /*
          * register OF I2C devices
          */
-        of_register_i2c_devices(&cpm->adap, ofdev->node);
+        of_i2c_register_devices(&cpm->adap);
 
         return 0;
 out_shut:
@@ -691,7 +692,7 @@ out_free:
         return result;
 }
 
-static int __devexit cpm_i2c_remove(struct of_device *ofdev)
+static int __devexit cpm_i2c_remove(struct platform_device *ofdev)
 {
         struct cpm_i2c *cpm = dev_get_drvdata(&ofdev->dev);
 
@@ -718,13 +719,13 @@ static const struct of_device_id cpm_i2c_match[] = {
 MODULE_DEVICE_TABLE(of, cpm_i2c_match);
 
 static struct of_platform_driver cpm_i2c_driver = {
-        .match_table    = cpm_i2c_match,
         .probe          = cpm_i2c_probe,
         .remove         = __devexit_p(cpm_i2c_remove),
-        .driver         = {
-                .name   = "fsl-i2c-cpm",
-                .owner  = THIS_MODULE,
-        }
+        .driver = {
+                .name = "fsl-i2c-cpm",
+                .owner = THIS_MODULE,
+                .of_match_table = cpm_i2c_match,
+        },
 };
 
 static int __init cpm_i2c_init(void)
diff --git a/drivers/i2c/busses/i2c-davinci.c b/drivers/i2c/busses/i2c-davinci.c
index 3fae3a91ce5b..5795c8398c7c 100644
--- a/drivers/i2c/busses/i2c-davinci.c
+++ b/drivers/i2c/busses/i2c-davinci.c
@@ -35,14 +35,17 @@
 #include <linux/interrupt.h>
 #include <linux/platform_device.h>
 #include <linux/io.h>
+#include <linux/slab.h>
+#include <linux/cpufreq.h>
+#include <linux/gpio.h>
 
 #include <mach/hardware.h>
-
 #include <mach/i2c.h>
 
 /* ----- global defines ----------------------------------------------- */
 
 #define DAVINCI_I2C_TIMEOUT     (1*HZ)
+#define DAVINCI_I2C_MAX_TRIES   2
 #define I2C_DAVINCI_INTR_ALL    (DAVINCI_I2C_IMR_AAS | \
                                  DAVINCI_I2C_IMR_SCD | \
                                  DAVINCI_I2C_IMR_ARDY | \
@@ -71,37 +74,29 @@
 #define DAVINCI_I2C_IVR_NACK    0x02
 #define DAVINCI_I2C_IVR_AL      0x01
 
-#define DAVINCI_I2C_STR_BB      (1 << 12)
-#define DAVINCI_I2C_STR_RSFULL  (1 << 11)
-#define DAVINCI_I2C_STR_SCD     (1 << 5)
-#define DAVINCI_I2C_STR_ARDY    (1 << 2)
-#define DAVINCI_I2C_STR_NACK    (1 << 1)
-#define DAVINCI_I2C_STR_AL      (1 << 0)
-
-#define DAVINCI_I2C_MDR_NACK    (1 << 15)
-#define DAVINCI_I2C_MDR_STT     (1 << 13)
-#define DAVINCI_I2C_MDR_STP     (1 << 11)
-#define DAVINCI_I2C_MDR_MST     (1 << 10)
-#define DAVINCI_I2C_MDR_TRX     (1 << 9)
-#define DAVINCI_I2C_MDR_XA      (1 << 8)
-#define DAVINCI_I2C_MDR_RM      (1 << 7)
-#define DAVINCI_I2C_MDR_IRS     (1 << 5)
-
-#define DAVINCI_I2C_IMR_AAS     (1 << 6)
-#define DAVINCI_I2C_IMR_SCD     (1 << 5)
-#define DAVINCI_I2C_IMR_XRDY    (1 << 4)
-#define DAVINCI_I2C_IMR_RRDY    (1 << 3)
-#define DAVINCI_I2C_IMR_ARDY    (1 << 2)
-#define DAVINCI_I2C_IMR_NACK    (1 << 1)
-#define DAVINCI_I2C_IMR_AL      (1 << 0)
-
-#define MOD_REG_BIT(val, mask, set) do { \
-        if (set) { \
-                val |= mask; \
-        } else { \
-                val &= ~mask; \
-        } \
-} while (0)
+#define DAVINCI_I2C_STR_BB      BIT(12)
+#define DAVINCI_I2C_STR_RSFULL  BIT(11)
+#define DAVINCI_I2C_STR_SCD     BIT(5)
+#define DAVINCI_I2C_STR_ARDY    BIT(2)
+#define DAVINCI_I2C_STR_NACK    BIT(1)
+#define DAVINCI_I2C_STR_AL      BIT(0)
+
+#define DAVINCI_I2C_MDR_NACK    BIT(15)
+#define DAVINCI_I2C_MDR_STT     BIT(13)
+#define DAVINCI_I2C_MDR_STP     BIT(11)
+#define DAVINCI_I2C_MDR_MST     BIT(10)
+#define DAVINCI_I2C_MDR_TRX     BIT(9)
+#define DAVINCI_I2C_MDR_XA      BIT(8)
+#define DAVINCI_I2C_MDR_RM      BIT(7)
+#define DAVINCI_I2C_MDR_IRS     BIT(5)
+
+#define DAVINCI_I2C_IMR_AAS     BIT(6)
+#define DAVINCI_I2C_IMR_SCD     BIT(5)
+#define DAVINCI_I2C_IMR_XRDY    BIT(4)
+#define DAVINCI_I2C_IMR_RRDY    BIT(3)
+#define DAVINCI_I2C_IMR_ARDY    BIT(2)
+#define DAVINCI_I2C_IMR_NACK    BIT(1)
+#define DAVINCI_I2C_IMR_AL      BIT(0)
 
 struct davinci_i2c_dev {
         struct device           *dev;
@@ -112,8 +107,13 @@ struct davinci_i2c_dev {
         u8                      *buf;
         size_t                  buf_len;
         int                     irq;
+        int                     stop;
         u8                      terminate;
         struct i2c_adapter      adapter;
+#ifdef CONFIG_CPU_FREQ
+        struct completion       xfr_complete;
+        struct notifier_block   freq_transition;
+#endif
 };
 
 /* default platform data to use if not supplied in the platform_device */
@@ -133,12 +133,59 @@ static inline u16 davinci_i2c_read_reg(struct davinci_i2c_dev *i2c_dev, int reg)
         return __raw_readw(i2c_dev->base + reg);
 }
 
-/*
- * This functions configures I2C and brings I2C out of reset.
- * This function is called during I2C init function. This function
- * also gets called if I2C encounters any errors.
+/* Generate a pulse on the i2c clock pin. */
+static void generic_i2c_clock_pulse(unsigned int scl_pin)
+{
+        u16 i;
+
+        if (scl_pin) {
+                /* Send high and low on the SCL line */
+                for (i = 0; i < 9; i++) {
+                        gpio_set_value(scl_pin, 0);
+                        udelay(20);
+                        gpio_set_value(scl_pin, 1);
+                        udelay(20);
+                }
+        }
+}
+
+/* This routine does i2c bus recovery as specified in the
+ * i2c protocol Rev. 03 section 3.16 titled "Bus clear"
  */
-static int i2c_davinci_init(struct davinci_i2c_dev *dev)
+static void i2c_recover_bus(struct davinci_i2c_dev *dev)
+{
+        u32 flag = 0;
+        struct davinci_i2c_platform_data *pdata = dev->dev->platform_data;
+
+        dev_err(dev->dev, "initiating i2c bus recovery\n");
+        /* Send NACK to the slave */
+        flag = davinci_i2c_read_reg(dev, DAVINCI_I2C_MDR_REG);
+        flag |=  DAVINCI_I2C_MDR_NACK;
+        /* write the data into mode register */
+        davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, flag);
+        if (pdata)
+                generic_i2c_clock_pulse(pdata->scl_pin);
+        /* Send STOP */
+        flag = davinci_i2c_read_reg(dev, DAVINCI_I2C_MDR_REG);
+        flag |= DAVINCI_I2C_MDR_STP;
+        davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, flag);
+}
+
+static inline void davinci_i2c_reset_ctrl(struct davinci_i2c_dev *i2c_dev,
+                                                                int val)
+{
+        u16 w;
+
+        w = davinci_i2c_read_reg(i2c_dev, DAVINCI_I2C_MDR_REG);
+        if (!val)       /* put I2C into reset */
+                w &= ~DAVINCI_I2C_MDR_IRS;
+        else            /* take I2C out of reset */
+                w |= DAVINCI_I2C_MDR_IRS;
+
+        davinci_i2c_write_reg(i2c_dev, DAVINCI_I2C_MDR_REG, w);
+}
+
+static void i2c_davinci_calc_clk_dividers(struct davinci_i2c_dev *dev)
 {
         struct davinci_i2c_platform_data *pdata = dev->dev->platform_data;
         u16 psc;
@@ -147,15 +194,6 @@ static int i2c_davinci_init(struct davinci_i2c_dev *dev)
         u32 clkh;
         u32 clkl;
         u32 input_clock = clk_get_rate(dev->clk);
-        u16 w;
-
-        if (!pdata)
-                pdata = &davinci_i2c_platform_data_default;
-
-        /* put I2C into reset */
-        w = davinci_i2c_read_reg(dev, DAVINCI_I2C_MDR_REG);
-        MOD_REG_BIT(w, DAVINCI_I2C_MDR_IRS, 0);
-        davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, w);
 
         /* NOTE: I2C Clock divider programming info
          * As per I2C specs the following formulas provide prescaler
@@ -188,6 +226,31 @@ static int i2c_davinci_init(struct davinci_i2c_dev *dev)
         davinci_i2c_write_reg(dev, DAVINCI_I2C_CLKL_REG, clkl);
 
         dev_dbg(dev->dev, "input_clock = %d, CLK = %d\n", input_clock, clk);
+}
+
+/*
+ * This function configures I2C and brings I2C out of reset.
+ * This function is called during I2C init function. This function
+ * also gets called if I2C encounters any errors.
+ */
+static int i2c_davinci_init(struct davinci_i2c_dev *dev)
+{
+        struct davinci_i2c_platform_data *pdata = dev->dev->platform_data;
+
+        if (!pdata)
+                pdata = &davinci_i2c_platform_data_default;
+
+        /* put I2C into reset */
+        davinci_i2c_reset_ctrl(dev, 0);
+
+        /* compute clock dividers */
+        i2c_davinci_calc_clk_dividers(dev);
+
+        /* Respond at reserved "SMBus Host" slave address" (and zero);
+         * we seem to have no option to not respond...
+         */
+        davinci_i2c_write_reg(dev, DAVINCI_I2C_OAR_REG, 0x08);
+
         dev_dbg(dev->dev, "PSC  = %d\n",
                 davinci_i2c_read_reg(dev, DAVINCI_I2C_PSC_REG));
         dev_dbg(dev->dev, "CLKL = %d\n",
@@ -198,9 +261,7 @@ static int i2c_davinci_init(struct davinci_i2c_dev *dev)
                 pdata->bus_freq, pdata->bus_delay);
 
         /* Take the I2C module out of reset: */
-        w = davinci_i2c_read_reg(dev, DAVINCI_I2C_MDR_REG);
-        MOD_REG_BIT(w, DAVINCI_I2C_MDR_IRS, 1);
-        davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, w);
+        davinci_i2c_reset_ctrl(dev, 1);
 
         /* Enable interrupts */
         davinci_i2c_write_reg(dev, DAVINCI_I2C_IMR_REG, I2C_DAVINCI_INTR_ALL);
@@ -215,14 +276,22 @@ static int i2c_davinci_wait_bus_not_busy(struct davinci_i2c_dev *dev,
                                          char allow_sleep)
 {
         unsigned long timeout;
+        static u16 to_cnt;
 
         timeout = jiffies + dev->adapter.timeout;
         while (davinci_i2c_read_reg(dev, DAVINCI_I2C_STR_REG)
                & DAVINCI_I2C_STR_BB) {
-                if (time_after(jiffies, timeout)) {
-                        dev_warn(dev->dev,
-                                 "timeout waiting for bus ready\n");
-                        return -ETIMEDOUT;
+                if (to_cnt <= DAVINCI_I2C_MAX_TRIES) {
+                        if (time_after(jiffies, timeout)) {
+                                dev_warn(dev->dev,
+                                "timeout waiting for bus ready\n");
+                                to_cnt++;
+                                return -ETIMEDOUT;
+                        } else {
+                                to_cnt = 0;
+                                i2c_recover_bus(dev);
+                                i2c_davinci_init(dev);
+                        }
                 }
                 if (allow_sleep)
                         schedule_timeout(1);
@@ -244,9 +313,6 @@ i2c_davinci_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg, int stop)
         u16 w;
         int r;
 
-        if (msg->len == 0)
-                return -EINVAL;
-
         if (!pdata)
                 pdata = &davinci_i2c_platform_data_default;
         /* Introduce a delay, required for some boards (e.g Davinci EVM) */
@@ -258,40 +324,64 @@ i2c_davinci_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg, int stop)
 
         dev->buf = msg->buf;
         dev->buf_len = msg->len;
+        dev->stop = stop;
 
         davinci_i2c_write_reg(dev, DAVINCI_I2C_CNT_REG, dev->buf_len);
 
         INIT_COMPLETION(dev->cmd_complete);
         dev->cmd_err = 0;
 
-        /* Take I2C out of reset, configure it as master and set the
-         * start bit */
-        flag = DAVINCI_I2C_MDR_IRS | DAVINCI_I2C_MDR_MST | DAVINCI_I2C_MDR_STT;
+        /* Take I2C out of reset and configure it as master */
+        flag = DAVINCI_I2C_MDR_IRS | DAVINCI_I2C_MDR_MST;
 
         /* if the slave address is ten bit address, enable XA bit */
         if (msg->flags & I2C_M_TEN)
                 flag |= DAVINCI_I2C_MDR_XA;
         if (!(msg->flags & I2C_M_RD))
                 flag |= DAVINCI_I2C_MDR_TRX;
-        if (stop)
-                flag |= DAVINCI_I2C_MDR_STP;
+        if (msg->len == 0)
+                flag |= DAVINCI_I2C_MDR_RM;
 
         /* Enable receive or transmit interrupts */
         w = davinci_i2c_read_reg(dev, DAVINCI_I2C_IMR_REG);
         if (msg->flags & I2C_M_RD)
-                MOD_REG_BIT(w, DAVINCI_I2C_IMR_RRDY, 1);
+                w |= DAVINCI_I2C_IMR_RRDY;
         else
-                MOD_REG_BIT(w, DAVINCI_I2C_IMR_XRDY, 1);
+                w |= DAVINCI_I2C_IMR_XRDY;
         davinci_i2c_write_reg(dev, DAVINCI_I2C_IMR_REG, w);
 
         dev->terminate = 0;
-        /* write the data into mode register */
+
+        /*
+         * Write mode register first as needed for correct behaviour
+         * on OMAP-L138, but don't set STT yet to avoid a race with XRDY
+         * occuring before we have loaded DXR
+         */
+        davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, flag);
+
+        /*
+         * First byte should be set here, not after interrupt,
+         * because transmit-data-ready interrupt can come before
+         * NACK-interrupt during sending of previous message and
+         * ICDXR may have wrong data
+         * It also saves us one interrupt, slightly faster
+         */
+        if ((!(msg->flags & I2C_M_RD)) && dev->buf_len) {
+                davinci_i2c_write_reg(dev, DAVINCI_I2C_DXR_REG, *dev->buf++);
+                dev->buf_len--;
+        }
+
+        /* Set STT to begin transmit now DXR is loaded */
+        flag |= DAVINCI_I2C_MDR_STT;
+        if (stop && msg->len != 0)
+                flag |= DAVINCI_I2C_MDR_STP;
         davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, flag);
 
         r = wait_for_completion_interruptible_timeout(&dev->cmd_complete,
                                                       dev->adapter.timeout);
         if (r == 0) {
                 dev_err(dev->dev, "controller timed out\n");
+                i2c_recover_bus(dev);
                 i2c_davinci_init(dev);
                 dev->buf_len = 0;
                 return -ETIMEDOUT;
@@ -328,7 +418,7 @@ i2c_davinci_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg, int stop)
                         return msg->len;
                 if (stop) {
                         w = davinci_i2c_read_reg(dev, DAVINCI_I2C_MDR_REG);
-                        MOD_REG_BIT(w, DAVINCI_I2C_MDR_STP, 1);
+                        w |= DAVINCI_I2C_MDR_STP;
                         davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, w);
                 }
                 return -EREMOTEIO;
@@ -361,12 +451,17 @@ i2c_davinci_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
                 if (ret < 0)
                         return ret;
         }
+
+#ifdef CONFIG_CPU_FREQ
+        complete(&dev->xfr_complete);
+#endif
+
         return num;
 }
 
 static u32 i2c_davinci_func(struct i2c_adapter *adap)
 {
-        return I2C_FUNC_I2C | (I2C_FUNC_SMBUS_EMUL & ~I2C_FUNC_SMBUS_QUICK);
+        return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
 }
 
 static void terminate_read(struct davinci_i2c_dev *dev)
@@ -387,7 +482,7 @@ static void terminate_write(struct davinci_i2c_dev *dev)
         davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, w);
 
         if (!dev->terminate)
-                dev_err(dev->dev, "TDR IRQ while no data to send\n");
+                dev_dbg(dev->dev, "TDR IRQ while no data to send\n");
 }
 
 /*
@@ -425,6 +520,14 @@ static irqreturn_t i2c_davinci_isr(int this_irq, void *dev_id)
                 case DAVINCI_I2C_IVR_ARDY:
                         davinci_i2c_write_reg(dev,
                                 DAVINCI_I2C_STR_REG, DAVINCI_I2C_STR_ARDY);
+                        if (((dev->buf_len == 0) && (dev->stop != 0)) ||
+                            (dev->cmd_err & DAVINCI_I2C_STR_NACK)) {
+                                w = davinci_i2c_read_reg(dev,
+                                                         DAVINCI_I2C_MDR_REG);
+                                w |= DAVINCI_I2C_MDR_STP;
+                                davinci_i2c_write_reg(dev,
+                                                      DAVINCI_I2C_MDR_REG, w);
+                        }
                         complete(&dev->cmd_complete);
                         break;
 
@@ -456,7 +559,7 @@ static irqreturn_t i2c_davinci_isr(int this_irq, void *dev_id)
 
                                 w = davinci_i2c_read_reg(dev,
                                                          DAVINCI_I2C_IMR_REG);
-                                MOD_REG_BIT(w, DAVINCI_I2C_IMR_XRDY, 0);
+                                w &= ~DAVINCI_I2C_IMR_XRDY;
                                 davinci_i2c_write_reg(dev,
                                                       DAVINCI_I2C_IMR_REG,
                                                       w);
@@ -473,13 +576,60 @@ static irqreturn_t i2c_davinci_isr(int this_irq, void *dev_id)
                         break;
 
                 case DAVINCI_I2C_IVR_AAS:
-                        dev_warn(dev->dev, "Address as slave interrupt\n");
-                }/* switch */
-        }/* while */
+                        dev_dbg(dev->dev, "Address as slave interrupt\n");
+                        break;
+
+                default:
+                        dev_warn(dev->dev, "Unrecognized irq stat %d\n", stat);
+                        break;
+                }
+        }
 
         return count ? IRQ_HANDLED : IRQ_NONE;
 }
 
+#ifdef CONFIG_CPU_FREQ
+static int i2c_davinci_cpufreq_transition(struct notifier_block *nb,
+                                     unsigned long val, void *data)
+{
+        struct davinci_i2c_dev *dev;
+
+        dev = container_of(nb, struct davinci_i2c_dev, freq_transition);
+        if (val == CPUFREQ_PRECHANGE) {
+                wait_for_completion(&dev->xfr_complete);
+                davinci_i2c_reset_ctrl(dev, 0);
+        } else if (val == CPUFREQ_POSTCHANGE) {
+                i2c_davinci_calc_clk_dividers(dev);
+                davinci_i2c_reset_ctrl(dev, 1);
+        }
+
+        return 0;
+}
+
+static inline int i2c_davinci_cpufreq_register(struct davinci_i2c_dev *dev)
+{
+        dev->freq_transition.notifier_call = i2c_davinci_cpufreq_transition;
+
+        return cpufreq_register_notifier(&dev->freq_transition,
+                                         CPUFREQ_TRANSITION_NOTIFIER);
+}
+
+static inline void i2c_davinci_cpufreq_deregister(struct davinci_i2c_dev *dev)
+{
+        cpufreq_unregister_notifier(&dev->freq_transition,
+                                    CPUFREQ_TRANSITION_NOTIFIER);
+}
+#else
+static inline int i2c_davinci_cpufreq_register(struct davinci_i2c_dev *dev)
+{
+        return 0;
+}
+
+static inline void i2c_davinci_cpufreq_deregister(struct davinci_i2c_dev *dev)
+{
+}
+#endif
+
 static struct i2c_algorithm i2c_davinci_algo = {
         .master_xfer    = i2c_davinci_xfer,
         .functionality  = i2c_davinci_func,
@@ -505,7 +655,7 @@ static int davinci_i2c_probe(struct platform_device *pdev)
                 return -ENODEV;
         }
 
-        ioarea = request_mem_region(mem->start, (mem->end - mem->start) + 1,
+        ioarea = request_mem_region(mem->start, resource_size(mem),
                                     pdev->name);
         if (!ioarea) {
                 dev_err(&pdev->dev, "I2C region already claimed\n");
@@ -519,18 +669,26 @@ static int davinci_i2c_probe(struct platform_device *pdev)
         }
 
         init_completion(&dev->cmd_complete);
+#ifdef CONFIG_CPU_FREQ
+        init_completion(&dev->xfr_complete);
+#endif
         dev->dev = get_device(&pdev->dev);
         dev->irq = irq->start;
         platform_set_drvdata(pdev, dev);
 
-        dev->clk = clk_get(&pdev->dev, "I2CCLK");
+        dev->clk = clk_get(&pdev->dev, NULL);
         if (IS_ERR(dev->clk)) {
                 r = -ENODEV;
                 goto err_free_mem;
         }
         clk_enable(dev->clk);
 
-        dev->base = (void __iomem *)IO_ADDRESS(mem->start);
+        dev->base = ioremap(mem->start, resource_size(mem));
+        if (!dev->base) {
+                r = -EBUSY;
+                goto err_mem_ioremap;
+        }
+
         i2c_davinci_init(dev);
 
         r = request_irq(dev->irq, i2c_davinci_isr, 0, pdev->name, dev);
@@ -539,6 +697,12 @@ static int davinci_i2c_probe(struct platform_device *pdev)
                 goto err_unuse_clocks;
         }
 
+        r = i2c_davinci_cpufreq_register(dev);
+        if (r) {
+                dev_err(&pdev->dev, "failed to register cpufreq\n");
+                goto err_free_irq;
+        }
+
         adap = &dev->adapter;
         i2c_set_adapdata(adap, dev);
         adap->owner = THIS_MODULE;
@@ -560,6 +724,8 @@ static int davinci_i2c_probe(struct platform_device *pdev)
 err_free_irq:
         free_irq(dev->irq, dev);
 err_unuse_clocks:
+        iounmap(dev->base);
+err_mem_ioremap:
         clk_disable(dev->clk);
         clk_put(dev->clk);
         dev->clk = NULL;
@@ -568,7 +734,7 @@ err_free_mem:
         put_device(&pdev->dev);
         kfree(dev);
 err_release_region:
-        release_mem_region(mem->start, (mem->end - mem->start) + 1);
+        release_mem_region(mem->start, resource_size(mem));
 
         return r;
 }
@@ -578,6 +744,8 @@ static int davinci_i2c_remove(struct platform_device *pdev)
         struct davinci_i2c_dev *dev = platform_get_drvdata(pdev);
         struct resource *mem;
 
+        i2c_davinci_cpufreq_deregister(dev);
+
         platform_set_drvdata(pdev, NULL);
         i2c_del_adapter(&dev->adapter);
         put_device(&pdev->dev);
@@ -588,13 +756,49 @@ static int davinci_i2c_remove(struct platform_device *pdev)
 
         davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, 0);
         free_irq(IRQ_I2C, dev);
+        iounmap(dev->base);
         kfree(dev);
 
         mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-        release_mem_region(mem->start, (mem->end - mem->start) + 1);
+        release_mem_region(mem->start, resource_size(mem));
         return 0;
 }
 
+#ifdef CONFIG_PM
+static int davinci_i2c_suspend(struct device *dev)
+{
+        struct platform_device *pdev = to_platform_device(dev);
+        struct davinci_i2c_dev *i2c_dev = platform_get_drvdata(pdev);
+
+        /* put I2C into reset */
+        davinci_i2c_reset_ctrl(i2c_dev, 0);
+        clk_disable(i2c_dev->clk);
+
+        return 0;
+}
+
+static int davinci_i2c_resume(struct device *dev)
+{
+        struct platform_device *pdev = to_platform_device(dev);
+        struct davinci_i2c_dev *i2c_dev = platform_get_drvdata(pdev);
+
+        clk_enable(i2c_dev->clk);
+        /* take I2C out of reset */
+        davinci_i2c_reset_ctrl(i2c_dev, 1);
+
+        return 0;
+}
+
+static const struct dev_pm_ops davinci_i2c_pm = {
+        .suspend        = davinci_i2c_suspend,
+        .resume         = davinci_i2c_resume,
+};
+
+#define davinci_i2c_pm_ops (&davinci_i2c_pm)
+#else
+#define davinci_i2c_pm_ops NULL
+#endif
+
 /* work with hotplug and coldplug */
 MODULE_ALIAS("platform:i2c_davinci");
 
@@ -604,6 +808,7 @@ static struct platform_driver davinci_i2c_driver = {
         .driver         = {
                 .name   = "i2c_davinci",
                 .owner  = THIS_MODULE,
+                .pm     = davinci_i2c_pm_ops,
         },
 };
 
diff --git a/drivers/i2c/busses/i2c-designware.c b/drivers/i2c/busses/i2c-designware.c
new file mode 100644
index 000000000000..b664ed8bbdb3
--- /dev/null
+++ b/drivers/i2c/busses/i2c-designware.c
@@ -0,0 +1,847 @@
+/*
+ * Synopsys DesignWare I2C adapter driver (master only).
+ *
+ * Based on the TI DAVINCI I2C adapter driver.
+ *
+ * Copyright (C) 2006 Texas Instruments.
+ * Copyright (C) 2007 MontaVista Software Inc.
+ * Copyright (C) 2009 Provigent Ltd.
+ *
+ * ----------------------------------------------------------------------------
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ * ----------------------------------------------------------------------------
+ *
+ */
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/delay.h>
+#include <linux/i2c.h>
+#include <linux/clk.h>
+#include <linux/errno.h>
+#include <linux/sched.h>
+#include <linux/err.h>
+#include <linux/interrupt.h>
+#include <linux/platform_device.h>
+#include <linux/io.h>
+#include <linux/slab.h>
+
+/*
+ * Registers offset
+ */
+#define DW_IC_CON               0x0
+#define DW_IC_TAR               0x4
+#define DW_IC_DATA_CMD          0x10
+#define DW_IC_SS_SCL_HCNT       0x14
+#define DW_IC_SS_SCL_LCNT       0x18
+#define DW_IC_FS_SCL_HCNT       0x1c
+#define DW_IC_FS_SCL_LCNT       0x20
+#define DW_IC_INTR_STAT         0x2c
+#define DW_IC_INTR_MASK         0x30
+#define DW_IC_RAW_INTR_STAT     0x34
+#define DW_IC_RX_TL             0x38
+#define DW_IC_TX_TL             0x3c
+#define DW_IC_CLR_INTR          0x40
+#define DW_IC_CLR_RX_UNDER      0x44
+#define DW_IC_CLR_RX_OVER       0x48
+#define DW_IC_CLR_TX_OVER       0x4c
+#define DW_IC_CLR_RD_REQ        0x50
+#define DW_IC_CLR_TX_ABRT       0x54
+#define DW_IC_CLR_RX_DONE       0x58
+#define DW_IC_CLR_ACTIVITY      0x5c
+#define DW_IC_CLR_STOP_DET      0x60
+#define DW_IC_CLR_START_DET     0x64
+#define DW_IC_CLR_GEN_CALL      0x68
+#define DW_IC_ENABLE            0x6c
+#define DW_IC_STATUS            0x70
+#define DW_IC_TXFLR             0x74
+#define DW_IC_RXFLR             0x78
+#define DW_IC_COMP_PARAM_1      0xf4
+#define DW_IC_TX_ABRT_SOURCE    0x80
+
+#define DW_IC_CON_MASTER                0x1
+#define DW_IC_CON_SPEED_STD             0x2
+#define DW_IC_CON_SPEED_FAST            0x4
+#define DW_IC_CON_10BITADDR_MASTER      0x10
+#define DW_IC_CON_RESTART_EN            0x20
+#define DW_IC_CON_SLAVE_DISABLE         0x40
+
+#define DW_IC_INTR_RX_UNDER     0x001
+#define DW_IC_INTR_RX_OVER      0x002
+#define DW_IC_INTR_RX_FULL      0x004
+#define DW_IC_INTR_TX_OVER      0x008
+#define DW_IC_INTR_TX_EMPTY     0x010
+#define DW_IC_INTR_RD_REQ       0x020
+#define DW_IC_INTR_TX_ABRT      0x040
+#define DW_IC_INTR_RX_DONE      0x080
+#define DW_IC_INTR_ACTIVITY     0x100
+#define DW_IC_INTR_STOP_DET     0x200
+#define DW_IC_INTR_START_DET    0x400
+#define DW_IC_INTR_GEN_CALL     0x800
+
+#define DW_IC_INTR_DEFAULT_MASK         (DW_IC_INTR_RX_FULL | \
+                                         DW_IC_INTR_TX_EMPTY | \
+                                         DW_IC_INTR_TX_ABRT | \
+                                         DW_IC_INTR_STOP_DET)
+
+#define DW_IC_STATUS_ACTIVITY   0x1
+
+#define DW_IC_ERR_TX_ABRT       0x1
+
+/*
+ * status codes
+ */
+#define STATUS_IDLE                     0x0
+#define STATUS_WRITE_IN_PROGRESS        0x1
+#define STATUS_READ_IN_PROGRESS         0x2
+
+#define TIMEOUT                 20 /* ms */
+
+/*
+ * hardware abort codes from the DW_IC_TX_ABRT_SOURCE register
+ *
+ * only expected abort codes are listed here
+ * refer to the datasheet for the full list
+ */
+#define ABRT_7B_ADDR_NOACK      0
+#define ABRT_10ADDR1_NOACK      1
+#define ABRT_10ADDR2_NOACK      2
+#define ABRT_TXDATA_NOACK       3
+#define ABRT_GCALL_NOACK        4
+#define ABRT_GCALL_READ         5
+#define ABRT_SBYTE_ACKDET       7
+#define ABRT_SBYTE_NORSTRT      9
+#define ABRT_10B_RD_NORSTRT     10
+#define ABRT_MASTER_DIS         11
+#define ARB_LOST                12
+
+#define DW_IC_TX_ABRT_7B_ADDR_NOACK     (1UL << ABRT_7B_ADDR_NOACK)
+#define DW_IC_TX_ABRT_10ADDR1_NOACK     (1UL << ABRT_10ADDR1_NOACK)
+#define DW_IC_TX_ABRT_10ADDR2_NOACK     (1UL << ABRT_10ADDR2_NOACK)
+#define DW_IC_TX_ABRT_TXDATA_NOACK      (1UL << ABRT_TXDATA_NOACK)
+#define DW_IC_TX_ABRT_GCALL_NOACK       (1UL << ABRT_GCALL_NOACK)
+#define DW_IC_TX_ABRT_GCALL_READ        (1UL << ABRT_GCALL_READ)
+#define DW_IC_TX_ABRT_SBYTE_ACKDET      (1UL << ABRT_SBYTE_ACKDET)
+#define DW_IC_TX_ABRT_SBYTE_NORSTRT     (1UL << ABRT_SBYTE_NORSTRT)
+#define DW_IC_TX_ABRT_10B_RD_NORSTRT    (1UL << ABRT_10B_RD_NORSTRT)
+#define DW_IC_TX_ABRT_MASTER_DIS        (1UL << ABRT_MASTER_DIS)
+#define DW_IC_TX_ARB_LOST               (1UL << ARB_LOST)
+
+#define DW_IC_TX_ABRT_NOACK             (DW_IC_TX_ABRT_7B_ADDR_NOACK | \
+                                         DW_IC_TX_ABRT_10ADDR1_NOACK | \
+                                         DW_IC_TX_ABRT_10ADDR2_NOACK | \
+                                         DW_IC_TX_ABRT_TXDATA_NOACK | \
+                                         DW_IC_TX_ABRT_GCALL_NOACK)
+
+static char *abort_sources[] = {
+        [ABRT_7B_ADDR_NOACK] =
+                "slave address not acknowledged (7bit mode)",
+        [ABRT_10ADDR1_NOACK] =
+                "first address byte not acknowledged (10bit mode)",
+        [ABRT_10ADDR2_NOACK] =
+                "second address byte not acknowledged (10bit mode)",
+        [ABRT_TXDATA_NOACK] =
+                "data not acknowledged",
+        [ABRT_GCALL_NOACK] =
+                "no acknowledgement for a general call",
+        [ABRT_GCALL_READ] =
+                "read after general call",
+        [ABRT_SBYTE_ACKDET] =
+                "start byte acknowledged",
+        [ABRT_SBYTE_NORSTRT] =
+                "trying to send start byte when restart is disabled",
+        [ABRT_10B_RD_NORSTRT] =
+                "trying to read when restart is disabled (10bit mode)",
+        [ABRT_MASTER_DIS] =
+                "trying to use disabled adapter",
+        [ARB_LOST] =
+                "lost arbitration",
+};
+
+/**
+ * struct dw_i2c_dev - private i2c-designware data
+ * @dev: driver model device node
+ * @base: IO registers pointer
+ * @cmd_complete: tx completion indicator
+ * @lock: protect this struct and IO registers
+ * @clk: input reference clock
+ * @cmd_err: run time hadware error code
+ * @msgs: points to an array of messages currently being transfered
+ * @msgs_num: the number of elements in msgs
+ * @msg_write_idx: the element index of the current tx message in the msgs
+ *      array
+ * @tx_buf_len: the length of the current tx buffer
+ * @tx_buf: the current tx buffer
+ * @msg_read_idx: the element index of the current rx message in the msgs
+ *      array
+ * @rx_buf_len: the length of the current rx buffer
+ * @rx_buf: the current rx buffer
+ * @msg_err: error status of the current transfer
+ * @status: i2c master status, one of STATUS_*
+ * @abort_source: copy of the TX_ABRT_SOURCE register
+ * @irq: interrupt number for the i2c master
+ * @adapter: i2c subsystem adapter node
+ * @tx_fifo_depth: depth of the hardware tx fifo
+ * @rx_fifo_depth: depth of the hardware rx fifo
+ */
+struct dw_i2c_dev {
+        struct device           *dev;
+        void __iomem            *base;
+        struct completion       cmd_complete;
+        struct mutex            lock;
+        struct clk              *clk;
+        int                     cmd_err;
+        struct i2c_msg          *msgs;
+        int                     msgs_num;
+        int                     msg_write_idx;
+        u32                     tx_buf_len;
+        u8                      *tx_buf;
+        int                     msg_read_idx;
+        u32                     rx_buf_len;
+        u8                      *rx_buf;
+        int                     msg_err;
+        unsigned int            status;
+        u32                     abort_source;
+        int                     irq;
+        struct i2c_adapter      adapter;
+        unsigned int            tx_fifo_depth;
+        unsigned int            rx_fifo_depth;
+};
+
+static u32
+i2c_dw_scl_hcnt(u32 ic_clk, u32 tSYMBOL, u32 tf, int cond, int offset)
+{
+        /*
+         * DesignWare I2C core doesn't seem to have solid strategy to meet
+         * the tHD;STA timing spec.  Configuring _HCNT based on tHIGH spec
+         * will result in violation of the tHD;STA spec.
+         */
+        if (cond)
+                /*
+                 * Conditional expression:
+                 *
+                 *   IC_[FS]S_SCL_HCNT + (1+4+3) >= IC_CLK * tHIGH
+                 *
+                 * This is based on the DW manuals, and represents an ideal
+                 * configuration.  The resulting I2C bus speed will be
+                 * faster than any of the others.
+                 *
+                 * If your hardware is free from tHD;STA issue, try this one.
+                 */
+                return (ic_clk * tSYMBOL + 5000) / 10000 - 8 + offset;
+        else
+                /*
+                 * Conditional expression:
+                 *
+                 *   IC_[FS]S_SCL_HCNT + 3 >= IC_CLK * (tHD;STA + tf)
+                 *
+                 * This is just experimental rule; the tHD;STA period turned
+                 * out to be proportinal to (_HCNT + 3).  With this setting,
+                 * we could meet both tHIGH and tHD;STA timing specs.
+                 *
+                 * If unsure, you'd better to take this alternative.
+                 *
+                 * The reason why we need to take into account "tf" here,
+                 * is the same as described in i2c_dw_scl_lcnt().
+                 */
+                return (ic_clk * (tSYMBOL + tf) + 5000) / 10000 - 3 + offset;
+}
+
+static u32 i2c_dw_scl_lcnt(u32 ic_clk, u32 tLOW, u32 tf, int offset)
+{
+        /*
+         * Conditional expression:
+         *
+         *   IC_[FS]S_SCL_LCNT + 1 >= IC_CLK * (tLOW + tf)
+         *
+         * DW I2C core starts counting the SCL CNTs for the LOW period
+         * of the SCL clock (tLOW) as soon as it pulls the SCL line.
+         * In order to meet the tLOW timing spec, we need to take into
+         * account the fall time of SCL signal (tf).  Default tf value
+         * should be 0.3 us, for safety.
+         */
+        return ((ic_clk * (tLOW + tf) + 5000) / 10000) - 1 + offset;
+}
+
+/**
+ * i2c_dw_init() - initialize the designware i2c master hardware
+ * @dev: device private data
+ *
+ * This functions configures and enables the I2C master.
+ * This function is called during I2C init function, and in case of timeout at
+ * run time.
+ */
+static void i2c_dw_init(struct dw_i2c_dev *dev)
+{
+        u32 input_clock_khz = clk_get_rate(dev->clk) / 1000;
+        u32 ic_con, hcnt, lcnt;
+
+        /* Disable the adapter */
+        writel(0, dev->base + DW_IC_ENABLE);
+
+        /* set standard and fast speed deviders for high/low periods */
+
+        /* Standard-mode */
+        hcnt = i2c_dw_scl_hcnt(input_clock_khz,
+                                40,     /* tHD;STA = tHIGH = 4.0 us */
+                                3,      /* tf = 0.3 us */
+                                0,      /* 0: DW default, 1: Ideal */
+                                0);     /* No offset */
+        lcnt = i2c_dw_scl_lcnt(input_clock_khz,
+                                47,     /* tLOW = 4.7 us */
+                                3,      /* tf = 0.3 us */
+                                0);     /* No offset */
+        writel(hcnt, dev->base + DW_IC_SS_SCL_HCNT);
+        writel(lcnt, dev->base + DW_IC_SS_SCL_LCNT);
+        dev_dbg(dev->dev, "Standard-mode HCNT:LCNT = %d:%d\n", hcnt, lcnt);
+
+        /* Fast-mode */
+        hcnt = i2c_dw_scl_hcnt(input_clock_khz,
+                                6,      /* tHD;STA = tHIGH = 0.6 us */
+                                3,      /* tf = 0.3 us */
+                                0,      /* 0: DW default, 1: Ideal */
+                                0);     /* No offset */
+        lcnt = i2c_dw_scl_lcnt(input_clock_khz,
+                                13,     /* tLOW = 1.3 us */
+                                3,      /* tf = 0.3 us */
+                                0);     /* No offset */
+        writel(hcnt, dev->base + DW_IC_FS_SCL_HCNT);
+        writel(lcnt, dev->base + DW_IC_FS_SCL_LCNT);
+        dev_dbg(dev->dev, "Fast-mode HCNT:LCNT = %d:%d\n", hcnt, lcnt);
+
+        /* Configure Tx/Rx FIFO threshold levels */
+        writel(dev->tx_fifo_depth - 1, dev->base + DW_IC_TX_TL);
+        writel(0, dev->base + DW_IC_RX_TL);
+
+        /* configure the i2c master */
+        ic_con = DW_IC_CON_MASTER | DW_IC_CON_SLAVE_DISABLE |
+                DW_IC_CON_RESTART_EN | DW_IC_CON_SPEED_FAST;
+        writel(ic_con, dev->base + DW_IC_CON);
+}
+
+/*
+ * Waiting for bus not busy
+ */
+static int i2c_dw_wait_bus_not_busy(struct dw_i2c_dev *dev)
+{
+        int timeout = TIMEOUT;
+
+        while (readl(dev->base + DW_IC_STATUS) & DW_IC_STATUS_ACTIVITY) {
+                if (timeout <= 0) {
+                        dev_warn(dev->dev, "timeout waiting for bus ready\n");
+                        return -ETIMEDOUT;
+                }
+                timeout--;
+                mdelay(1);
+        }
+
+        return 0;
+}
+
+static void i2c_dw_xfer_init(struct dw_i2c_dev *dev)
+{
+        struct i2c_msg *msgs = dev->msgs;
+        u32 ic_con;
+
+        /* Disable the adapter */
+        writel(0, dev->base + DW_IC_ENABLE);
+
+        /* set the slave (target) address */
+        writel(msgs[dev->msg_write_idx].addr, dev->base + DW_IC_TAR);
+
+        /* if the slave address is ten bit address, enable 10BITADDR */
+        ic_con = readl(dev->base + DW_IC_CON);
+        if (msgs[dev->msg_write_idx].flags & I2C_M_TEN)
+                ic_con |= DW_IC_CON_10BITADDR_MASTER;
+        else
+                ic_con &= ~DW_IC_CON_10BITADDR_MASTER;
+        writel(ic_con, dev->base + DW_IC_CON);
+
+        /* Enable the adapter */
+        writel(1, dev->base + DW_IC_ENABLE);
+
+        /* Enable interrupts */
+        writel(DW_IC_INTR_DEFAULT_MASK, dev->base + DW_IC_INTR_MASK);
+}
+
+/*
+ * Initiate (and continue) low level master read/write transaction.
+ * This function is only called from i2c_dw_isr, and pumping i2c_msg
+ * messages into the tx buffer.  Even if the size of i2c_msg data is
+ * longer than the size of the tx buffer, it handles everything.
+ */
+static void
+i2c_dw_xfer_msg(struct dw_i2c_dev *dev)
+{
+        struct i2c_msg *msgs = dev->msgs;
+        u32 intr_mask;
+        int tx_limit, rx_limit;
+        u32 addr = msgs[dev->msg_write_idx].addr;
+        u32 buf_len = dev->tx_buf_len;
+        u8 *buf = dev->tx_buf;;
+
+        intr_mask = DW_IC_INTR_DEFAULT_MASK;
+
+        for (; dev->msg_write_idx < dev->msgs_num; dev->msg_write_idx++) {
+                /*
+                 * if target address has changed, we need to
+                 * reprogram the target address in the i2c
+                 * adapter when we are done with this transfer
+                 */
+                if (msgs[dev->msg_write_idx].addr != addr) {
+                        dev_err(dev->dev,
+                                "%s: invalid target address\n", __func__);
+                        dev->msg_err = -EINVAL;
+                        break;
+                }
+
+                if (msgs[dev->msg_write_idx].len == 0) {
+                        dev_err(dev->dev,
+                                "%s: invalid message length\n", __func__);
+                        dev->msg_err = -EINVAL;
+                        break;
+                }
+
+                if (!(dev->status & STATUS_WRITE_IN_PROGRESS)) {
+                        /* new i2c_msg */
+                        buf = msgs[dev->msg_write_idx].buf;
+                        buf_len = msgs[dev->msg_write_idx].len;
+                }
+
+                tx_limit = dev->tx_fifo_depth - readl(dev->base + DW_IC_TXFLR);
+                rx_limit = dev->rx_fifo_depth - readl(dev->base + DW_IC_RXFLR);
+
+                while (buf_len > 0 && tx_limit > 0 && rx_limit > 0) {
+                        if (msgs[dev->msg_write_idx].flags & I2C_M_RD) {
+                                writel(0x100, dev->base + DW_IC_DATA_CMD);
+                                rx_limit--;
+                        } else
+                                writel(*buf++, dev->base + DW_IC_DATA_CMD);
+                        tx_limit--; buf_len--;
+                }
+
+                dev->tx_buf = buf;
+                dev->tx_buf_len = buf_len;
+
+                if (buf_len > 0) {
+                        /* more bytes to be written */
+                        dev->status |= STATUS_WRITE_IN_PROGRESS;
+                        break;
+                } else
+                        dev->status &= ~STATUS_WRITE_IN_PROGRESS;
+        }
+
+        /*
+         * If i2c_msg index search is completed, we don't need TX_EMPTY
+         * interrupt any more.
+         */
+        if (dev->msg_write_idx == dev->msgs_num)
+                intr_mask &= ~DW_IC_INTR_TX_EMPTY;
+
+        if (dev->msg_err)
+                intr_mask = 0;
+
+        writel(intr_mask, dev->base + DW_IC_INTR_MASK);
+}
+
+static void
+i2c_dw_read(struct dw_i2c_dev *dev)
+{
+        struct i2c_msg *msgs = dev->msgs;
+        int rx_valid;
+
+        for (; dev->msg_read_idx < dev->msgs_num; dev->msg_read_idx++) {
+                u32 len;
+                u8 *buf;
+
+                if (!(msgs[dev->msg_read_idx].flags & I2C_M_RD))
+                        continue;
+
+                if (!(dev->status & STATUS_READ_IN_PROGRESS)) {
+                        len = msgs[dev->msg_read_idx].len;
+                        buf = msgs[dev->msg_read_idx].buf;
+                } else {
+                        len = dev->rx_buf_len;
+                        buf = dev->rx_buf;
+                }
+
+                rx_valid = readl(dev->base + DW_IC_RXFLR);
+
+                for (; len > 0 && rx_valid > 0; len--, rx_valid--)
+                        *buf++ = readl(dev->base + DW_IC_DATA_CMD);
+
+                if (len > 0) {
+                        dev->status |= STATUS_READ_IN_PROGRESS;
+                        dev->rx_buf_len = len;
+                        dev->rx_buf = buf;
+                        return;
+                } else
+                        dev->status &= ~STATUS_READ_IN_PROGRESS;
+        }
+}
+
+static int i2c_dw_handle_tx_abort(struct dw_i2c_dev *dev)
+{
+        unsigned long abort_source = dev->abort_source;
+        int i;
+
+        if (abort_source & DW_IC_TX_ABRT_NOACK) {
+                for_each_set_bit(i, &abort_source, ARRAY_SIZE(abort_sources))
+                        dev_dbg(dev->dev,
+                                "%s: %s\n", __func__, abort_sources[i]);
+                return -EREMOTEIO;
+        }
+
+        for_each_set_bit(i, &abort_source, ARRAY_SIZE(abort_sources))
+                dev_err(dev->dev, "%s: %s\n", __func__, abort_sources[i]);
+
+        if (abort_source & DW_IC_TX_ARB_LOST)
+                return -EAGAIN;
+        else if (abort_source & DW_IC_TX_ABRT_GCALL_READ)
+                return -EINVAL; /* wrong msgs[] data */
+        else
+                return -EIO;
+}
+
+/*
+ * Prepare controller for a transaction and call i2c_dw_xfer_msg
+ */
+static int
+i2c_dw_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
+{
+        struct dw_i2c_dev *dev = i2c_get_adapdata(adap);
+        int ret;
+
+        dev_dbg(dev->dev, "%s: msgs: %d\n", __func__, num);
+
+        mutex_lock(&dev->lock);
+
+        INIT_COMPLETION(dev->cmd_complete);
+        dev->msgs = msgs;
+        dev->msgs_num = num;
+        dev->cmd_err = 0;
+        dev->msg_write_idx = 0;
+        dev->msg_read_idx = 0;
+        dev->msg_err = 0;
+        dev->status = STATUS_IDLE;
+        dev->abort_source = 0;
+
+        ret = i2c_dw_wait_bus_not_busy(dev);
+        if (ret < 0)
+                goto done;
+
+        /* start the transfers */
+        i2c_dw_xfer_init(dev);
+
+        /* wait for tx to complete */
+        ret = wait_for_completion_interruptible_timeout(&dev->cmd_complete, HZ);
+        if (ret == 0) {
+                dev_err(dev->dev, "controller timed out\n");
+                i2c_dw_init(dev);
+                ret = -ETIMEDOUT;
+                goto done;
+        } else if (ret < 0)
+                goto done;
+
+        if (dev->msg_err) {
+                ret = dev->msg_err;
+                goto done;
+        }
+
+        /* no error */
+        if (likely(!dev->cmd_err)) {
+                /* Disable the adapter */
+                writel(0, dev->base + DW_IC_ENABLE);
+                ret = num;
+                goto done;
+        }
+
+        /* We have an error */
+        if (dev->cmd_err == DW_IC_ERR_TX_ABRT) {
+                ret = i2c_dw_handle_tx_abort(dev);
+                goto done;
+        }
+        ret = -EIO;
+
+done:
+        mutex_unlock(&dev->lock);
+
+        return ret;
+}
+
+static u32 i2c_dw_func(struct i2c_adapter *adap)
+{
+        return  I2C_FUNC_I2C |
+                I2C_FUNC_10BIT_ADDR |
+                I2C_FUNC_SMBUS_BYTE |
+                I2C_FUNC_SMBUS_BYTE_DATA |
+                I2C_FUNC_SMBUS_WORD_DATA |
+                I2C_FUNC_SMBUS_I2C_BLOCK;
+}
+
+static u32 i2c_dw_read_clear_intrbits(struct dw_i2c_dev *dev)
+{
+        u32 stat;
+
+        /*
+         * The IC_INTR_STAT register just indicates "enabled" interrupts.
+         * Ths unmasked raw version of interrupt status bits are available
+         * in the IC_RAW_INTR_STAT register.
+         *
+         * That is,
+         *   stat = readl(IC_INTR_STAT);
+         * equals to,
+         *   stat = readl(IC_RAW_INTR_STAT) & readl(IC_INTR_MASK);
+         *
+         * The raw version might be useful for debugging purposes.
+         */
+        stat = readl(dev->base + DW_IC_INTR_STAT);
+
+        /*
+         * Do not use the IC_CLR_INTR register to clear interrupts, or
+         * you'll miss some interrupts, triggered during the period from
+         * readl(IC_INTR_STAT) to readl(IC_CLR_INTR).
+         *
+         * Instead, use the separately-prepared IC_CLR_* registers.
+         */
+        if (stat & DW_IC_INTR_RX_UNDER)
+                readl(dev->base + DW_IC_CLR_RX_UNDER);
+        if (stat & DW_IC_INTR_RX_OVER)
+                readl(dev->base + DW_IC_CLR_RX_OVER);
+        if (stat & DW_IC_INTR_TX_OVER)
+                readl(dev->base + DW_IC_CLR_TX_OVER);
+        if (stat & DW_IC_INTR_RD_REQ)
+                readl(dev->base + DW_IC_CLR_RD_REQ);
+        if (stat & DW_IC_INTR_TX_ABRT) {
+                /*
+                 * The IC_TX_ABRT_SOURCE register is cleared whenever
+                 * the IC_CLR_TX_ABRT is read.  Preserve it beforehand.
+                 */
+                dev->abort_source = readl(dev->base + DW_IC_TX_ABRT_SOURCE);
+                readl(dev->base + DW_IC_CLR_TX_ABRT);
+        }
+        if (stat & DW_IC_INTR_RX_DONE)
+                readl(dev->base + DW_IC_CLR_RX_DONE);
+        if (stat & DW_IC_INTR_ACTIVITY)
+                readl(dev->base + DW_IC_CLR_ACTIVITY);
+        if (stat & DW_IC_INTR_STOP_DET)
+                readl(dev->base + DW_IC_CLR_STOP_DET);
+        if (stat & DW_IC_INTR_START_DET)
+                readl(dev->base + DW_IC_CLR_START_DET);
+        if (stat & DW_IC_INTR_GEN_CALL)
+                readl(dev->base + DW_IC_CLR_GEN_CALL);
+
+        return stat;
+}
+
+/*
+ * Interrupt service routine. This gets called whenever an I2C interrupt
+ * occurs.
+ */
+static irqreturn_t i2c_dw_isr(int this_irq, void *dev_id)
+{
+        struct dw_i2c_dev *dev = dev_id;
+        u32 stat;
+
+        stat = i2c_dw_read_clear_intrbits(dev);
+        dev_dbg(dev->dev, "%s: stat=0x%x\n", __func__, stat);
+
+        if (stat & DW_IC_INTR_TX_ABRT) {
+                dev->cmd_err |= DW_IC_ERR_TX_ABRT;
+                dev->status = STATUS_IDLE;
+
+                /*
+                 * Anytime TX_ABRT is set, the contents of the tx/rx
+                 * buffers are flushed.  Make sure to skip them.
+                 */
+                writel(0, dev->base + DW_IC_INTR_MASK);
+                goto tx_aborted;
+        }
+
+        if (stat & DW_IC_INTR_RX_FULL)
+                i2c_dw_read(dev);
+
+        if (stat & DW_IC_INTR_TX_EMPTY)
+                i2c_dw_xfer_msg(dev);
+
+        /*
+         * No need to modify or disable the interrupt mask here.
+         * i2c_dw_xfer_msg() will take care of it according to
+         * the current transmit status.
+         */
+
+tx_aborted:
+        if ((stat & (DW_IC_INTR_TX_ABRT | DW_IC_INTR_STOP_DET)) || dev->msg_err)
+                complete(&dev->cmd_complete);
+
+        return IRQ_HANDLED;
+}
+
+static struct i2c_algorithm i2c_dw_algo = {
+        .master_xfer    = i2c_dw_xfer,
+        .functionality  = i2c_dw_func,
+};
+
+static int __devinit dw_i2c_probe(struct platform_device *pdev)
+{
+        struct dw_i2c_dev *dev;
+        struct i2c_adapter *adap;
+        struct resource *mem, *ioarea;
+        int irq, r;
+
+        /* NOTE: driver uses the static register mapping */
+        mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        if (!mem) {
+                dev_err(&pdev->dev, "no mem resource?\n");
+                return -EINVAL;
+        }
+
+        irq = platform_get_irq(pdev, 0);
+        if (irq < 0) {
+                dev_err(&pdev->dev, "no irq resource?\n");
+                return irq; /* -ENXIO */
+        }
+
+        ioarea = request_mem_region(mem->start, resource_size(mem),
+                        pdev->name);
+        if (!ioarea) {
+                dev_err(&pdev->dev, "I2C region already claimed\n");
+                return -EBUSY;
+        }
+
+        dev = kzalloc(sizeof(struct dw_i2c_dev), GFP_KERNEL);
+        if (!dev) {
+                r = -ENOMEM;
+                goto err_release_region;
+        }
+
+        init_completion(&dev->cmd_complete);
+        mutex_init(&dev->lock);
+        dev->dev = get_device(&pdev->dev);
+        dev->irq = irq;
+        platform_set_drvdata(pdev, dev);
+
+        dev->clk = clk_get(&pdev->dev, NULL);
+        if (IS_ERR(dev->clk)) {
+                r = -ENODEV;
+                goto err_free_mem;
+        }
+        clk_enable(dev->clk);
+
+        dev->base = ioremap(mem->start, resource_size(mem));
+        if (dev->base == NULL) {
+                dev_err(&pdev->dev, "failure mapping io resources\n");
+                r = -EBUSY;
+                goto err_unuse_clocks;
+        }
+        {
+                u32 param1 = readl(dev->base + DW_IC_COMP_PARAM_1);
+
+                dev->tx_fifo_depth = ((param1 >> 16) & 0xff) + 1;
+                dev->rx_fifo_depth = ((param1 >> 8)  & 0xff) + 1;
+        }
+        i2c_dw_init(dev);
+
+        writel(0, dev->base + DW_IC_INTR_MASK); /* disable IRQ */
+        r = request_irq(dev->irq, i2c_dw_isr, IRQF_DISABLED, pdev->name, dev);
+        if (r) {
+                dev_err(&pdev->dev, "failure requesting irq %i\n", dev->irq);
+                goto err_iounmap;
+        }
+
+        adap = &dev->adapter;
+        i2c_set_adapdata(adap, dev);
+        adap->owner = THIS_MODULE;
+        adap->class = I2C_CLASS_HWMON;
+        strlcpy(adap->name, "Synopsys DesignWare I2C adapter",
+                        sizeof(adap->name));
+        adap->algo = &i2c_dw_algo;
+        adap->dev.parent = &pdev->dev;
+
+        adap->nr = pdev->id;
+        r = i2c_add_numbered_adapter(adap);
+        if (r) {
+                dev_err(&pdev->dev, "failure adding adapter\n");
+                goto err_free_irq;
+        }
+
+        return 0;
+
+err_free_irq:
+        free_irq(dev->irq, dev);
+err_iounmap:
+        iounmap(dev->base);
+err_unuse_clocks:
+        clk_disable(dev->clk);
+        clk_put(dev->clk);
+        dev->clk = NULL;
+err_free_mem:
+        platform_set_drvdata(pdev, NULL);
+        put_device(&pdev->dev);
+        kfree(dev);
+err_release_region:
+        release_mem_region(mem->start, resource_size(mem));
+
+        return r;
+}
+
+static int __devexit dw_i2c_remove(struct platform_device *pdev)
+{
+        struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
+        struct resource *mem;
+
+        platform_set_drvdata(pdev, NULL);
+        i2c_del_adapter(&dev->adapter);
+        put_device(&pdev->dev);
+
+        clk_disable(dev->clk);
+        clk_put(dev->clk);
+        dev->clk = NULL;
+
+        writel(0, dev->base + DW_IC_ENABLE);
+        free_irq(dev->irq, dev);
+        kfree(dev);
+
+        mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        release_mem_region(mem->start, resource_size(mem));
+        return 0;
+}
+
+/* work with hotplug and coldplug */
+MODULE_ALIAS("platform:i2c_designware");
+
+static struct platform_driver dw_i2c_driver = {
+        .remove         = __devexit_p(dw_i2c_remove),
+        .driver         = {
+                .name   = "i2c_designware",
+                .owner  = THIS_MODULE,
+        },
+};
+
+static int __init dw_i2c_init_driver(void)
+{
+        return platform_driver_probe(&dw_i2c_driver, dw_i2c_probe);
+}
+module_init(dw_i2c_init_driver);
+
+static void __exit dw_i2c_exit_driver(void)
+{
+        platform_driver_unregister(&dw_i2c_driver);
+}
+module_exit(dw_i2c_exit_driver);
+
+MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>");
+MODULE_DESCRIPTION("Synopsys DesignWare I2C bus adapter");
+MODULE_LICENSE("GPL");
diff --git a/drivers/i2c/busses/i2c-elektor.c b/drivers/i2c/busses/i2c-elektor.c
index 448b4bf35eb7..e5b1a3bf5b80 100644
--- a/drivers/i2c/busses/i2c-elektor.c
+++ b/drivers/i2c/busses/i2c-elektor.c
@@ -29,7 +29,6 @@
 #include <linux/ioport.h>
 #include <linux/module.h>
 #include <linux/delay.h>
-#include <linux/slab.h>
 #include <linux/init.h>
 #include <linux/interrupt.h>
 #include <linux/pci.h>
@@ -38,8 +37,8 @@
 #include <linux/isa.h>
 #include <linux/i2c.h>
 #include <linux/i2c-algo-pcf.h>
+#include <linux/io.h>
 
-#include <asm/io.h>
 #include <asm/irq.h>
 
 #include "../algos/i2c-algo-pcf.h"
diff --git a/drivers/i2c/busses/i2c-gpio.c b/drivers/i2c/busses/i2c-gpio.c
index 32104eac8d3d..d9aa9a649e35 100644
--- a/drivers/i2c/busses/i2c-gpio.c
+++ b/drivers/i2c/busses/i2c-gpio.c
@@ -12,6 +12,7 @@
 #include <linux/i2c-gpio.h>
 #include <linux/init.h>
 #include <linux/module.h>
+#include <linux/slab.h>
 #include <linux/platform_device.h>
 
 #include <asm/gpio.h>
@@ -210,7 +211,7 @@ static int __init i2c_gpio_init(void)
 
         return ret;
 }
-module_init(i2c_gpio_init);
+subsys_initcall(i2c_gpio_init);
 
 static void __exit i2c_gpio_exit(void)
 {
diff --git a/drivers/i2c/busses/i2c-highlander.c b/drivers/i2c/busses/i2c-highlander.c
index 87ecace415da..3df1bc80f37a 100644
--- a/drivers/i2c/busses/i2c-highlander.c
+++ b/drivers/i2c/busses/i2c-highlander.c
@@ -19,6 +19,7 @@
 #include <linux/completion.h>
 #include <linux/io.h>
 #include <linux/delay.h>
+#include <linux/slab.h>
 
 #define SMCR            0x00
 #define SMCR_START      (1 << 0)
@@ -281,7 +282,6 @@ static int highlander_i2c_smbus_xfer(struct i2c_adapter *adap, u16 addr,
                                   union i2c_smbus_data *data)
 {
         struct highlander_i2c_dev *dev = i2c_get_adapdata(adap);
-        int read = read_write & I2C_SMBUS_READ;
         u16 tmp;
 
         init_completion(&dev->cmd_complete);
@@ -336,11 +336,11 @@ static int highlander_i2c_smbus_xfer(struct i2c_adapter *adap, u16 addr,
         highlander_i2c_done(dev);
 
         /* Set slave address */
-        iowrite16((addr << 1) | read, dev->base + SMSMADR);
+        iowrite16((addr << 1) | read_write, dev->base + SMSMADR);
 
         highlander_i2c_command(dev, command, dev->buf_len);
 
-        if (read)
+        if (read_write == I2C_SMBUS_READ)
                 return highlander_i2c_read(dev);
         else
                 return highlander_i2c_write(dev);
diff --git a/drivers/i2c/busses/i2c-hydra.c b/drivers/i2c/busses/i2c-hydra.c
index bec9b845dd16..9ff1695d8458 100644
--- a/drivers/i2c/busses/i2c-hydra.c
+++ b/drivers/i2c/busses/i2c-hydra.c
@@ -28,7 +28,7 @@
 #include <linux/i2c.h>
 #include <linux/i2c-algo-bit.h>
 #include <linux/init.h>
-#include <asm/io.h>
+#include <linux/io.h>
 #include <asm/hydra.h>
 
 
@@ -105,7 +105,7 @@ static struct i2c_adapter hydra_adap = {
         .algo_data      = &hydra_bit_data,
 };
 
-static struct pci_device_id hydra_ids[] = {
+static const struct pci_device_id hydra_ids[] = {
         { PCI_DEVICE(PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_HYDRA) },
         { 0, }
 };
diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c
index 9d2c5adf5d4f..7979aef7ee7b 100644
--- a/drivers/i2c/busses/i2c-i801.c
+++ b/drivers/i2c/busses/i2c-i801.c
@@ -3,6 +3,8 @@
     Philip Edelbrock <phil@netroedge.com>, and Mark D. Studebaker
     <mdsxyz123@yahoo.com>
     Copyright (C) 2007, 2008   Jean Delvare <khali@linux-fr.org>
+    Copyright (C) 2010         Intel Corporation,
+                               David Woodhouse <dwmw2@infradead.org>
 
     This program is free software; you can redistribute it and/or modify
     it under the terms of the GNU General Public License as published by
@@ -38,10 +40,15 @@
   82801G   (ICH7)       0x27da     32     hard     yes     yes     yes
   82801H   (ICH8)       0x283e     32     hard     yes     yes     yes
   82801I   (ICH9)       0x2930     32     hard     yes     yes     yes
-  Tolapai               0x5032     32     hard     yes     yes     yes
+  EP80579 (Tolapai)     0x5032     32     hard     yes     yes     yes
   ICH10                 0x3a30     32     hard     yes     yes     yes
   ICH10                 0x3a60     32     hard     yes     yes     yes
-  PCH                   0x3b30     32     hard     yes     yes     yes
+  5/3400 Series (PCH)   0x3b30     32     hard     yes     yes     yes
+  Cougar Point (PCH)    0x1c22     32     hard     yes     yes     yes
+  Patsburg (PCH)        0x1d22     32     hard     yes     yes     yes
+  Patsburg (PCH) IDF    0x1d70     32     hard     yes     yes     yes
+  Patsburg (PCH) IDF    0x1d71     32     hard     yes     yes     yes
+  Patsburg (PCH) IDF    0x1d72     32     hard     yes     yes     yes
 
   Features supported by this driver:
   Software PEC                     no
@@ -49,12 +56,11 @@
   Block buffer                     yes
   Block process call transaction   no
   I2C block read transaction       yes  (doesn't use the block buffer)
+  Slave mode                       no
 
   See the file Documentation/i2c/busses/i2c-i801 for details.
 */
 
-/* Note: we assume there can only be one I801, with one SMBus interface */
-
 #include <linux/module.h>
 #include <linux/pci.h>
 #include <linux/kernel.h>
@@ -66,18 +72,19 @@
 #include <linux/acpi.h>
 #include <linux/io.h>
 #include <linux/dmi.h>
+#include <linux/slab.h>
 
 /* I801 SMBus address offsets */
-#define SMBHSTSTS       (0 + i801_smba)
-#define SMBHSTCNT       (2 + i801_smba)
-#define SMBHSTCMD       (3 + i801_smba)
-#define SMBHSTADD       (4 + i801_smba)
-#define SMBHSTDAT0      (5 + i801_smba)
-#define SMBHSTDAT1      (6 + i801_smba)
-#define SMBBLKDAT       (7 + i801_smba)
-#define SMBPEC          (8 + i801_smba)         /* ICH3 and later */
-#define SMBAUXSTS       (12 + i801_smba)        /* ICH4 and later */
-#define SMBAUXCTL       (13 + i801_smba)        /* ICH4 and later */
+#define SMBHSTSTS(p)    (0 + (p)->smba)
+#define SMBHSTCNT(p)    (2 + (p)->smba)
+#define SMBHSTCMD(p)    (3 + (p)->smba)
+#define SMBHSTADD(p)    (4 + (p)->smba)
+#define SMBHSTDAT0(p)   (5 + (p)->smba)
+#define SMBHSTDAT1(p)   (6 + (p)->smba)
+#define SMBBLKDAT(p)    (7 + (p)->smba)
+#define SMBPEC(p)       (8 + (p)->smba)         /* ICH3 and later */
+#define SMBAUXSTS(p)    (12 + (p)->smba)        /* ICH4 and later */
+#define SMBAUXCTL(p)    (13 + (p)->smba)        /* ICH4 and later */
 
 /* PCI Address Constants */
 #define SMBBAR          4
@@ -126,37 +133,57 @@
                                  SMBHSTSTS_BUS_ERR | SMBHSTSTS_DEV_ERR | \
                                  SMBHSTSTS_INTR)
 
-static unsigned long i801_smba;
-static unsigned char i801_original_hstcfg;
+/* Patsburg also has three 'Integrated Device Function' SMBus controllers */
+#define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF0 0x1d70
+#define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF1 0x1d71
+#define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF2 0x1d72
+
+struct i801_priv {
+        struct i2c_adapter adapter;
+        unsigned long smba;
+        unsigned char original_hstcfg;
+        struct pci_dev *pci_dev;
+        unsigned int features;
+};
+
 static struct pci_driver i801_driver;
-static struct pci_dev *I801_dev;
 
 #define FEATURE_SMBUS_PEC       (1 << 0)
 #define FEATURE_BLOCK_BUFFER    (1 << 1)
 #define FEATURE_BLOCK_PROC      (1 << 2)
 #define FEATURE_I2C_BLOCK_READ  (1 << 3)
-static unsigned int i801_features;
+
+static const char *i801_feature_names[] = {
+        "SMBus PEC",
+        "Block buffer",
+        "Block process call",
+        "I2C block read",
+};
+
+static unsigned int disable_features;
+module_param(disable_features, uint, S_IRUGO | S_IWUSR);
+MODULE_PARM_DESC(disable_features, "Disable selected driver features");
 
 /* Make sure the SMBus host is ready to start transmitting.
    Return 0 if it is, -EBUSY if it is not. */
-static int i801_check_pre(void)
+static int i801_check_pre(struct i801_priv *priv)
 {
         int status;
 
-        status = inb_p(SMBHSTSTS);
+        status = inb_p(SMBHSTSTS(priv));
         if (status & SMBHSTSTS_HOST_BUSY) {
-                dev_err(&I801_dev->dev, "SMBus is busy, can't use it!\n");
+                dev_err(&priv->pci_dev->dev, "SMBus is busy, can't use it!\n");
                 return -EBUSY;
         }
 
         status &= STATUS_FLAGS;
         if (status) {
-                dev_dbg(&I801_dev->dev, "Clearing status flags (%02x)\n",
+                dev_dbg(&priv->pci_dev->dev, "Clearing status flags (%02x)\n",
                         status);
-                outb_p(status, SMBHSTSTS);
-                status = inb_p(SMBHSTSTS) & STATUS_FLAGS;
+                outb_p(status, SMBHSTSTS(priv));
+                status = inb_p(SMBHSTSTS(priv)) & STATUS_FLAGS;
                 if (status) {
-                        dev_err(&I801_dev->dev,
+                        dev_err(&priv->pci_dev->dev,
                                 "Failed clearing status flags (%02x)\n",
                                 status);
                         return -EBUSY;
@@ -167,48 +194,50 @@ static int i801_check_pre(void)
 }
 
 /* Convert the status register to an error code, and clear it. */
-static int i801_check_post(int status, int timeout)
+static int i801_check_post(struct i801_priv *priv, int status, int timeout)
 {
         int result = 0;
 
         /* If the SMBus is still busy, we give up */
         if (timeout) {
-                dev_err(&I801_dev->dev, "Transaction timeout\n");
+                dev_err(&priv->pci_dev->dev, "Transaction timeout\n");
                 /* try to stop the current command */
-                dev_dbg(&I801_dev->dev, "Terminating the current operation\n");
-                outb_p(inb_p(SMBHSTCNT) | SMBHSTCNT_KILL, SMBHSTCNT);
+                dev_dbg(&priv->pci_dev->dev, "Terminating the current operation\n");
+                outb_p(inb_p(SMBHSTCNT(priv)) | SMBHSTCNT_KILL,
+                       SMBHSTCNT(priv));
                 msleep(1);
-                outb_p(inb_p(SMBHSTCNT) & (~SMBHSTCNT_KILL), SMBHSTCNT);
+                outb_p(inb_p(SMBHSTCNT(priv)) & (~SMBHSTCNT_KILL),
+                       SMBHSTCNT(priv));
 
                 /* Check if it worked */
-                status = inb_p(SMBHSTSTS);
+                status = inb_p(SMBHSTSTS(priv));
                 if ((status & SMBHSTSTS_HOST_BUSY) ||
                     !(status & SMBHSTSTS_FAILED))
-                        dev_err(&I801_dev->dev,
+                        dev_err(&priv->pci_dev->dev,
                                 "Failed terminating the transaction\n");
-                outb_p(STATUS_FLAGS, SMBHSTSTS);
+                outb_p(STATUS_FLAGS, SMBHSTSTS(priv));
                 return -ETIMEDOUT;
         }
 
         if (status & SMBHSTSTS_FAILED) {
                 result = -EIO;
-                dev_err(&I801_dev->dev, "Transaction failed\n");
+                dev_err(&priv->pci_dev->dev, "Transaction failed\n");
         }
         if (status & SMBHSTSTS_DEV_ERR) {
                 result = -ENXIO;
-                dev_dbg(&I801_dev->dev, "No response\n");
+                dev_dbg(&priv->pci_dev->dev, "No response\n");
         }
         if (status & SMBHSTSTS_BUS_ERR) {
                 result = -EAGAIN;
-                dev_dbg(&I801_dev->dev, "Lost arbitration\n");
+                dev_dbg(&priv->pci_dev->dev, "Lost arbitration\n");
         }
 
         if (result) {
                 /* Clear error flags */
-                outb_p(status & STATUS_FLAGS, SMBHSTSTS);
-                status = inb_p(SMBHSTSTS) & STATUS_FLAGS;
+                outb_p(status & STATUS_FLAGS, SMBHSTSTS(priv));
+                status = inb_p(SMBHSTSTS(priv)) & STATUS_FLAGS;
                 if (status) {
-                        dev_warn(&I801_dev->dev, "Failed clearing status "
+                        dev_warn(&priv->pci_dev->dev, "Failed clearing status "
                                  "flags at end of transaction (%02x)\n",
                                  status);
                 }
@@ -217,86 +246,88 @@ static int i801_check_post(int status, int timeout)
         return result;
 }
 
-static int i801_transaction(int xact)
+static int i801_transaction(struct i801_priv *priv, int xact)
 {
         int status;
         int result;
         int timeout = 0;
 
-        result = i801_check_pre();
+        result = i801_check_pre(priv);
         if (result < 0)
                 return result;
 
         /* the current contents of SMBHSTCNT can be overwritten, since PEC,
          * INTREN, SMBSCMD are passed in xact */
-        outb_p(xact | I801_START, SMBHSTCNT);
+        outb_p(xact | I801_START, SMBHSTCNT(priv));
 
         /* We will always wait for a fraction of a second! */
         do {
                 msleep(1);
-                status = inb_p(SMBHSTSTS);
+                status = inb_p(SMBHSTSTS(priv));
         } while ((status & SMBHSTSTS_HOST_BUSY) && (timeout++ < MAX_TIMEOUT));
 
-        result = i801_check_post(status, timeout > MAX_TIMEOUT);
+        result = i801_check_post(priv, status, timeout > MAX_TIMEOUT);
         if (result < 0)
                 return result;
 
-        outb_p(SMBHSTSTS_INTR, SMBHSTSTS);
+        outb_p(SMBHSTSTS_INTR, SMBHSTSTS(priv));
         return 0;
 }
 
 /* wait for INTR bit as advised by Intel */
-static void i801_wait_hwpec(void)
+static void i801_wait_hwpec(struct i801_priv *priv)
 {
         int timeout = 0;
         int status;
 
         do {
                 msleep(1);
-                status = inb_p(SMBHSTSTS);
+                status = inb_p(SMBHSTSTS(priv));
         } while ((!(status & SMBHSTSTS_INTR))
                  && (timeout++ < MAX_TIMEOUT));
 
         if (timeout > MAX_TIMEOUT)
-                dev_dbg(&I801_dev->dev, "PEC Timeout!\n");
+                dev_dbg(&priv->pci_dev->dev, "PEC Timeout!\n");
 
-        outb_p(status, SMBHSTSTS);
+        outb_p(status, SMBHSTSTS(priv));
 }
 
-static int i801_block_transaction_by_block(union i2c_smbus_data *data,
+static int i801_block_transaction_by_block(struct i801_priv *priv,
+                                           union i2c_smbus_data *data,
                                            char read_write, int hwpec)
 {
         int i, len;
         int status;
 
-        inb_p(SMBHSTCNT); /* reset the data buffer index */
+        inb_p(SMBHSTCNT(priv)); /* reset the data buffer index */
 
         /* Use 32-byte buffer to process this transaction */
         if (read_write == I2C_SMBUS_WRITE) {
                 len = data->block[0];
-                outb_p(len, SMBHSTDAT0);
+                outb_p(len, SMBHSTDAT0(priv));
                 for (i = 0; i < len; i++)
-                        outb_p(data->block[i+1], SMBBLKDAT);
+                        outb_p(data->block[i+1], SMBBLKDAT(priv));
         }
 
-        status = i801_transaction(I801_BLOCK_DATA | ENABLE_INT9 |
+        status = i801_transaction(priv, I801_BLOCK_DATA | ENABLE_INT9 |
                                   I801_PEC_EN * hwpec);
         if (status)
                 return status;
 
         if (read_write == I2C_SMBUS_READ) {
-                len = inb_p(SMBHSTDAT0);
+                len = inb_p(SMBHSTDAT0(priv));
                 if (len < 1 || len > I2C_SMBUS_BLOCK_MAX)
                         return -EPROTO;
 
                 data->block[0] = len;
                 for (i = 0; i < len; i++)
-                        data->block[i + 1] = inb_p(SMBBLKDAT);
+                        data->block[i + 1] = inb_p(SMBBLKDAT(priv));
         }
         return 0;
 }
 
-static int i801_block_transaction_byte_by_byte(union i2c_smbus_data *data,
+static int i801_block_transaction_byte_by_byte(struct i801_priv *priv,
+                                               union i2c_smbus_data *data,
                                                char read_write, int command,
                                                int hwpec)
 {
@@ -306,15 +337,15 @@ static int i801_block_transaction_byte_by_byte(union i2c_smbus_data *data,
         int result;
         int timeout;
 
-        result = i801_check_pre();
+        result = i801_check_pre(priv);
         if (result < 0)
                 return result;
 
         len = data->block[0];
 
         if (read_write == I2C_SMBUS_WRITE) {
-                outb_p(len, SMBHSTDAT0);
-                outb_p(data->block[1], SMBBLKDAT);
+                outb_p(len, SMBHSTDAT0(priv));
+                outb_p(data->block[1], SMBBLKDAT(priv));
         }
 
         for (i = 1; i <= len; i++) {
@@ -330,35 +361,37 @@ static int i801_block_transaction_byte_by_byte(union i2c_smbus_data *data,
                         else
                                 smbcmd = I801_BLOCK_DATA;
                 }
-                outb_p(smbcmd | ENABLE_INT9, SMBHSTCNT);
+                outb_p(smbcmd | ENABLE_INT9, SMBHSTCNT(priv));
 
                 if (i == 1)
-                        outb_p(inb(SMBHSTCNT) | I801_START, SMBHSTCNT);
+                        outb_p(inb(SMBHSTCNT(priv)) | I801_START,
+                               SMBHSTCNT(priv));
 
                 /* We will always wait for a fraction of a second! */
                 timeout = 0;
                 do {
                         msleep(1);
-                        status = inb_p(SMBHSTSTS);
-                }
-                while ((!(status & SMBHSTSTS_BYTE_DONE))
-                       && (timeout++ < MAX_TIMEOUT));
+                        status = inb_p(SMBHSTSTS(priv));
+                } while ((!(status & SMBHSTSTS_BYTE_DONE))
+                         && (timeout++ < MAX_TIMEOUT));
 
-                result = i801_check_post(status, timeout > MAX_TIMEOUT);
+                result = i801_check_post(priv, status, timeout > MAX_TIMEOUT);
                 if (result < 0)
                         return result;
 
                 if (i == 1 && read_write == I2C_SMBUS_READ
                  && command != I2C_SMBUS_I2C_BLOCK_DATA) {
-                        len = inb_p(SMBHSTDAT0);
+                        len = inb_p(SMBHSTDAT0(priv));
                         if (len < 1 || len > I2C_SMBUS_BLOCK_MAX) {
-                                dev_err(&I801_dev->dev,
+                                dev_err(&priv->pci_dev->dev,
                                         "Illegal SMBus block read size %d\n",
                                         len);
                                 /* Recover */
-                                while (inb_p(SMBHSTSTS) & SMBHSTSTS_HOST_BUSY)
-                                        outb_p(SMBHSTSTS_BYTE_DONE, SMBHSTSTS);
-                                outb_p(SMBHSTSTS_INTR, SMBHSTSTS);
+                                while (inb_p(SMBHSTSTS(priv)) &
+                                       SMBHSTSTS_HOST_BUSY)
+                                        outb_p(SMBHSTSTS_BYTE_DONE,
+                                               SMBHSTSTS(priv));
+                                outb_p(SMBHSTSTS_INTR, SMBHSTSTS(priv));
                                 return -EPROTO;
                         }
                         data->block[0] = len;
@@ -366,27 +399,28 @@ static int i801_block_transaction_byte_by_byte(union i2c_smbus_data *data,
 
                 /* Retrieve/store value in SMBBLKDAT */
                 if (read_write == I2C_SMBUS_READ)
-                        data->block[i] = inb_p(SMBBLKDAT);
+                        data->block[i] = inb_p(SMBBLKDAT(priv));
                 if (read_write == I2C_SMBUS_WRITE && i+1 <= len)
-                        outb_p(data->block[i+1], SMBBLKDAT);
+                        outb_p(data->block[i+1], SMBBLKDAT(priv));
 
                 /* signals SMBBLKDAT ready */
-                outb_p(SMBHSTSTS_BYTE_DONE | SMBHSTSTS_INTR, SMBHSTSTS);
+                outb_p(SMBHSTSTS_BYTE_DONE | SMBHSTSTS_INTR, SMBHSTSTS(priv));
         }
 
         return 0;
 }
 
-static int i801_set_block_buffer_mode(void)
+static int i801_set_block_buffer_mode(struct i801_priv *priv)
 {
-        outb_p(inb_p(SMBAUXCTL) | SMBAUXCTL_E32B, SMBAUXCTL);
-        if ((inb_p(SMBAUXCTL) & SMBAUXCTL_E32B) == 0)
+        outb_p(inb_p(SMBAUXCTL(priv)) | SMBAUXCTL_E32B, SMBAUXCTL(priv));
+        if ((inb_p(SMBAUXCTL(priv)) & SMBAUXCTL_E32B) == 0)
                 return -EIO;
         return 0;
 }
 
 /* Block transaction function */
-static int i801_block_transaction(union i2c_smbus_data *data, char read_write,
+static int i801_block_transaction(struct i801_priv *priv,
+                                  union i2c_smbus_data *data, char read_write,
                                   int command, int hwpec)
 {
         int result = 0;
@@ -395,11 +429,11 @@ static int i801_block_transaction(union i2c_smbus_data *data, char read_write,
         if (command == I2C_SMBUS_I2C_BLOCK_DATA) {
                 if (read_write == I2C_SMBUS_WRITE) {
                         /* set I2C_EN bit in configuration register */
-                        pci_read_config_byte(I801_dev, SMBHSTCFG, &hostc);
-                        pci_write_config_byte(I801_dev, SMBHSTCFG,
+                        pci_read_config_byte(priv->pci_dev, SMBHSTCFG, &hostc);
+                        pci_write_config_byte(priv->pci_dev, SMBHSTCFG,
                                               hostc | SMBHSTCFG_I2C_EN);
-                } else if (!(i801_features & FEATURE_I2C_BLOCK_READ)) {
-                        dev_err(&I801_dev->dev,
+                } else if (!(priv->features & FEATURE_I2C_BLOCK_READ)) {
+                        dev_err(&priv->pci_dev->dev,
                                 "I2C block read is unsupported!\n");
                         return -EOPNOTSUPP;
                 }
@@ -415,114 +449,121 @@ static int i801_block_transaction(union i2c_smbus_data *data, char read_write,
                 data->block[0] = 32;    /* max for SMBus block reads */
         }
 
-        if ((i801_features & FEATURE_BLOCK_BUFFER)
-         && !(command == I2C_SMBUS_I2C_BLOCK_DATA
-              && read_write == I2C_SMBUS_READ)
-         && i801_set_block_buffer_mode() == 0)
-                result = i801_block_transaction_by_block(data, read_write,
-                                                         hwpec);
+        /* Experience has shown that the block buffer can only be used for
+           SMBus (not I2C) block transactions, even though the datasheet
+           doesn't mention this limitation. */
+        if ((priv->features & FEATURE_BLOCK_BUFFER)
+         && command != I2C_SMBUS_I2C_BLOCK_DATA
+         && i801_set_block_buffer_mode(priv) == 0)
+                result = i801_block_transaction_by_block(priv, data,
+                                                         read_write, hwpec);
         else
-                result = i801_block_transaction_byte_by_byte(data, read_write,
+                result = i801_block_transaction_byte_by_byte(priv, data,
+                                                             read_write,
                                                              command, hwpec);
 
         if (result == 0 && hwpec)
-                i801_wait_hwpec();
+                i801_wait_hwpec(priv);
 
         if (command == I2C_SMBUS_I2C_BLOCK_DATA
          && read_write == I2C_SMBUS_WRITE) {
                 /* restore saved configuration register value */
-                pci_write_config_byte(I801_dev, SMBHSTCFG, hostc);
+                pci_write_config_byte(priv->pci_dev, SMBHSTCFG, hostc);
         }
         return result;
 }
 
 /* Return negative errno on error. */
-static s32 i801_access(struct i2c_adapter * adap, u16 addr,
+static s32 i801_access(struct i2c_adapter *adap, u16 addr,
                        unsigned short flags, char read_write, u8 command,
-                       int size, union i2c_smbus_data * data)
+                       int size, union i2c_smbus_data *data)
 {
         int hwpec;
         int block = 0;
         int ret, xact = 0;
+        struct i801_priv *priv = i2c_get_adapdata(adap);
 
-        hwpec = (i801_features & FEATURE_SMBUS_PEC) && (flags & I2C_CLIENT_PEC)
+        hwpec = (priv->features & FEATURE_SMBUS_PEC) && (flags & I2C_CLIENT_PEC)
                 && size != I2C_SMBUS_QUICK
                 && size != I2C_SMBUS_I2C_BLOCK_DATA;
 
         switch (size) {
         case I2C_SMBUS_QUICK:
                 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
-                       SMBHSTADD);
+                       SMBHSTADD(priv));
                 xact = I801_QUICK;
                 break;
         case I2C_SMBUS_BYTE:
                 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
-                       SMBHSTADD);
+                       SMBHSTADD(priv));
                 if (read_write == I2C_SMBUS_WRITE)
-                        outb_p(command, SMBHSTCMD);
+                        outb_p(command, SMBHSTCMD(priv));
                 xact = I801_BYTE;
                 break;
         case I2C_SMBUS_BYTE_DATA:
                 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
-                       SMBHSTADD);
-                outb_p(command, SMBHSTCMD);
+                       SMBHSTADD(priv));
+                outb_p(command, SMBHSTCMD(priv));
                 if (read_write == I2C_SMBUS_WRITE)
-                        outb_p(data->byte, SMBHSTDAT0);
+                        outb_p(data->byte, SMBHSTDAT0(priv));
                 xact = I801_BYTE_DATA;
                 break;
         case I2C_SMBUS_WORD_DATA:
                 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
-                       SMBHSTADD);
-                outb_p(command, SMBHSTCMD);
+                       SMBHSTADD(priv));
+                outb_p(command, SMBHSTCMD(priv));
                 if (read_write == I2C_SMBUS_WRITE) {
-                        outb_p(data->word & 0xff, SMBHSTDAT0);
-                        outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1);
+                        outb_p(data->word & 0xff, SMBHSTDAT0(priv));
+                        outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1(priv));
                 }
                 xact = I801_WORD_DATA;
                 break;
         case I2C_SMBUS_BLOCK_DATA:
                 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
-                       SMBHSTADD);
-                outb_p(command, SMBHSTCMD);
+                       SMBHSTADD(priv));
+                outb_p(command, SMBHSTCMD(priv));
                 block = 1;
                 break;
         case I2C_SMBUS_I2C_BLOCK_DATA:
                 /* NB: page 240 of ICH5 datasheet shows that the R/#W
                  * bit should be cleared here, even when reading */
-                outb_p((addr & 0x7f) << 1, SMBHSTADD);
+                outb_p((addr & 0x7f) << 1, SMBHSTADD(priv));
                 if (read_write == I2C_SMBUS_READ) {
                         /* NB: page 240 of ICH5 datasheet also shows
                          * that DATA1 is the cmd field when reading */
-                        outb_p(command, SMBHSTDAT1);
+                        outb_p(command, SMBHSTDAT1(priv));
                 } else
-                        outb_p(command, SMBHSTCMD);
+                        outb_p(command, SMBHSTCMD(priv));
                 block = 1;
                 break;
         default:
-                dev_err(&I801_dev->dev, "Unsupported transaction %d\n", size);
+                dev_err(&priv->pci_dev->dev, "Unsupported transaction %d\n",
+                        size);
                 return -EOPNOTSUPP;
         }
 
         if (hwpec)      /* enable/disable hardware PEC */
-                outb_p(inb_p(SMBAUXCTL) | SMBAUXCTL_CRC, SMBAUXCTL);
+                outb_p(inb_p(SMBAUXCTL(priv)) | SMBAUXCTL_CRC, SMBAUXCTL(priv));
         else
-                outb_p(inb_p(SMBAUXCTL) & (~SMBAUXCTL_CRC), SMBAUXCTL);
+                outb_p(inb_p(SMBAUXCTL(priv)) & (~SMBAUXCTL_CRC),
+                       SMBAUXCTL(priv));
 
-        if(block)
-                ret = i801_block_transaction(data, read_write, size, hwpec);
+        if (block)
+                ret = i801_block_transaction(priv, data, read_write, size,
+                                             hwpec);
         else
-                ret = i801_transaction(xact | ENABLE_INT9);
+                ret = i801_transaction(priv, xact | ENABLE_INT9);
 
         /* Some BIOSes don't like it when PEC is enabled at reboot or resume
            time, so we forcibly disable it after every transaction. Turn off
            E32B for the same reason. */
         if (hwpec || block)
-                outb_p(inb_p(SMBAUXCTL) & ~(SMBAUXCTL_CRC | SMBAUXCTL_E32B),
-                       SMBAUXCTL);
+                outb_p(inb_p(SMBAUXCTL(priv)) &
+                       ~(SMBAUXCTL_CRC | SMBAUXCTL_E32B), SMBAUXCTL(priv));
 
-        if(block)
+        if (block)
                 return ret;
-        if(ret)
+        if (ret)
                 return ret;
         if ((read_write == I2C_SMBUS_WRITE) || (xact == I801_QUICK))
                 return 0;
@@ -530,10 +571,11 @@ static s32 i801_access(struct i2c_adapter * adap, u16 addr,
         switch (xact & 0x7f) {
         case I801_BYTE: /* Result put in SMBHSTDAT0 */
         case I801_BYTE_DATA:
-                data->byte = inb_p(SMBHSTDAT0);
+                data->byte = inb_p(SMBHSTDAT0(priv));
                 break;
         case I801_WORD_DATA:
-                data->word = inb_p(SMBHSTDAT0) + (inb_p(SMBHSTDAT1) << 8);
+                data->word = inb_p(SMBHSTDAT0(priv)) +
+                             (inb_p(SMBHSTDAT1(priv)) << 8);
                 break;
         }
         return 0;
@@ -542,11 +584,13 @@ static s32 i801_access(struct i2c_adapter * adap, u16 addr,
 
 static u32 i801_func(struct i2c_adapter *adapter)
 {
+        struct i801_priv *priv = i2c_get_adapdata(adapter);
+
         return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
                I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
                I2C_FUNC_SMBUS_BLOCK_DATA | I2C_FUNC_SMBUS_WRITE_I2C_BLOCK |
-               ((i801_features & FEATURE_SMBUS_PEC) ? I2C_FUNC_SMBUS_PEC : 0) |
-               ((i801_features & FEATURE_I2C_BLOCK_READ) ?
+               ((priv->features & FEATURE_SMBUS_PEC) ? I2C_FUNC_SMBUS_PEC : 0) |
+               ((priv->features & FEATURE_I2C_BLOCK_READ) ?
                 I2C_FUNC_SMBUS_READ_I2C_BLOCK : 0);
 }
 
@@ -555,13 +599,7 @@ static const struct i2c_algorithm smbus_algorithm = {
         .functionality  = i801_func,
 };
 
-static struct i2c_adapter i801_adapter = {
-        .owner          = THIS_MODULE,
-        .class          = I2C_CLASS_HWMON | I2C_CLASS_SPD,
-        .algo           = &smbus_algorithm,
-};
-
-static struct pci_device_id i801_ids[] = {
+static const struct pci_device_id i801_ids[] = {
         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AA_3) },
         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AB_3) },
         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_2) },
@@ -574,14 +612,19 @@ static struct pci_device_id i801_ids[] = {
         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB2_17) },
         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH8_5) },
         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9_6) },
-        { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TOLAPAI_1) },
+        { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_EP80579_1) },
         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10_4) },
         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10_5) },
-        { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PCH_SMBUS) },
+        { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_5_3400_SERIES_SMBUS) },
+        { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COUGARPOINT_SMBUS) },
+        { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS) },
+        { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF0) },
+        { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF1) },
+        { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF2) },
         { 0, }
 };
 
-MODULE_DEVICE_TABLE (pci, i801_ids);
+MODULE_DEVICE_TABLE(pci, i801_ids);
 
 #if defined CONFIG_INPUT_APANEL || defined CONFIG_INPUT_APANEL_MODULE
 static unsigned char apanel_addr;
@@ -641,7 +684,7 @@ static void __devinit dmi_check_onboard_device(u8 type, const char *name,
                 /* & ~0x80, ignore enabled/disabled bit */
                 if ((type & ~0x80) != dmi_devices[i].type)
                         continue;
-                if (strcmp(name, dmi_devices[i].name))
+                if (strcasecmp(name, dmi_devices[i].name))
                         continue;
 
                 memset(&info, 0, sizeof(struct i2c_board_info));
@@ -685,36 +728,46 @@ static void __devinit dmi_check_onboard_devices(const struct dmi_header *dm,
 }
 #endif
 
-static int __devinit i801_probe(struct pci_dev *dev, const struct pci_device_id *id)
+static int __devinit i801_probe(struct pci_dev *dev,
+                                const struct pci_device_id *id)
 {
         unsigned char temp;
-        int err;
-#if defined CONFIG_SENSORS_FSCHMD || defined CONFIG_SENSORS_FSCHMD_MODULE
-        const char *vendor;
-#endif
+        int err, i;
+        struct i801_priv *priv;
 
-        I801_dev = dev;
-        i801_features = 0;
+        priv = kzalloc(sizeof(*priv), GFP_KERNEL);
+        if (!priv)
+                return -ENOMEM;
+
+        i2c_set_adapdata(&priv->adapter, priv);
+        priv->adapter.owner = THIS_MODULE;
+        priv->adapter.class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
+        priv->adapter.algo = &smbus_algorithm;
+
+        priv->pci_dev = dev;
         switch (dev->device) {
-        case PCI_DEVICE_ID_INTEL_82801EB_3:
-        case PCI_DEVICE_ID_INTEL_ESB_4:
-        case PCI_DEVICE_ID_INTEL_ICH6_16:
-        case PCI_DEVICE_ID_INTEL_ICH7_17:
-        case PCI_DEVICE_ID_INTEL_ESB2_17:
-        case PCI_DEVICE_ID_INTEL_ICH8_5:
-        case PCI_DEVICE_ID_INTEL_ICH9_6:
-        case PCI_DEVICE_ID_INTEL_TOLAPAI_1:
-        case PCI_DEVICE_ID_INTEL_ICH10_4:
-        case PCI_DEVICE_ID_INTEL_ICH10_5:
-        case PCI_DEVICE_ID_INTEL_PCH_SMBUS:
-                i801_features |= FEATURE_I2C_BLOCK_READ;
+        default:
+                priv->features |= FEATURE_I2C_BLOCK_READ;
                 /* fall through */
         case PCI_DEVICE_ID_INTEL_82801DB_3:
-                i801_features |= FEATURE_SMBUS_PEC;
-                i801_features |= FEATURE_BLOCK_BUFFER;
+                priv->features |= FEATURE_SMBUS_PEC;
+                priv->features |= FEATURE_BLOCK_BUFFER;
+                /* fall through */
+        case PCI_DEVICE_ID_INTEL_82801CA_3:
+        case PCI_DEVICE_ID_INTEL_82801BA_2:
+        case PCI_DEVICE_ID_INTEL_82801AB_3:
+        case PCI_DEVICE_ID_INTEL_82801AA_3:
                 break;
         }
 
+        /* Disable features on user request */
+        for (i = 0; i < ARRAY_SIZE(i801_feature_names); i++) {
+                if (priv->features & disable_features & (1 << i))
+                        dev_notice(&dev->dev, "%s disabled by user\n",
+                                   i801_feature_names[i]);
+        }
+        priv->features &= ~disable_features;
+
         err = pci_enable_device(dev);
         if (err) {
                 dev_err(&dev->dev, "Failed to enable SMBus PCI device (%d)\n",
@@ -723,8 +776,8 @@ static int __devinit i801_probe(struct pci_dev *dev, const struct pci_device_id
         }
 
         /* Determine the address of the SMBus area */
-        i801_smba = pci_resource_start(dev, SMBBAR);
-        if (!i801_smba) {
+        priv->smba = pci_resource_start(dev, SMBBAR);
+        if (!priv->smba) {
                 dev_err(&dev->dev, "SMBus base address uninitialized, "
                         "upgrade BIOS\n");
                 err = -ENODEV;
@@ -732,25 +785,27 @@ static int __devinit i801_probe(struct pci_dev *dev, const struct pci_device_id
         }
 
         err = acpi_check_resource_conflict(&dev->resource[SMBBAR]);
-        if (err)
+        if (err) {
+                err = -ENODEV;
                 goto exit;
+        }
 
         err = pci_request_region(dev, SMBBAR, i801_driver.name);
         if (err) {
                 dev_err(&dev->dev, "Failed to request SMBus region "
-                        "0x%lx-0x%Lx\n", i801_smba,
+                        "0x%lx-0x%Lx\n", priv->smba,
                         (unsigned long long)pci_resource_end(dev, SMBBAR));
                 goto exit;
         }
 
-        pci_read_config_byte(I801_dev, SMBHSTCFG, &temp);
-        i801_original_hstcfg = temp;
+        pci_read_config_byte(priv->pci_dev, SMBHSTCFG, &temp);
+        priv->original_hstcfg = temp;
         temp &= ~SMBHSTCFG_I2C_EN;      /* SMBus timing */
         if (!(temp & SMBHSTCFG_HST_EN)) {
                 dev_info(&dev->dev, "Enabling SMBus device\n");
                 temp |= SMBHSTCFG_HST_EN;
         }
-        pci_write_config_byte(I801_dev, SMBHSTCFG, temp);
+        pci_write_config_byte(priv->pci_dev, SMBHSTCFG, temp);
 
         if (temp & SMBHSTCFG_SMB_SMI_EN)
                 dev_dbg(&dev->dev, "SMBus using interrupt SMI#\n");
@@ -758,16 +813,19 @@ static int __devinit i801_probe(struct pci_dev *dev, const struct pci_device_id
                 dev_dbg(&dev->dev, "SMBus using PCI Interrupt\n");
 
         /* Clear special mode bits */
-        if (i801_features & (FEATURE_SMBUS_PEC | FEATURE_BLOCK_BUFFER))
-                outb_p(inb_p(SMBAUXCTL) & ~(SMBAUXCTL_CRC | SMBAUXCTL_E32B),
-                       SMBAUXCTL);
+        if (priv->features & (FEATURE_SMBUS_PEC | FEATURE_BLOCK_BUFFER))
+                outb_p(inb_p(SMBAUXCTL(priv)) &
+                       ~(SMBAUXCTL_CRC | SMBAUXCTL_E32B), SMBAUXCTL(priv));
 
         /* set up the sysfs linkage to our parent device */
-        i801_adapter.dev.parent = &dev->dev;
+        priv->adapter.dev.parent = &dev->dev;
 
-        snprintf(i801_adapter.name, sizeof(i801_adapter.name),
-                "SMBus I801 adapter at %04lx", i801_smba);
-        err = i2c_add_adapter(&i801_adapter);
+        /* Retry up to 3 times on lost arbitration */
+        priv->adapter.retries = 3;
+
+        snprintf(priv->adapter.name, sizeof(priv->adapter.name),
+                "SMBus I801 adapter at %04lx", priv->smba);
+        err = i2c_add_adapter(&priv->adapter);
         if (err) {
                 dev_err(&dev->dev, "Failed to add SMBus adapter\n");
                 goto exit_release;
@@ -781,28 +839,33 @@ static int __devinit i801_probe(struct pci_dev *dev, const struct pci_device_id
                 memset(&info, 0, sizeof(struct i2c_board_info));
                 info.addr = apanel_addr;
                 strlcpy(info.type, "fujitsu_apanel", I2C_NAME_SIZE);
-                i2c_new_device(&i801_adapter, &info);
+                i2c_new_device(&priv->adapter, &info);
         }
 #endif
 #if defined CONFIG_SENSORS_FSCHMD || defined CONFIG_SENSORS_FSCHMD_MODULE
-        vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
-        if (vendor && !strcmp(vendor, "FUJITSU SIEMENS"))
-                dmi_walk(dmi_check_onboard_devices, &i801_adapter);
+        if (dmi_name_in_vendors("FUJITSU"))
+                dmi_walk(dmi_check_onboard_devices, &priv->adapter);
 #endif
 
+        pci_set_drvdata(dev, priv);
         return 0;
 
 exit_release:
         pci_release_region(dev, SMBBAR);
 exit:
+        kfree(priv);
         return err;
 }
 
 static void __devexit i801_remove(struct pci_dev *dev)
 {
-        i2c_del_adapter(&i801_adapter);
-        pci_write_config_byte(I801_dev, SMBHSTCFG, i801_original_hstcfg);
+        struct i801_priv *priv = pci_get_drvdata(dev);
+
+        i2c_del_adapter(&priv->adapter);
+        pci_write_config_byte(dev, SMBHSTCFG, priv->original_hstcfg);
         pci_release_region(dev, SMBBAR);
+        pci_set_drvdata(dev, NULL);
+        kfree(priv);
         /*
          * do not call pci_disable_device(dev) since it can cause hard hangs on
          * some systems during power-off (eg. Fujitsu-Siemens Lifebook E8010)
@@ -812,8 +875,10 @@ static void __devexit i801_remove(struct pci_dev *dev)
 #ifdef CONFIG_PM
 static int i801_suspend(struct pci_dev *dev, pm_message_t mesg)
 {
+        struct i801_priv *priv = pci_get_drvdata(dev);
+
         pci_save_state(dev);
-        pci_write_config_byte(dev, SMBHSTCFG, i801_original_hstcfg);
+        pci_write_config_byte(dev, SMBHSTCFG, priv->original_hstcfg);
         pci_set_power_state(dev, pci_choose_state(dev, mesg));
         return 0;
 }
diff --git a/drivers/i2c/busses/i2c-ibm_iic.c b/drivers/i2c/busses/i2c-ibm_iic.c
index e4476743f203..6e3c38240336 100644
--- a/drivers/i2c/busses/i2c-ibm_iic.c
+++ b/drivers/i2c/busses/i2c-ibm_iic.c
@@ -39,9 +39,8 @@
 #include <linux/init.h>
 #include <linux/interrupt.h>
 #include <asm/irq.h>
-#include <asm/io.h>
+#include <linux/io.h>
 #include <linux/i2c.h>
-#include <linux/i2c-id.h>
 #include <linux/of_platform.h>
 #include <linux/of_i2c.h>
 
@@ -85,10 +84,11 @@ static void dump_iic_regs(const char* header, struct ibm_iic_private* dev)
 {
         volatile struct iic_regs __iomem *iic = dev->vaddr;
         printk(KERN_DEBUG "ibm-iic%d: %s\n", dev->idx, header);
-        printk(KERN_DEBUG "  cntl     = 0x%02x, mdcntl = 0x%02x\n"
-               KERN_DEBUG "  sts      = 0x%02x, extsts = 0x%02x\n"
-               KERN_DEBUG "  clkdiv   = 0x%02x, xfrcnt = 0x%02x\n"
-               KERN_DEBUG "  xtcntlss = 0x%02x, directcntl = 0x%02x\n",
+        printk(KERN_DEBUG
+               "  cntl     = 0x%02x, mdcntl = 0x%02x\n"
+               "  sts      = 0x%02x, extsts = 0x%02x\n"
+               "  clkdiv   = 0x%02x, xfrcnt = 0x%02x\n"
+               "  xtcntlss = 0x%02x, directcntl = 0x%02x\n",
                 in_8(&iic->cntl), in_8(&iic->mdcntl), in_8(&iic->sts),
                 in_8(&iic->extsts), in_8(&iic->clkdiv), in_8(&iic->xfrcnt),
                 in_8(&iic->xtcntlss), in_8(&iic->directcntl));
@@ -660,19 +660,19 @@ static inline u8 iic_clckdiv(unsigned int opb)
         return (u8)((opb + 9) / 10 - 1);
 }
 
-static int __devinit iic_request_irq(struct of_device *ofdev,
+static int __devinit iic_request_irq(struct platform_device *ofdev,
                                      struct ibm_iic_private *dev)
 {
-        struct device_node *np = ofdev->node;
+        struct device_node *np = ofdev->dev.of_node;
         int irq;
 
         if (iic_force_poll)
-                return NO_IRQ;
+                return 0;
 
         irq = irq_of_parse_and_map(np, 0);
-        if (irq == NO_IRQ) {
+        if (!irq) {
                 dev_err(&ofdev->dev, "irq_of_parse_and_map failed\n");
-                return NO_IRQ;
+                return 0;
         }
 
         /* Disable interrupts until we finish initialization, assumes
@@ -682,7 +682,7 @@ static int __devinit iic_request_irq(struct of_device *ofdev,
         if (request_irq(irq, iic_handler, 0, "IBM IIC", dev)) {
                 dev_err(&ofdev->dev, "request_irq %d failed\n", irq);
                 /* Fallback to the polling mode */
-                return NO_IRQ;
+                return 0;
         }
 
         return irq;
@@ -691,10 +691,10 @@ static int __devinit iic_request_irq(struct of_device *ofdev,
 /*
  * Register single IIC interface
  */
-static int __devinit iic_probe(struct of_device *ofdev,
+static int __devinit iic_probe(struct platform_device *ofdev,
                                const struct of_device_id *match)
 {
-        struct device_node *np = ofdev->node;
+        struct device_node *np = ofdev->dev.of_node;
         struct ibm_iic_private *dev;
         struct i2c_adapter *adap;
         const u32 *freq;
@@ -718,7 +718,7 @@ static int __devinit iic_probe(struct of_device *ofdev,
         init_waitqueue_head(&dev->wq);
 
         dev->irq = iic_request_irq(ofdev, dev);
-        if (dev->irq == NO_IRQ)
+        if (!dev->irq)
                 dev_warn(&ofdev->dev, "using polling mode\n");
 
         /* Board specific settings */
@@ -744,6 +744,7 @@ static int __devinit iic_probe(struct of_device *ofdev,
         /* Register it with i2c layer */
         adap = &dev->adap;
         adap->dev.parent = &ofdev->dev;
+        adap->dev.of_node = of_node_get(np);
         strlcpy(adap->name, "IBM IIC", sizeof(adap->name));
         i2c_set_adapdata(adap, dev);
         adap->class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
@@ -760,12 +761,12 @@ static int __devinit iic_probe(struct of_device *ofdev,
                  dev->fast_mode ? "fast (400 kHz)" : "standard (100 kHz)");
 
         /* Now register all the child nodes */
-        of_register_i2c_devices(adap, np);
+        of_i2c_register_devices(adap);
 
         return 0;
 
 error_cleanup:
-        if (dev->irq != NO_IRQ) {
+        if (dev->irq) {
                 iic_interrupt_mode(dev, 0);
                 free_irq(dev->irq, dev);
         }
@@ -781,7 +782,7 @@ error_cleanup:
 /*
  * Cleanup initialized IIC interface
  */
-static int __devexit iic_remove(struct of_device *ofdev)
+static int __devexit iic_remove(struct platform_device *ofdev)
 {
         struct ibm_iic_private *dev = dev_get_drvdata(&ofdev->dev);
 
@@ -789,7 +790,7 @@ static int __devexit iic_remove(struct of_device *ofdev)
 
         i2c_del_adapter(&dev->adap);
 
-        if (dev->irq != NO_IRQ) {
+        if (dev->irq) {
                 iic_interrupt_mode(dev, 0);
                 free_irq(dev->irq, dev);
         }
@@ -806,8 +807,11 @@ static const struct of_device_id ibm_iic_match[] = {
 };
 
 static struct of_platform_driver ibm_iic_driver = {
-        .name   = "ibm-iic",
-        .match_table = ibm_iic_match,
+        .driver = {
+                .name = "ibm-iic",
+                .owner = THIS_MODULE,
+                .of_match_table = ibm_iic_match,
+        },
         .probe  = iic_probe,
         .remove = __devexit_p(iic_remove),
 };
diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c
index 0b486a63460d..4c2a62b75b5c 100644
--- a/drivers/i2c/busses/i2c-imx.c
+++ b/drivers/i2c/busses/i2c-imx.c
@@ -47,6 +47,7 @@
 #include <linux/sched.h>
 #include <linux/platform_device.h>
 #include <linux/clk.h>
+#include <linux/slab.h>
 
 #include <mach/irqs.h>
 #include <mach/hardware.h>
@@ -120,28 +121,35 @@ struct imx_i2c_struct {
         wait_queue_head_t       queue;
         unsigned long           i2csr;
         unsigned int            disable_delay;
+        int                     stopped;
+        unsigned int            ifdr; /* IMX_I2C_IFDR */
 };
 
 /** Functions for IMX I2C adapter driver ***************************************
 *******************************************************************************/
 
-static int i2c_imx_bus_busy(struct imx_i2c_struct *i2c_imx)
+static int i2c_imx_bus_busy(struct imx_i2c_struct *i2c_imx, int for_busy)
 {
         unsigned long orig_jiffies = jiffies;
+        unsigned int temp;
 
         dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__);
 
-        /* wait for bus not busy */
-        while (readb(i2c_imx->base + IMX_I2C_I2SR) & I2SR_IBB) {
+        while (1) {
+                temp = readb(i2c_imx->base + IMX_I2C_I2SR);
+                if (for_busy && (temp & I2SR_IBB))
+                        break;
+                if (!for_busy && !(temp & I2SR_IBB))
+                        break;
                 if (signal_pending(current)) {
                         dev_dbg(&i2c_imx->adapter.dev,
                                 "<%s> I2C Interrupted\n", __func__);
                         return -EINTR;
                 }
-                if (time_after(jiffies, orig_jiffies + HZ / 1000)) {
+                if (time_after(jiffies, orig_jiffies + msecs_to_jiffies(500))) {
                         dev_dbg(&i2c_imx->adapter.dev,
                                 "<%s> I2C bus is busy\n", __func__);
-                        return -EIO;
+                        return -ETIMEDOUT;
                 }
                 schedule();
         }
@@ -151,15 +159,9 @@ static int i2c_imx_bus_busy(struct imx_i2c_struct *i2c_imx)
 
 static int i2c_imx_trx_complete(struct imx_i2c_struct *i2c_imx)
 {
-        int result;
-
-        result = wait_event_interruptible_timeout(i2c_imx->queue,
-                i2c_imx->i2csr & I2SR_IIF, HZ / 10);
+        wait_event_timeout(i2c_imx->queue, i2c_imx->i2csr & I2SR_IIF, HZ / 10);
 
-        if (unlikely(result < 0)) {
-                dev_dbg(&i2c_imx->adapter.dev, "<%s> result < 0\n", __func__);
-                return result;
-        } else if (unlikely(!(i2c_imx->i2csr & I2SR_IIF))) {
+        if (unlikely(!(i2c_imx->i2csr & I2SR_IIF))) {
                 dev_dbg(&i2c_imx->adapter.dev, "<%s> Timeout\n", __func__);
                 return -ETIMEDOUT;
         }
@@ -179,41 +181,63 @@ static int i2c_imx_acked(struct imx_i2c_struct *i2c_imx)
         return 0;
 }
 
-static void i2c_imx_start(struct imx_i2c_struct *i2c_imx)
+static int i2c_imx_start(struct imx_i2c_struct *i2c_imx)
 {
         unsigned int temp = 0;
+        int result;
 
         dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__);
 
+        clk_enable(i2c_imx->clk);
+        writeb(i2c_imx->ifdr, i2c_imx->base + IMX_I2C_IFDR);
         /* Enable I2C controller */
+        writeb(0, i2c_imx->base + IMX_I2C_I2SR);
         writeb(I2CR_IEN, i2c_imx->base + IMX_I2C_I2CR);
+
+        /* Wait controller to be stable */
+        udelay(50);
+
         /* Start I2C transaction */
         temp = readb(i2c_imx->base + IMX_I2C_I2CR);
         temp |= I2CR_MSTA;
         writeb(temp, i2c_imx->base + IMX_I2C_I2CR);
+        result = i2c_imx_bus_busy(i2c_imx, 1);
+        if (result)
+                return result;
+        i2c_imx->stopped = 0;
+
         temp |= I2CR_IIEN | I2CR_MTX | I2CR_TXAK;
         writeb(temp, i2c_imx->base + IMX_I2C_I2CR);
+        return result;
 }
 
 static void i2c_imx_stop(struct imx_i2c_struct *i2c_imx)
 {
         unsigned int temp = 0;
 
-        /* Stop I2C transaction */
-        dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__);
-        temp = readb(i2c_imx->base + IMX_I2C_I2CR);
-        temp &= ~I2CR_MSTA;
-        writeb(temp, i2c_imx->base + IMX_I2C_I2CR);
-        /* setup chip registers to defaults */
-        writeb(I2CR_IEN, i2c_imx->base + IMX_I2C_I2CR);
-        writeb(0, i2c_imx->base + IMX_I2C_I2SR);
-        /*
-         * This delay caused by an i.MXL hardware bug.
-         * If no (or too short) delay, no "STOP" bit will be generated.
-         */
-        udelay(i2c_imx->disable_delay);
+        if (!i2c_imx->stopped) {
+                /* Stop I2C transaction */
+                dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__);
+                temp = readb(i2c_imx->base + IMX_I2C_I2CR);
+                temp &= ~(I2CR_MSTA | I2CR_MTX);
+                writeb(temp, i2c_imx->base + IMX_I2C_I2CR);
+        }
+        if (cpu_is_mx1()) {
+                /*
+                 * This delay caused by an i.MXL hardware bug.
+                 * If no (or too short) delay, no "STOP" bit will be generated.
+                 */
+                udelay(i2c_imx->disable_delay);
+        }
+
+        if (!i2c_imx->stopped) {
+                i2c_imx_bus_busy(i2c_imx, 0);
+                i2c_imx->stopped = 1;
+        }
+
         /* Disable I2C controller */
         writeb(0, i2c_imx->base + IMX_I2C_I2CR);
+        clk_disable(i2c_imx->clk);
 }
 
 static void __init i2c_imx_set_clk(struct imx_i2c_struct *i2c_imx,
@@ -233,8 +257,8 @@ static void __init i2c_imx_set_clk(struct imx_i2c_struct *i2c_imx,
         else
                 for (i = 0; i2c_clk_div[i][0] < div; i++);
 
-        /* Write divider value to register */
-        writeb(i2c_clk_div[i][1], i2c_imx->base + IMX_I2C_IFDR);
+        /* Store divider value */
+        i2c_imx->ifdr = i2c_clk_div[i][1];
 
         /*
          * There dummy delay is calculated.
@@ -265,7 +289,7 @@ static irqreturn_t i2c_imx_isr(int irq, void *dev_id)
                 i2c_imx->i2csr = temp;
                 temp &= ~I2SR_IIF;
                 writeb(temp, i2c_imx->base + IMX_I2C_I2SR);
-                wake_up_interruptible(&i2c_imx->queue);
+                wake_up(&i2c_imx->queue);
                 return IRQ_HANDLED;
         }
 
@@ -341,11 +365,15 @@ static int i2c_imx_read(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs)
                 if (result)
                         return result;
                 if (i == (msgs->len - 1)) {
+                        /* It must generate STOP before read I2DR to prevent
+                           controller from generating another clock cycle */
                         dev_dbg(&i2c_imx->adapter.dev,
                                 "<%s> clear MSTA\n", __func__);
                         temp = readb(i2c_imx->base + IMX_I2C_I2CR);
-                        temp &= ~I2CR_MSTA;
+                        temp &= ~(I2CR_MSTA | I2CR_MTX);
                         writeb(temp, i2c_imx->base + IMX_I2C_I2CR);
+                        i2c_imx_bus_busy(i2c_imx, 0);
+                        i2c_imx->stopped = 1;
                 } else if (i == (msgs->len - 2)) {
                         dev_dbg(&i2c_imx->adapter.dev,
                                 "<%s> set TXAK\n", __func__);
@@ -370,14 +398,11 @@ static int i2c_imx_xfer(struct i2c_adapter *adapter,
 
         dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__);
 
-        /* Check if i2c bus is not busy */
-        result = i2c_imx_bus_busy(i2c_imx);
+        /* Start I2C transfer */
+        result = i2c_imx_start(i2c_imx);
         if (result)
                 goto fail0;
 
-        /* Start I2C transfer */
-        i2c_imx_start(i2c_imx);
-
         /* read/write data */
         for (i = 0; i < num; i++) {
                 if (i) {
@@ -386,6 +411,9 @@ static int i2c_imx_xfer(struct i2c_adapter *adapter,
                         temp = readb(i2c_imx->base + IMX_I2C_I2CR);
                         temp |= I2CR_RSTA;
                         writeb(temp, i2c_imx->base + IMX_I2C_I2CR);
+                        result =  i2c_imx_bus_busy(i2c_imx, 1);
+                        if (result)
+                                goto fail0;
                 }
                 dev_dbg(&i2c_imx->adapter.dev,
                         "<%s> transfer message: %d\n", __func__, i);
@@ -410,6 +438,8 @@ static int i2c_imx_xfer(struct i2c_adapter *adapter,
                         result = i2c_imx_read(i2c_imx, &msgs[i]);
                 else
                         result = i2c_imx_write(i2c_imx, &msgs[i]);
+                if (result)
+                        goto fail0;
         }
 
 fail0:
@@ -464,22 +494,23 @@ static int __init i2c_imx_probe(struct platform_device *pdev)
         }
 
         res_size = resource_size(res);
+
+        if (!request_mem_region(res->start, res_size, DRIVER_NAME)) {
+                ret = -EBUSY;
+                goto fail0;
+        }
+
         base = ioremap(res->start, res_size);
         if (!base) {
                 dev_err(&pdev->dev, "ioremap failed\n");
                 ret = -EIO;
-                goto fail0;
+                goto fail1;
         }
 
         i2c_imx = kzalloc(sizeof(struct imx_i2c_struct), GFP_KERNEL);
         if (!i2c_imx) {
                 dev_err(&pdev->dev, "can't allocate interface\n");
                 ret = -ENOMEM;
-                goto fail1;
-        }
-
-        if (!request_mem_region(res->start, res_size, DRIVER_NAME)) {
-                ret = -EBUSY;
                 goto fail2;
         }
 
@@ -500,7 +531,6 @@ static int __init i2c_imx_probe(struct platform_device *pdev)
                 dev_err(&pdev->dev, "can't get I2C clock\n");
                 goto fail3;
         }
-        clk_enable(i2c_imx->clk);
 
         /* Request IRQ */
         ret = request_irq(i2c_imx->irq, i2c_imx_isr, 0, pdev->name, i2c_imx);
@@ -549,14 +579,13 @@ static int __init i2c_imx_probe(struct platform_device *pdev)
 fail5:
         free_irq(i2c_imx->irq, i2c_imx);
 fail4:
-        clk_disable(i2c_imx->clk);
         clk_put(i2c_imx->clk);
 fail3:
-        release_mem_region(i2c_imx->res->start, resource_size(res));
-fail2:
         kfree(i2c_imx);
-fail1:
+fail2:
         iounmap(base);
+fail1:
+        release_mem_region(res->start, resource_size(res));
 fail0:
         if (pdata && pdata->exit)
                 pdata->exit(&pdev->dev);
@@ -586,18 +615,15 @@ static int __exit i2c_imx_remove(struct platform_device *pdev)
         if (pdata && pdata->exit)
                 pdata->exit(&pdev->dev);
 
-        /* Disable I2C clock */
-        clk_disable(i2c_imx->clk);
         clk_put(i2c_imx->clk);
 
-        release_mem_region(i2c_imx->res->start, resource_size(i2c_imx->res));
         iounmap(i2c_imx->base);
+        release_mem_region(i2c_imx->res->start, resource_size(i2c_imx->res));
         kfree(i2c_imx);
         return 0;
 }
 
 static struct platform_driver i2c_imx_driver = {
-        .probe          = i2c_imx_probe,
         .remove         = __exit_p(i2c_imx_remove),
         .driver = {
                 .name   = DRIVER_NAME,
@@ -609,13 +635,12 @@ static int __init i2c_adap_imx_init(void)
 {
         return platform_driver_probe(&i2c_imx_driver, i2c_imx_probe);
 }
+subsys_initcall(i2c_adap_imx_init);
 
 static void __exit i2c_adap_imx_exit(void)
 {
         platform_driver_unregister(&i2c_imx_driver);
 }
-
-module_init(i2c_adap_imx_init);
 module_exit(i2c_adap_imx_exit);
 
 MODULE_LICENSE("GPL");
diff --git a/drivers/i2c/busses/i2c-intel-mid.c b/drivers/i2c/busses/i2c-intel-mid.c
new file mode 100644
index 000000000000..c71492782bbd
--- /dev/null
+++ b/drivers/i2c/busses/i2c-intel-mid.c
@@ -0,0 +1,1135 @@
+/*
+ * Support for Moorestown/Medfield I2C chip
+ *
+ * Copyright (c) 2009 Intel Corporation.
+ * Copyright (c) 2009 Synopsys. Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License, version
+ * 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT ANY
+ * WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
+ * FOR A PARTICULAR PURPOSE.  See the GNU General Public License for more
+ * details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc., 51
+ * Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/err.h>
+#include <linux/slab.h>
+#include <linux/stat.h>
+#include <linux/delay.h>
+#include <linux/i2c.h>
+#include <linux/init.h>
+#include <linux/pci.h>
+#include <linux/interrupt.h>
+#include <linux/pm_runtime.h>
+#include <linux/io.h>
+
+#define DRIVER_NAME     "i2c-intel-mid"
+#define VERSION         "Version 0.5ac2"
+#define PLATFORM        "Moorestown/Medfield"
+
+/* Tables use: 0 Moorestown, 1 Medfield */
+#define NUM_PLATFORMS   2
+enum platform_enum {
+        MOORESTOWN = 0,
+        MEDFIELD = 1,
+};
+
+enum mid_i2c_status {
+        STATUS_IDLE = 0,
+        STATUS_READ_START,
+        STATUS_READ_IN_PROGRESS,
+        STATUS_READ_SUCCESS,
+        STATUS_WRITE_START,
+        STATUS_WRITE_SUCCESS,
+        STATUS_XFER_ABORT,
+        STATUS_STANDBY
+};
+
+/**
+ * struct intel_mid_i2c_private - per device I²C context
+ * @adap: core i2c layer adapter information
+ * @dev: device reference for power management
+ * @base: register base
+ * @speed: speed mode for this port
+ * @complete: completion object for transaction wait
+ * @abort: reason for last abort
+ * @rx_buf: pointer into working receive buffer
+ * @rx_buf_len: receive buffer length
+ * @status: adapter state machine
+ * @msg: the message we are currently processing
+ * @platform: the MID device type we are part of
+ * @lock: transaction serialization
+ *
+ * We allocate one of these per device we discover, it holds the core
+ * i2c layer objects and the data we need to track privately.
+ */
+struct intel_mid_i2c_private {
+        struct i2c_adapter adap;
+        struct device *dev;
+        void __iomem *base;
+        int speed;
+        struct completion complete;
+        int abort;
+        u8 *rx_buf;
+        int rx_buf_len;
+        enum mid_i2c_status status;
+        struct i2c_msg *msg;
+        enum platform_enum platform;
+        struct mutex lock;
+};
+
+#define NUM_SPEEDS              3
+
+#define ACTIVE                  0
+#define STANDBY                 1
+
+
+/* Control register */
+#define IC_CON                  0x00
+#define SLV_DIS                 (1 << 6)        /* Disable slave mode */
+#define RESTART                 (1 << 5)        /* Send a Restart condition */
+#define ADDR_10BIT              (1 << 4)        /* 10-bit addressing */
+#define STANDARD_MODE           (1 << 1)        /* standard mode */
+#define FAST_MODE               (2 << 1)        /* fast mode */
+#define HIGH_MODE               (3 << 1)        /* high speed mode */
+#define MASTER_EN               (1 << 0)        /* Master mode */
+
+/* Target address register */
+#define IC_TAR                  0x04
+#define IC_TAR_10BIT_ADDR       (1 << 12)       /* 10-bit addressing */
+#define IC_TAR_SPECIAL          (1 << 11)       /* Perform special I2C cmd */
+#define IC_TAR_GC_OR_START      (1 << 10)       /* 0: Gerneral Call Address */
+                                                /* 1: START BYTE */
+/* Slave Address Register */
+#define IC_SAR                  0x08            /* Not used in Master mode */
+
+/* High Speed Master Mode Code Address Register */
+#define IC_HS_MADDR             0x0c
+
+/* Rx/Tx Data Buffer and Command Register */
+#define IC_DATA_CMD             0x10
+#define IC_RD                   (1 << 8)        /* 1: Read 0: Write */
+
+/* Standard Speed Clock SCL High Count Register */
+#define IC_SS_SCL_HCNT          0x14
+
+/* Standard Speed Clock SCL Low Count Register */
+#define IC_SS_SCL_LCNT          0x18
+
+/* Fast Speed Clock SCL High Count Register */
+#define IC_FS_SCL_HCNT          0x1c
+
+/* Fast Spedd Clock SCL Low Count Register */
+#define IC_FS_SCL_LCNT          0x20
+
+/* High Speed Clock SCL High Count Register */
+#define IC_HS_SCL_HCNT          0x24
+
+/* High Speed Clock SCL Low Count Register */
+#define IC_HS_SCL_LCNT          0x28
+
+/* Interrupt Status Register */
+#define IC_INTR_STAT            0x2c            /* Read only */
+#define R_GEN_CALL              (1 << 11)
+#define R_START_DET             (1 << 10)
+#define R_STOP_DET              (1 << 9)
+#define R_ACTIVITY              (1 << 8)
+#define R_RX_DONE               (1 << 7)
+#define R_TX_ABRT               (1 << 6)
+#define R_RD_REQ                (1 << 5)
+#define R_TX_EMPTY              (1 << 4)
+#define R_TX_OVER               (1 << 3)
+#define R_RX_FULL               (1 << 2)
+#define R_RX_OVER               (1 << 1)
+#define R_RX_UNDER              (1 << 0)
+
+/* Interrupt Mask Register */
+#define IC_INTR_MASK            0x30            /* Read and Write */
+#define M_GEN_CALL              (1 << 11)
+#define M_START_DET             (1 << 10)
+#define M_STOP_DET              (1 << 9)
+#define M_ACTIVITY              (1 << 8)
+#define M_RX_DONE               (1 << 7)
+#define M_TX_ABRT               (1 << 6)
+#define M_RD_REQ                (1 << 5)
+#define M_TX_EMPTY              (1 << 4)
+#define M_TX_OVER               (1 << 3)
+#define M_RX_FULL               (1 << 2)
+#define M_RX_OVER               (1 << 1)
+#define M_RX_UNDER              (1 << 0)
+
+/* Raw Interrupt Status Register */
+#define IC_RAW_INTR_STAT        0x34            /* Read Only */
+#define GEN_CALL                (1 << 11)       /* General call */
+#define START_DET               (1 << 10)       /* (RE)START occured */
+#define STOP_DET                (1 << 9)        /* STOP occured */
+#define ACTIVITY                (1 << 8)        /* Bus busy */
+#define RX_DONE                 (1 << 7)        /* Not used in Master mode */
+#define TX_ABRT                 (1 << 6)        /* Transmit Abort */
+#define RD_REQ                  (1 << 5)        /* Not used in Master mode */
+#define TX_EMPTY                (1 << 4)        /* TX FIFO <= threshold */
+#define TX_OVER                 (1 << 3)        /* TX FIFO overflow */
+#define RX_FULL                 (1 << 2)        /* RX FIFO >= threshold */
+#define RX_OVER                 (1 << 1)        /* RX FIFO overflow */
+#define RX_UNDER                (1 << 0)        /* RX FIFO empty */
+
+/* Receive FIFO Threshold Register */
+#define IC_RX_TL                0x38
+
+/* Transmit FIFO Treshold Register */
+#define IC_TX_TL                0x3c
+
+/* Clear Combined and Individual Interrupt Register */
+#define IC_CLR_INTR             0x40
+#define CLR_INTR                (1 << 0)
+
+/* Clear RX_UNDER Interrupt Register */
+#define IC_CLR_RX_UNDER         0x44
+#define CLR_RX_UNDER            (1 << 0)
+
+/* Clear RX_OVER Interrupt Register */
+#define IC_CLR_RX_OVER          0x48
+#define CLR_RX_OVER             (1 << 0)
+
+/* Clear TX_OVER Interrupt Register */
+#define IC_CLR_TX_OVER          0x4c
+#define CLR_TX_OVER             (1 << 0)
+
+#define IC_CLR_RD_REQ           0x50
+
+/* Clear TX_ABRT Interrupt Register */
+#define IC_CLR_TX_ABRT          0x54
+#define CLR_TX_ABRT             (1 << 0)
+#define IC_CLR_RX_DONE          0x58
+
+/* Clear ACTIVITY Interrupt Register */
+#define IC_CLR_ACTIVITY         0x5c
+#define CLR_ACTIVITY            (1 << 0)
+
+/* Clear STOP_DET Interrupt Register */
+#define IC_CLR_STOP_DET         0x60
+#define CLR_STOP_DET            (1 << 0)
+
+/* Clear START_DET Interrupt Register */
+#define IC_CLR_START_DET        0x64
+#define CLR_START_DET           (1 << 0)
+
+/* Clear GEN_CALL Interrupt Register */
+#define IC_CLR_GEN_CALL         0x68
+#define CLR_GEN_CALL            (1 << 0)
+
+/* Enable Register */
+#define IC_ENABLE               0x6c
+#define ENABLE                  (1 << 0)
+
+/* Status Register */
+#define IC_STATUS               0x70            /* Read Only */
+#define STAT_SLV_ACTIVITY       (1 << 6)        /* Slave not in idle */
+#define STAT_MST_ACTIVITY       (1 << 5)        /* Master not in idle */
+#define STAT_RFF                (1 << 4)        /* RX FIFO Full */
+#define STAT_RFNE               (1 << 3)        /* RX FIFO Not Empty */
+#define STAT_TFE                (1 << 2)        /* TX FIFO Empty */
+#define STAT_TFNF               (1 << 1)        /* TX FIFO Not Full */
+#define STAT_ACTIVITY           (1 << 0)        /* Activity Status */
+
+/* Transmit FIFO Level Register */
+#define IC_TXFLR                0x74            /* Read Only */
+#define TXFLR                   (1 << 0)        /* TX FIFO level */
+
+/* Receive FIFO Level Register */
+#define IC_RXFLR                0x78            /* Read Only */
+#define RXFLR                   (1 << 0)        /* RX FIFO level */
+
+/* Transmit Abort Source Register */
+#define IC_TX_ABRT_SOURCE       0x80
+#define ABRT_SLVRD_INTX         (1 << 15)
+#define ABRT_SLV_ARBLOST        (1 << 14)
+#define ABRT_SLVFLUSH_TXFIFO    (1 << 13)
+#define ARB_LOST                (1 << 12)
+#define ABRT_MASTER_DIS         (1 << 11)
+#define ABRT_10B_RD_NORSTRT     (1 << 10)
+#define ABRT_SBYTE_NORSTRT      (1 << 9)
+#define ABRT_HS_NORSTRT         (1 << 8)
+#define ABRT_SBYTE_ACKDET       (1 << 7)
+#define ABRT_HS_ACKDET          (1 << 6)
+#define ABRT_GCALL_READ         (1 << 5)
+#define ABRT_GCALL_NOACK        (1 << 4)
+#define ABRT_TXDATA_NOACK       (1 << 3)
+#define ABRT_10ADDR2_NOACK      (1 << 2)
+#define ABRT_10ADDR1_NOACK      (1 << 1)
+#define ABRT_7B_ADDR_NOACK      (1 << 0)
+
+/* Enable Status Register */
+#define IC_ENABLE_STATUS        0x9c
+#define IC_EN                   (1 << 0)        /* I2C in an enabled state */
+
+/* Component Parameter Register 1*/
+#define IC_COMP_PARAM_1         0xf4
+#define APB_DATA_WIDTH          (0x3 << 0)
+
+/* added by xiaolin --begin */
+#define SS_MIN_SCL_HIGH         4000
+#define SS_MIN_SCL_LOW          4700
+#define FS_MIN_SCL_HIGH         600
+#define FS_MIN_SCL_LOW          1300
+#define HS_MIN_SCL_HIGH_100PF   60
+#define HS_MIN_SCL_LOW_100PF    120
+
+#define STANDARD                0
+#define FAST                    1
+#define HIGH                    2
+
+#define NUM_SPEEDS              3
+
+static int speed_mode[6] = {
+        FAST,
+        FAST,
+        FAST,
+        STANDARD,
+        FAST,
+        FAST
+};
+
+static int ctl_num = 6;
+module_param_array(speed_mode, int, &ctl_num, S_IRUGO);
+MODULE_PARM_DESC(speed_mode, "Set the speed of the i2c interface (0-2)");
+
+/**
+ * intel_mid_i2c_disable - Disable I2C controller
+ * @adap: struct pointer to i2c_adapter
+ *
+ * Return Value:
+ * 0            success
+ * -EBUSY       if device is busy
+ * -ETIMEDOUT   if i2c cannot be disabled within the given time
+ *
+ * I2C bus state should be checked prior to disabling the hardware. If bus is
+ * not in idle state, an errno is returned. Write "0" to IC_ENABLE to disable
+ * I2C controller.
+ */
+static int intel_mid_i2c_disable(struct i2c_adapter *adap)
+{
+        struct intel_mid_i2c_private *i2c = i2c_get_adapdata(adap);
+        int err = 0;
+        int count = 0;
+        int ret1, ret2;
+        static const u16 delay[NUM_SPEEDS] = {100, 25, 3};
+
+        /* Set IC_ENABLE to 0 */
+        writel(0, i2c->base + IC_ENABLE);
+
+        /* Check if device is busy */
+        dev_dbg(&adap->dev, "mrst i2c disable\n");
+        while ((ret1 = readl(i2c->base + IC_ENABLE_STATUS) & 0x1)
+                || (ret2 = readl(i2c->base + IC_STATUS) & 0x1)) {
+                udelay(delay[i2c->speed]);
+                writel(0, i2c->base + IC_ENABLE);
+                dev_dbg(&adap->dev, "i2c is busy, count is %d speed %d\n",
+                        count, i2c->speed);
+                if (count++ > 10) {
+                        err = -ETIMEDOUT;
+                        break;
+                }
+        }
+
+        /* Clear all interrupts */
+        readl(i2c->base + IC_CLR_INTR);
+        readl(i2c->base + IC_CLR_STOP_DET);
+        readl(i2c->base + IC_CLR_START_DET);
+        readl(i2c->base + IC_CLR_ACTIVITY);
+        readl(i2c->base + IC_CLR_TX_ABRT);
+        readl(i2c->base + IC_CLR_RX_OVER);
+        readl(i2c->base + IC_CLR_RX_UNDER);
+        readl(i2c->base + IC_CLR_TX_OVER);
+        readl(i2c->base + IC_CLR_RX_DONE);
+        readl(i2c->base + IC_CLR_GEN_CALL);
+
+        /* Disable all interupts */
+        writel(0x0000, i2c->base + IC_INTR_MASK);
+
+        return err;
+}
+
+/**
+ * intel_mid_i2c_hwinit - Initialize the I2C hardware registers
+ * @dev: pci device struct pointer
+ *
+ * This function will be called in intel_mid_i2c_probe() before device
+ * registration.
+ *
+ * Return Values:
+ * 0            success
+ * -EBUSY       i2c cannot be disabled
+ * -ETIMEDOUT   i2c cannot be disabled
+ * -EFAULT      If APB data width is not 32-bit wide
+ *
+ * I2C should be disabled prior to other register operation. If failed, an
+ * errno is returned. Mask and Clear all interrpts, this should be done at
+ * first.  Set common registers which will not be modified during normal
+ * transfers, including: controll register, FIFO threshold and clock freq.
+ * Check APB data width at last.
+ */
+static int intel_mid_i2c_hwinit(struct intel_mid_i2c_private *i2c)
+{
+        int err;
+
+        static const u16 hcnt[NUM_PLATFORMS][NUM_SPEEDS] = {
+                { 0x75,  0x15, 0x07 },
+                { 0x04c,  0x10, 0x06 }
+        };
+        static const u16 lcnt[NUM_PLATFORMS][NUM_SPEEDS] = {
+                { 0x7C,  0x21, 0x0E },
+                { 0x053, 0x19, 0x0F }
+        };
+
+        /* Disable i2c first */
+        err = intel_mid_i2c_disable(&i2c->adap);
+        if (err)
+                return err;
+
+        /*
+         * Setup clock frequency and speed mode
+         * Enable restart condition,
+         * enable master FSM, disable slave FSM,
+         * use target address when initiating transfer
+         */
+
+        writel((i2c->speed + 1) << 1 | SLV_DIS | RESTART | MASTER_EN,
+                i2c->base + IC_CON);
+        writel(hcnt[i2c->platform][i2c->speed],
+                i2c->base + (IC_SS_SCL_HCNT + (i2c->speed << 3)));
+        writel(lcnt[i2c->platform][i2c->speed],
+                i2c->base + (IC_SS_SCL_LCNT + (i2c->speed << 3)));
+
+        /* Set tranmit & receive FIFO threshold to zero */
+        writel(0x0, i2c->base + IC_RX_TL);
+        writel(0x0, i2c->base + IC_TX_TL);
+
+        return 0;
+}
+
+/**
+ * intel_mid_i2c_func - Return the supported three I2C operations.
+ * @adapter: i2c_adapter struct pointer
+ */
+static u32 intel_mid_i2c_func(struct i2c_adapter *adapter)
+{
+        return I2C_FUNC_I2C | I2C_FUNC_10BIT_ADDR | I2C_FUNC_SMBUS_EMUL;
+}
+
+/**
+ * intel_mid_i2c_address_neq - To check if the addresses for different i2c messages
+ * are equal.
+ * @p1: first i2c_msg
+ * @p2: second i2c_msg
+ *
+ * Return Values:
+ * 0     if addresses are equal
+ * 1     if not equal
+ *
+ * Within a single transfer, the I2C client may need to send its address more
+ * than once. So a check if the addresses match is needed.
+ */
+static inline bool intel_mid_i2c_address_neq(const struct i2c_msg *p1,
+                                       const struct i2c_msg *p2)
+{
+        if (p1->addr != p2->addr)
+                return 1;
+        if ((p1->flags ^ p2->flags) & I2C_M_TEN)
+                return 1;
+        return 0;
+}
+
+/**
+ * intel_mid_i2c_abort - To handle transfer abortions and print error messages.
+ * @adap: i2c_adapter struct pointer
+ *
+ * By reading register IC_TX_ABRT_SOURCE, various transfer errors can be
+ * distingushed. At present, no circumstances have been found out that
+ * multiple errors would be occured simutaneously, so we simply use the
+ * register value directly.
+ *
+ * At last the error bits are cleared. (Note clear ABRT_SBYTE_NORSTRT bit need
+ * a few extra steps)
+ */
+static void intel_mid_i2c_abort(struct intel_mid_i2c_private *i2c)
+{
+        /* Read about source register */
+        int abort = i2c->abort;
+        struct i2c_adapter *adap = &i2c->adap;
+
+        /* Single transfer error check:
+         * According to databook, TX/RX FIFOs would be flushed when
+         * the abort interrupt occured.
+         */
+        if (abort & ABRT_MASTER_DIS)
+                dev_err(&adap->dev,
+                "initiate master operation with master mode disabled.\n");
+        if (abort & ABRT_10B_RD_NORSTRT)
+                dev_err(&adap->dev,
+        "RESTART disabled and master sent READ cmd in 10-bit addressing.\n");
+
+        if (abort & ABRT_SBYTE_NORSTRT) {
+                dev_err(&adap->dev,
+                "RESTART disabled and user is trying to send START byte.\n");
+                writel(~ABRT_SBYTE_NORSTRT, i2c->base + IC_TX_ABRT_SOURCE);
+                writel(RESTART, i2c->base + IC_CON);
+                writel(~IC_TAR_SPECIAL, i2c->base + IC_TAR);
+        }
+
+        if (abort & ABRT_SBYTE_ACKDET)
+                dev_err(&adap->dev,
+                        "START byte was not acknowledged.\n");
+        if (abort & ABRT_TXDATA_NOACK)
+                dev_dbg(&adap->dev,
+                        "No acknowledgement received from slave.\n");
+        if (abort & ABRT_10ADDR2_NOACK)
+                dev_dbg(&adap->dev,
+        "The 2nd address byte of the 10-bit address was not acknowledged.\n");
+        if (abort & ABRT_10ADDR1_NOACK)
+                dev_dbg(&adap->dev,
+        "The 1st address byte of 10-bit address was not acknowledged.\n");
+        if (abort & ABRT_7B_ADDR_NOACK)
+                dev_dbg(&adap->dev,
+                        "I2C slave device not acknowledged.\n");
+
+        /* Clear TX_ABRT bit */
+        readl(i2c->base + IC_CLR_TX_ABRT);
+        i2c->status = STATUS_XFER_ABORT;
+}
+
+/**
+ * xfer_read - Internal function to implement master read transfer.
+ * @adap: i2c_adapter struct pointer
+ * @buf: buffer in i2c_msg
+ * @length: number of bytes to be read
+ *
+ * Return Values:
+ * 0            if the read transfer succeeds
+ * -ETIMEDOUT   if cannot read the "raw" interrupt register
+ * -EINVAL      if a transfer abort occurred
+ *
+ * For every byte, a "READ" command will be loaded into IC_DATA_CMD prior to
+ * data transfer. The actual "read" operation will be performed if an RX_FULL
+ * interrupt occurred.
+ *
+ * Note there may be two interrupt signals captured, one should read
+ * IC_RAW_INTR_STAT to separate between errors and actual data.
+ */
+static int xfer_read(struct i2c_adapter *adap, unsigned char *buf, int length)
+{
+        struct intel_mid_i2c_private *i2c = i2c_get_adapdata(adap);
+        int i = length;
+        int err;
+
+        if (length >= 256) {
+                dev_err(&adap->dev,
+                        "I2C FIFO cannot support larger than 256 bytes\n");
+                return -EMSGSIZE;
+        }
+
+        INIT_COMPLETION(i2c->complete);
+
+        readl(i2c->base + IC_CLR_INTR);
+        writel(0x0044, i2c->base + IC_INTR_MASK);
+
+        i2c->status = STATUS_READ_START;
+
+        while (i--)
+                writel(IC_RD, i2c->base + IC_DATA_CMD);
+
+        i2c->status = STATUS_READ_START;
+        err = wait_for_completion_interruptible_timeout(&i2c->complete, HZ);
+        if (!err) {
+                dev_err(&adap->dev, "Timeout for ACK from I2C slave device\n");
+                intel_mid_i2c_hwinit(i2c);
+                return -ETIMEDOUT;
+        }
+        if (i2c->status == STATUS_READ_SUCCESS)
+                return 0;
+        else
+                return -EIO;
+}
+
+/**
+ * xfer_write - Internal function to implement master write transfer.
+ * @adap: i2c_adapter struct pointer
+ * @buf: buffer in i2c_msg
+ * @length: number of bytes to be read
+ *
+ * Return Values:
+ * 0    if the read transfer succeeds
+ * -ETIMEDOUT   if we cannot read the "raw" interrupt register
+ * -EINVAL      if a transfer abort occured
+ *
+ * For every byte, a "WRITE" command will be loaded into IC_DATA_CMD prior to
+ * data transfer. The actual "write" operation will be performed when the
+ * RX_FULL interrupt signal occurs.
+ *
+ * Note there may be two interrupt signals captured, one should read
+ * IC_RAW_INTR_STAT to separate between errors and actual data.
+ */
+static int xfer_write(struct i2c_adapter *adap,
+                      unsigned char *buf, int length)
+{
+        struct intel_mid_i2c_private *i2c = i2c_get_adapdata(adap);
+        int i, err;
+
+        if (length >= 256) {
+                dev_err(&adap->dev,
+                        "I2C FIFO cannot support larger than 256 bytes\n");
+                return -EMSGSIZE;
+        }
+
+        INIT_COMPLETION(i2c->complete);
+
+        readl(i2c->base + IC_CLR_INTR);
+        writel(0x0050, i2c->base + IC_INTR_MASK);
+
+        i2c->status = STATUS_WRITE_START;
+        for (i = 0; i < length; i++)
+                writel((u16)(*(buf + i)), i2c->base + IC_DATA_CMD);
+
+        i2c->status = STATUS_WRITE_START;
+        err = wait_for_completion_interruptible_timeout(&i2c->complete, HZ);
+        if (!err) {
+                dev_err(&adap->dev, "Timeout for ACK from I2C slave device\n");
+                intel_mid_i2c_hwinit(i2c);
+                return -ETIMEDOUT;
+        } else {
+                if (i2c->status == STATUS_WRITE_SUCCESS)
+                        return 0;
+                else
+                        return -EIO;
+        }
+}
+
+static int intel_mid_i2c_setup(struct i2c_adapter *adap,  struct i2c_msg *pmsg)
+{
+        struct intel_mid_i2c_private *i2c = i2c_get_adapdata(adap);
+        int err;
+        u32 reg;
+        u32 bit_mask;
+        u32 mode;
+
+        /* Disable device first */
+        err = intel_mid_i2c_disable(adap);
+        if (err) {
+                dev_err(&adap->dev,
+                        "Cannot disable i2c controller, timeout\n");
+                return err;
+        }
+
+        mode = (1 + i2c->speed) << 1;
+        /* set the speed mode */
+        reg = readl(i2c->base + IC_CON);
+        if ((reg & 0x06) != mode) {
+                dev_dbg(&adap->dev, "set mode %d\n", i2c->speed);
+                writel((reg & ~0x6) | mode, i2c->base + IC_CON);
+        }
+
+        reg = readl(i2c->base + IC_CON);
+        /* use 7-bit addressing */
+        if (pmsg->flags & I2C_M_TEN) {
+                if ((reg & ADDR_10BIT) != ADDR_10BIT) {
+                        dev_dbg(&adap->dev, "set i2c 10 bit address mode\n");
+                        writel(reg | ADDR_10BIT, i2c->base + IC_CON);
+                }
+        } else {
+                if ((reg & ADDR_10BIT) != 0x0) {
+                        dev_dbg(&adap->dev, "set i2c 7 bit address mode\n");
+                        writel(reg & ~ADDR_10BIT, i2c->base + IC_CON);
+                }
+        }
+        /* enable restart conditions */
+        reg = readl(i2c->base + IC_CON);
+        if ((reg & RESTART) != RESTART) {
+                dev_dbg(&adap->dev, "enable restart conditions\n");
+                writel(reg | RESTART, i2c->base + IC_CON);
+        }
+
+        /* enable master FSM */
+        reg = readl(i2c->base + IC_CON);
+        dev_dbg(&adap->dev, "ic_con reg is 0x%x\n", reg);
+        writel(reg | MASTER_EN, i2c->base + IC_CON);
+        if ((reg & SLV_DIS) != SLV_DIS) {
+                dev_dbg(&adap->dev, "enable master FSM\n");
+                writel(reg | SLV_DIS, i2c->base + IC_CON);
+                dev_dbg(&adap->dev, "ic_con reg is 0x%x\n", reg);
+        }
+
+        /* use target address when initiating transfer */
+        reg = readl(i2c->base + IC_TAR);
+        bit_mask = IC_TAR_SPECIAL | IC_TAR_GC_OR_START;
+
+        if ((reg & bit_mask) != 0x0) {
+                dev_dbg(&adap->dev,
+         "WR: use target address when intiating transfer, i2c_tx_target\n");
+                writel(reg & ~bit_mask, i2c->base + IC_TAR);
+        }
+
+        /* set target address to the I2C slave address */
+        dev_dbg(&adap->dev,
+                "set target address to the I2C slave address, addr is %x\n",
+                        pmsg->addr);
+        writel(pmsg->addr | (pmsg->flags & I2C_M_TEN ? IC_TAR_10BIT_ADDR : 0),
+                i2c->base + IC_TAR);
+
+        /* Enable I2C controller */
+        writel(ENABLE, i2c->base + IC_ENABLE);
+
+        return 0;
+}
+
+/**
+ * intel_mid_i2c_xfer - Main master transfer routine.
+ * @adap: i2c_adapter struct pointer
+ * @pmsg: i2c_msg struct pointer
+ * @num: number of i2c_msg
+ *
+ * Return Values:
+ * +            number of messages transfered
+ * -ETIMEDOUT   If cannot disable I2C controller or read IC_STATUS
+ * -EINVAL      If the address in i2c_msg is invalid
+ *
+ * This function will be registered in i2c-core and exposed to external
+ * I2C clients.
+ * 1. Disable I2C controller
+ * 2. Unmask three interrupts: RX_FULL, TX_EMPTY, TX_ABRT
+ * 3. Check if address in i2c_msg is valid
+ * 4. Enable I2C controller
+ * 5. Perform real transfer (call xfer_read or xfer_write)
+ * 6. Wait until the current transfer is finished (check bus state)
+ * 7. Mask and clear all interrupts
+ */
+static int intel_mid_i2c_xfer(struct i2c_adapter *adap,
+                         struct i2c_msg *pmsg,
+                         int num)
+{
+        struct intel_mid_i2c_private *i2c = i2c_get_adapdata(adap);
+        int i, err = 0;
+
+        /* if number of messages equal 0*/
+        if (num == 0)
+                return 0;
+
+        pm_runtime_get(i2c->dev);
+
+        mutex_lock(&i2c->lock);
+        dev_dbg(&adap->dev, "intel_mid_i2c_xfer, process %d msg(s)\n", num);
+        dev_dbg(&adap->dev, "slave address is %x\n", pmsg->addr);
+
+
+        if (i2c->status != STATUS_IDLE) {
+                dev_err(&adap->dev, "Adapter %d in transfer/standby\n",
+                                                                adap->nr);
+                mutex_unlock(&i2c->lock);
+                pm_runtime_put(i2c->dev);
+                return -1;
+        }
+
+
+        for (i = 1; i < num; i++) {
+                /* Message address equal? */
+                if (unlikely(intel_mid_i2c_address_neq(&pmsg[0], &pmsg[i]))) {
+                        dev_err(&adap->dev, "Invalid address in msg[%d]\n", i);
+                        mutex_unlock(&i2c->lock);
+                        pm_runtime_put(i2c->dev);
+                        return -EINVAL;
+                }
+        }
+
+        if (intel_mid_i2c_setup(adap, pmsg)) {
+                mutex_unlock(&i2c->lock);
+                pm_runtime_put(i2c->dev);
+                return -EINVAL;
+        }
+
+        for (i = 0; i < num; i++) {
+                i2c->msg = pmsg;
+                i2c->status = STATUS_IDLE;
+                /* Read or Write */
+                if (pmsg->flags & I2C_M_RD) {
+                        dev_dbg(&adap->dev, "I2C_M_RD\n");
+                        err = xfer_read(adap, pmsg->buf, pmsg->len);
+                } else {
+                        dev_dbg(&adap->dev, "I2C_M_WR\n");
+                        err = xfer_write(adap, pmsg->buf, pmsg->len);
+                }
+                if (err < 0)
+                        break;
+                dev_dbg(&adap->dev, "msg[%d] transfer complete\n", i);
+                pmsg++;         /* next message */
+        }
+
+        /* Mask interrupts */
+        writel(0x0000, i2c->base + IC_INTR_MASK);
+        /* Clear all interrupts */
+        readl(i2c->base + IC_CLR_INTR);
+
+        i2c->status = STATUS_IDLE;
+        mutex_unlock(&i2c->lock);
+        pm_runtime_put(i2c->dev);
+
+        return err;
+}
+
+static int intel_mid_i2c_runtime_suspend(struct device *dev)
+{
+        struct pci_dev *pdev = to_pci_dev(dev);
+        struct intel_mid_i2c_private *i2c = pci_get_drvdata(pdev);
+        struct i2c_adapter *adap = to_i2c_adapter(dev);
+        int err;
+
+        if (i2c->status != STATUS_IDLE)
+                return -1;
+
+        intel_mid_i2c_disable(adap);
+
+        err = pci_save_state(pdev);
+        if (err) {
+                dev_err(dev, "pci_save_state failed\n");
+                return err;
+        }
+
+        err = pci_set_power_state(pdev, PCI_D3hot);
+        if (err) {
+                dev_err(dev, "pci_set_power_state failed\n");
+                return err;
+        }
+        i2c->status = STATUS_STANDBY;
+
+        return 0;
+}
+
+static int intel_mid_i2c_runtime_resume(struct device *dev)
+{
+        struct pci_dev *pdev = to_pci_dev(dev);
+        struct intel_mid_i2c_private *i2c = pci_get_drvdata(pdev);
+        int err;
+
+        if (i2c->status != STATUS_STANDBY)
+                return 0;
+
+        pci_set_power_state(pdev, PCI_D0);
+        pci_restore_state(pdev);
+        err = pci_enable_device(pdev);
+        if (err) {
+                dev_err(dev, "pci_enable_device failed\n");
+                return err;
+        }
+
+        i2c->status = STATUS_IDLE;
+
+        intel_mid_i2c_hwinit(i2c);
+        return err;
+}
+
+static void i2c_isr_read(struct intel_mid_i2c_private *i2c)
+{
+        struct i2c_msg *msg = i2c->msg;
+        int rx_num;
+        u32 len;
+        u8 *buf;
+
+        if (!(msg->flags & I2C_M_RD))
+                return;
+
+        if (i2c->status != STATUS_READ_IN_PROGRESS) {
+                len = msg->len;
+                buf = msg->buf;
+        } else {
+                len = i2c->rx_buf_len;
+                buf = i2c->rx_buf;
+        }
+
+        rx_num = readl(i2c->base + IC_RXFLR);
+
+        for (; len > 0 && rx_num > 0; len--, rx_num--)
+                *buf++ = readl(i2c->base + IC_DATA_CMD);
+
+        if (len > 0) {
+                i2c->status = STATUS_READ_IN_PROGRESS;
+                i2c->rx_buf_len = len;
+                i2c->rx_buf = buf;
+        } else
+                i2c->status = STATUS_READ_SUCCESS;
+
+        return;
+}
+
+static irqreturn_t intel_mid_i2c_isr(int this_irq, void *dev)
+{
+        struct intel_mid_i2c_private *i2c = dev;
+        u32 stat = readl(i2c->base + IC_INTR_STAT);
+
+        if (!stat)
+                return IRQ_NONE;
+
+        dev_dbg(&i2c->adap.dev, "%s, stat = 0x%x\n", __func__, stat);
+        stat &= 0x54;
+
+        if (i2c->status != STATUS_WRITE_START &&
+            i2c->status != STATUS_READ_START &&
+            i2c->status != STATUS_READ_IN_PROGRESS)
+                goto err;
+
+        if (stat & TX_ABRT)
+                i2c->abort = readl(i2c->base + IC_TX_ABRT_SOURCE);
+
+        readl(i2c->base + IC_CLR_INTR);
+
+        if (stat & TX_ABRT) {
+                intel_mid_i2c_abort(i2c);
+                goto exit;
+        }
+
+        if (stat & RX_FULL) {
+                i2c_isr_read(i2c);
+                goto exit;
+        }
+
+        if (stat & TX_EMPTY) {
+                if (readl(i2c->base + IC_STATUS) & 0x4)
+                        i2c->status = STATUS_WRITE_SUCCESS;
+        }
+
+exit:
+        if (i2c->status == STATUS_READ_SUCCESS ||
+            i2c->status == STATUS_WRITE_SUCCESS ||
+            i2c->status == STATUS_XFER_ABORT) {
+                /* Clear all interrupts */
+                readl(i2c->base + IC_CLR_INTR);
+                /* Mask interrupts */
+                writel(0, i2c->base + IC_INTR_MASK);
+                complete(&i2c->complete);
+        }
+err:
+        return IRQ_HANDLED;
+}
+
+static struct i2c_algorithm intel_mid_i2c_algorithm = {
+        .master_xfer    = intel_mid_i2c_xfer,
+        .functionality  = intel_mid_i2c_func,
+};
+
+
+static const struct dev_pm_ops intel_mid_i2c_pm_ops = {
+        .runtime_suspend = intel_mid_i2c_runtime_suspend,
+        .runtime_resume = intel_mid_i2c_runtime_resume,
+};
+
+/**
+ * intel_mid_i2c_probe - I2C controller initialization routine
+ * @dev: pci device
+ * @id: device id
+ *
+ * Return Values:
+ * 0            success
+ * -ENODEV      If cannot allocate pci resource
+ * -ENOMEM      If the register base remapping failed, or
+ *              if kzalloc failed
+ *
+ * Initialization steps:
+ * 1. Request for PCI resource
+ * 2. Remap the start address of PCI resource to register base
+ * 3. Request for device memory region
+ * 4. Fill in the struct members of intel_mid_i2c_private
+ * 5. Call intel_mid_i2c_hwinit() for hardware initialization
+ * 6. Register I2C adapter in i2c-core
+ */
+static int __devinit intel_mid_i2c_probe(struct pci_dev *dev,
+                                    const struct pci_device_id *id)
+{
+        struct intel_mid_i2c_private *mrst;
+        unsigned long start, len;
+        int err, busnum;
+        void __iomem *base = NULL;
+
+        dev_dbg(&dev->dev, "Get into probe function for I2C\n");
+        err = pci_enable_device(dev);
+        if (err) {
+                dev_err(&dev->dev, "Failed to enable I2C PCI device (%d)\n",
+                        err);
+                goto exit;
+        }
+
+        /* Determine the address of the I2C area */
+        start = pci_resource_start(dev, 0);
+        len = pci_resource_len(dev, 0);
+        if (!start || len == 0) {
+                dev_err(&dev->dev, "base address not set\n");
+                err = -ENODEV;
+                goto exit;
+        }
+        dev_dbg(&dev->dev, "%s i2c resource start 0x%lx, len=%ld\n",
+                PLATFORM, start, len);
+
+        err = pci_request_region(dev, 0, DRIVER_NAME);
+        if (err) {
+                dev_err(&dev->dev, "failed to request I2C region "
+                        "0x%lx-0x%lx\n", start,
+                        (unsigned long)pci_resource_end(dev, 0));
+                goto exit;
+        }
+
+        base = ioremap_nocache(start, len);
+        if (!base) {
+                dev_err(&dev->dev, "I/O memory remapping failed\n");
+                err = -ENOMEM;
+                goto fail0;
+        }
+
+        /* Allocate the per-device data structure, intel_mid_i2c_private */
+        mrst = kzalloc(sizeof(struct intel_mid_i2c_private), GFP_KERNEL);
+        if (mrst == NULL) {
+                dev_err(&dev->dev, "can't allocate interface\n");
+                err = -ENOMEM;
+                goto fail1;
+        }
+
+        /* Initialize struct members */
+        snprintf(mrst->adap.name, sizeof(mrst->adap.name),
+                "Intel MID I2C at %lx", start);
+        mrst->adap.owner = THIS_MODULE;
+        mrst->adap.algo = &intel_mid_i2c_algorithm;
+        mrst->adap.dev.parent = &dev->dev;
+        mrst->dev = &dev->dev;
+        mrst->base = base;
+        mrst->speed = STANDARD;
+        mrst->abort = 0;
+        mrst->rx_buf_len = 0;
+        mrst->status = STATUS_IDLE;
+
+        pci_set_drvdata(dev, mrst);
+        i2c_set_adapdata(&mrst->adap, mrst);
+
+        mrst->adap.nr = busnum = id->driver_data;
+        if (dev->device <= 0x0804)
+                mrst->platform = MOORESTOWN;
+        else
+                mrst->platform = MEDFIELD;
+
+        dev_dbg(&dev->dev, "I2C%d\n", busnum);
+
+        if (ctl_num > busnum) {
+                if (speed_mode[busnum] < 0 || speed_mode[busnum] >= NUM_SPEEDS)
+                        dev_warn(&dev->dev, "invalid speed %d ignored.\n",
+                                                        speed_mode[busnum]);
+                else
+                        mrst->speed = speed_mode[busnum];
+        }
+
+        /* Initialize i2c controller */
+        err = intel_mid_i2c_hwinit(mrst);
+        if (err < 0) {
+                dev_err(&dev->dev, "I2C interface initialization failed\n");
+                goto fail2;
+        }
+
+        mutex_init(&mrst->lock);
+        init_completion(&mrst->complete);
+
+        /* Clear all interrupts */
+        readl(mrst->base + IC_CLR_INTR);
+        writel(0x0000, mrst->base + IC_INTR_MASK);
+
+        err = request_irq(dev->irq, intel_mid_i2c_isr, IRQF_SHARED,
+                                        mrst->adap.name, mrst);
+        if (err) {
+                dev_err(&dev->dev, "Failed to request IRQ for I2C controller: "
+                        "%s", mrst->adap.name);
+                goto fail2;
+        }
+
+        /* Adapter registration */
+        err = i2c_add_numbered_adapter(&mrst->adap);
+        if (err) {
+                dev_err(&dev->dev, "Adapter %s registration failed\n",
+                        mrst->adap.name);
+                goto fail3;
+        }
+
+        dev_dbg(&dev->dev, "%s I2C bus %d driver bind success.\n",
+                (mrst->platform == MOORESTOWN) ? "Moorestown" : "Medfield",
+                busnum);
+
+        pm_runtime_enable(&dev->dev);
+        return 0;
+
+fail3:
+        free_irq(dev->irq, mrst);
+fail2:
+        pci_set_drvdata(dev, NULL);
+        kfree(mrst);
+fail1:
+        iounmap(base);
+fail0:
+        pci_release_region(dev, 0);
+exit:
+        return err;
+}
+
+static void __devexit intel_mid_i2c_remove(struct pci_dev *dev)
+{
+        struct intel_mid_i2c_private *mrst = pci_get_drvdata(dev);
+        intel_mid_i2c_disable(&mrst->adap);
+        if (i2c_del_adapter(&mrst->adap))
+                dev_err(&dev->dev, "Failed to delete i2c adapter");
+
+        free_irq(dev->irq, mrst);
+        pci_set_drvdata(dev, NULL);
+        iounmap(mrst->base);
+        kfree(mrst);
+        pci_release_region(dev, 0);
+}
+
+static struct pci_device_id intel_mid_i2c_ids[] = {
+        /* Moorestown */
+        { PCI_VDEVICE(INTEL, 0x0802), 0 },
+        { PCI_VDEVICE(INTEL, 0x0803), 1 },
+        { PCI_VDEVICE(INTEL, 0x0804), 2 },
+        /* Medfield */
+        { PCI_VDEVICE(INTEL, 0x0817), 3,},
+        { PCI_VDEVICE(INTEL, 0x0818), 4 },
+        { PCI_VDEVICE(INTEL, 0x0819), 5 },
+        { PCI_VDEVICE(INTEL, 0x082C), 0 },
+        { PCI_VDEVICE(INTEL, 0x082D), 1 },
+        { PCI_VDEVICE(INTEL, 0x082E), 2 },
+        { 0,}
+};
+MODULE_DEVICE_TABLE(pci, intel_mid_i2c_ids);
+
+static struct pci_driver intel_mid_i2c_driver = {
+        .name           = DRIVER_NAME,
+        .id_table       = intel_mid_i2c_ids,
+        .probe          = intel_mid_i2c_probe,
+        .remove         = __devexit_p(intel_mid_i2c_remove),
+};
+
+static int __init intel_mid_i2c_init(void)
+{
+        return pci_register_driver(&intel_mid_i2c_driver);
+}
+
+static void __exit intel_mid_i2c_exit(void)
+{
+        pci_unregister_driver(&intel_mid_i2c_driver);
+}
+
+module_init(intel_mid_i2c_init);
+module_exit(intel_mid_i2c_exit);
+
+MODULE_AUTHOR("Ba Zheng <zheng.ba@intel.com>");
+MODULE_DESCRIPTION("I2C driver for Moorestown Platform");
+MODULE_LICENSE("GPL");
+MODULE_VERSION(VERSION);
diff --git a/drivers/i2c/busses/i2c-iop3xx.c b/drivers/i2c/busses/i2c-iop3xx.c
index a75c75e77b92..112c61f7b8cd 100644
--- a/drivers/i2c/busses/i2c-iop3xx.c
+++ b/drivers/i2c/busses/i2c-iop3xx.c
@@ -38,8 +38,7 @@
 #include <linux/errno.h>
 #include <linux/platform_device.h>
 #include <linux/i2c.h>
-
-#include <asm/io.h>
+#include <linux/io.h>
 
 #include "i2c-iop3xx.h"
 
@@ -56,12 +55,6 @@ iic_cook_addr(struct i2c_msg *msg)
         if (msg->flags & I2C_M_RD)
                 addr |= 1;
 
-        /*
-         * Read or Write?
-         */
-        if (msg->flags & I2C_M_REV_DIR_ADDR)
-                addr ^= 1;
-
         return addr;   
 }
 
diff --git a/drivers/i2c/busses/i2c-isch.c b/drivers/i2c/busses/i2c-isch.c
index 9f6b8e0f8632..ddc258edb34f 100644
--- a/drivers/i2c/busses/i2c-isch.c
+++ b/drivers/i2c/busses/i2c-isch.c
@@ -27,7 +27,7 @@
 */
 
 #include <linux/module.h>
-#include <linux/pci.h>
+#include <linux/platform_device.h>
 #include <linux/kernel.h>
 #include <linux/delay.h>
 #include <linux/stddef.h>
@@ -46,12 +46,6 @@
 #define SMBHSTDAT1      (7 + sch_smba)
 #define SMBBLKDAT       (0x20 + sch_smba)
 
-/* count for request_region */
-#define SMBIOSIZE       64
-
-/* PCI Address Constants */
-#define SMBBA_SCH       0x40
-
 /* Other settings */
 #define MAX_TIMEOUT     500
 
@@ -63,7 +57,6 @@
 #define SCH_BLOCK_DATA          0x05
 
 static unsigned short sch_smba;
-static struct pci_driver sch_driver;
 static struct i2c_adapter sch_adapter;
 
 /*
@@ -256,37 +249,23 @@ static struct i2c_adapter sch_adapter = {
         .algo           = &smbus_algorithm,
 };
 
-static struct pci_device_id sch_ids[] = {
-        { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SCH_LPC) },
-        { 0, }
-};
-
-MODULE_DEVICE_TABLE(pci, sch_ids);
-
-static int __devinit sch_probe(struct pci_dev *dev,
-                                const struct pci_device_id *id)
+static int __devinit smbus_sch_probe(struct platform_device *dev)
 {
+        struct resource *res;
         int retval;
-        unsigned int smba;
-
-        pci_read_config_dword(dev, SMBBA_SCH, &smba);
-        if (!(smba & (1 << 31))) {
-                dev_err(&dev->dev, "SMBus I/O space disabled!\n");
-                return -ENODEV;
-        }
 
-        sch_smba = (unsigned short)smba;
-        if (sch_smba == 0) {
-                dev_err(&dev->dev, "SMBus base address uninitialized!\n");
-                return -ENODEV;
-        }
-        if (acpi_check_region(sch_smba, SMBIOSIZE, sch_driver.name))
+        res = platform_get_resource(dev, IORESOURCE_IO, 0);
+        if (!res)
                 return -EBUSY;
-        if (!request_region(sch_smba, SMBIOSIZE, sch_driver.name)) {
+
+        if (!request_region(res->start, resource_size(res), dev->name)) {
                 dev_err(&dev->dev, "SMBus region 0x%x already in use!\n",
                         sch_smba);
                 return -EBUSY;
         }
+
+        sch_smba = res->start;
+
         dev_dbg(&dev->dev, "SMBA = 0x%X\n", sch_smba);
 
         /* set up the sysfs linkage to our parent device */
@@ -298,37 +277,43 @@ static int __devinit sch_probe(struct pci_dev *dev,
         retval = i2c_add_adapter(&sch_adapter);
         if (retval) {
                 dev_err(&dev->dev, "Couldn't register adapter!\n");
-                release_region(sch_smba, SMBIOSIZE);
+                release_region(res->start, resource_size(res));
                 sch_smba = 0;
         }
 
         return retval;
 }
 
-static void __devexit sch_remove(struct pci_dev *dev)
+static int __devexit smbus_sch_remove(struct platform_device *pdev)
 {
+        struct resource *res;
         if (sch_smba) {
                 i2c_del_adapter(&sch_adapter);
-                release_region(sch_smba, SMBIOSIZE);
+                res = platform_get_resource(pdev, IORESOURCE_IO, 0);
+                release_region(res->start, resource_size(res));
                 sch_smba = 0;
         }
+
+        return 0;
 }
 
-static struct pci_driver sch_driver = {
-        .name           = "isch_smbus",
-        .id_table       = sch_ids,
-        .probe          = sch_probe,
-        .remove         = __devexit_p(sch_remove),
+static struct platform_driver smbus_sch_driver = {
+        .driver = {
+                .name = "isch_smbus",
+                .owner = THIS_MODULE,
+        },
+        .probe          = smbus_sch_probe,
+        .remove         = __devexit_p(smbus_sch_remove),
 };
 
 static int __init i2c_sch_init(void)
 {
-        return pci_register_driver(&sch_driver);
+        return platform_driver_register(&smbus_sch_driver);
 }
 
 static void __exit i2c_sch_exit(void)
 {
-        pci_unregister_driver(&sch_driver);
+        platform_driver_unregister(&smbus_sch_driver);
 }
 
 MODULE_AUTHOR("Jacob Pan <jacob.jun.pan@intel.com>");
@@ -337,3 +322,4 @@ MODULE_LICENSE("GPL");
 
 module_init(i2c_sch_init);
 module_exit(i2c_sch_exit);
+MODULE_ALIAS("platform:isch_smbus");
diff --git a/drivers/i2c/busses/i2c-ixp2000.c b/drivers/i2c/busses/i2c-ixp2000.c
index c016f7a2c5fc..5d8aed5ec21b 100644
--- a/drivers/i2c/busses/i2c-ixp2000.c
+++ b/drivers/i2c/busses/i2c-ixp2000.c
@@ -32,6 +32,7 @@
 #include <linux/module.h>
 #include <linux/i2c.h>
 #include <linux/i2c-algo-bit.h>
+#include <linux/slab.h>
 
 #include <mach/hardware.h>      /* Pick up IXP2000-specific bits */
 #include <mach/gpio.h>
diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c
index d325e86e3103..b74e6dc6886c 100644
--- a/drivers/i2c/busses/i2c-mpc.c
+++ b/drivers/i2c/busses/i2c-mpc.c
@@ -19,6 +19,7 @@
 #include <linux/init.h>
 #include <linux/of_platform.h>
 #include <linux/of_i2c.h>
+#include <linux/slab.h>
 
 #include <linux/io.h>
 #include <linux/fsl_devices.h>
@@ -31,6 +32,9 @@
 
 #define DRV_NAME "mpc-i2c"
 
+#define MPC_I2C_CLOCK_LEGACY   0
+#define MPC_I2C_CLOCK_PRESERVE (~0U)
+
 #define MPC_I2C_FDR   0x04
 #define MPC_I2C_CR    0x08
 #define MPC_I2C_SR    0x0c
@@ -59,6 +63,7 @@ struct mpc_i2c {
         wait_queue_head_t queue;
         struct i2c_adapter adap;
         int irq;
+        u32 real_clk;
 };
 
 struct mpc_i2c_divider {
@@ -66,10 +71,9 @@ struct mpc_i2c_divider {
         u16 fdr;        /* including dfsrr */
 };
 
-struct mpc_i2c_match_data {
-        void (*setclock)(struct device_node *node,
-                         struct mpc_i2c *i2c,
-                         u32 clock, u32 prescaler);
+struct mpc_i2c_data {
+        void (*setup)(struct device_node *node, struct mpc_i2c *i2c,
+                      u32 clock, u32 prescaler);
         u32 prescaler;
 };
 
@@ -93,20 +97,23 @@ static irqreturn_t mpc_i2c_isr(int irq, void *dev_id)
 /* Sometimes 9th clock pulse isn't generated, and slave doesn't release
  * the bus, because it wants to send ACK.
  * Following sequence of enabling/disabling and sending start/stop generates
- * the pulse, so it's all OK.
+ * the 9 pulses, so it's all OK.
  */
 static void mpc_i2c_fixup(struct mpc_i2c *i2c)
 {
-        writeccr(i2c, 0);
-        udelay(30);
-        writeccr(i2c, CCR_MEN);
-        udelay(30);
-        writeccr(i2c, CCR_MSTA | CCR_MTX);
-        udelay(30);
-        writeccr(i2c, CCR_MSTA | CCR_MTX | CCR_MEN);
-        udelay(30);
-        writeccr(i2c, CCR_MEN);
-        udelay(30);
+        int k;
+        u32 delay_val = 1000000 / i2c->real_clk + 1;
+
+        if (delay_val < 2)
+                delay_val = 2;
+
+        for (k = 9; k; k--) {
+                writeccr(i2c, 0);
+                writeccr(i2c, CCR_MSTA | CCR_MTX | CCR_MEN);
+                udelay(delay_val);
+                writeccr(i2c, CCR_MEN);
+                udelay(delay_val << 1);
+        }
 }
 
 static int i2c_wait(struct mpc_i2c *i2c, unsigned timeout, int writing)
@@ -115,7 +122,7 @@ static int i2c_wait(struct mpc_i2c *i2c, unsigned timeout, int writing)
         u32 x;
         int result = 0;
 
-        if (i2c->irq == NO_IRQ) {
+        if (!i2c->irq) {
                 while (!(readb(i2c->base + MPC_I2C_SR) & CSR_MIF)) {
                         schedule();
                         if (time_after(jiffies, orig_jiffies + timeout)) {
@@ -164,8 +171,8 @@ static int i2c_wait(struct mpc_i2c *i2c, unsigned timeout, int writing)
         return 0;
 }
 
-#ifdef CONFIG_PPC_MPC52xx
-static const struct mpc_i2c_divider mpc_i2c_dividers_52xx[] = {
+#if defined(CONFIG_PPC_MPC52xx) || defined(CONFIG_PPC_MPC512x)
+static const struct mpc_i2c_divider mpc_i2c_dividers_52xx[] __devinitconst = {
         {20, 0x20}, {22, 0x21}, {24, 0x22}, {26, 0x23},
         {28, 0x24}, {30, 0x01}, {32, 0x25}, {34, 0x02},
         {36, 0x26}, {40, 0x27}, {44, 0x04}, {48, 0x28},
@@ -186,15 +193,19 @@ static const struct mpc_i2c_divider mpc_i2c_dividers_52xx[] = {
         {10240, 0x9d}, {12288, 0x9e}, {15360, 0x9f}
 };
 
-int mpc_i2c_get_fdr_52xx(struct device_node *node, u32 clock, int prescaler)
+static int __devinit mpc_i2c_get_fdr_52xx(struct device_node *node, u32 clock,
+                                          int prescaler, u32 *real_clk)
 {
         const struct mpc_i2c_divider *div = NULL;
         unsigned int pvr = mfspr(SPRN_PVR);
         u32 divider;
         int i;
 
-        if (!clock)
+        if (clock == MPC_I2C_CLOCK_LEGACY) {
+                /* see below - default fdr = 0x3f -> div = 2048 */
+                *real_clk = mpc5xxx_get_bus_frequency(node) / 2048;
                 return -EINVAL;
+        }
 
         /* Determine divider value */
         divider = mpc5xxx_get_bus_frequency(node) / clock;
@@ -212,33 +223,77 @@ int mpc_i2c_get_fdr_52xx(struct device_node *node, u32 clock, int prescaler)
                         break;
         }
 
-        return div ? (int)div->fdr : -EINVAL;
+        *real_clk = mpc5xxx_get_bus_frequency(node) / div->divider;
+        return (int)div->fdr;
 }
 
-static void mpc_i2c_setclock_52xx(struct device_node *node,
-                                  struct mpc_i2c *i2c,
-                                  u32 clock, u32 prescaler)
+static void __devinit mpc_i2c_setup_52xx(struct device_node *node,
+                                         struct mpc_i2c *i2c,
+                                         u32 clock, u32 prescaler)
 {
         int ret, fdr;
 
-        ret = mpc_i2c_get_fdr_52xx(node, clock, prescaler);
+        if (clock == MPC_I2C_CLOCK_PRESERVE) {
+                dev_dbg(i2c->dev, "using fdr %d\n",
+                        readb(i2c->base + MPC_I2C_FDR));
+                return;
+        }
+
+        ret = mpc_i2c_get_fdr_52xx(node, clock, prescaler, &i2c->real_clk);
         fdr = (ret >= 0) ? ret : 0x3f; /* backward compatibility */
 
         writeb(fdr & 0xff, i2c->base + MPC_I2C_FDR);
 
         if (ret >= 0)
-                dev_info(i2c->dev, "clock %d Hz (fdr=%d)\n", clock, fdr);
+                dev_info(i2c->dev, "clock %u Hz (fdr=%d)\n", i2c->real_clk,
+                         fdr);
+}
+#else /* !(CONFIG_PPC_MPC52xx || CONFIG_PPC_MPC512x) */
+static void __devinit mpc_i2c_setup_52xx(struct device_node *node,
+                                         struct mpc_i2c *i2c,
+                                         u32 clock, u32 prescaler)
+{
 }
-#else /* !CONFIG_PPC_MPC52xx */
-static void mpc_i2c_setclock_52xx(struct device_node *node,
-                                  struct mpc_i2c *i2c,
-                                  u32 clock, u32 prescaler)
+#endif /* CONFIG_PPC_MPC52xx || CONFIG_PPC_MPC512x */
+
+#ifdef CONFIG_PPC_MPC512x
+static void __devinit mpc_i2c_setup_512x(struct device_node *node,
+                                         struct mpc_i2c *i2c,
+                                         u32 clock, u32 prescaler)
 {
+        struct device_node *node_ctrl;
+        void __iomem *ctrl;
+        const u32 *pval;
+        u32 idx;
+
+        /* Enable I2C interrupts for mpc5121 */
+        node_ctrl = of_find_compatible_node(NULL, NULL,
+                                            "fsl,mpc5121-i2c-ctrl");
+        if (node_ctrl) {
+                ctrl = of_iomap(node_ctrl, 0);
+                if (ctrl) {
+                        /* Interrupt enable bits for i2c-0/1/2: bit 24/26/28 */
+                        pval = of_get_property(node, "reg", NULL);
+                        idx = (*pval & 0xff) / 0x20;
+                        setbits32(ctrl, 1 << (24 + idx * 2));
+                        iounmap(ctrl);
+                }
+                of_node_put(node_ctrl);
+        }
+
+        /* The clock setup for the 52xx works also fine for the 512x */
+        mpc_i2c_setup_52xx(node, i2c, clock, prescaler);
 }
-#endif /* CONFIG_PPC_MPC52xx*/
+#else /* CONFIG_PPC_MPC512x */
+static void __devinit mpc_i2c_setup_512x(struct device_node *node,
+                                         struct mpc_i2c *i2c,
+                                         u32 clock, u32 prescaler)
+{
+}
+#endif /* CONFIG_PPC_MPC512x */
 
 #ifdef CONFIG_FSL_SOC
-static const struct mpc_i2c_divider mpc_i2c_dividers_8xxx[] = {
+static const struct mpc_i2c_divider mpc_i2c_dividers_8xxx[] __devinitconst = {
         {160, 0x0120}, {192, 0x0121}, {224, 0x0122}, {256, 0x0123},
         {288, 0x0100}, {320, 0x0101}, {352, 0x0601}, {384, 0x0102},
         {416, 0x0602}, {448, 0x0126}, {480, 0x0103}, {512, 0x0127},
@@ -258,7 +313,7 @@ static const struct mpc_i2c_divider mpc_i2c_dividers_8xxx[] = {
         {49152, 0x011e}, {61440, 0x011f}
 };
 
-u32 mpc_i2c_get_sec_cfg_8xxx(void)
+static u32 __devinit mpc_i2c_get_sec_cfg_8xxx(void)
 {
         struct device_node *node = NULL;
         u32 __iomem *reg;
@@ -287,14 +342,18 @@ u32 mpc_i2c_get_sec_cfg_8xxx(void)
         return val;
 }
 
-int mpc_i2c_get_fdr_8xxx(struct device_node *node, u32 clock, u32 prescaler)
+static int __devinit mpc_i2c_get_fdr_8xxx(struct device_node *node, u32 clock,
+                                          u32 prescaler, u32 *real_clk)
 {
         const struct mpc_i2c_divider *div = NULL;
         u32 divider;
         int i;
 
-        if (!clock)
+        if (clock == MPC_I2C_CLOCK_LEGACY) {
+                /* see below - default fdr = 0x1031 -> div = 16 * 3072 */
+                *real_clk = fsl_get_sys_freq() / prescaler / (16 * 3072);
                 return -EINVAL;
+        }
 
         /* Determine proper divider value */
         if (of_device_is_compatible(node, "fsl,mpc8544-i2c"))
@@ -317,16 +376,24 @@ int mpc_i2c_get_fdr_8xxx(struct device_node *node, u32 clock, u32 prescaler)
                         break;
         }
 
+        *real_clk = fsl_get_sys_freq() / prescaler / div->divider;
         return div ? (int)div->fdr : -EINVAL;
 }
 
-static void mpc_i2c_setclock_8xxx(struct device_node *node,
-                                  struct mpc_i2c *i2c,
-                                  u32 clock, u32 prescaler)
+static void __devinit mpc_i2c_setup_8xxx(struct device_node *node,
+                                         struct mpc_i2c *i2c,
+                                         u32 clock, u32 prescaler)
 {
         int ret, fdr;
 
-        ret = mpc_i2c_get_fdr_8xxx(node, clock, prescaler);
+        if (clock == MPC_I2C_CLOCK_PRESERVE) {
+                dev_dbg(i2c->dev, "using dfsrr %d, fdr %d\n",
+                        readb(i2c->base + MPC_I2C_DFSRR),
+                        readb(i2c->base + MPC_I2C_FDR));
+                return;
+        }
+
+        ret = mpc_i2c_get_fdr_8xxx(node, clock, prescaler, &i2c->real_clk);
         fdr = (ret >= 0) ? ret : 0x1031; /* backward compatibility */
 
         writeb(fdr & 0xff, i2c->base + MPC_I2C_FDR);
@@ -334,13 +401,13 @@ static void mpc_i2c_setclock_8xxx(struct device_node *node,
 
         if (ret >= 0)
                 dev_info(i2c->dev, "clock %d Hz (dfsrr=%d fdr=%d)\n",
-                         clock, fdr >> 8, fdr & 0xff);
+                         i2c->real_clk, fdr >> 8, fdr & 0xff);
 }
 
 #else /* !CONFIG_FSL_SOC */
-static void mpc_i2c_setclock_8xxx(struct device_node *node,
-                                  struct mpc_i2c *i2c,
-                                  u32 clock, u32 prescaler)
+static void __devinit mpc_i2c_setup_8xxx(struct device_node *node,
+                                         struct mpc_i2c *i2c,
+                                         u32 clock, u32 prescaler)
 {
 }
 #endif /* CONFIG_FSL_SOC */
@@ -365,9 +432,6 @@ static int mpc_write(struct mpc_i2c *i2c, int target,
         unsigned timeout = i2c->adap.timeout;
         u32 flags = restart ? CCR_RSTA : 0;
 
-        /* Start with MEN */
-        if (!restart)
-                writeccr(i2c, CCR_MEN);
         /* Start as master */
         writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_MTX | flags);
         /* Write target byte */
@@ -396,9 +460,6 @@ static int mpc_read(struct mpc_i2c *i2c, int target,
         int i, result;
         u32 flags = restart ? CCR_RSTA : 0;
 
-        /* Start with MEN */
-        if (!restart)
-                writeccr(i2c, CCR_MEN);
         /* Switch to read - restart */
         writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_MTX | flags);
         /* Write target address byte - this time with the read flag set */
@@ -425,9 +486,9 @@ static int mpc_read(struct mpc_i2c *i2c, int target,
                 /* Generate txack on next to last byte */
                 if (i == length - 2)
                         writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_TXAK);
-                /* Generate stop on last byte */
+                /* Do not generate stop on last byte */
                 if (i == length - 1)
-                        writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_TXAK);
+                        writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_MTX);
                 data[i] = readb(i2c->base + MPC_I2C_DR);
         }
 
@@ -452,10 +513,14 @@ static int mpc_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
                         return -EINTR;
                 }
                 if (time_after(jiffies, orig_jiffies + HZ)) {
+                        u8 status = readb(i2c->base + MPC_I2C_SR);
+
                         dev_dbg(i2c->dev, "timeout\n");
-                        if (readb(i2c->base + MPC_I2C_SR) ==
-                            (CSR_MCF | CSR_MBB | CSR_RXAK))
+                        if ((status & (CSR_MCF | CSR_MBB | CSR_RXAK)) != 0) {
+                                writeb(status & ~CSR_MAL,
+                                       i2c->base + MPC_I2C_SR);
                                 mpc_i2c_fixup(i2c);
+                        }
                         return -EIO;
                 }
                 schedule();
@@ -495,12 +560,12 @@ static struct i2c_adapter mpc_ops = {
         .timeout = HZ,
 };
 
-static int __devinit fsl_i2c_probe(struct of_device *op,
+static int __devinit fsl_i2c_probe(struct platform_device *op,
                                    const struct of_device_id *match)
 {
         struct mpc_i2c *i2c;
         const u32 *prop;
-        u32 clock = 0;
+        u32 clock = MPC_I2C_CLOCK_LEGACY;
         int result = 0;
         int plen;
 
@@ -512,15 +577,15 @@ static int __devinit fsl_i2c_probe(struct of_device *op,
 
         init_waitqueue_head(&i2c->queue);
 
-        i2c->base = of_iomap(op->node, 0);
+        i2c->base = of_iomap(op->dev.of_node, 0);
         if (!i2c->base) {
                 dev_err(i2c->dev, "failed to map controller\n");
                 result = -ENOMEM;
                 goto fail_map;
         }
 
-        i2c->irq = irq_of_parse_and_map(op->node, 0);
-        if (i2c->irq != NO_IRQ) { /* i2c->irq = NO_IRQ implies polling */
+        i2c->irq = irq_of_parse_and_map(op->dev.of_node, 0);
+        if (i2c->irq) { /* no i2c->irq implies polling */
                 result = request_irq(i2c->irq, mpc_i2c_isr,
                                      IRQF_SHARED, "i2c-mpc", i2c);
                 if (result < 0) {
@@ -529,35 +594,45 @@ static int __devinit fsl_i2c_probe(struct of_device *op,
                 }
         }
 
-        if (!of_get_property(op->node, "fsl,preserve-clocking", NULL)) {
-                prop = of_get_property(op->node, "clock-frequency", &plen);
+        if (of_get_property(op->dev.of_node, "fsl,preserve-clocking", NULL)) {
+                clock = MPC_I2C_CLOCK_PRESERVE;
+        } else {
+                prop = of_get_property(op->dev.of_node, "clock-frequency",
+                                        &plen);
                 if (prop && plen == sizeof(u32))
                         clock = *prop;
+        }
 
-                if (match->data) {
-                        struct mpc_i2c_match_data *data =
-                                (struct mpc_i2c_match_data *)match->data;
-                        data->setclock(op->node, i2c, clock, data->prescaler);
-                } else {
-                        /* Backwards compatibility */
-                        if (of_get_property(op->node, "dfsrr", NULL))
-                                mpc_i2c_setclock_8xxx(op->node, i2c,
-                                                      clock, 0);
-                }
+        if (match->data) {
+                struct mpc_i2c_data *data = match->data;
+                data->setup(op->dev.of_node, i2c, clock, data->prescaler);
+        } else {
+                /* Backwards compatibility */
+                if (of_get_property(op->dev.of_node, "dfsrr", NULL))
+                        mpc_i2c_setup_8xxx(op->dev.of_node, i2c, clock, 0);
         }
 
+        prop = of_get_property(op->dev.of_node, "fsl,timeout", &plen);
+        if (prop && plen == sizeof(u32)) {
+                mpc_ops.timeout = *prop * HZ / 1000000;
+                if (mpc_ops.timeout < 5)
+                        mpc_ops.timeout = 5;
+        }
+        dev_info(i2c->dev, "timeout %u us\n", mpc_ops.timeout * 1000000 / HZ);
+
         dev_set_drvdata(&op->dev, i2c);
 
         i2c->adap = mpc_ops;
         i2c_set_adapdata(&i2c->adap, i2c);
         i2c->adap.dev.parent = &op->dev;
+        i2c->adap.dev.of_node = of_node_get(op->dev.of_node);
 
         result = i2c_add_adapter(&i2c->adap);
         if (result < 0) {
                 dev_err(i2c->dev, "failed to add adapter\n");
                 goto fail_add;
         }
-        of_register_i2c_devices(&i2c->adap, op->node);
+        of_i2c_register_devices(&i2c->adap);
 
         return result;
 
@@ -572,14 +647,14 @@ static int __devinit fsl_i2c_probe(struct of_device *op,
         return result;
 };
 
-static int __devexit fsl_i2c_remove(struct of_device *op)
+static int __devexit fsl_i2c_remove(struct platform_device *op)
 {
         struct mpc_i2c *i2c = dev_get_drvdata(&op->dev);
 
         i2c_del_adapter(&i2c->adap);
         dev_set_drvdata(&op->dev, NULL);
 
-        if (i2c->irq != NO_IRQ)
+        if (i2c->irq)
                 free_irq(i2c->irq, i2c);
 
         irq_dispose_mapping(i2c->irq);
@@ -588,55 +663,50 @@ static int __devexit fsl_i2c_remove(struct of_device *op)
         return 0;
 };
 
+static struct mpc_i2c_data mpc_i2c_data_512x __devinitdata = {
+        .setup = mpc_i2c_setup_512x,
+};
+
+static struct mpc_i2c_data mpc_i2c_data_52xx __devinitdata = {
+        .setup = mpc_i2c_setup_52xx,
+};
+
+static struct mpc_i2c_data mpc_i2c_data_8313 __devinitdata = {
+        .setup = mpc_i2c_setup_8xxx,
+};
+
+static struct mpc_i2c_data mpc_i2c_data_8543 __devinitdata = {
+        .setup = mpc_i2c_setup_8xxx,
+        .prescaler = 2,
+};
+
+static struct mpc_i2c_data mpc_i2c_data_8544 __devinitdata = {
+        .setup = mpc_i2c_setup_8xxx,
+        .prescaler = 3,
+};
+
 static const struct of_device_id mpc_i2c_of_match[] = {
-        {.compatible = "mpc5200-i2c",
-         .data = &(struct mpc_i2c_match_data) {
-                        .setclock = mpc_i2c_setclock_52xx,
-                },
-        },
-        {.compatible = "fsl,mpc5200b-i2c",
-         .data = &(struct mpc_i2c_match_data) {
-                        .setclock = mpc_i2c_setclock_52xx,
-                },
-        },
-        {.compatible = "fsl,mpc5200-i2c",
-         .data = &(struct mpc_i2c_match_data) {
-                        .setclock = mpc_i2c_setclock_52xx,
-                },
-        },
-        {.compatible = "fsl,mpc8313-i2c",
-         .data = &(struct mpc_i2c_match_data) {
-                        .setclock = mpc_i2c_setclock_8xxx,
-                },
-        },
-        {.compatible = "fsl,mpc8543-i2c",
-         .data = &(struct mpc_i2c_match_data) {
-                        .setclock = mpc_i2c_setclock_8xxx,
-                        .prescaler = 2,
-                },
-        },
-        {.compatible = "fsl,mpc8544-i2c",
-         .data = &(struct mpc_i2c_match_data) {
-                        .setclock = mpc_i2c_setclock_8xxx,
-                        .prescaler = 3,
-                },
+        {.compatible = "mpc5200-i2c", .data = &mpc_i2c_data_52xx, },
+        {.compatible = "fsl,mpc5200b-i2c", .data = &mpc_i2c_data_52xx, },
+        {.compatible = "fsl,mpc5200-i2c", .data = &mpc_i2c_data_52xx, },
+        {.compatible = "fsl,mpc5121-i2c", .data = &mpc_i2c_data_512x, },
+        {.compatible = "fsl,mpc8313-i2c", .data = &mpc_i2c_data_8313, },
+        {.compatible = "fsl,mpc8543-i2c", .data = &mpc_i2c_data_8543, },
+        {.compatible = "fsl,mpc8544-i2c", .data = &mpc_i2c_data_8544, },
         /* Backward compatibility */
-        },
         {.compatible = "fsl-i2c", },
         {},
 };
-
 MODULE_DEVICE_TABLE(of, mpc_i2c_of_match);
 
-
 /* Structure for a device driver */
 static struct of_platform_driver mpc_i2c_driver = {
-        .match_table    = mpc_i2c_of_match,
         .probe          = fsl_i2c_probe,
         .remove         = __devexit_p(fsl_i2c_remove),
-        .driver         = {
-                .owner  = THIS_MODULE,
-                .name   = DRV_NAME,
+        .driver = {
+                .owner = THIS_MODULE,
+                .name = DRV_NAME,
+                .of_match_table = mpc_i2c_of_match,
         },
 };
 
@@ -661,5 +731,5 @@ module_exit(fsl_i2c_exit);
 
 MODULE_AUTHOR("Adrian Cox <adrian@humboldt.co.uk>");
 MODULE_DESCRIPTION("I2C-Bus adapter for MPC107 bridge and "
-                   "MPC824x/85xx/52xx processors");
+                   "MPC824x/83xx/85xx/86xx/512x/52xx processors");
 MODULE_LICENSE("GPL");
diff --git a/drivers/i2c/busses/i2c-mv64xxx.c b/drivers/i2c/busses/i2c-mv64xxx.c
index c3869d94ad42..16242063144f 100644
--- a/drivers/i2c/busses/i2c-mv64xxx.c
+++ b/drivers/i2c/busses/i2c-mv64xxx.c
@@ -10,14 +10,14 @@
  * or implied.
  */
 #include <linux/kernel.h>
+#include <linux/slab.h>
 #include <linux/module.h>
 #include <linux/spinlock.h>
 #include <linux/i2c.h>
 #include <linux/interrupt.h>
 #include <linux/mv643xx_i2c.h>
 #include <linux/platform_device.h>
-
-#include <asm/io.h>
+#include <linux/io.h>
 
 /* Register defines */
 #define MV64XXX_I2C_REG_SLAVE_ADDR                      0x00
@@ -293,13 +293,13 @@ mv64xxx_i2c_do_action(struct mv64xxx_i2c_data *drv_data)
         }
 }
 
-static int
+static irqreturn_t
 mv64xxx_i2c_intr(int irq, void *dev_id)
 {
         struct mv64xxx_i2c_data *drv_data = dev_id;
         unsigned long   flags;
         u32             status;
-        int             rc = IRQ_NONE;
+        irqreturn_t     rc = IRQ_NONE;
 
         spin_lock_irqsave(&drv_data->lock, flags);
         while (readl(drv_data->reg_base + MV64XXX_I2C_REG_CONTROL) &
@@ -338,9 +338,6 @@ mv64xxx_i2c_prepare_for_io(struct mv64xxx_i2c_data *drv_data,
         if (msg->flags & I2C_M_RD)
                 dir = 1;
 
-        if (msg->flags & I2C_M_REV_DIR_ADDR)
-                dir ^= 1;
-
         if (msg->flags & I2C_M_TEN) {
                 drv_data->addr1 = 0xf0 | (((u32)msg->addr & 0x300) >> 7) | dir;
                 drv_data->addr2 = (u32)msg->addr & 0xff;
diff --git a/drivers/i2c/busses/i2c-nforce2.c b/drivers/i2c/busses/i2c-nforce2.c
index ec11d1c4e77b..ff1e127dfea8 100644
--- a/drivers/i2c/busses/i2c-nforce2.c
+++ b/drivers/i2c/busses/i2c-nforce2.c
@@ -56,7 +56,8 @@
 #include <linux/delay.h>
 #include <linux/dmi.h>
 #include <linux/acpi.h>
-#include <asm/io.h>
+#include <linux/slab.h>
+#include <linux/io.h>
 
 MODULE_LICENSE("GPL");
 MODULE_AUTHOR ("Hans-Frieder Vogt <hfvogt@gmx.net>");
@@ -308,7 +309,7 @@ static struct i2c_algorithm smbus_algorithm = {
 };
 
 
-static struct pci_device_id nforce2_ids[] = {
+static const struct pci_device_id nforce2_ids[] = {
         { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS) },
         { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_SMBUS) },
         { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3_SMBUS) },
@@ -403,10 +404,9 @@ static int __devinit nforce2_probe(struct pci_dev *dev, const struct pci_device_
 
         /* SMBus adapter 1 */
         res1 = nforce2_probe_smb(dev, 4, NFORCE_PCI_SMB1, &smbuses[0], "SMB1");
-        if (res1 < 0) {
-                dev_err(&dev->dev, "Error probing SMB1.\n");
+        if (res1 < 0)
                 smbuses[0].base = 0;    /* to have a check value */
-        }
+
         /* SMBus adapter 2 */
         if (dmi_check_system(nforce2_dmi_blacklist2)) {
                 dev_err(&dev->dev, "Disabling SMB2 for safety reasons.\n");
@@ -415,11 +415,10 @@ static int __devinit nforce2_probe(struct pci_dev *dev, const struct pci_device_
         } else {
                 res2 = nforce2_probe_smb(dev, 5, NFORCE_PCI_SMB2, &smbuses[1],
                                          "SMB2");
-                if (res2 < 0) {
-                        dev_err(&dev->dev, "Error probing SMB2.\n");
+                if (res2 < 0)
                         smbuses[1].base = 0;    /* to have a check value */
-                }
         }
+
         if ((res1 < 0) && (res2 < 0)) {
                 /* we did not find even one of the SMBuses, so we give up */
                 kfree(smbuses);
@@ -433,7 +432,7 @@ static int __devinit nforce2_probe(struct pci_dev *dev, const struct pci_device_
 
 static void __devexit nforce2_remove(struct pci_dev *dev)
 {
-        struct nforce2_smbus *smbuses = (void*) pci_get_drvdata(dev);
+        struct nforce2_smbus *smbuses = pci_get_drvdata(dev);
 
         nforce2_set_reference(NULL);
         if (smbuses[0].base) {
diff --git a/drivers/i2c/busses/i2c-nomadik.c b/drivers/i2c/busses/i2c-nomadik.c
new file mode 100644
index 000000000000..c9fffd0389fe
--- /dev/null
+++ b/drivers/i2c/busses/i2c-nomadik.c
@@ -0,0 +1,970 @@
+/*
+ * Copyright (C) 2009 ST-Ericsson SA
+ * Copyright (C) 2009 STMicroelectronics
+ *
+ * I2C master mode controller driver, used in Nomadik 8815
+ * and Ux500 platforms.
+ *
+ * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
+ * Author: Sachin Verma <sachin.verma@st.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2, as
+ * published by the Free Software Foundation.
+ */
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/slab.h>
+#include <linux/interrupt.h>
+#include <linux/i2c.h>
+#include <linux/err.h>
+#include <linux/clk.h>
+#include <linux/io.h>
+
+#include <plat/i2c.h>
+
+#define DRIVER_NAME "nmk-i2c"
+
+/* I2C Controller register offsets */
+#define I2C_CR          (0x000)
+#define I2C_SCR         (0x004)
+#define I2C_HSMCR       (0x008)
+#define I2C_MCR         (0x00C)
+#define I2C_TFR         (0x010)
+#define I2C_SR          (0x014)
+#define I2C_RFR         (0x018)
+#define I2C_TFTR        (0x01C)
+#define I2C_RFTR        (0x020)
+#define I2C_DMAR        (0x024)
+#define I2C_BRCR        (0x028)
+#define I2C_IMSCR       (0x02C)
+#define I2C_RISR        (0x030)
+#define I2C_MISR        (0x034)
+#define I2C_ICR         (0x038)
+
+/* Control registers */
+#define I2C_CR_PE               (0x1 << 0)      /* Peripheral Enable */
+#define I2C_CR_OM               (0x3 << 1)      /* Operating mode */
+#define I2C_CR_SAM              (0x1 << 3)      /* Slave addressing mode */
+#define I2C_CR_SM               (0x3 << 4)      /* Speed mode */
+#define I2C_CR_SGCM             (0x1 << 6)      /* Slave general call mode */
+#define I2C_CR_FTX              (0x1 << 7)      /* Flush Transmit */
+#define I2C_CR_FRX              (0x1 << 8)      /* Flush Receive */
+#define I2C_CR_DMA_TX_EN        (0x1 << 9)      /* DMA Tx enable */
+#define I2C_CR_DMA_RX_EN        (0x1 << 10)     /* DMA Rx Enable */
+#define I2C_CR_DMA_SLE          (0x1 << 11)     /* DMA sync. logic enable */
+#define I2C_CR_LM               (0x1 << 12)     /* Loopback mode */
+#define I2C_CR_FON              (0x3 << 13)     /* Filtering on */
+#define I2C_CR_FS               (0x3 << 15)     /* Force stop enable */
+
+/* Master controller (MCR) register */
+#define I2C_MCR_OP              (0x1 << 0)      /* Operation */
+#define I2C_MCR_A7              (0x7f << 1)     /* 7-bit address */
+#define I2C_MCR_EA10            (0x7 << 8)      /* 10-bit Extended address */
+#define I2C_MCR_SB              (0x1 << 11)     /* Extended address */
+#define I2C_MCR_AM              (0x3 << 12)     /* Address type */
+#define I2C_MCR_STOP            (0x1 << 14)     /* Stop condition */
+#define I2C_MCR_LENGTH          (0x7ff << 15)   /* Transaction length */
+
+/* Status register (SR) */
+#define I2C_SR_OP               (0x3 << 0)      /* Operation */
+#define I2C_SR_STATUS           (0x3 << 2)      /* controller status */
+#define I2C_SR_CAUSE            (0x7 << 4)      /* Abort cause */
+#define I2C_SR_TYPE             (0x3 << 7)      /* Receive type */
+#define I2C_SR_LENGTH           (0x7ff << 9)    /* Transfer length */
+
+/* Interrupt mask set/clear (IMSCR) bits */
+#define I2C_IT_TXFE             (0x1 << 0)
+#define I2C_IT_TXFNE            (0x1 << 1)
+#define I2C_IT_TXFF             (0x1 << 2)
+#define I2C_IT_TXFOVR           (0x1 << 3)
+#define I2C_IT_RXFE             (0x1 << 4)
+#define I2C_IT_RXFNF            (0x1 << 5)
+#define I2C_IT_RXFF             (0x1 << 6)
+#define I2C_IT_RFSR             (0x1 << 16)
+#define I2C_IT_RFSE             (0x1 << 17)
+#define I2C_IT_WTSR             (0x1 << 18)
+#define I2C_IT_MTD              (0x1 << 19)
+#define I2C_IT_STD              (0x1 << 20)
+#define I2C_IT_MAL              (0x1 << 24)
+#define I2C_IT_BERR             (0x1 << 25)
+#define I2C_IT_MTDWS            (0x1 << 28)
+
+#define GEN_MASK(val, mask, sb)  (((val) << (sb)) & (mask))
+
+/* some bits in ICR are reserved */
+#define I2C_CLEAR_ALL_INTS      0x131f007f
+
+/* first three msb bits are reserved */
+#define IRQ_MASK(mask)          (mask & 0x1fffffff)
+
+/* maximum threshold value */
+#define MAX_I2C_FIFO_THRESHOLD  15
+
+/* per-transfer delay, required for the hardware to stabilize */
+#define I2C_DELAY               150
+
+enum i2c_status {
+        I2C_NOP,
+        I2C_ON_GOING,
+        I2C_OK,
+        I2C_ABORT
+};
+
+/* operation */
+enum i2c_operation {
+        I2C_NO_OPERATION = 0xff,
+        I2C_WRITE = 0x00,
+        I2C_READ = 0x01
+};
+
+/* controller response timeout in ms */
+#define I2C_TIMEOUT_MS  2000
+
+/**
+ * struct i2c_nmk_client - client specific data
+ * @slave_adr: 7-bit slave address
+ * @count: no. bytes to be transfered
+ * @buffer: client data buffer
+ * @xfer_bytes: bytes transfered till now
+ * @operation: current I2C operation
+ */
+struct i2c_nmk_client {
+        unsigned short          slave_adr;
+        unsigned long           count;
+        unsigned char           *buffer;
+        unsigned long           xfer_bytes;
+        enum i2c_operation      operation;
+};
+
+/**
+ * struct nmk_i2c_dev - private data structure of the controller
+ * @pdev: parent platform device
+ * @adap: corresponding I2C adapter
+ * @irq: interrupt line for the controller
+ * @virtbase: virtual io memory area
+ * @clk: hardware i2c block clock
+ * @cfg: machine provided controller configuration
+ * @cli: holder of client specific data
+ * @stop: stop condition
+ * @xfer_complete: acknowledge completion for a I2C message
+ * @result: controller propogated result
+ */
+struct nmk_i2c_dev {
+        struct platform_device          *pdev;
+        struct i2c_adapter              adap;
+        int                             irq;
+        void __iomem                    *virtbase;
+        struct clk                      *clk;
+        struct nmk_i2c_controller       cfg;
+        struct i2c_nmk_client           cli;
+        int                             stop;
+        struct completion               xfer_complete;
+        int                             result;
+};
+
+/* controller's abort causes */
+static const char *abort_causes[] = {
+        "no ack received after address transmission",
+        "no ack received during data phase",
+        "ack received after xmission of master code",
+        "master lost arbitration",
+        "slave restarts",
+        "slave reset",
+        "overflow, maxsize is 2047 bytes",
+};
+
+static inline void i2c_set_bit(void __iomem *reg, u32 mask)
+{
+        writel(readl(reg) | mask, reg);
+}
+
+static inline void i2c_clr_bit(void __iomem *reg, u32 mask)
+{
+        writel(readl(reg) & ~mask, reg);
+}
+
+/**
+ * flush_i2c_fifo() - This function flushes the I2C FIFO
+ * @dev: private data of I2C Driver
+ *
+ * This function flushes the I2C Tx and Rx FIFOs. It returns
+ * 0 on successful flushing of FIFO
+ */
+static int flush_i2c_fifo(struct nmk_i2c_dev *dev)
+{
+#define LOOP_ATTEMPTS 10
+        int i;
+        unsigned long timeout;
+
+        /*
+         * flush the transmit and receive FIFO. The flushing
+         * operation takes several cycles before to be completed.
+         * On the completion, the I2C internal logic clears these
+         * bits, until then no one must access Tx, Rx FIFO and
+         * should poll on these bits waiting for the completion.
+         */
+        writel((I2C_CR_FTX | I2C_CR_FRX), dev->virtbase + I2C_CR);
+
+        for (i = 0; i < LOOP_ATTEMPTS; i++) {
+                timeout = jiffies + msecs_to_jiffies(I2C_TIMEOUT_MS);
+
+                while (!time_after(jiffies, timeout)) {
+                        if ((readl(dev->virtbase + I2C_CR) &
+                                (I2C_CR_FTX | I2C_CR_FRX)) == 0)
+                                        return 0;
+                }
+        }
+
+        dev_err(&dev->pdev->dev, "flushing operation timed out "
+                "giving up after %d attempts", LOOP_ATTEMPTS);
+
+        return -ETIMEDOUT;
+}
+
+/**
+ * disable_all_interrupts() - Disable all interrupts of this I2c Bus
+ * @dev: private data of I2C Driver
+ */
+static void disable_all_interrupts(struct nmk_i2c_dev *dev)
+{
+        u32 mask = IRQ_MASK(0);
+        writel(mask, dev->virtbase + I2C_IMSCR);
+}
+
+/**
+ * clear_all_interrupts() - Clear all interrupts of I2C Controller
+ * @dev: private data of I2C Driver
+ */
+static void clear_all_interrupts(struct nmk_i2c_dev *dev)
+{
+        u32 mask;
+        mask = IRQ_MASK(I2C_CLEAR_ALL_INTS);
+        writel(mask, dev->virtbase + I2C_ICR);
+}
+
+/**
+ * init_hw() - initialize the I2C hardware
+ * @dev: private data of I2C Driver
+ */
+static int init_hw(struct nmk_i2c_dev *dev)
+{
+        int stat;
+
+        clk_enable(dev->clk);
+
+        stat = flush_i2c_fifo(dev);
+        if (stat)
+                return stat;
+
+        /* disable the controller */
+        i2c_clr_bit(dev->virtbase + I2C_CR , I2C_CR_PE);
+
+        disable_all_interrupts(dev);
+
+        clear_all_interrupts(dev);
+
+        dev->cli.operation = I2C_NO_OPERATION;
+
+        clk_disable(dev->clk);
+
+        udelay(I2C_DELAY);
+        return 0;
+}
+
+/* enable peripheral, master mode operation */
+#define DEFAULT_I2C_REG_CR      ((1 << 1) | I2C_CR_PE)
+
+/**
+ * load_i2c_mcr_reg() - load the MCR register
+ * @dev: private data of controller
+ */
+static u32 load_i2c_mcr_reg(struct nmk_i2c_dev *dev)
+{
+        u32 mcr = 0;
+
+        /* 7-bit address transaction */
+        mcr |= GEN_MASK(1, I2C_MCR_AM, 12);
+        mcr |= GEN_MASK(dev->cli.slave_adr, I2C_MCR_A7, 1);
+
+        /* start byte procedure not applied */
+        mcr |= GEN_MASK(0, I2C_MCR_SB, 11);
+
+        /* check the operation, master read/write? */
+        if (dev->cli.operation == I2C_WRITE)
+                mcr |= GEN_MASK(I2C_WRITE, I2C_MCR_OP, 0);
+        else
+                mcr |= GEN_MASK(I2C_READ, I2C_MCR_OP, 0);
+
+        /* stop or repeated start? */
+        if (dev->stop)
+                mcr |= GEN_MASK(1, I2C_MCR_STOP, 14);
+        else
+                mcr &= ~(GEN_MASK(1, I2C_MCR_STOP, 14));
+
+        mcr |= GEN_MASK(dev->cli.count, I2C_MCR_LENGTH, 15);
+
+        return mcr;
+}
+
+/**
+ * setup_i2c_controller() - setup the controller
+ * @dev: private data of controller
+ */
+static void setup_i2c_controller(struct nmk_i2c_dev *dev)
+{
+        u32 brcr1, brcr2;
+        u32 i2c_clk, div;
+
+        writel(0x0, dev->virtbase + I2C_CR);
+        writel(0x0, dev->virtbase + I2C_HSMCR);
+        writel(0x0, dev->virtbase + I2C_TFTR);
+        writel(0x0, dev->virtbase + I2C_RFTR);
+        writel(0x0, dev->virtbase + I2C_DMAR);
+
+        /*
+         * set the slsu:
+         *
+         * slsu defines the data setup time after SCL clock
+         * stretching in terms of i2c clk cycles. The
+         * needed setup time for the three modes are 250ns,
+         * 100ns, 10ns repectively thus leading to the values
+         * of 14, 6, 2 for a 48 MHz i2c clk.
+         */
+        writel(dev->cfg.slsu << 16, dev->virtbase + I2C_SCR);
+
+        i2c_clk = clk_get_rate(dev->clk);
+
+        /* fallback to std. mode if machine has not provided it */
+        if (dev->cfg.clk_freq == 0)
+                dev->cfg.clk_freq = 100000;
+
+        /*
+         * The spec says, in case of std. mode the divider is
+         * 2 whereas it is 3 for fast and fastplus mode of
+         * operation. TODO - high speed support.
+         */
+        div = (dev->cfg.clk_freq > 100000) ? 3 : 2;
+
+        /*
+         * generate the mask for baud rate counters. The controller
+         * has two baud rate counters. One is used for High speed
+         * operation, and the other is for std, fast mode, fast mode
+         * plus operation. Currently we do not supprt high speed mode
+         * so set brcr1 to 0.
+         */
+        brcr1 = 0 << 16;
+        brcr2 = (i2c_clk/(dev->cfg.clk_freq * div)) & 0xffff;
+
+        /* set the baud rate counter register */
+        writel((brcr1 | brcr2), dev->virtbase + I2C_BRCR);
+
+        /*
+         * set the speed mode. Currently we support
+         * only standard and fast mode of operation
+         * TODO - support for fast mode plus (upto 1Mb/s)
+         * and high speed (up to 3.4 Mb/s)
+         */
+        if (dev->cfg.sm > I2C_FREQ_MODE_FAST) {
+                dev_err(&dev->pdev->dev, "do not support this mode "
+                        "defaulting to std. mode\n");
+                brcr2 = i2c_clk/(100000 * 2) & 0xffff;
+                writel((brcr1 | brcr2), dev->virtbase + I2C_BRCR);
+                writel(I2C_FREQ_MODE_STANDARD << 4,
+                                dev->virtbase + I2C_CR);
+        }
+        writel(dev->cfg.sm << 4, dev->virtbase + I2C_CR);
+
+        /* set the Tx and Rx FIFO threshold */
+        writel(dev->cfg.tft, dev->virtbase + I2C_TFTR);
+        writel(dev->cfg.rft, dev->virtbase + I2C_RFTR);
+}
+
+/**
+ * read_i2c() - Read from I2C client device
+ * @dev: private data of I2C Driver
+ *
+ * This function reads from i2c client device when controller is in
+ * master mode. There is a completion timeout. If there is no transfer
+ * before timeout error is returned.
+ */
+static int read_i2c(struct nmk_i2c_dev *dev)
+{
+        u32 status = 0;
+        u32 mcr;
+        u32 irq_mask = 0;
+        int timeout;
+
+        mcr = load_i2c_mcr_reg(dev);
+        writel(mcr, dev->virtbase + I2C_MCR);
+
+        /* load the current CR value */
+        writel(readl(dev->virtbase + I2C_CR) | DEFAULT_I2C_REG_CR,
+                        dev->virtbase + I2C_CR);
+
+        /* enable the controller */
+        i2c_set_bit(dev->virtbase + I2C_CR, I2C_CR_PE);
+
+        init_completion(&dev->xfer_complete);
+
+        /* enable interrupts by setting the mask */
+        irq_mask = (I2C_IT_RXFNF | I2C_IT_RXFF |
+                        I2C_IT_MAL | I2C_IT_BERR);
+
+        if (dev->stop)
+                irq_mask |= I2C_IT_MTD;
+        else
+                irq_mask |= I2C_IT_MTDWS;
+
+        irq_mask = I2C_CLEAR_ALL_INTS & IRQ_MASK(irq_mask);
+
+        writel(readl(dev->virtbase + I2C_IMSCR) | irq_mask,
+                        dev->virtbase + I2C_IMSCR);
+
+        timeout = wait_for_completion_interruptible_timeout(
+                &dev->xfer_complete, msecs_to_jiffies(I2C_TIMEOUT_MS));
+
+        if (timeout < 0) {
+                dev_err(&dev->pdev->dev,
+                        "wait_for_completion_interruptible_timeout"
+                        "returned %d waiting for event\n", timeout);
+                status = timeout;
+        }
+
+        if (timeout == 0) {
+                /* controler has timedout, re-init the h/w */
+                dev_err(&dev->pdev->dev, "controller timed out, re-init h/w\n");
+                (void) init_hw(dev);
+                status = -ETIMEDOUT;
+        }
+        return status;
+}
+
+/**
+ * write_i2c() - Write data to I2C client.
+ * @dev: private data of I2C Driver
+ *
+ * This function writes data to I2C client
+ */
+static int write_i2c(struct nmk_i2c_dev *dev)
+{
+        u32 status = 0;
+        u32 mcr;
+        u32 irq_mask = 0;
+        int timeout;
+
+        mcr = load_i2c_mcr_reg(dev);
+
+        writel(mcr, dev->virtbase + I2C_MCR);
+
+        /* load the current CR value */
+        writel(readl(dev->virtbase + I2C_CR) | DEFAULT_I2C_REG_CR,
+                        dev->virtbase + I2C_CR);
+
+        /* enable the controller */
+        i2c_set_bit(dev->virtbase + I2C_CR , I2C_CR_PE);
+
+        init_completion(&dev->xfer_complete);
+
+        /* enable interrupts by settings the masks */
+        irq_mask = (I2C_IT_TXFNE | I2C_IT_TXFOVR |
+                        I2C_IT_MAL | I2C_IT_BERR);
+
+        /*
+         * check if we want to transfer a single or multiple bytes, if so
+         * set the MTDWS bit (Master Transaction Done Without Stop)
+         * to start repeated start operation
+         */
+        if (dev->stop)
+                irq_mask |= I2C_IT_MTD;
+        else
+                irq_mask |= I2C_IT_MTDWS;
+
+        irq_mask = I2C_CLEAR_ALL_INTS & IRQ_MASK(irq_mask);
+
+        writel(readl(dev->virtbase + I2C_IMSCR) | irq_mask,
+                        dev->virtbase + I2C_IMSCR);
+
+        timeout = wait_for_completion_interruptible_timeout(
+                &dev->xfer_complete, msecs_to_jiffies(I2C_TIMEOUT_MS));
+
+        if (timeout < 0) {
+                dev_err(&dev->pdev->dev,
+                        "wait_for_completion_interruptible_timeout"
+                        "returned %d waiting for event\n", timeout);
+                status = timeout;
+        }
+
+        if (timeout == 0) {
+                /* controler has timedout, re-init the h/w */
+                dev_err(&dev->pdev->dev, "controller timed out, re-init h/w\n");
+                (void) init_hw(dev);
+                status = -ETIMEDOUT;
+        }
+
+        return status;
+}
+
+/**
+ * nmk_i2c_xfer() - I2C transfer function used by kernel framework
+ * @i2c_adap: Adapter pointer to the controller
+ * @msgs: Pointer to data to be written.
+ * @num_msgs: Number of messages to be executed
+ *
+ * This is the function called by the generic kernel i2c_transfer()
+ * or i2c_smbus...() API calls. Note that this code is protected by the
+ * semaphore set in the kernel i2c_transfer() function.
+ *
+ * NOTE:
+ * READ TRANSFER : We impose a restriction of the first message to be the
+ *              index message for any read transaction.
+ *              - a no index is coded as '0',
+ *              - 2byte big endian index is coded as '3'
+ *              !!! msg[0].buf holds the actual index.
+ *              This is compatible with generic messages of smbus emulator
+ *              that send a one byte index.
+ *              eg. a I2C transation to read 2 bytes from index 0
+ *                      idx = 0;
+ *                      msg[0].addr = client->addr;
+ *                      msg[0].flags = 0x0;
+ *                      msg[0].len = 1;
+ *                      msg[0].buf = &idx;
+ *
+ *                      msg[1].addr = client->addr;
+ *                      msg[1].flags = I2C_M_RD;
+ *                      msg[1].len = 2;
+ *                      msg[1].buf = rd_buff
+ *                      i2c_transfer(adap, msg, 2);
+ *
+ * WRITE TRANSFER : The I2C standard interface interprets all data as payload.
+ *              If you want to emulate an SMBUS write transaction put the
+ *              index as first byte(or first and second) in the payload.
+ *              eg. a I2C transation to write 2 bytes from index 1
+ *                      wr_buff[0] = 0x1;
+ *                      wr_buff[1] = 0x23;
+ *                      wr_buff[2] = 0x46;
+ *                      msg[0].flags = 0x0;
+ *                      msg[0].len = 3;
+ *                      msg[0].buf = wr_buff;
+ *                      i2c_transfer(adap, msg, 1);
+ *
+ * To read or write a block of data (multiple bytes) using SMBUS emulation
+ * please use the i2c_smbus_read_i2c_block_data()
+ * or i2c_smbus_write_i2c_block_data() API
+ */
+static int nmk_i2c_xfer(struct i2c_adapter *i2c_adap,
+                struct i2c_msg msgs[], int num_msgs)
+{
+        int status;
+        int i;
+        u32 cause;
+        struct nmk_i2c_dev *dev = i2c_get_adapdata(i2c_adap);
+
+        status = init_hw(dev);
+        if (status)
+                return status;
+
+        clk_enable(dev->clk);
+
+        /* setup the i2c controller */
+        setup_i2c_controller(dev);
+
+        for (i = 0; i < num_msgs; i++) {
+                if (unlikely(msgs[i].flags & I2C_M_TEN)) {
+                        dev_err(&dev->pdev->dev, "10 bit addressing"
+                                        "not supported\n");
+                        return -EINVAL;
+                }
+                dev->cli.slave_adr      = msgs[i].addr;
+                dev->cli.buffer         = msgs[i].buf;
+                dev->cli.count          = msgs[i].len;
+                dev->stop = (i < (num_msgs - 1)) ? 0 : 1;
+                dev->result = 0;
+
+                if (msgs[i].flags & I2C_M_RD) {
+                        /* it is a read operation */
+                        dev->cli.operation = I2C_READ;
+                        status = read_i2c(dev);
+                } else {
+                        /* write operation */
+                        dev->cli.operation = I2C_WRITE;
+                        status = write_i2c(dev);
+                }
+                if (status || (dev->result)) {
+                        /* get the abort cause */
+                        cause = (readl(dev->virtbase + I2C_SR) >> 4) & 0x7;
+                        dev_err(&dev->pdev->dev, "error during I2C"
+                                        "message xfer: %d\n", cause);
+                        dev_err(&dev->pdev->dev, "%s\n",
+                                cause >= ARRAY_SIZE(abort_causes)
+                                ? "unknown reason" : abort_causes[cause]);
+                        clk_disable(dev->clk);
+                        return status;
+                }
+                udelay(I2C_DELAY);
+        }
+        clk_disable(dev->clk);
+
+        /* return the no. messages processed */
+        if (status)
+                return status;
+        else
+                return num_msgs;
+}
+
+/**
+ * disable_interrupts() - disable the interrupts
+ * @dev: private data of controller
+ * @irq: interrupt number
+ */
+static int disable_interrupts(struct nmk_i2c_dev *dev, u32 irq)
+{
+        irq = IRQ_MASK(irq);
+        writel(readl(dev->virtbase + I2C_IMSCR) & ~(I2C_CLEAR_ALL_INTS & irq),
+                        dev->virtbase + I2C_IMSCR);
+        return 0;
+}
+
+/**
+ * i2c_irq_handler() - interrupt routine
+ * @irq: interrupt number
+ * @arg: data passed to the handler
+ *
+ * This is the interrupt handler for the i2c driver. Currently
+ * it handles the major interrupts like Rx & Tx FIFO management
+ * interrupts, master transaction interrupts, arbitration and
+ * bus error interrupts. The rest of the interrupts are treated as
+ * unhandled.
+ */
+static irqreturn_t i2c_irq_handler(int irq, void *arg)
+{
+        struct nmk_i2c_dev *dev = arg;
+        u32 tft, rft;
+        u32 count;
+        u32 misr;
+        u32 src = 0;
+
+        /* load Tx FIFO and Rx FIFO threshold values */
+        tft = readl(dev->virtbase + I2C_TFTR);
+        rft = readl(dev->virtbase + I2C_RFTR);
+
+        /* read interrupt status register */
+        misr = readl(dev->virtbase + I2C_MISR);
+
+        src = __ffs(misr);
+        switch ((1 << src)) {
+
+        /* Transmit FIFO nearly empty interrupt */
+        case I2C_IT_TXFNE:
+        {
+                if (dev->cli.operation == I2C_READ) {
+                        /*
+                         * in read operation why do we care for writing?
+                         * so disable the Transmit FIFO interrupt
+                         */
+                        disable_interrupts(dev, I2C_IT_TXFNE);
+                } else {
+                        for (count = (MAX_I2C_FIFO_THRESHOLD - tft - 2);
+                                        (count > 0) &&
+                                        (dev->cli.count != 0);
+                                        count--) {
+                                /* write to the Tx FIFO */
+                                writeb(*dev->cli.buffer,
+                                        dev->virtbase + I2C_TFR);
+                                dev->cli.buffer++;
+                                dev->cli.count--;
+                                dev->cli.xfer_bytes++;
+                        }
+                        /*
+                         * if done, close the transfer by disabling the
+                         * corresponding TXFNE interrupt
+                         */
+                        if (dev->cli.count == 0)
+                                disable_interrupts(dev, I2C_IT_TXFNE);
+                }
+        }
+        break;
+
+        /*
+         * Rx FIFO nearly full interrupt.
+         * This is set when the numer of entries in Rx FIFO is
+         * greater or equal than the threshold value programmed
+         * in RFT
+         */
+        case I2C_IT_RXFNF:
+                for (count = rft; count > 0; count--) {
+                        /* Read the Rx FIFO */
+                        *dev->cli.buffer = readb(dev->virtbase + I2C_RFR);
+                        dev->cli.buffer++;
+                }
+                dev->cli.count -= rft;
+                dev->cli.xfer_bytes += rft;
+                break;
+
+        /* Rx FIFO full */
+        case I2C_IT_RXFF:
+                for (count = MAX_I2C_FIFO_THRESHOLD; count > 0; count--) {
+                        *dev->cli.buffer = readb(dev->virtbase + I2C_RFR);
+                        dev->cli.buffer++;
+                }
+                dev->cli.count -= MAX_I2C_FIFO_THRESHOLD;
+                dev->cli.xfer_bytes += MAX_I2C_FIFO_THRESHOLD;
+                break;
+
+        /* Master Transaction Done with/without stop */
+        case I2C_IT_MTD:
+        case I2C_IT_MTDWS:
+                if (dev->cli.operation == I2C_READ) {
+                        while (!(readl(dev->virtbase + I2C_RISR)
+                                 & I2C_IT_RXFE)) {
+                                if (dev->cli.count == 0)
+                                        break;
+                                *dev->cli.buffer =
+                                        readb(dev->virtbase + I2C_RFR);
+                                dev->cli.buffer++;
+                                dev->cli.count--;
+                                dev->cli.xfer_bytes++;
+                        }
+                }
+
+                i2c_set_bit(dev->virtbase + I2C_ICR, I2C_IT_MTD);
+                i2c_set_bit(dev->virtbase + I2C_ICR, I2C_IT_MTDWS);
+
+                disable_interrupts(dev,
+                                (I2C_IT_TXFNE | I2C_IT_TXFE | I2C_IT_TXFF
+                                        | I2C_IT_TXFOVR | I2C_IT_RXFNF
+                                        | I2C_IT_RXFF | I2C_IT_RXFE));
+
+                if (dev->cli.count) {
+                        dev->result = -1;
+                        dev_err(&dev->pdev->dev, "%lu bytes still remain to be"
+                                        "xfered\n", dev->cli.count);
+                        (void) init_hw(dev);
+                }
+                complete(&dev->xfer_complete);
+
+                break;
+
+        /* Master Arbitration lost interrupt */
+        case I2C_IT_MAL:
+                dev->result = -1;
+                (void) init_hw(dev);
+
+                i2c_set_bit(dev->virtbase + I2C_ICR, I2C_IT_MAL);
+                complete(&dev->xfer_complete);
+
+                break;
+
+        /*
+         * Bus Error interrupt.
+         * This happens when an unexpected start/stop condition occurs
+         * during the transaction.
+         */
+        case I2C_IT_BERR:
+                dev->result = -1;
+                /* get the status */
+                if (((readl(dev->virtbase + I2C_SR) >> 2) & 0x3) == I2C_ABORT)
+                        (void) init_hw(dev);
+
+                i2c_set_bit(dev->virtbase + I2C_ICR, I2C_IT_BERR);
+                complete(&dev->xfer_complete);
+
+                break;
+
+        /*
+         * Tx FIFO overrun interrupt.
+         * This is set when a write operation in Tx FIFO is performed and
+         * the Tx FIFO is full.
+         */
+        case I2C_IT_TXFOVR:
+                dev->result = -1;
+                (void) init_hw(dev);
+
+                dev_err(&dev->pdev->dev, "Tx Fifo Over run\n");
+                complete(&dev->xfer_complete);
+
+                break;
+
+        /* unhandled interrupts by this driver - TODO*/
+        case I2C_IT_TXFE:
+        case I2C_IT_TXFF:
+        case I2C_IT_RXFE:
+        case I2C_IT_RFSR:
+        case I2C_IT_RFSE:
+        case I2C_IT_WTSR:
+        case I2C_IT_STD:
+                dev_err(&dev->pdev->dev, "unhandled Interrupt\n");
+                break;
+        default:
+                dev_err(&dev->pdev->dev, "spurious Interrupt..\n");
+                break;
+        }
+
+        return IRQ_HANDLED;
+}
+
+static unsigned int nmk_i2c_functionality(struct i2c_adapter *adap)
+{
+        return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
+}
+
+static const struct i2c_algorithm nmk_i2c_algo = {
+        .master_xfer    = nmk_i2c_xfer,
+        .functionality  = nmk_i2c_functionality
+};
+
+static int __devinit nmk_i2c_probe(struct platform_device *pdev)
+{
+        int ret = 0;
+        struct resource *res;
+        struct nmk_i2c_controller *pdata =
+                        pdev->dev.platform_data;
+        struct nmk_i2c_dev      *dev;
+        struct i2c_adapter *adap;
+
+        dev = kzalloc(sizeof(struct nmk_i2c_dev), GFP_KERNEL);
+        if (!dev) {
+                dev_err(&pdev->dev, "cannot allocate memory\n");
+                ret = -ENOMEM;
+                goto err_no_mem;
+        }
+
+        dev->pdev = pdev;
+        platform_set_drvdata(pdev, dev);
+
+        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        if (!res) {
+                ret = -ENOENT;
+                goto err_no_resource;
+        }
+
+        if (request_mem_region(res->start, resource_size(res),
+                DRIVER_NAME "I/O region") ==    NULL)   {
+                ret = -EBUSY;
+                goto err_no_region;
+        }
+
+        dev->virtbase = ioremap(res->start, resource_size(res));
+        if (!dev->virtbase) {
+                ret = -ENOMEM;
+                goto err_no_ioremap;
+        }
+
+        dev->irq = platform_get_irq(pdev, 0);
+        ret = request_irq(dev->irq, i2c_irq_handler, IRQF_DISABLED,
+                                DRIVER_NAME, dev);
+        if (ret) {
+                dev_err(&pdev->dev, "cannot claim the irq %d\n", dev->irq);
+                goto err_irq;
+        }
+
+        dev->clk = clk_get(&pdev->dev, NULL);
+        if (IS_ERR(dev->clk)) {
+                dev_err(&pdev->dev, "could not get i2c clock\n");
+                ret = PTR_ERR(dev->clk);
+                goto err_no_clk;
+        }
+
+        adap = &dev->adap;
+        adap->dev.parent = &pdev->dev;
+        adap->owner     = THIS_MODULE;
+        adap->class     = I2C_CLASS_HWMON | I2C_CLASS_SPD;
+        adap->algo      = &nmk_i2c_algo;
+
+        /* fetch the controller id */
+        adap->nr        = pdev->id;
+
+        /* fetch the controller configuration from machine */
+        dev->cfg.clk_freq = pdata->clk_freq;
+        dev->cfg.slsu   = pdata->slsu;
+        dev->cfg.tft    = pdata->tft;
+        dev->cfg.rft    = pdata->rft;
+        dev->cfg.sm     = pdata->sm;
+
+        i2c_set_adapdata(adap, dev);
+
+        ret = init_hw(dev);
+        if (ret != 0) {
+                dev_err(&pdev->dev, "error in initializing i2c hardware\n");
+                goto err_init_hw;
+        }
+
+        dev_dbg(&pdev->dev, "initialize I2C%d bus on virtual "
+                "base %p\n", pdev->id, dev->virtbase);
+
+        ret = i2c_add_numbered_adapter(adap);
+        if (ret) {
+                dev_err(&pdev->dev, "failed to add adapter\n");
+                goto err_add_adap;
+        }
+
+        return 0;
+
+ err_init_hw:
+ err_add_adap:
+        clk_put(dev->clk);
+ err_no_clk:
+        free_irq(dev->irq, dev);
+ err_irq:
+        iounmap(dev->virtbase);
+ err_no_ioremap:
+        release_mem_region(res->start, resource_size(res));
+ err_no_region:
+        platform_set_drvdata(pdev, NULL);
+ err_no_resource:
+        kfree(dev);
+ err_no_mem:
+
+        return ret;
+}
+
+static int __devexit nmk_i2c_remove(struct platform_device *pdev)
+{
+        struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        struct nmk_i2c_dev *dev = platform_get_drvdata(pdev);
+
+        i2c_del_adapter(&dev->adap);
+        flush_i2c_fifo(dev);
+        disable_all_interrupts(dev);
+        clear_all_interrupts(dev);
+        /* disable the controller */
+        i2c_clr_bit(dev->virtbase + I2C_CR, I2C_CR_PE);
+        free_irq(dev->irq, dev);
+        iounmap(dev->virtbase);
+        if (res)
+                release_mem_region(res->start, resource_size(res));
+        clk_put(dev->clk);
+        platform_set_drvdata(pdev, NULL);
+        kfree(dev);
+
+        return 0;
+}
+
+static struct platform_driver nmk_i2c_driver = {
+        .driver = {
+                .owner = THIS_MODULE,
+                .name = DRIVER_NAME,
+        },
+        .probe = nmk_i2c_probe,
+        .remove = __devexit_p(nmk_i2c_remove),
+};
+
+static int __init nmk_i2c_init(void)
+{
+        return platform_driver_register(&nmk_i2c_driver);
+}
+
+static void __exit nmk_i2c_exit(void)
+{
+        platform_driver_unregister(&nmk_i2c_driver);
+}
+
+subsys_initcall(nmk_i2c_init);
+module_exit(nmk_i2c_exit);
+
+MODULE_AUTHOR("Sachin Verma, Srinidhi KASAGAR");
+MODULE_DESCRIPTION("Nomadik/Ux500 I2C driver");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:" DRIVER_NAME);
diff --git a/drivers/i2c/busses/i2c-nuc900.c b/drivers/i2c/busses/i2c-nuc900.c
new file mode 100644
index 000000000000..72434263787b
--- /dev/null
+++ b/drivers/i2c/busses/i2c-nuc900.c
@@ -0,0 +1,708 @@
+/*
+ * linux/drivers/i2c/busses/i2c-nuc900.c
+ *
+ * Copyright (c) 2010 Nuvoton technology corporation.
+ *
+ * This driver based on S3C2410 I2C driver of Ben Dooks <ben-Y5A6D6n0/KfQXOPxS62xeg@public.gmane.org>.
+ * Written by Wan ZongShun <mcuos.com-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation;version 2 of the License.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+
+#include <linux/i2c.h>
+#include <linux/init.h>
+#include <linux/time.h>
+#include <linux/interrupt.h>
+#include <linux/delay.h>
+#include <linux/errno.h>
+#include <linux/err.h>
+#include <linux/platform_device.h>
+#include <linux/clk.h>
+#include <linux/cpufreq.h>
+#include <linux/slab.h>
+#include <linux/io.h>
+
+#include <mach/mfp.h>
+#include <mach/i2c.h>
+
+/* nuc900 i2c registers offset */
+
+#define CSR             0x00
+#define DIVIDER         0x04
+#define CMDR            0x08
+#define SWR             0x0C
+#define RXR             0x10
+#define TXR             0x14
+
+/* nuc900 i2c CSR register bits */
+
+#define IRQEN           0x003
+#define I2CBUSY         0x400
+#define I2CSTART        0x018
+#define IRQFLAG         0x004
+#define ARBIT_LOST      0x200
+#define SLAVE_ACK       0x800
+
+/* nuc900 i2c CMDR register bits */
+
+#define I2C_CMD_START   0x10
+#define I2C_CMD_STOP    0x08
+#define I2C_CMD_READ    0x04
+#define I2C_CMD_WRITE   0x02
+#define I2C_CMD_NACK    0x01
+
+/* i2c controller state */
+
+enum nuc900_i2c_state {
+        STATE_IDLE,
+        STATE_START,
+        STATE_READ,
+        STATE_WRITE,
+        STATE_STOP
+};
+
+/* i2c controller private data */
+
+struct nuc900_i2c {
+        spinlock_t              lock;
+        wait_queue_head_t       wait;
+
+        struct i2c_msg          *msg;
+        unsigned int            msg_num;
+        unsigned int            msg_idx;
+        unsigned int            msg_ptr;
+        unsigned int            irq;
+
+        enum nuc900_i2c_state   state;
+
+        void __iomem            *regs;
+        struct clk              *clk;
+        struct device           *dev;
+        struct resource         *ioarea;
+        struct i2c_adapter      adap;
+};
+
+/* nuc900_i2c_master_complete
+ *
+ * complete the message and wake up the caller, using the given return code,
+ * or zero to mean ok.
+*/
+
+static inline void nuc900_i2c_master_complete(struct nuc900_i2c *i2c, int ret)
+{
+        dev_dbg(i2c->dev, "master_complete %d\n", ret);
+
+        i2c->msg_ptr = 0;
+        i2c->msg = NULL;
+        i2c->msg_idx++;
+        i2c->msg_num = 0;
+        if (ret)
+                i2c->msg_idx = ret;
+
+        wake_up(&i2c->wait);
+}
+
+/* irq enable/disable functions */
+
+static inline void nuc900_i2c_disable_irq(struct nuc900_i2c *i2c)
+{
+        unsigned long tmp;
+
+        tmp = readl(i2c->regs + CSR);
+        writel(tmp & ~IRQEN, i2c->regs + CSR);
+}
+
+static inline void nuc900_i2c_enable_irq(struct nuc900_i2c *i2c)
+{
+        unsigned long tmp;
+
+        tmp = readl(i2c->regs + CSR);
+        writel(tmp | IRQEN, i2c->regs + CSR);
+}
+
+
+/* nuc900_i2c_message_start
+ *
+ * put the start of a message onto the bus
+*/
+
+static void nuc900_i2c_message_start(struct nuc900_i2c *i2c,
+                                      struct i2c_msg *msg)
+{
+        unsigned int addr = (msg->addr & 0x7f) << 1;
+
+        if (msg->flags & I2C_M_RD)
+                addr |= 0x1;
+        writel(addr & 0xff, i2c->regs + TXR);
+        writel(I2C_CMD_START | I2C_CMD_WRITE, i2c->regs + CMDR);
+}
+
+static inline void nuc900_i2c_stop(struct nuc900_i2c *i2c, int ret)
+{
+
+        dev_dbg(i2c->dev, "STOP\n");
+
+        /* stop the transfer */
+        i2c->state = STATE_STOP;
+        writel(I2C_CMD_STOP, i2c->regs + CMDR);
+
+        nuc900_i2c_master_complete(i2c, ret);
+        nuc900_i2c_disable_irq(i2c);
+}
+
+/* helper functions to determine the current state in the set of
+ * messages we are sending
+*/
+
+/* is_lastmsg()
+ *
+ * returns TRUE if the current message is the last in the set
+*/
+
+static inline int is_lastmsg(struct nuc900_i2c *i2c)
+{
+        return i2c->msg_idx >= (i2c->msg_num - 1);
+}
+
+/* is_msglast
+ *
+ * returns TRUE if we this is the last byte in the current message
+*/
+
+static inline int is_msglast(struct nuc900_i2c *i2c)
+{
+        return i2c->msg_ptr == i2c->msg->len-1;
+}
+
+/* is_msgend
+ *
+ * returns TRUE if we reached the end of the current message
+*/
+
+static inline int is_msgend(struct nuc900_i2c *i2c)
+{
+        return i2c->msg_ptr >= i2c->msg->len;
+}
+
+/* i2c_nuc900_irq_nextbyte
+ *
+ * process an interrupt and work out what to do
+ */
+
+static void i2c_nuc900_irq_nextbyte(struct nuc900_i2c *i2c,
+                                                        unsigned long iicstat)
+{
+        unsigned char byte;
+
+        switch (i2c->state) {
+
+        case STATE_IDLE:
+                dev_err(i2c->dev, "%s: called in STATE_IDLE\n", __func__);
+                break;
+
+        case STATE_STOP:
+                dev_err(i2c->dev, "%s: called in STATE_STOP\n", __func__);
+                nuc900_i2c_disable_irq(i2c);
+                break;
+
+        case STATE_START:
+                /* last thing we did was send a start condition on the
+                 * bus, or started a new i2c message
+                 */
+
+                if (iicstat & SLAVE_ACK &&
+                    !(i2c->msg->flags & I2C_M_IGNORE_NAK)) {
+                        /* ack was not received... */
+
+                        dev_dbg(i2c->dev, "ack was not received\n");
+                        nuc900_i2c_stop(i2c, -ENXIO);
+                        break;
+                }
+
+                if (i2c->msg->flags & I2C_M_RD)
+                        i2c->state = STATE_READ;
+                else
+                        i2c->state = STATE_WRITE;
+
+                /* terminate the transfer if there is nothing to do
+                 * as this is used by the i2c probe to find devices.
+                */
+
+                if (is_lastmsg(i2c) && i2c->msg->len == 0) {
+                        nuc900_i2c_stop(i2c, 0);
+                        break;
+                }
+
+                if (i2c->state == STATE_READ)
+                        goto prepare_read;
+
+                /* fall through to the write state, as we will need to
+                 * send a byte as well
+                */
+
+        case STATE_WRITE:
+                /* we are writing data to the device... check for the
+                 * end of the message, and if so, work out what to do
+                 */
+
+                if (!(i2c->msg->flags & I2C_M_IGNORE_NAK)) {
+                        if (iicstat & SLAVE_ACK) {
+                                dev_dbg(i2c->dev, "WRITE: No Ack\n");
+
+                                nuc900_i2c_stop(i2c, -ECONNREFUSED);
+                                break;
+                        }
+                }
+
+retry_write:
+
+                if (!is_msgend(i2c)) {
+                        byte = i2c->msg->buf[i2c->msg_ptr++];
+                        writeb(byte, i2c->regs + TXR);
+                        writel(I2C_CMD_WRITE, i2c->regs + CMDR);
+
+                } else if (!is_lastmsg(i2c)) {
+                        /* we need to go to the next i2c message */
+
+                        dev_dbg(i2c->dev, "WRITE: Next Message\n");
+
+                        i2c->msg_ptr = 0;
+                        i2c->msg_idx++;
+                        i2c->msg++;
+
+                        /* check to see if we need to do another message */
+                        if (i2c->msg->flags & I2C_M_NOSTART) {
+
+                                if (i2c->msg->flags & I2C_M_RD) {
+                                        /* cannot do this, the controller
+                                         * forces us to send a new START
+                                         * when we change direction
+                                        */
+
+                                        nuc900_i2c_stop(i2c, -EINVAL);
+                                }
+
+                                goto retry_write;
+                        } else {
+                                /* send the new start */
+                                nuc900_i2c_message_start(i2c, i2c->msg);
+                                i2c->state = STATE_START;
+                        }
+
+                } else {
+                        /* send stop */
+
+                        nuc900_i2c_stop(i2c, 0);
+                }
+                break;
+
+        case STATE_READ:
+                /* we have a byte of data in the data register, do
+                 * something with it, and then work out wether we are
+                 * going to do any more read/write
+                 */
+
+                byte = readb(i2c->regs + RXR);
+                i2c->msg->buf[i2c->msg_ptr++] = byte;
+
+prepare_read:
+                if (is_msglast(i2c)) {
+                        /* last byte of buffer */
+
+                        if (is_lastmsg(i2c))
+                                writel(I2C_CMD_READ | I2C_CMD_NACK,
+                                                        i2c->regs + CMDR);
+
+                } else if (is_msgend(i2c)) {
+                        /* ok, we've read the entire buffer, see if there
+                         * is anything else we need to do
+                        */
+
+                        if (is_lastmsg(i2c)) {
+                                /* last message, send stop and complete */
+                                dev_dbg(i2c->dev, "READ: Send Stop\n");
+
+                                nuc900_i2c_stop(i2c, 0);
+                        } else {
+                                /* go to the next transfer */
+                                dev_dbg(i2c->dev, "READ: Next Transfer\n");
+
+                                i2c->msg_ptr = 0;
+                                i2c->msg_idx++;
+                                i2c->msg++;
+
+                                writel(I2C_CMD_READ, i2c->regs + CMDR);
+                        }
+
+                } else {
+                        writel(I2C_CMD_READ, i2c->regs + CMDR);
+                }
+
+                break;
+        }
+}
+
+/* nuc900_i2c_irq
+ *
+ * top level IRQ servicing routine
+*/
+
+static irqreturn_t nuc900_i2c_irq(int irqno, void *dev_id)
+{
+        struct nuc900_i2c *i2c = dev_id;
+        unsigned long status;
+
+        status = readl(i2c->regs + CSR);
+        writel(status | IRQFLAG, i2c->regs + CSR);
+
+        if (status & ARBIT_LOST) {
+                /* deal with arbitration loss */
+                dev_err(i2c->dev, "deal with arbitration loss\n");
+                goto out;
+        }
+
+        if (i2c->state == STATE_IDLE) {
+                dev_dbg(i2c->dev, "IRQ: error i2c->state == IDLE\n");
+                goto out;
+        }
+
+        /* pretty much this leaves us with the fact that we've
+         * transmitted or received whatever byte we last sent
+        */
+
+        i2c_nuc900_irq_nextbyte(i2c, status);
+
+ out:
+        return IRQ_HANDLED;
+}
+
+
+/* nuc900_i2c_set_master
+ *
+ * get the i2c bus for a master transaction
+*/
+
+static int nuc900_i2c_set_master(struct nuc900_i2c *i2c)
+{
+        int timeout = 400;
+
+        while (timeout-- > 0) {
+                if (((readl(i2c->regs + SWR) & I2CSTART) == I2CSTART) &&
+                                ((readl(i2c->regs + CSR) & I2CBUSY) == 0)) {
+                        return 0;
+                }
+
+                msleep(1);
+        }
+
+        return -ETIMEDOUT;
+}
+
+/* nuc900_i2c_doxfer
+ *
+ * this starts an i2c transfer
+*/
+
+static int nuc900_i2c_doxfer(struct nuc900_i2c *i2c,
+                              struct i2c_msg *msgs, int num)
+{
+        unsigned long iicstat, timeout;
+        int spins = 20;
+        int ret;
+
+        ret = nuc900_i2c_set_master(i2c);
+        if (ret != 0) {
+                dev_err(i2c->dev, "cannot get bus (error %d)\n", ret);
+                ret = -EAGAIN;
+                goto out;
+        }
+
+        spin_lock_irq(&i2c->lock);
+
+        i2c->msg     = msgs;
+        i2c->msg_num = num;
+        i2c->msg_ptr = 0;
+        i2c->msg_idx = 0;
+        i2c->state   = STATE_START;
+
+        nuc900_i2c_message_start(i2c, msgs);
+        spin_unlock_irq(&i2c->lock);
+
+        timeout = wait_event_timeout(i2c->wait, i2c->msg_num == 0, HZ * 5);
+
+        ret = i2c->msg_idx;
+
+        /* having these next two as dev_err() makes life very
+         * noisy when doing an i2cdetect
+        */
+
+        if (timeout == 0)
+                dev_dbg(i2c->dev, "timeout\n");
+        else if (ret != num)
+                dev_dbg(i2c->dev, "incomplete xfer (%d)\n", ret);
+
+        /* ensure the stop has been through the bus */
+
+        dev_dbg(i2c->dev, "waiting for bus idle\n");
+
+        /* first, try busy waiting briefly */
+        do {
+                iicstat = readl(i2c->regs + CSR);
+        } while ((iicstat & I2CBUSY) && --spins);
+
+        /* if that timed out sleep */
+        if (!spins) {
+                msleep(1);
+                iicstat = readl(i2c->regs + CSR);
+        }
+
+        if (iicstat & I2CBUSY)
+                dev_warn(i2c->dev, "timeout waiting for bus idle\n");
+
+ out:
+        return ret;
+}
+
+/* nuc900_i2c_xfer
+ *
+ * first port of call from the i2c bus code when an message needs
+ * transferring across the i2c bus.
+*/
+
+static int nuc900_i2c_xfer(struct i2c_adapter *adap,
+                        struct i2c_msg *msgs, int num)
+{
+        struct nuc900_i2c *i2c = (struct nuc900_i2c *)adap->algo_data;
+        int retry;
+        int ret;
+
+        nuc900_i2c_enable_irq(i2c);
+
+        for (retry = 0; retry < adap->retries; retry++) {
+
+                ret = nuc900_i2c_doxfer(i2c, msgs, num);
+
+                if (ret != -EAGAIN)
+                        return ret;
+
+                dev_dbg(i2c->dev, "Retrying transmission (%d)\n", retry);
+
+                udelay(100);
+        }
+
+        return -EREMOTEIO;
+}
+
+/* declare our i2c functionality */
+static u32 nuc900_i2c_func(struct i2c_adapter *adap)
+{
+        return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | I2C_FUNC_PROTOCOL_MANGLING;
+}
+
+/* i2c bus registration info */
+
+static const struct i2c_algorithm nuc900_i2c_algorithm = {
+        .master_xfer            = nuc900_i2c_xfer,
+        .functionality          = nuc900_i2c_func,
+};
+
+/* nuc900_i2c_probe
+ *
+ * called by the bus driver when a suitable device is found
+*/
+
+static int __devinit nuc900_i2c_probe(struct platform_device *pdev)
+{
+        struct nuc900_i2c *i2c;
+        struct nuc900_platform_i2c *pdata;
+        struct resource *res;
+        int ret;
+
+        pdata = pdev->dev.platform_data;
+        if (!pdata) {
+                dev_err(&pdev->dev, "no platform data\n");
+                return -EINVAL;
+        }
+
+        i2c = kzalloc(sizeof(struct nuc900_i2c), GFP_KERNEL);
+        if (!i2c) {
+                dev_err(&pdev->dev, "no memory for state\n");
+                return -ENOMEM;
+        }
+
+        strlcpy(i2c->adap.name, "nuc900-i2c0", sizeof(i2c->adap.name));
+        i2c->adap.owner   = THIS_MODULE;
+        i2c->adap.algo    = &nuc900_i2c_algorithm;
+        i2c->adap.retries = 2;
+        i2c->adap.class   = I2C_CLASS_HWMON | I2C_CLASS_SPD;
+
+        spin_lock_init(&i2c->lock);
+        init_waitqueue_head(&i2c->wait);
+
+        /* find the clock and enable it */
+
+        i2c->dev = &pdev->dev;
+        i2c->clk = clk_get(&pdev->dev, NULL);
+        if (IS_ERR(i2c->clk)) {
+                dev_err(&pdev->dev, "cannot get clock\n");
+                ret = -ENOENT;
+                goto err_noclk;
+        }
+
+        dev_dbg(&pdev->dev, "clock source %p\n", i2c->clk);
+
+        clk_enable(i2c->clk);
+
+        /* map the registers */
+
+        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        if (res == NULL) {
+                dev_err(&pdev->dev, "cannot find IO resource\n");
+                ret = -ENOENT;
+                goto err_clk;
+        }
+
+        i2c->ioarea = request_mem_region(res->start, resource_size(res),
+                                         pdev->name);
+
+        if (i2c->ioarea == NULL) {
+                dev_err(&pdev->dev, "cannot request IO\n");
+                ret = -ENXIO;
+                goto err_clk;
+        }
+
+        i2c->regs = ioremap(res->start, resource_size(res));
+
+        if (i2c->regs == NULL) {
+                dev_err(&pdev->dev, "cannot map IO\n");
+                ret = -ENXIO;
+                goto err_ioarea;
+        }
+
+        dev_dbg(&pdev->dev, "registers %p (%p, %p)\n",
+                i2c->regs, i2c->ioarea, res);
+
+        /* setup info block for the i2c core */
+
+        i2c->adap.algo_data = i2c;
+        i2c->adap.dev.parent = &pdev->dev;
+
+        mfp_set_groupg(&pdev->dev);
+
+        clk_get_rate(i2c->clk);
+
+        ret = (i2c->clk.apbfreq)/(pdata->bus_freq * 5) - 1;
+        writel(ret & 0xffff, i2c->regs + DIVIDER);
+
+        /* find the IRQ for this unit (note, this relies on the init call to
+         * ensure no current IRQs pending
+         */
+
+        i2c->irq = ret = platform_get_irq(pdev, 0);
+        if (ret <= 0) {
+                dev_err(&pdev->dev, "cannot find IRQ\n");
+                goto err_iomap;
+        }
+
+        ret = request_irq(i2c->irq, nuc900_i2c_irq, IRQF_DISABLED | IRQF_SHARED,
+                          dev_name(&pdev->dev), i2c);
+
+        if (ret != 0) {
+                dev_err(&pdev->dev, "cannot claim IRQ %d\n", i2c->irq);
+                goto err_iomap;
+        }
+
+        /* Note, previous versions of the driver used i2c_add_adapter()
+         * to add the bus at any number. We now pass the bus number via
+         * the platform data, so if unset it will now default to always
+         * being bus 0.
+         */
+
+        i2c->adap.nr = pdata->bus_num;
+
+        ret = i2c_add_numbered_adapter(&i2c->adap);
+        if (ret < 0) {
+                dev_err(&pdev->dev, "failed to add bus to i2c core\n");
+                goto err_irq;
+        }
+
+        platform_set_drvdata(pdev, i2c);
+
+        dev_info(&pdev->dev, "%s: NUC900 I2C adapter\n",
+                                                dev_name(&i2c->adap.dev));
+        return 0;
+
+ err_irq:
+        free_irq(i2c->irq, i2c);
+
+ err_iomap:
+        iounmap(i2c->regs);
+
+ err_ioarea:
+        release_resource(i2c->ioarea);
+        kfree(i2c->ioarea);
+
+ err_clk:
+        clk_disable(i2c->clk);
+        clk_put(i2c->clk);
+
+ err_noclk:
+        kfree(i2c);
+        return ret;
+}
+
+/* nuc900_i2c_remove
+ *
+ * called when device is removed from the bus
+*/
+
+static int __devexit nuc900_i2c_remove(struct platform_device *pdev)
+{
+        struct nuc900_i2c *i2c = platform_get_drvdata(pdev);
+
+        i2c_del_adapter(&i2c->adap);
+        free_irq(i2c->irq, i2c);
+
+        clk_disable(i2c->clk);
+        clk_put(i2c->clk);
+
+        iounmap(i2c->regs);
+
+        release_resource(i2c->ioarea);
+        kfree(i2c->ioarea);
+        kfree(i2c);
+
+        return 0;
+}
+
+static struct platform_driver nuc900_i2c_driver = {
+        .probe          = nuc900_i2c_probe,
+        .remove         = __devexit_p(nuc900_i2c_remove),
+        .driver         = {
+                .owner  = THIS_MODULE,
+                .name   = "nuc900-i2c0",
+        },
+};
+
+static int __init i2c_adap_nuc900_init(void)
+{
+        return platform_driver_register(&nuc900_i2c_driver);
+}
+
+static void __exit i2c_adap_nuc900_exit(void)
+{
+        platform_driver_unregister(&nuc900_i2c_driver);
+}
+subsys_initcall(i2c_adap_nuc900_init);
+module_exit(i2c_adap_nuc900_exit);
+
+MODULE_DESCRIPTION("NUC900 I2C Bus driver");
+MODULE_AUTHOR("Wan ZongShun, <mcuos.com-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:nuc900-i2c0");
diff --git a/drivers/i2c/busses/i2c-ocores.c b/drivers/i2c/busses/i2c-ocores.c
index 0dabe643ec51..0070371b29f3 100644
--- a/drivers/i2c/busses/i2c-ocores.c
+++ b/drivers/i2c/busses/i2c-ocores.c
@@ -18,7 +18,8 @@
 #include <linux/interrupt.h>
 #include <linux/wait.h>
 #include <linux/i2c-ocores.h>
-#include <asm/io.h>
+#include <linux/slab.h>
+#include <linux/io.h>
 
 struct ocores_i2c {
         void __iomem *base;
diff --git a/drivers/i2c/busses/i2c-octeon.c b/drivers/i2c/busses/i2c-octeon.c
new file mode 100644
index 000000000000..56dbe54e8811
--- /dev/null
+++ b/drivers/i2c/busses/i2c-octeon.c
@@ -0,0 +1,652 @@
+/*
+ * (C) Copyright 2009-2010
+ * Nokia Siemens Networks, michael.lawnick.ext@nsn.com
+ *
+ * Portions Copyright (C) 2010 Cavium Networks, Inc.
+ *
+ * This is a driver for the i2c adapter in Cavium Networks' OCTEON processors.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/sched.h>
+#include <linux/slab.h>
+#include <linux/init.h>
+
+#include <linux/io.h>
+#include <linux/i2c.h>
+#include <linux/interrupt.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <asm/octeon/octeon.h>
+
+#define DRV_NAME "i2c-octeon"
+
+/* The previous out-of-tree version was implicitly version 1.0. */
+#define DRV_VERSION     "2.0"
+
+/* register offsets */
+#define SW_TWSI  0x00
+#define TWSI_INT 0x10
+
+/* Controller command patterns */
+#define SW_TWSI_V               0x8000000000000000ull
+#define SW_TWSI_EOP_TWSI_DATA   0x0C00000100000000ull
+#define SW_TWSI_EOP_TWSI_CTL    0x0C00000200000000ull
+#define SW_TWSI_EOP_TWSI_CLKCTL 0x0C00000300000000ull
+#define SW_TWSI_EOP_TWSI_STAT   0x0C00000300000000ull
+#define SW_TWSI_EOP_TWSI_RST    0x0C00000700000000ull
+#define SW_TWSI_OP_TWSI_CLK     0x0800000000000000ull
+#define SW_TWSI_R               0x0100000000000000ull
+
+/* Controller command and status bits */
+#define TWSI_CTL_CE   0x80
+#define TWSI_CTL_ENAB 0x40
+#define TWSI_CTL_STA  0x20
+#define TWSI_CTL_STP  0x10
+#define TWSI_CTL_IFLG 0x08
+#define TWSI_CTL_AAK  0x04
+
+/* Some status values */
+#define STAT_START      0x08
+#define STAT_RSTART     0x10
+#define STAT_TXADDR_ACK 0x18
+#define STAT_TXDATA_ACK 0x28
+#define STAT_RXADDR_ACK 0x40
+#define STAT_RXDATA_ACK 0x50
+#define STAT_IDLE       0xF8
+
+struct octeon_i2c {
+        wait_queue_head_t queue;
+        struct i2c_adapter adap;
+        int irq;
+        int twsi_freq;
+        int sys_freq;
+        resource_size_t twsi_phys;
+        void __iomem *twsi_base;
+        resource_size_t regsize;
+        struct device *dev;
+};
+
+/**
+ * octeon_i2c_write_sw - write an I2C core register.
+ * @i2c: The struct octeon_i2c.
+ * @eop_reg: Register selector.
+ * @data: Value to be written.
+ *
+ * The I2C core registers are accessed indirectly via the SW_TWSI CSR.
+ */
+static void octeon_i2c_write_sw(struct octeon_i2c *i2c,
+                                u64 eop_reg,
+                                u8 data)
+{
+        u64 tmp;
+
+        __raw_writeq(SW_TWSI_V | eop_reg | data, i2c->twsi_base + SW_TWSI);
+        do {
+                tmp = __raw_readq(i2c->twsi_base + SW_TWSI);
+        } while ((tmp & SW_TWSI_V) != 0);
+}
+
+/**
+ * octeon_i2c_read_sw - write an I2C core register.
+ * @i2c: The struct octeon_i2c.
+ * @eop_reg: Register selector.
+ *
+ * Returns the data.
+ *
+ * The I2C core registers are accessed indirectly via the SW_TWSI CSR.
+ */
+static u8 octeon_i2c_read_sw(struct octeon_i2c *i2c, u64 eop_reg)
+{
+        u64 tmp;
+
+        __raw_writeq(SW_TWSI_V | eop_reg | SW_TWSI_R, i2c->twsi_base + SW_TWSI);
+        do {
+                tmp = __raw_readq(i2c->twsi_base + SW_TWSI);
+        } while ((tmp & SW_TWSI_V) != 0);
+
+        return tmp & 0xFF;
+}
+
+/**
+ * octeon_i2c_write_int - write the TWSI_INT register
+ * @i2c: The struct octeon_i2c.
+ * @data: Value to be written.
+ */
+static void octeon_i2c_write_int(struct octeon_i2c *i2c, u64 data)
+{
+        u64 tmp;
+
+        __raw_writeq(data, i2c->twsi_base + TWSI_INT);
+        tmp = __raw_readq(i2c->twsi_base + TWSI_INT);
+}
+
+/**
+ * octeon_i2c_int_enable - enable the TS interrupt.
+ * @i2c: The struct octeon_i2c.
+ *
+ * The interrupt will be asserted when there is non-STAT_IDLE state in
+ * the SW_TWSI_EOP_TWSI_STAT register.
+ */
+static void octeon_i2c_int_enable(struct octeon_i2c *i2c)
+{
+        octeon_i2c_write_int(i2c, 0x40);
+}
+
+/**
+ * octeon_i2c_int_disable - disable the TS interrupt.
+ * @i2c: The struct octeon_i2c.
+ */
+static void octeon_i2c_int_disable(struct octeon_i2c *i2c)
+{
+        octeon_i2c_write_int(i2c, 0);
+}
+
+/**
+ * octeon_i2c_unblock - unblock the bus.
+ * @i2c: The struct octeon_i2c.
+ *
+ * If there was a reset while a device was driving 0 to bus,
+ * bus is blocked. We toggle it free manually by some clock
+ * cycles and send a stop.
+ */
+static void octeon_i2c_unblock(struct octeon_i2c *i2c)
+{
+        int i;
+
+        dev_dbg(i2c->dev, "%s\n", __func__);
+        for (i = 0; i < 9; i++) {
+                octeon_i2c_write_int(i2c, 0x0);
+                udelay(5);
+                octeon_i2c_write_int(i2c, 0x200);
+                udelay(5);
+        }
+        octeon_i2c_write_int(i2c, 0x300);
+        udelay(5);
+        octeon_i2c_write_int(i2c, 0x100);
+        udelay(5);
+        octeon_i2c_write_int(i2c, 0x0);
+}
+
+/**
+ * octeon_i2c_isr - the interrupt service routine.
+ * @int: The irq, unused.
+ * @dev_id: Our struct octeon_i2c.
+ */
+static irqreturn_t octeon_i2c_isr(int irq, void *dev_id)
+{
+        struct octeon_i2c *i2c = dev_id;
+
+        octeon_i2c_int_disable(i2c);
+        wake_up_interruptible(&i2c->queue);
+
+        return IRQ_HANDLED;
+}
+
+
+static int octeon_i2c_test_iflg(struct octeon_i2c *i2c)
+{
+        return (octeon_i2c_read_sw(i2c, SW_TWSI_EOP_TWSI_CTL) & TWSI_CTL_IFLG) != 0;
+}
+
+/**
+ * octeon_i2c_wait - wait for the IFLG to be set.
+ * @i2c: The struct octeon_i2c.
+ *
+ * Returns 0 on success, otherwise a negative errno.
+ */
+static int octeon_i2c_wait(struct octeon_i2c *i2c)
+{
+        int result;
+
+        octeon_i2c_int_enable(i2c);
+
+        result = wait_event_interruptible_timeout(i2c->queue,
+                                                  octeon_i2c_test_iflg(i2c),
+                                                  i2c->adap.timeout);
+
+        octeon_i2c_int_disable(i2c);
+
+        if (result < 0) {
+                dev_dbg(i2c->dev, "%s: wait interrupted\n", __func__);
+                return result;
+        } else if (result == 0) {
+                dev_dbg(i2c->dev, "%s: timeout\n", __func__);
+                return -ETIMEDOUT;
+        }
+
+        return 0;
+}
+
+/**
+ * octeon_i2c_start - send START to the bus.
+ * @i2c: The struct octeon_i2c.
+ *
+ * Returns 0 on success, otherwise a negative errno.
+ */
+static int octeon_i2c_start(struct octeon_i2c *i2c)
+{
+        u8 data;
+        int result;
+
+        octeon_i2c_write_sw(i2c, SW_TWSI_EOP_TWSI_CTL,
+                                TWSI_CTL_ENAB | TWSI_CTL_STA);
+
+        result = octeon_i2c_wait(i2c);
+        if (result) {
+                if (octeon_i2c_read_sw(i2c, SW_TWSI_EOP_TWSI_STAT) == STAT_IDLE) {
+                        /*
+                         * Controller refused to send start flag May
+                         * be a client is holding SDA low - let's try
+                         * to free it.
+                         */
+                        octeon_i2c_unblock(i2c);
+                        octeon_i2c_write_sw(i2c, SW_TWSI_EOP_TWSI_CTL,
+                                            TWSI_CTL_ENAB | TWSI_CTL_STA);
+
+                        result = octeon_i2c_wait(i2c);
+                }
+                if (result)
+                        return result;
+        }
+
+        data = octeon_i2c_read_sw(i2c, SW_TWSI_EOP_TWSI_STAT);
+        if ((data != STAT_START) && (data != STAT_RSTART)) {
+                dev_err(i2c->dev, "%s: bad status (0x%x)\n", __func__, data);
+                return -EIO;
+        }
+
+        return 0;
+}
+
+/**
+ * octeon_i2c_stop - send STOP to the bus.
+ * @i2c: The struct octeon_i2c.
+ *
+ * Returns 0 on success, otherwise a negative errno.
+ */
+static int octeon_i2c_stop(struct octeon_i2c *i2c)
+{
+        u8 data;
+
+        octeon_i2c_write_sw(i2c, SW_TWSI_EOP_TWSI_CTL,
+                            TWSI_CTL_ENAB | TWSI_CTL_STP);
+
+        data = octeon_i2c_read_sw(i2c, SW_TWSI_EOP_TWSI_STAT);
+
+        if (data != STAT_IDLE) {
+                dev_err(i2c->dev, "%s: bad status(0x%x)\n", __func__, data);
+                return -EIO;
+        }
+        return 0;
+}
+
+/**
+ * octeon_i2c_write - send data to the bus.
+ * @i2c: The struct octeon_i2c.
+ * @target: Target address.
+ * @data: Pointer to the data to be sent.
+ * @length: Length of the data.
+ *
+ * The address is sent over the bus, then the data.
+ *
+ * Returns 0 on success, otherwise a negative errno.
+ */
+static int octeon_i2c_write(struct octeon_i2c *i2c, int target,
+                            const u8 *data, int length)
+{
+        int i, result;
+        u8 tmp;
+
+        result = octeon_i2c_start(i2c);
+        if (result)
+                return result;
+
+        octeon_i2c_write_sw(i2c, SW_TWSI_EOP_TWSI_DATA, target << 1);
+        octeon_i2c_write_sw(i2c, SW_TWSI_EOP_TWSI_CTL, TWSI_CTL_ENAB);
+
+        result = octeon_i2c_wait(i2c);
+        if (result)
+                return result;
+
+        for (i = 0; i < length; i++) {
+                tmp = octeon_i2c_read_sw(i2c, SW_TWSI_EOP_TWSI_STAT);
+                if ((tmp != STAT_TXADDR_ACK) && (tmp != STAT_TXDATA_ACK)) {
+                        dev_err(i2c->dev,
+                                "%s: bad status before write (0x%x)\n",
+                                __func__, tmp);
+                        return -EIO;
+                }
+
+                octeon_i2c_write_sw(i2c, SW_TWSI_EOP_TWSI_DATA, data[i]);
+                octeon_i2c_write_sw(i2c, SW_TWSI_EOP_TWSI_CTL, TWSI_CTL_ENAB);
+
+                result = octeon_i2c_wait(i2c);
+                if (result)
+                        return result;
+        }
+
+        return 0;
+}
+
+/**
+ * octeon_i2c_read - receive data from the bus.
+ * @i2c: The struct octeon_i2c.
+ * @target: Target address.
+ * @data: Pointer to the location to store the datae .
+ * @length: Length of the data.
+ *
+ * The address is sent over the bus, then the data is read.
+ *
+ * Returns 0 on success, otherwise a negative errno.
+ */
+static int octeon_i2c_read(struct octeon_i2c *i2c, int target,
+                           u8 *data, int length)
+{
+        int i, result;
+        u8 tmp;
+
+        if (length < 1)
+                return -EINVAL;
+
+        result = octeon_i2c_start(i2c);
+        if (result)
+                return result;
+
+        octeon_i2c_write_sw(i2c, SW_TWSI_EOP_TWSI_DATA, (target<<1) | 1);
+        octeon_i2c_write_sw(i2c, SW_TWSI_EOP_TWSI_CTL, TWSI_CTL_ENAB);
+
+        result = octeon_i2c_wait(i2c);
+        if (result)
+                return result;
+
+        for (i = 0; i < length; i++) {
+                tmp = octeon_i2c_read_sw(i2c, SW_TWSI_EOP_TWSI_STAT);
+                if ((tmp != STAT_RXDATA_ACK) && (tmp != STAT_RXADDR_ACK)) {
+                        dev_err(i2c->dev,
+                                "%s: bad status before read (0x%x)\n",
+                                __func__, tmp);
+                        return -EIO;
+                }
+
+                if (i+1 < length)
+                        octeon_i2c_write_sw(i2c, SW_TWSI_EOP_TWSI_CTL,
+                                                TWSI_CTL_ENAB | TWSI_CTL_AAK);
+                else
+                        octeon_i2c_write_sw(i2c, SW_TWSI_EOP_TWSI_CTL,
+                                                TWSI_CTL_ENAB);
+
+                result = octeon_i2c_wait(i2c);
+                if (result)
+                        return result;
+
+                data[i] = octeon_i2c_read_sw(i2c, SW_TWSI_EOP_TWSI_DATA);
+        }
+        return 0;
+}
+
+/**
+ * octeon_i2c_xfer - The driver's master_xfer function.
+ * @adap: Pointer to the i2c_adapter structure.
+ * @msgs: Pointer to the messages to be processed.
+ * @num: Length of the MSGS array.
+ *
+ * Returns the number of messages processed, or a negative errno on
+ * failure.
+ */
+static int octeon_i2c_xfer(struct i2c_adapter *adap,
+                           struct i2c_msg *msgs,
+                           int num)
+{
+        struct i2c_msg *pmsg;
+        int i;
+        int ret = 0;
+        struct octeon_i2c *i2c = i2c_get_adapdata(adap);
+
+        for (i = 0; ret == 0 && i < num; i++) {
+                pmsg = &msgs[i];
+                dev_dbg(i2c->dev,
+                        "Doing %s %d byte(s) to/from 0x%02x - %d of %d messages\n",
+                         pmsg->flags & I2C_M_RD ? "read" : "write",
+                         pmsg->len, pmsg->addr, i + 1, num);
+                if (pmsg->flags & I2C_M_RD)
+                        ret = octeon_i2c_read(i2c, pmsg->addr, pmsg->buf,
+                                                pmsg->len);
+                else
+                        ret = octeon_i2c_write(i2c, pmsg->addr, pmsg->buf,
+                                                pmsg->len);
+        }
+        octeon_i2c_stop(i2c);
+
+        return (ret != 0) ? ret : num;
+}
+
+static u32 octeon_i2c_functionality(struct i2c_adapter *adap)
+{
+        return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
+}
+
+static const struct i2c_algorithm octeon_i2c_algo = {
+        .master_xfer = octeon_i2c_xfer,
+        .functionality = octeon_i2c_functionality,
+};
+
+static struct i2c_adapter octeon_i2c_ops = {
+        .owner = THIS_MODULE,
+        .name = "OCTEON adapter",
+        .algo = &octeon_i2c_algo,
+        .timeout = 2,
+};
+
+/**
+ * octeon_i2c_setclock - Calculate and set clock divisors.
+ */
+static int __devinit octeon_i2c_setclock(struct octeon_i2c *i2c)
+{
+        int tclk, thp_base, inc, thp_idx, mdiv_idx, ndiv_idx, foscl, diff;
+        int thp = 0x18, mdiv = 2, ndiv = 0, delta_hz = 1000000;
+
+        for (ndiv_idx = 0; ndiv_idx < 8 && delta_hz != 0; ndiv_idx++) {
+                /*
+                 * An mdiv value of less than 2 seems to not work well
+                 * with ds1337 RTCs, so we constrain it to larger
+                 * values.
+                 */
+                for (mdiv_idx = 15; mdiv_idx >= 2 && delta_hz != 0; mdiv_idx--) {
+                        /*
+                         * For given ndiv and mdiv values check the
+                         * two closest thp values.
+                         */
+                        tclk = i2c->twsi_freq * (mdiv_idx + 1) * 10;
+                        tclk *= (1 << ndiv_idx);
+                        thp_base = (i2c->sys_freq / (tclk * 2)) - 1;
+                        for (inc = 0; inc <= 1; inc++) {
+                                thp_idx = thp_base + inc;
+                                if (thp_idx < 5 || thp_idx > 0xff)
+                                        continue;
+
+                                foscl = i2c->sys_freq / (2 * (thp_idx + 1));
+                                foscl = foscl / (1 << ndiv_idx);
+                                foscl = foscl / (mdiv_idx + 1) / 10;
+                                diff = abs(foscl - i2c->twsi_freq);
+                                if (diff < delta_hz) {
+                                        delta_hz = diff;
+                                        thp = thp_idx;
+                                        mdiv = mdiv_idx;
+                                        ndiv = ndiv_idx;
+                                }
+                        }
+                }
+        }
+        octeon_i2c_write_sw(i2c, SW_TWSI_OP_TWSI_CLK, thp);
+        octeon_i2c_write_sw(i2c, SW_TWSI_EOP_TWSI_CLKCTL, (mdiv << 3) | ndiv);
+
+        return 0;
+}
+
+static int __devinit octeon_i2c_initlowlevel(struct octeon_i2c *i2c)
+{
+        u8 status;
+        int tries;
+
+        /* disable high level controller, enable bus access */
+        octeon_i2c_write_sw(i2c, SW_TWSI_EOP_TWSI_CTL, TWSI_CTL_ENAB);
+
+        /* reset controller */
+        octeon_i2c_write_sw(i2c, SW_TWSI_EOP_TWSI_RST, 0);
+
+        for (tries = 10; tries; tries--) {
+                udelay(1);
+                status = octeon_i2c_read_sw(i2c, SW_TWSI_EOP_TWSI_STAT);
+                if (status == STAT_IDLE)
+                        return 0;
+        }
+        dev_err(i2c->dev, "%s: TWSI_RST failed! (0x%x)\n", __func__, status);
+        return -EIO;
+}
+
+static int __devinit octeon_i2c_probe(struct platform_device *pdev)
+{
+        int irq, result = 0;
+        struct octeon_i2c *i2c;
+        struct octeon_i2c_data *i2c_data;
+        struct resource *res_mem;
+
+        /* All adaptors have an irq.  */
+        irq = platform_get_irq(pdev, 0);
+        if (irq < 0)
+                return irq;
+
+        i2c = kzalloc(sizeof(*i2c), GFP_KERNEL);
+        if (!i2c) {
+                dev_err(&pdev->dev, "kzalloc failed\n");
+                result = -ENOMEM;
+                goto out;
+        }
+        i2c->dev = &pdev->dev;
+        i2c_data = pdev->dev.platform_data;
+
+        res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+
+        if (res_mem == NULL) {
+                dev_err(i2c->dev, "found no memory resource\n");
+                result = -ENXIO;
+                goto fail_region;
+        }
+
+        if (i2c_data == NULL) {
+                dev_err(i2c->dev, "no I2C frequency data\n");
+                result = -ENXIO;
+                goto fail_region;
+        }
+
+        i2c->twsi_phys = res_mem->start;
+        i2c->regsize = resource_size(res_mem);
+        i2c->twsi_freq = i2c_data->i2c_freq;
+        i2c->sys_freq = i2c_data->sys_freq;
+
+        if (!request_mem_region(i2c->twsi_phys, i2c->regsize, res_mem->name)) {
+                dev_err(i2c->dev, "request_mem_region failed\n");
+                goto fail_region;
+        }
+        i2c->twsi_base = ioremap(i2c->twsi_phys, i2c->regsize);
+
+        init_waitqueue_head(&i2c->queue);
+
+        i2c->irq = irq;
+
+        result = request_irq(i2c->irq, octeon_i2c_isr, 0, DRV_NAME, i2c);
+        if (result < 0) {
+                dev_err(i2c->dev, "failed to attach interrupt\n");
+                goto fail_irq;
+        }
+
+        result = octeon_i2c_initlowlevel(i2c);
+        if (result) {
+                dev_err(i2c->dev, "init low level failed\n");
+                goto  fail_add;
+        }
+
+        result = octeon_i2c_setclock(i2c);
+        if (result) {
+                dev_err(i2c->dev, "clock init failed\n");
+                goto  fail_add;
+        }
+
+        i2c->adap = octeon_i2c_ops;
+        i2c->adap.dev.parent = &pdev->dev;
+        i2c->adap.nr = pdev->id >= 0 ? pdev->id : 0;
+        i2c_set_adapdata(&i2c->adap, i2c);
+        platform_set_drvdata(pdev, i2c);
+
+        result = i2c_add_numbered_adapter(&i2c->adap);
+        if (result < 0) {
+                dev_err(i2c->dev, "failed to add adapter\n");
+                goto fail_add;
+        }
+
+        dev_info(i2c->dev, "version %s\n", DRV_VERSION);
+
+        return result;
+
+fail_add:
+        platform_set_drvdata(pdev, NULL);
+        free_irq(i2c->irq, i2c);
+fail_irq:
+        iounmap(i2c->twsi_base);
+        release_mem_region(i2c->twsi_phys, i2c->regsize);
+fail_region:
+        kfree(i2c);
+out:
+        return result;
+};
+
+static int __devexit octeon_i2c_remove(struct platform_device *pdev)
+{
+        struct octeon_i2c *i2c = platform_get_drvdata(pdev);
+
+        i2c_del_adapter(&i2c->adap);
+        platform_set_drvdata(pdev, NULL);
+        free_irq(i2c->irq, i2c);
+        iounmap(i2c->twsi_base);
+        release_mem_region(i2c->twsi_phys, i2c->regsize);
+        kfree(i2c);
+        return 0;
+};
+
+static struct platform_driver octeon_i2c_driver = {
+        .probe          = octeon_i2c_probe,
+        .remove         = __devexit_p(octeon_i2c_remove),
+        .driver         = {
+                .owner  = THIS_MODULE,
+                .name   = DRV_NAME,
+        },
+};
+
+static int __init octeon_i2c_init(void)
+{
+        int rv;
+
+        rv = platform_driver_register(&octeon_i2c_driver);
+        return rv;
+}
+
+static void __exit octeon_i2c_exit(void)
+{
+        platform_driver_unregister(&octeon_i2c_driver);
+}
+
+MODULE_AUTHOR("Michael Lawnick <michael.lawnick.ext@nsn.com>");
+MODULE_DESCRIPTION("I2C-Bus adapter for Cavium OCTEON processors");
+MODULE_LICENSE("GPL");
+MODULE_VERSION(DRV_VERSION);
+MODULE_ALIAS("platform:" DRV_NAME);
+
+module_init(octeon_i2c_init);
+module_exit(octeon_i2c_exit);
diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index ad8d2010c921..9d090833e245 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -37,6 +37,9 @@
 #include <linux/platform_device.h>
 #include <linux/clk.h>
 #include <linux/io.h>
+#include <linux/slab.h>
+#include <linux/i2c-omap.h>
+#include <linux/pm_runtime.h>
 
 /* I2C controller revisions */
 #define OMAP_I2C_REV_2                  0x20
@@ -44,29 +47,37 @@
 /* I2C controller revisions present on specific hardware */
 #define OMAP_I2C_REV_ON_2430            0x36
 #define OMAP_I2C_REV_ON_3430            0x3C
+#define OMAP_I2C_REV_ON_4430            0x40
 
 /* timeout waiting for the controller to respond */
 #define OMAP_I2C_TIMEOUT (msecs_to_jiffies(1000))
 
-#define OMAP_I2C_REV_REG                0x00
-#define OMAP_I2C_IE_REG                 0x04
-#define OMAP_I2C_STAT_REG               0x08
-#define OMAP_I2C_IV_REG                 0x0c
 /* For OMAP3 I2C_IV has changed to I2C_WE (wakeup enable) */
-#define OMAP_I2C_WE_REG                 0x0c
-#define OMAP_I2C_SYSS_REG               0x10
-#define OMAP_I2C_BUF_REG                0x14
-#define OMAP_I2C_CNT_REG                0x18
-#define OMAP_I2C_DATA_REG               0x1c
-#define OMAP_I2C_SYSC_REG               0x20
-#define OMAP_I2C_CON_REG                0x24
-#define OMAP_I2C_OA_REG                 0x28
-#define OMAP_I2C_SA_REG                 0x2c
-#define OMAP_I2C_PSC_REG                0x30
-#define OMAP_I2C_SCLL_REG               0x34
-#define OMAP_I2C_SCLH_REG               0x38
-#define OMAP_I2C_SYSTEST_REG            0x3c
-#define OMAP_I2C_BUFSTAT_REG            0x40
+enum {
+        OMAP_I2C_REV_REG = 0,
+        OMAP_I2C_IE_REG,
+        OMAP_I2C_STAT_REG,
+        OMAP_I2C_IV_REG,
+        OMAP_I2C_WE_REG,
+        OMAP_I2C_SYSS_REG,
+        OMAP_I2C_BUF_REG,
+        OMAP_I2C_CNT_REG,
+        OMAP_I2C_DATA_REG,
+        OMAP_I2C_SYSC_REG,
+        OMAP_I2C_CON_REG,
+        OMAP_I2C_OA_REG,
+        OMAP_I2C_SA_REG,
+        OMAP_I2C_PSC_REG,
+        OMAP_I2C_SCLL_REG,
+        OMAP_I2C_SCLH_REG,
+        OMAP_I2C_SYSTEST_REG,
+        OMAP_I2C_BUFSTAT_REG,
+        OMAP_I2C_REVNB_LO,
+        OMAP_I2C_REVNB_HI,
+        OMAP_I2C_IRQSTATUS_RAW,
+        OMAP_I2C_IRQENABLE_SET,
+        OMAP_I2C_IRQENABLE_CLR,
+};
 
 /* I2C Interrupt Enable Register (OMAP_I2C_IE): */
 #define OMAP_I2C_IE_XDR         (1 << 14)       /* TX Buffer drain int enable */
@@ -156,18 +167,24 @@
 #define SYSC_IDLEMODE_SMART             0x2
 #define SYSC_CLOCKACTIVITY_FCLK         0x2
 
+/* Errata definitions */
+#define I2C_OMAP_ERRATA_I207            (1 << 0)
+#define I2C_OMAP3_1P153                 (1 << 1)
 
 struct omap_i2c_dev {
         struct device           *dev;
         void __iomem            *base;          /* virtual */
         int                     irq;
-        struct clk              *iclk;          /* Interface clock */
-        struct clk              *fclk;          /* Functional clock */
+        int                     reg_shift;      /* bit shift for I2C register addresses */
         struct completion       cmd_complete;
         struct resource         *ioarea;
+        u32                     latency;        /* maximum mpu wkup latency */
+        void                    (*set_mpu_wkup_lat)(struct device *dev,
+                                                    long latency);
         u32                     speed;          /* Speed of bus in Khz */
         u16                     cmd_err;
         u8                      *buf;
+        u8                      *regs;
         size_t                  buf_len;
         struct i2c_adapter      adapter;
         u8                      fifo_size;      /* use as flag and value
@@ -178,71 +195,124 @@ struct omap_i2c_dev {
         unsigned                b_hw:1;         /* bad h/w fixes */
         unsigned                idle:1;
         u16                     iestate;        /* Saved interrupt register */
+        u16                     pscstate;
+        u16                     scllstate;
+        u16                     sclhstate;
+        u16                     bufstate;
+        u16                     syscstate;
+        u16                     westate;
+        u16                     errata;
+};
+
+const static u8 reg_map[] = {
+        [OMAP_I2C_REV_REG] = 0x00,
+        [OMAP_I2C_IE_REG] = 0x01,
+        [OMAP_I2C_STAT_REG] = 0x02,
+        [OMAP_I2C_IV_REG] = 0x03,
+        [OMAP_I2C_WE_REG] = 0x03,
+        [OMAP_I2C_SYSS_REG] = 0x04,
+        [OMAP_I2C_BUF_REG] = 0x05,
+        [OMAP_I2C_CNT_REG] = 0x06,
+        [OMAP_I2C_DATA_REG] = 0x07,
+        [OMAP_I2C_SYSC_REG] = 0x08,
+        [OMAP_I2C_CON_REG] = 0x09,
+        [OMAP_I2C_OA_REG] = 0x0a,
+        [OMAP_I2C_SA_REG] = 0x0b,
+        [OMAP_I2C_PSC_REG] = 0x0c,
+        [OMAP_I2C_SCLL_REG] = 0x0d,
+        [OMAP_I2C_SCLH_REG] = 0x0e,
+        [OMAP_I2C_SYSTEST_REG] = 0x0f,
+        [OMAP_I2C_BUFSTAT_REG] = 0x10,
+};
+
+const static u8 omap4_reg_map[] = {
+        [OMAP_I2C_REV_REG] = 0x04,
+        [OMAP_I2C_IE_REG] = 0x2c,
+        [OMAP_I2C_STAT_REG] = 0x28,
+        [OMAP_I2C_IV_REG] = 0x34,
+        [OMAP_I2C_WE_REG] = 0x34,
+        [OMAP_I2C_SYSS_REG] = 0x90,
+        [OMAP_I2C_BUF_REG] = 0x94,
+        [OMAP_I2C_CNT_REG] = 0x98,
+        [OMAP_I2C_DATA_REG] = 0x9c,
+        [OMAP_I2C_SYSC_REG] = 0x20,
+        [OMAP_I2C_CON_REG] = 0xa4,
+        [OMAP_I2C_OA_REG] = 0xa8,
+        [OMAP_I2C_SA_REG] = 0xac,
+        [OMAP_I2C_PSC_REG] = 0xb0,
+        [OMAP_I2C_SCLL_REG] = 0xb4,
+        [OMAP_I2C_SCLH_REG] = 0xb8,
+        [OMAP_I2C_SYSTEST_REG] = 0xbC,
+        [OMAP_I2C_BUFSTAT_REG] = 0xc0,
+        [OMAP_I2C_REVNB_LO] = 0x00,
+        [OMAP_I2C_REVNB_HI] = 0x04,
+        [OMAP_I2C_IRQSTATUS_RAW] = 0x24,
+        [OMAP_I2C_IRQENABLE_SET] = 0x2c,
+        [OMAP_I2C_IRQENABLE_CLR] = 0x30,
 };
 
 static inline void omap_i2c_write_reg(struct omap_i2c_dev *i2c_dev,
                                       int reg, u16 val)
 {
-        __raw_writew(val, i2c_dev->base + reg);
+        __raw_writew(val, i2c_dev->base +
+                        (i2c_dev->regs[reg] << i2c_dev->reg_shift));
 }
 
 static inline u16 omap_i2c_read_reg(struct omap_i2c_dev *i2c_dev, int reg)
 {
-        return __raw_readw(i2c_dev->base + reg);
+        return __raw_readw(i2c_dev->base +
+                                (i2c_dev->regs[reg] << i2c_dev->reg_shift));
 }
 
-static int __init omap_i2c_get_clocks(struct omap_i2c_dev *dev)
+static void omap_i2c_unidle(struct omap_i2c_dev *dev)
 {
-        int ret;
-
-        dev->iclk = clk_get(dev->dev, "ick");
-        if (IS_ERR(dev->iclk)) {
-                ret = PTR_ERR(dev->iclk);
-                dev->iclk = NULL;
-                return ret;
-        }
-
-        dev->fclk = clk_get(dev->dev, "fck");
-        if (IS_ERR(dev->fclk)) {
-                ret = PTR_ERR(dev->fclk);
-                if (dev->iclk != NULL) {
-                        clk_put(dev->iclk);
-                        dev->iclk = NULL;
-                }
-                dev->fclk = NULL;
-                return ret;
-        }
+        struct platform_device *pdev;
+        struct omap_i2c_bus_platform_data *pdata;
 
-        return 0;
-}
+        WARN_ON(!dev->idle);
 
-static void omap_i2c_put_clocks(struct omap_i2c_dev *dev)
-{
-        clk_put(dev->fclk);
-        dev->fclk = NULL;
-        clk_put(dev->iclk);
-        dev->iclk = NULL;
-}
+        pdev = to_platform_device(dev->dev);
+        pdata = pdev->dev.platform_data;
 
-static void omap_i2c_unidle(struct omap_i2c_dev *dev)
-{
-        WARN_ON(!dev->idle);
+        pm_runtime_get_sync(&pdev->dev);
 
-        clk_enable(dev->iclk);
-        clk_enable(dev->fclk);
+        if (cpu_is_omap34xx()) {
+                omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0);
+                omap_i2c_write_reg(dev, OMAP_I2C_PSC_REG, dev->pscstate);
+                omap_i2c_write_reg(dev, OMAP_I2C_SCLL_REG, dev->scllstate);
+                omap_i2c_write_reg(dev, OMAP_I2C_SCLH_REG, dev->sclhstate);
+                omap_i2c_write_reg(dev, OMAP_I2C_BUF_REG, dev->bufstate);
+                omap_i2c_write_reg(dev, OMAP_I2C_SYSC_REG, dev->syscstate);
+                omap_i2c_write_reg(dev, OMAP_I2C_WE_REG, dev->westate);
+                omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, OMAP_I2C_CON_EN);
+        }
         dev->idle = 0;
+
+        /*
+         * Don't write to this register if the IE state is 0 as it can
+         * cause deadlock.
+         */
         if (dev->iestate)
                 omap_i2c_write_reg(dev, OMAP_I2C_IE_REG, dev->iestate);
 }
 
 static void omap_i2c_idle(struct omap_i2c_dev *dev)
 {
+        struct platform_device *pdev;
+        struct omap_i2c_bus_platform_data *pdata;
         u16 iv;
 
         WARN_ON(dev->idle);
 
+        pdev = to_platform_device(dev->dev);
+        pdata = pdev->dev.platform_data;
+
         dev->iestate = omap_i2c_read_reg(dev, OMAP_I2C_IE_REG);
-        omap_i2c_write_reg(dev, OMAP_I2C_IE_REG, 0);
+        if (dev->rev >= OMAP_I2C_REV_ON_4430)
+                omap_i2c_write_reg(dev, OMAP_I2C_IRQENABLE_CLR, 1);
+        else
+                omap_i2c_write_reg(dev, OMAP_I2C_IE_REG, 0);
+
         if (dev->rev < OMAP_I2C_REV_2) {
                 iv = omap_i2c_read_reg(dev, OMAP_I2C_IV_REG); /* Read clears */
         } else {
@@ -252,19 +322,25 @@ static void omap_i2c_idle(struct omap_i2c_dev *dev)
                 omap_i2c_read_reg(dev, OMAP_I2C_STAT_REG);
         }
         dev->idle = 1;
-        clk_disable(dev->fclk);
-        clk_disable(dev->iclk);
+
+        pm_runtime_put_sync(&pdev->dev);
 }
 
 static int omap_i2c_init(struct omap_i2c_dev *dev)
 {
-        u16 psc = 0, scll = 0, sclh = 0;
+        u16 psc = 0, scll = 0, sclh = 0, buf = 0;
         u16 fsscll = 0, fssclh = 0, hsscll = 0, hssclh = 0;
         unsigned long fclk_rate = 12000000;
         unsigned long timeout;
         unsigned long internal_clk = 0;
+        struct clk *fclk;
 
         if (dev->rev >= OMAP_I2C_REV_2) {
+                /* Disable I2C controller before soft reset */
+                omap_i2c_write_reg(dev, OMAP_I2C_CON_REG,
+                        omap_i2c_read_reg(dev, OMAP_I2C_CON_REG) &
+                                ~(OMAP_I2C_CON_EN));
+
                 omap_i2c_write_reg(dev, OMAP_I2C_SYSC_REG, SYSC_SOFTRESET_MASK);
                 /* For some reason we need to set the EN bit before the
                  * reset done bit gets set. */
@@ -287,24 +363,24 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
                                            SYSC_AUTOIDLE_MASK);
 
                 } else if (dev->rev >= OMAP_I2C_REV_ON_3430) {
-                        u32 v;
-
-                        v = SYSC_AUTOIDLE_MASK;
-                        v |= SYSC_ENAWAKEUP_MASK;
-                        v |= (SYSC_IDLEMODE_SMART <<
+                        dev->syscstate = SYSC_AUTOIDLE_MASK;
+                        dev->syscstate |= SYSC_ENAWAKEUP_MASK;
+                        dev->syscstate |= (SYSC_IDLEMODE_SMART <<
                               __ffs(SYSC_SIDLEMODE_MASK));
-                        v |= (SYSC_CLOCKACTIVITY_FCLK <<
+                        dev->syscstate |= (SYSC_CLOCKACTIVITY_FCLK <<
                               __ffs(SYSC_CLOCKACTIVITY_MASK));
 
-                        omap_i2c_write_reg(dev, OMAP_I2C_SYSC_REG, v);
+                        omap_i2c_write_reg(dev, OMAP_I2C_SYSC_REG,
+                                                        dev->syscstate);
                         /*
                          * Enabling all wakup sources to stop I2C freezing on
                          * WFI instruction.
                          * REVISIT: Some wkup sources might not be needed.
                          */
-                        omap_i2c_write_reg(dev, OMAP_I2C_WE_REG,
-                                                        OMAP_I2C_WE_ALL);
-
+                        dev->westate = OMAP_I2C_WE_ALL;
+                        if (dev->rev < OMAP_I2C_REV_ON_4430)
+                                omap_i2c_write_reg(dev, OMAP_I2C_WE_REG,
+                                                                dev->westate);
                 }
         }
         omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0);
@@ -316,7 +392,9 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
                  * always returns 12MHz for the functional clock, we can
                  * do this bit unconditionally.
                  */
-                fclk_rate = clk_get_rate(dev->fclk);
+                fclk = clk_get(dev->dev, "fck");
+                fclk_rate = clk_get_rate(fclk);
+                clk_put(fclk);
 
                 /* TRM for 5912 says the I2C clock must be prescaled to be
                  * between 7 - 12 MHz. The XOR input clock is typically
@@ -331,7 +409,7 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
                         psc = fclk_rate / 12000000;
         }
 
-        if (cpu_is_omap2430() || cpu_is_omap34xx()) {
+        if (!(cpu_class_is_omap1() || cpu_is_omap2420())) {
 
                 /*
                  * HSI2C controller internal clk rate should be 19.2 Mhz for
@@ -345,7 +423,9 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
                         internal_clk = 9600;
                 else
                         internal_clk = 4000;
-                fclk_rate = clk_get_rate(dev->fclk) / 1000;
+                fclk = clk_get(dev->dev, "fck");
+                fclk_rate = clk_get_rate(fclk) / 1000;
+                clk_put(fclk);
 
                 /* Compute prescaler divisor */
                 psc = fclk_rate / internal_clk;
@@ -394,23 +474,33 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
         omap_i2c_write_reg(dev, OMAP_I2C_SCLL_REG, scll);
         omap_i2c_write_reg(dev, OMAP_I2C_SCLH_REG, sclh);
 
-        if (dev->fifo_size)
-                /* Note: setup required fifo size - 1 */
-                omap_i2c_write_reg(dev, OMAP_I2C_BUF_REG,
-                                        (dev->fifo_size - 1) << 8 | /* RTRSH */
-                                        OMAP_I2C_BUF_RXFIF_CLR |
-                                        (dev->fifo_size - 1) | /* XTRSH */
-                                        OMAP_I2C_BUF_TXFIF_CLR);
+        if (dev->fifo_size) {
+                /* Note: setup required fifo size - 1. RTRSH and XTRSH */
+                buf = (dev->fifo_size - 1) << 8 | OMAP_I2C_BUF_RXFIF_CLR |
+                        (dev->fifo_size - 1) | OMAP_I2C_BUF_TXFIF_CLR;
+                omap_i2c_write_reg(dev, OMAP_I2C_BUF_REG, buf);
+        }
 
         /* Take the I2C module out of reset: */
         omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, OMAP_I2C_CON_EN);
 
+        dev->errata = 0;
+
+        if (cpu_is_omap2430() || cpu_is_omap34xx())
+                dev->errata |= I2C_OMAP_ERRATA_I207;
+
         /* Enable interrupts */
-        omap_i2c_write_reg(dev, OMAP_I2C_IE_REG,
-                        (OMAP_I2C_IE_XRDY | OMAP_I2C_IE_RRDY |
+        dev->iestate = (OMAP_I2C_IE_XRDY | OMAP_I2C_IE_RRDY |
                         OMAP_I2C_IE_ARDY | OMAP_I2C_IE_NACK |
                         OMAP_I2C_IE_AL)  | ((dev->fifo_size) ?
-                                (OMAP_I2C_IE_RDR | OMAP_I2C_IE_XDR) : 0));
+                                (OMAP_I2C_IE_RDR | OMAP_I2C_IE_XDR) : 0);
+        omap_i2c_write_reg(dev, OMAP_I2C_IE_REG, dev->iestate);
+        if (cpu_is_omap34xx()) {
+                dev->pscstate = psc;
+                dev->scllstate = scll;
+                dev->sclhstate = sclh;
+                dev->bufstate = buf;
+        }
         return 0;
 }
 
@@ -508,8 +598,12 @@ static int omap_i2c_xfer_msg(struct i2c_adapter *adap,
          * REVISIT: We should abort the transfer on signals, but the bus goes
          * into arbitration and we're currently unable to recover from it.
          */
+        if (dev->set_mpu_wkup_lat != NULL)
+                dev->set_mpu_wkup_lat(dev->dev, dev->latency);
         r = wait_for_completion_timeout(&dev->cmd_complete,
                                         OMAP_I2C_TIMEOUT);
+        if (dev->set_mpu_wkup_lat != NULL)
+                dev->set_mpu_wkup_lat(dev->dev, -1);
         dev->buf_len = 0;
         if (r < 0)
                 return r;
@@ -568,6 +662,8 @@ omap_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
 
         if (r == 0)
                 r = num;
+
+        omap_i2c_wait_for_bb(dev);
 out:
         omap_i2c_idle(dev);
         return r;
@@ -592,6 +688,34 @@ omap_i2c_ack_stat(struct omap_i2c_dev *dev, u16 stat)
         omap_i2c_write_reg(dev, OMAP_I2C_STAT_REG, stat);
 }
 
+static inline void i2c_omap_errata_i207(struct omap_i2c_dev *dev, u16 stat)
+{
+        /*
+         * I2C Errata(Errata Nos. OMAP2: 1.67, OMAP3: 1.8)
+         * Not applicable for OMAP4.
+         * Under certain rare conditions, RDR could be set again
+         * when the bus is busy, then ignore the interrupt and
+         * clear the interrupt.
+         */
+        if (stat & OMAP_I2C_STAT_RDR) {
+                /* Step 1: If RDR is set, clear it */
+                omap_i2c_ack_stat(dev, OMAP_I2C_STAT_RDR);
+
+                /* Step 2: */
+                if (!(omap_i2c_read_reg(dev, OMAP_I2C_STAT_REG)
+                                                & OMAP_I2C_STAT_BB)) {
+
+                        /* Step 3: */
+                        if (omap_i2c_read_reg(dev, OMAP_I2C_STAT_REG)
+                                                & OMAP_I2C_STAT_RDR) {
+                                omap_i2c_ack_stat(dev, OMAP_I2C_STAT_RDR);
+                                dev_dbg(dev->dev, "RDR when bus is busy.\n");
+                        }
+
+                }
+        }
+}
+
 /* rev1 devices are apparently only on some 15xx */
 #ifdef CONFIG_ARCH_OMAP15XX
 
@@ -653,6 +777,35 @@ omap_i2c_rev1_isr(int this_irq, void *dev_id)
 #define omap_i2c_rev1_isr               NULL
 #endif
 
+/*
+ * OMAP3430 Errata 1.153: When an XRDY/XDR is hit, wait for XUDF before writing
+ * data to DATA_REG. Otherwise some data bytes can be lost while transferring
+ * them from the memory to the I2C interface.
+ */
+static int errata_omap3_1p153(struct omap_i2c_dev *dev, u16 *stat, int *err)
+{
+        unsigned long timeout = 10000;
+
+        while (--timeout && !(*stat & OMAP_I2C_STAT_XUDF)) {
+                if (*stat & (OMAP_I2C_STAT_NACK | OMAP_I2C_STAT_AL)) {
+                        omap_i2c_ack_stat(dev, *stat & (OMAP_I2C_STAT_XRDY |
+                                                        OMAP_I2C_STAT_XDR));
+                        *err |= OMAP_I2C_STAT_XUDF;
+                        return -ETIMEDOUT;
+                }
+
+                cpu_relax();
+                *stat = omap_i2c_read_reg(dev, OMAP_I2C_STAT_REG);
+        }
+
+        if (!timeout) {
+                dev_err(dev->dev, "timeout waiting on XUDF bit\n");
+                return 0;
+        }
+
+        return 0;
+}
+
 static irqreturn_t
 omap_i2c_isr(int this_irq, void *dev_id)
 {
@@ -672,9 +825,17 @@ omap_i2c_isr(int this_irq, void *dev_id)
                         break;
                 }
 
-                omap_i2c_write_reg(dev, OMAP_I2C_STAT_REG, stat);
-
                 err = 0;
+complete:
+                /*
+                 * Ack the stat in one go, but [R/X]DR and [R/X]RDY should be
+                 * acked after the data operation is complete.
+                 * Ref: TRM SWPU114Q Figure 18-31
+                 */
+                omap_i2c_write_reg(dev, OMAP_I2C_STAT_REG, stat &
+                                ~(OMAP_I2C_STAT_RRDY | OMAP_I2C_STAT_RDR |
+                                OMAP_I2C_STAT_XRDY | OMAP_I2C_STAT_XDR));
+
                 if (stat & OMAP_I2C_STAT_NACK) {
                         err |= OMAP_I2C_STAT_NACK;
                         omap_i2c_write_reg(dev, OMAP_I2C_CON_REG,
@@ -685,16 +846,26 @@ omap_i2c_isr(int this_irq, void *dev_id)
                         err |= OMAP_I2C_STAT_AL;
                 }
                 if (stat & (OMAP_I2C_STAT_ARDY | OMAP_I2C_STAT_NACK |
-                                        OMAP_I2C_STAT_AL))
+                                        OMAP_I2C_STAT_AL)) {
+                        omap_i2c_ack_stat(dev, stat &
+                                (OMAP_I2C_STAT_RRDY | OMAP_I2C_STAT_RDR |
+                                OMAP_I2C_STAT_XRDY | OMAP_I2C_STAT_XDR));
                         omap_i2c_complete_cmd(dev, err);
+                        return IRQ_HANDLED;
+                }
                 if (stat & (OMAP_I2C_STAT_RRDY | OMAP_I2C_STAT_RDR)) {
                         u8 num_bytes = 1;
+
+                        if (dev->errata & I2C_OMAP_ERRATA_I207)
+                                i2c_omap_errata_i207(dev, stat);
+
                         if (dev->fifo_size) {
                                 if (stat & OMAP_I2C_STAT_RRDY)
                                         num_bytes = dev->fifo_size;
-                                else
-                                        num_bytes = omap_i2c_read_reg(dev,
-                                                        OMAP_I2C_BUFSTAT_REG);
+                                else    /* read RXSTAT on RDR interrupt */
+                                        num_bytes = (omap_i2c_read_reg(dev,
+                                                        OMAP_I2C_BUFSTAT_REG)
+                                                        >> 8) & 0x3F;
                         }
                         while (num_bytes) {
                                 num_bytes--;
@@ -702,9 +873,12 @@ omap_i2c_isr(int this_irq, void *dev_id)
                                 if (dev->buf_len) {
                                         *dev->buf++ = w;
                                         dev->buf_len--;
-                                        /* Data reg from 2430 is 8 bit wide */
-                                        if (!cpu_is_omap2430() &&
-                                                        !cpu_is_omap34xx()) {
+                                        /*
+                                         * Data reg in 2430, omap3 and
+                                         * omap4 is 8 bit wide
+                                         */
+                                        if (cpu_class_is_omap1() ||
+                                                        cpu_is_omap2420()) {
                                                 if (dev->buf_len) {
                                                         *dev->buf++ = w >> 8;
                                                         dev->buf_len--;
@@ -731,9 +905,10 @@ omap_i2c_isr(int this_irq, void *dev_id)
                         if (dev->fifo_size) {
                                 if (stat & OMAP_I2C_STAT_XRDY)
                                         num_bytes = dev->fifo_size;
-                                else
+                                else    /* read TXSTAT on XDR interrupt */
                                         num_bytes = omap_i2c_read_reg(dev,
-                                                        OMAP_I2C_BUFSTAT_REG);
+                                                        OMAP_I2C_BUFSTAT_REG)
+                                                        & 0x3F;
                         }
                         while (num_bytes) {
                                 num_bytes--;
@@ -741,9 +916,12 @@ omap_i2c_isr(int this_irq, void *dev_id)
                                 if (dev->buf_len) {
                                         w = *dev->buf++;
                                         dev->buf_len--;
-                                        /* Data reg from  2430 is 8 bit wide */
-                                        if (!cpu_is_omap2430() &&
-                                                        !cpu_is_omap34xx()) {
+                                        /*
+                                         * Data reg in 2430, omap3 and
+                                         * omap4 is 8 bit wide
+                                         */
+                                        if (cpu_class_is_omap1() ||
+                                                        cpu_is_omap2420()) {
                                                 if (dev->buf_len) {
                                                         w |= *dev->buf++ << 8;
                                                         dev->buf_len--;
@@ -760,6 +938,11 @@ omap_i2c_isr(int this_irq, void *dev_id)
                                                         "data to send\n");
                                         break;
                                 }
+
+                                if ((dev->errata & I2C_OMAP3_1P153) &&
+                                    errata_omap3_1p153(dev, &stat, &err))
+                                        goto complete;
+
                                 omap_i2c_write_reg(dev, OMAP_I2C_DATA_REG, w);
                         }
                         omap_i2c_ack_stat(dev,
@@ -784,12 +967,13 @@ static const struct i2c_algorithm omap_i2c_algo = {
         .functionality  = omap_i2c_func,
 };
 
-static int __init
+static int __devinit
 omap_i2c_probe(struct platform_device *pdev)
 {
         struct omap_i2c_dev     *dev;
         struct i2c_adapter      *adap;
         struct resource         *mem, *irq, *ioarea;
+        struct omap_i2c_bus_platform_data *pdata = pdev->dev.platform_data;
         irq_handler_t isr;
         int r;
         u32 speed = 0;
@@ -806,7 +990,7 @@ omap_i2c_probe(struct platform_device *pdev)
                 return -ENODEV;
         }
 
-        ioarea = request_mem_region(mem->start, (mem->end - mem->start) + 1,
+        ioarea = request_mem_region(mem->start, resource_size(mem),
                         pdev->name);
         if (!ioarea) {
                 dev_err(&pdev->dev, "I2C region already claimed\n");
@@ -819,10 +1003,13 @@ omap_i2c_probe(struct platform_device *pdev)
                 goto err_release_region;
         }
 
-        if (pdev->dev.platform_data != NULL)
-                speed = *(u32 *)pdev->dev.platform_data;
-        else
-                speed = 100;    /* Defualt speed */
+        if (pdata != NULL) {
+                speed = pdata->clkrate;
+                dev->set_mpu_wkup_lat = pdata->set_mpu_wkup_lat;
+        } else {
+                speed = 100;    /* Default speed */
+                dev->set_mpu_wkup_lat = NULL;
+        }
 
         dev->speed = speed;
         dev->idle = 1;
@@ -836,14 +1023,27 @@ omap_i2c_probe(struct platform_device *pdev)
 
         platform_set_drvdata(pdev, dev);
 
-        if ((r = omap_i2c_get_clocks(dev)) != 0)
-                goto err_iounmap;
+        if (cpu_is_omap7xx())
+                dev->reg_shift = 1;
+        else if (cpu_is_omap44xx())
+                dev->reg_shift = 0;
+        else
+                dev->reg_shift = 2;
+
+        if (cpu_is_omap44xx())
+                dev->regs = (u8 *) omap4_reg_map;
+        else
+                dev->regs = (u8 *) reg_map;
 
+        pm_runtime_enable(&pdev->dev);
         omap_i2c_unidle(dev);
 
         dev->rev = omap_i2c_read_reg(dev, OMAP_I2C_REV_REG) & 0xff;
 
-        if (cpu_is_omap2430() || cpu_is_omap34xx()) {
+        if (dev->rev <= OMAP_I2C_REV_ON_3430)
+                dev->errata |= I2C_OMAP3_1P153;
+
+        if (!(cpu_class_is_omap1() || cpu_is_omap2420())) {
                 u16 s;
 
                 /* Set up the fifo size - Get total size */
@@ -855,8 +1055,17 @@ omap_i2c_probe(struct platform_device *pdev)
                  * size. This is to ensure that we can handle the status on int
                  * call back latencies.
                  */
-                dev->fifo_size = (dev->fifo_size / 2);
-                dev->b_hw = 1; /* Enable hardware fixes */
+                if (dev->rev >= OMAP_I2C_REV_ON_4430) {
+                        dev->fifo_size = 0;
+                        dev->b_hw = 0; /* Disable hardware fixes */
+                } else {
+                        dev->fifo_size = (dev->fifo_size / 2);
+                        dev->b_hw = 1; /* Enable hardware fixes */
+                }
+                /* calculate wakeup latency constraint for MPU */
+                if (dev->set_mpu_wkup_lat != NULL)
+                        dev->latency = (1000000 * dev->fifo_size) /
+                                       (1000 * speed / 8);
         }
 
         /* reset ASAP, clearing any IRQs */
@@ -879,7 +1088,7 @@ omap_i2c_probe(struct platform_device *pdev)
         i2c_set_adapdata(adap, dev);
         adap->owner = THIS_MODULE;
         adap->class = I2C_CLASS_HWMON;
-        strncpy(adap->name, "OMAP I2C adapter", sizeof(adap->name));
+        strlcpy(adap->name, "OMAP I2C adapter", sizeof(adap->name));
         adap->algo = &omap_i2c_algo;
         adap->dev.parent = &pdev->dev;
 
@@ -898,14 +1107,12 @@ err_free_irq:
 err_unuse_clocks:
         omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0);
         omap_i2c_idle(dev);
-        omap_i2c_put_clocks(dev);
-err_iounmap:
         iounmap(dev->base);
 err_free_mem:
         platform_set_drvdata(pdev, NULL);
         kfree(dev);
 err_release_region:
-        release_mem_region(mem->start, (mem->end - mem->start) + 1);
+        release_mem_region(mem->start, resource_size(mem));
 
         return r;
 }
@@ -921,11 +1128,10 @@ omap_i2c_remove(struct platform_device *pdev)
         free_irq(dev->irq, dev);
         i2c_del_adapter(&dev->adapter);
         omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0);
-        omap_i2c_put_clocks(dev);
         iounmap(dev->base);
         kfree(dev);
         mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-        release_mem_region(mem->start, (mem->end - mem->start) + 1);
+        release_mem_region(mem->start, resource_size(mem));
         return 0;
 }
 
@@ -933,7 +1139,7 @@ static struct platform_driver omap_i2c_driver = {
         .probe          = omap_i2c_probe,
         .remove         = omap_i2c_remove,
         .driver         = {
-                .name   = "i2c_omap",
+                .name   = "omap_i2c",
                 .owner  = THIS_MODULE,
         },
 };
@@ -955,4 +1161,4 @@ module_exit(omap_i2c_exit_driver);
 MODULE_AUTHOR("MontaVista Software, Inc. (and others)");
 MODULE_DESCRIPTION("TI OMAP I2C bus adapter");
 MODULE_LICENSE("GPL");
-MODULE_ALIAS("platform:i2c_omap");
+MODULE_ALIAS("platform:omap_i2c");
diff --git a/drivers/i2c/busses/i2c-parport-light.c b/drivers/i2c/busses/i2c-parport-light.c
index 322c5691e38e..fc5fbd1012c9 100644
--- a/drivers/i2c/busses/i2c-parport-light.c
+++ b/drivers/i2c/busses/i2c-parport-light.c
@@ -1,7 +1,7 @@
 /* ------------------------------------------------------------------------ *
  * i2c-parport-light.c I2C bus over parallel port                           *
  * ------------------------------------------------------------------------ *
-   Copyright (C) 2003-2007 Jean Delvare <khali@linux-fr.org>
+   Copyright (C) 2003-2010 Jean Delvare <khali@linux-fr.org>
    
    Based on older i2c-velleman.c driver
    Copyright (C) 1995-2000 Simon G. Vogl
@@ -27,11 +27,13 @@
 #include <linux/kernel.h>
 #include <linux/module.h>
 #include <linux/init.h>
+#include <linux/delay.h>
 #include <linux/platform_device.h>
 #include <linux/ioport.h>
 #include <linux/i2c.h>
 #include <linux/i2c-algo-bit.h>
-#include <asm/io.h>
+#include <linux/i2c-smbus.h>
+#include <linux/io.h>
 #include "i2c-parport.h"
 
 #define DEFAULT_BASE 0x378
@@ -43,6 +45,10 @@ static u16 base;
 module_param(base, ushort, 0);
 MODULE_PARM_DESC(base, "Base I/O address");
 
+static int irq;
+module_param(irq, int, 0);
+MODULE_PARM_DESC(irq, "IRQ (optional)");
+
 /* ----- Low-level parallel port access ----------------------------------- */
 
 static inline void port_write(unsigned char p, unsigned char d)
@@ -119,6 +125,16 @@ static struct i2c_adapter parport_adapter = {
         .name           = "Parallel port adapter (light)",
 };
 
+/* SMBus alert support */
+static struct i2c_smbus_alert_setup alert_data = {
+        .alert_edge_triggered   = 1,
+};
+static struct i2c_client *ara;
+static struct lineop parport_ctrl_irq = {
+        .val            = (1 << 4),
+        .port           = CTRL,
+};
+
 static int __devinit i2c_parport_probe(struct platform_device *pdev)
 {
         int err;
@@ -127,18 +143,39 @@ static int __devinit i2c_parport_probe(struct platform_device *pdev)
         parport_setsda(NULL, 1);
         parport_setscl(NULL, 1);
         /* Other init if needed (power on...) */
-        if (adapter_parm[type].init.val)
+        if (adapter_parm[type].init.val) {
                 line_set(1, &adapter_parm[type].init);
+                /* Give powered devices some time to settle */
+                msleep(100);
+        }
 
         parport_adapter.dev.parent = &pdev->dev;
         err = i2c_bit_add_bus(&parport_adapter);
-        if (err)
+        if (err) {
                 dev_err(&pdev->dev, "Unable to register with I2C\n");
-        return err;
+                return err;
+        }
+
+        /* Setup SMBus alert if supported */
+        if (adapter_parm[type].smbus_alert && irq) {
+                alert_data.irq = irq;
+                ara = i2c_setup_smbus_alert(&parport_adapter, &alert_data);
+                if (ara)
+                        line_set(1, &parport_ctrl_irq);
+                else
+                        dev_warn(&pdev->dev, "Failed to register ARA client\n");
+        }
+
+        return 0;
 }
 
 static int __devexit i2c_parport_remove(struct platform_device *pdev)
 {
+        if (ara) {
+                line_set(0, &parport_ctrl_irq);
+                i2c_unregister_device(ara);
+                ara = NULL;
+        }
         i2c_del_adapter(&parport_adapter);
 
         /* Un-init if needed (power off...) */
@@ -205,6 +242,9 @@ static int __init i2c_parport_init(void)
         if (!request_region(base, 3, DRVNAME))
                 return -EBUSY;
 
+        if (irq != 0)
+                pr_info(DRVNAME ": using irq %d\n", irq);
+
         if (!adapter_parm[type].getscl.val)
                 parport_algo_data.getscl = NULL;
 
diff --git a/drivers/i2c/busses/i2c-parport.c b/drivers/i2c/busses/i2c-parport.c
index 0d8998610c74..0eb1515541e7 100644
--- a/drivers/i2c/busses/i2c-parport.c
+++ b/drivers/i2c/busses/i2c-parport.c
@@ -1,7 +1,7 @@
 /* ------------------------------------------------------------------------ *
  * i2c-parport.c I2C bus over parallel port                                 *
  * ------------------------------------------------------------------------ *
-   Copyright (C) 2003-2007 Jean Delvare <khali@linux-fr.org>
+   Copyright (C) 2003-2010 Jean Delvare <khali@linux-fr.org>
    
    Based on older i2c-philips-par.c driver
    Copyright (C) 1995-2000 Simon G. Vogl
@@ -27,9 +27,12 @@
 #include <linux/kernel.h>
 #include <linux/module.h>
 #include <linux/init.h>
+#include <linux/delay.h>
 #include <linux/parport.h>
 #include <linux/i2c.h>
 #include <linux/i2c-algo-bit.h>
+#include <linux/i2c-smbus.h>
+#include <linux/slab.h>
 #include "i2c-parport.h"
 
 /* ----- Device list ------------------------------------------------------ */
@@ -38,6 +41,8 @@ struct i2c_par {
         struct pardevice *pdev;
         struct i2c_adapter adapter;
         struct i2c_algo_bit_data algo_data;
+        struct i2c_smbus_alert_setup alert_data;
+        struct i2c_client *ara;
         struct i2c_par *next;
 };
 
@@ -132,7 +137,7 @@ static int parport_getsda(void *data)
    copied. The attaching code will set getscl to NULL for adapters that
    cannot read SCL back, and will also make the data field point to
    the parallel port structure. */
-static struct i2c_algo_bit_data parport_algo_data = {
+static const struct i2c_algo_bit_data parport_algo_data = {
         .setsda         = parport_setsda,
         .setscl         = parport_setscl,
         .getsda         = parport_getsda,
@@ -143,6 +148,19 @@ static struct i2c_algo_bit_data parport_algo_data = {
 
 /* ----- I2c and parallel port call-back functions and structures --------- */
 
+void i2c_parport_irq(void *data)
+{
+        struct i2c_par *adapter = data;
+        struct i2c_client *ara = adapter->ara;
+
+        if (ara) {
+                dev_dbg(&ara->dev, "SMBus alert received\n");
+                i2c_handle_smbus_alert(ara);
+        } else
+                dev_dbg(&adapter->adapter.dev,
+                        "SMBus alert received but no ARA client!\n");
+}
+
 static void i2c_parport_attach (struct parport *port)
 {
         struct i2c_par *adapter;
@@ -154,8 +172,9 @@ static void i2c_parport_attach (struct parport *port)
         }
 
         pr_debug("i2c-parport: attaching to %s\n", port->name);
+        parport_disable_irq(port);
         adapter->pdev = parport_register_device(port, "i2c-parport",
-                NULL, NULL, NULL, PARPORT_FLAG_EXCL, NULL);
+                NULL, NULL, i2c_parport_irq, PARPORT_FLAG_EXCL, adapter);
         if (!adapter->pdev) {
                 printk(KERN_ERR "i2c-parport: Unable to register with parport\n");
                 goto ERROR0;
@@ -185,14 +204,29 @@ static void i2c_parport_attach (struct parport *port)
         parport_setsda(port, 1);
         parport_setscl(port, 1);
         /* Other init if needed (power on...) */
-        if (adapter_parm[type].init.val)
+        if (adapter_parm[type].init.val) {
                 line_set(port, 1, &adapter_parm[type].init);
+                /* Give powered devices some time to settle */
+                msleep(100);
+        }
 
         if (i2c_bit_add_bus(&adapter->adapter) < 0) {
                 printk(KERN_ERR "i2c-parport: Unable to register with I2C\n");
                 goto ERROR1;
         }
 
+        /* Setup SMBus alert if supported */
+        if (adapter_parm[type].smbus_alert) {
+                adapter->alert_data.alert_edge_triggered = 1;
+                adapter->ara = i2c_setup_smbus_alert(&adapter->adapter,
+                                                     &adapter->alert_data);
+                if (adapter->ara)
+                        parport_enable_irq(port);
+                else
+                        printk(KERN_WARNING "i2c-parport: Failed to register "
+                               "ARA client\n");
+        }
+
         /* Add the new adapter to the list */
         adapter->next = adapter_list;
         adapter_list = adapter;
@@ -213,6 +247,10 @@ static void i2c_parport_detach (struct parport *port)
         for (prev = NULL, adapter = adapter_list; adapter;
              prev = adapter, adapter = adapter->next) {
                 if (adapter->pdev->port == port) {
+                        if (adapter->ara) {
+                                parport_disable_irq(port);
+                                i2c_unregister_device(adapter->ara);
+                        }
                         i2c_del_adapter(&adapter->adapter);
 
                         /* Un-init if needed (power off...) */
diff --git a/drivers/i2c/busses/i2c-parport.h b/drivers/i2c/busses/i2c-parport.h
index ed69d846cb95..a9f66816546c 100644
--- a/drivers/i2c/busses/i2c-parport.h
+++ b/drivers/i2c/busses/i2c-parport.h
@@ -1,7 +1,7 @@
 /* ------------------------------------------------------------------------ *
  * i2c-parport.h I2C bus over parallel port                                 *
  * ------------------------------------------------------------------------ *
-   Copyright (C) 2003-2004 Jean Delvare <khali@linux-fr.org>
+   Copyright (C) 2003-2010 Jean Delvare <khali@linux-fr.org>
    
    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
@@ -38,6 +38,7 @@ struct adapter_parm {
         struct lineop getsda;
         struct lineop getscl;
         struct lineop init;
+        unsigned int smbus_alert:1;
 };
 
 static struct adapter_parm adapter_parm[] = {
@@ -73,6 +74,7 @@ static struct adapter_parm adapter_parm[] = {
                 .setscl = { 0x01, DATA, 1 },
                 .getsda = { 0x10, STAT, 1 },
                 .init   = { 0xf0, DATA, 0 },
+                .smbus_alert = 1,
         },
         /* type 5: ADM1025, ADM1030 and ADM1031 evaluation boards */
         {
diff --git a/drivers/i2c/busses/i2c-pasemi.c b/drivers/i2c/busses/i2c-pasemi.c
index adf0fbb902f0..837b8c1aa02a 100644
--- a/drivers/i2c/busses/i2c-pasemi.c
+++ b/drivers/i2c/busses/i2c-pasemi.c
@@ -24,7 +24,8 @@
 #include <linux/sched.h>
 #include <linux/i2c.h>
 #include <linux/delay.h>
-#include <asm/io.h>
+#include <linux/slab.h>
+#include <linux/io.h>
 
 static struct pci_driver pasemi_smb_driver;
 
@@ -87,7 +88,7 @@ static void pasemi_smb_clear(struct pasemi_smbus *smbus)
         reg_write(smbus, REG_SMSTA, status);
 }
 
-static unsigned int pasemi_smb_waitready(struct pasemi_smbus *smbus)
+static int pasemi_smb_waitready(struct pasemi_smbus *smbus)
 {
         int timeout = 10;
         unsigned int status;
@@ -400,7 +401,7 @@ static void __devexit pasemi_smb_remove(struct pci_dev *dev)
         kfree(smbus);
 }
 
-static struct pci_device_id pasemi_smb_ids[] = {
+static const struct pci_device_id pasemi_smb_ids[] = {
         { PCI_DEVICE(0x1959, 0xa003) },
         { 0, }
 };
diff --git a/drivers/i2c/busses/i2c-pca-isa.c b/drivers/i2c/busses/i2c-pca-isa.c
index 0ed68e2ccd22..29933f87d8fa 100644
--- a/drivers/i2c/busses/i2c-pca-isa.c
+++ b/drivers/i2c/busses/i2c-pca-isa.c
@@ -30,8 +30,8 @@
 #include <linux/isa.h>
 #include <linux/i2c.h>
 #include <linux/i2c-algo-pca.h>
+#include <linux/io.h>
 
-#include <asm/io.h>
 #include <asm/irq.h>
 
 #define DRIVER "i2c-pca-isa"
@@ -71,21 +71,25 @@ static int pca_isa_readbyte(void *pd, int reg)
 
 static int pca_isa_waitforcompletion(void *pd)
 {
-        long ret = ~0;
         unsigned long timeout;
+        long ret;
 
         if (irq > -1) {
-                ret = wait_event_interruptible_timeout(pca_wait,
+                ret = wait_event_timeout(pca_wait,
                                 pca_isa_readbyte(pd, I2C_PCA_CON)
                                 & I2C_PCA_CON_SI, pca_isa_ops.timeout);
         } else {
                 /* Do polling */
                 timeout = jiffies + pca_isa_ops.timeout;
-                while (((pca_isa_readbyte(pd, I2C_PCA_CON)
-                                & I2C_PCA_CON_SI) == 0)
-                                && (ret = time_before(jiffies, timeout)))
+                do {
+                        ret = time_before(jiffies, timeout);
+                        if (pca_isa_readbyte(pd, I2C_PCA_CON)
+                                        & I2C_PCA_CON_SI)
+                                break;
                         udelay(100);
+                } while (ret);
         }
+
         return ret > 0;
 }
 
@@ -96,7 +100,7 @@ static void pca_isa_resetchip(void *pd)
 }
 
 static irqreturn_t pca_handler(int this_irq, void *dev_id) {
-        wake_up_interruptible(&pca_wait);
+        wake_up(&pca_wait);
         return IRQ_HANDLED;
 }
 
diff --git a/drivers/i2c/busses/i2c-pca-platform.c b/drivers/i2c/busses/i2c-pca-platform.c
index c4df9d411cd5..ace67995d7de 100644
--- a/drivers/i2c/busses/i2c-pca-platform.c
+++ b/drivers/i2c/busses/i2c-pca-platform.c
@@ -23,9 +23,9 @@
 #include <linux/i2c-algo-pca.h>
 #include <linux/i2c-pca-platform.h>
 #include <linux/gpio.h>
+#include <linux/io.h>
 
 #include <asm/irq.h>
-#include <asm/io.h>
 
 struct i2c_pca_pf_data {
         void __iomem                    *reg_base;
@@ -80,20 +80,23 @@ static void i2c_pca_pf_writebyte32(void *pd, int reg, int val)
 static int i2c_pca_pf_waitforcompletion(void *pd)
 {
         struct i2c_pca_pf_data *i2c = pd;
-        long ret = ~0;
         unsigned long timeout;
+        long ret;
 
         if (i2c->irq) {
-                ret = wait_event_interruptible_timeout(i2c->wait,
+                ret = wait_event_timeout(i2c->wait,
                         i2c->algo_data.read_byte(i2c, I2C_PCA_CON)
                         & I2C_PCA_CON_SI, i2c->adap.timeout);
         } else {
                 /* Do polling */
                 timeout = jiffies + i2c->adap.timeout;
-                while (((i2c->algo_data.read_byte(i2c, I2C_PCA_CON)
-                                & I2C_PCA_CON_SI) == 0)
-                                && (ret = time_before(jiffies, timeout)))
+                do {
+                        ret = time_before(jiffies, timeout);
+                        if (i2c->algo_data.read_byte(i2c, I2C_PCA_CON)
+                                        & I2C_PCA_CON_SI)
+                                break;
                         udelay(100);
+                } while (ret);
         }
 
         return ret > 0;
@@ -122,7 +125,7 @@ static irqreturn_t i2c_pca_pf_handler(int this_irq, void *dev_id)
         if ((i2c->algo_data.read_byte(i2c, I2C_PCA_CON) & I2C_PCA_CON_SI) == 0)
                 return IRQ_NONE;
 
-        wake_up_interruptible(&i2c->wait);
+        wake_up(&i2c->wait);
 
         return IRQ_HANDLED;
 }
@@ -221,7 +224,7 @@ static int __devinit i2c_pca_pf_probe(struct platform_device *pdev)
 
         if (irq) {
                 ret = request_irq(irq, i2c_pca_pf_handler,
-                        IRQF_TRIGGER_FALLING, i2c->adap.name, i2c);
+                        IRQF_TRIGGER_FALLING, pdev->name, i2c);
                 if (ret)
                         goto e_reqirq;
         }
diff --git a/drivers/i2c/busses/i2c-piix4.c b/drivers/i2c/busses/i2c-piix4.c
index 0249a7d762b9..6d14ac2e3c41 100644
--- a/drivers/i2c/busses/i2c-piix4.c
+++ b/drivers/i2c/busses/i2c-piix4.c
@@ -22,6 +22,7 @@
         Intel PIIX4, 440MX
         Serverworks OSB4, CSB5, CSB6, HT-1000, HT-1100
         ATI IXP200, IXP300, IXP400, SB600, SB700, SB800
+        AMD Hudson-2
         SMSC Victory66
 
    Note: we assume there can only be one device, with one SMBus interface.
@@ -38,7 +39,7 @@
 #include <linux/init.h>
 #include <linux/dmi.h>
 #include <linux/acpi.h>
-#include <asm/io.h>
+#include <linux/io.h>
 
 
 /* PIIX4 SMBus address offsets */
@@ -168,7 +169,7 @@ static int __devinit piix4_setup(struct pci_dev *PIIX4_dev,
         }
 
         if (acpi_check_region(piix4_smba, SMBIOSIZE, piix4_driver.name))
-                return -EBUSY;
+                return -ENODEV;
 
         if (!request_region(piix4_smba, SMBIOSIZE, piix4_driver.name)) {
                 dev_err(&PIIX4_dev->dev, "SMBus region 0x%x already in use!\n",
@@ -232,9 +233,9 @@ static int __devinit piix4_setup_sb800(struct pci_dev *PIIX4_dev,
         unsigned short smba_idx = 0xcd6;
         u8 smba_en_lo, smba_en_hi, i2ccfg, i2ccfg_offset = 0x10, smb_en = 0x2c;
 
-        /* SB800 SMBus does not support forcing address */
+        /* SB800 and later SMBus does not support forcing address */
         if (force || force_addr) {
-                dev_err(&PIIX4_dev->dev, "SB800 SMBus does not support "
+                dev_err(&PIIX4_dev->dev, "SMBus does not support "
                         "forcing address!\n");
                 return -EINVAL;
         }
@@ -259,7 +260,7 @@ static int __devinit piix4_setup_sb800(struct pci_dev *PIIX4_dev,
 
         piix4_smba = ((smba_en_hi << 8) | smba_en_lo) & 0xffe0;
         if (acpi_check_region(piix4_smba, SMBIOSIZE, piix4_driver.name))
-                return -EBUSY;
+                return -ENODEV;
 
         if (!request_region(piix4_smba, SMBIOSIZE, piix4_driver.name)) {
                 dev_err(&PIIX4_dev->dev, "SMBus region 0x%x already in use!\n",
@@ -323,12 +324,12 @@ static int piix4_transaction(void)
         else
                 msleep(1);
 
-        while ((timeout++ < MAX_TIMEOUT) &&
+        while ((++timeout < MAX_TIMEOUT) &&
                ((temp = inb_p(SMBHSTSTS)) & 0x01))
                 msleep(1);
 
         /* If the SMBus is still busy, we give up */
-        if (timeout >= MAX_TIMEOUT) {
+        if (timeout == MAX_TIMEOUT) {
                 dev_err(&piix4_adapter.dev, "SMBus Timeout!\n");
                 result = -ETIMEDOUT;
         }
@@ -471,7 +472,7 @@ static struct i2c_adapter piix4_adapter = {
         .algo           = &smbus_algorithm,
 };
 
-static struct pci_device_id piix4_ids[] = {
+static const struct pci_device_id piix4_ids[] = {
         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_3) },
         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443MX_3) },
         { PCI_DEVICE(PCI_VENDOR_ID_EFAR, PCI_DEVICE_ID_EFAR_SLC90E66_3) },
@@ -479,6 +480,7 @@ static struct pci_device_id piix4_ids[] = {
         { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP300_SMBUS) },
         { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP400_SMBUS) },
         { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS) },
+        { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_HUDSON2_SMBUS) },
         { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS,
                      PCI_DEVICE_ID_SERVERWORKS_OSB4) },
         { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS,
@@ -499,9 +501,10 @@ static int __devinit piix4_probe(struct pci_dev *dev,
 {
         int retval;
 
-        if ((dev->vendor == PCI_VENDOR_ID_ATI) &&
-            (dev->device == PCI_DEVICE_ID_ATI_SBX00_SMBUS) &&
-            (dev->revision >= 0x40))
+        if ((dev->vendor == PCI_VENDOR_ID_ATI &&
+             dev->device == PCI_DEVICE_ID_ATI_SBX00_SMBUS &&
+             dev->revision >= 0x40) ||
+            dev->vendor == PCI_VENDOR_ID_AMD)
                 /* base address location etc changed in SB800 */
                 retval = piix4_setup_sb800(dev, id);
         else
diff --git a/drivers/i2c/busses/i2c-pmcmsp.c b/drivers/i2c/busses/i2c-pmcmsp.c
index 7b57d5f267e1..dfa7ae9c1b8e 100644
--- a/drivers/i2c/busses/i2c-pmcmsp.c
+++ b/drivers/i2c/busses/i2c-pmcmsp.c
@@ -33,7 +33,7 @@
 #include <linux/completion.h>
 #include <linux/mutex.h>
 #include <linux/delay.h>
-#include <asm/io.h>
+#include <linux/io.h>
 
 #define DRV_NAME        "pmcmsptwi"
 
diff --git a/drivers/i2c/busses/i2c-pnx.c b/drivers/i2c/busses/i2c-pnx.c
index ec15cff556b9..a97e3fec8148 100644
--- a/drivers/i2c/busses/i2c-pnx.c
+++ b/drivers/i2c/busses/i2c-pnx.c
@@ -19,14 +19,17 @@
 #include <linux/completion.h>
 #include <linux/platform_device.h>
 #include <linux/i2c-pnx.h>
+#include <linux/io.h>
+#include <linux/err.h>
+#include <linux/clk.h>
+#include <linux/slab.h>
+
 #include <mach/hardware.h>
-#include <asm/irq.h>
-#include <asm/uaccess.h>
+#include <mach/i2c.h>
 
 #define I2C_PNX_TIMEOUT         10 /* msec */
 #define I2C_PNX_SPEED_KHZ       100
 #define I2C_PNX_REGION_SIZE     0x100
-#define PNX_DEFAULT_FREQ        13 /* MHz */
 
 static inline int wait_timeout(long timeout, struct i2c_pnx_algo_data *data)
 {
@@ -48,19 +51,21 @@ static inline int wait_reset(long timeout, struct i2c_pnx_algo_data *data)
         return (timeout <= 0);
 }
 
-static inline void i2c_pnx_arm_timer(struct i2c_adapter *adap)
+static inline void i2c_pnx_arm_timer(struct i2c_pnx_algo_data *alg_data)
 {
-        struct i2c_pnx_algo_data *data = adap->algo_data;
-        struct timer_list *timer = &data->mif.timer;
-        int expires = I2C_PNX_TIMEOUT / (1000 / HZ);
+        struct timer_list *timer = &alg_data->mif.timer;
+        unsigned long expires = msecs_to_jiffies(I2C_PNX_TIMEOUT);
+
+        if (expires <= 1)
+                expires = 2;
 
         del_timer_sync(timer);
 
-        dev_dbg(&adap->dev, "Timer armed at %lu plus %u jiffies.\n",
+        dev_dbg(&alg_data->adapter.dev, "Timer armed at %lu plus %lu jiffies.\n",
                 jiffies, expires);
 
         timer->expires = jiffies + expires;
-        timer->data = (unsigned long)adap;
+        timer->data = (unsigned long)&alg_data;
 
         add_timer(timer);
 }
@@ -72,34 +77,34 @@ static inline void i2c_pnx_arm_timer(struct i2c_adapter *adap)
  *
  * Generate a START signal in the desired mode.
  */
-static int i2c_pnx_start(unsigned char slave_addr, struct i2c_adapter *adap)
+static int i2c_pnx_start(unsigned char slave_addr,
+        struct i2c_pnx_algo_data *alg_data)
 {
-        struct i2c_pnx_algo_data *alg_data = adap->algo_data;
-
-        dev_dbg(&adap->dev, "%s(): addr 0x%x mode %d\n", __func__,
+        dev_dbg(&alg_data->adapter.dev, "%s(): addr 0x%x mode %d\n", __func__,
                 slave_addr, alg_data->mif.mode);
 
         /* Check for 7 bit slave addresses only */
         if (slave_addr & ~0x7f) {
-                dev_err(&adap->dev, "%s: Invalid slave address %x. "
-                       "Only 7-bit addresses are supported\n",
-                       adap->name, slave_addr);
+                dev_err(&alg_data->adapter.dev,
+                        "%s: Invalid slave address %x. Only 7-bit addresses are supported\n",
+                        alg_data->adapter.name, slave_addr);
                 return -EINVAL;
         }
 
         /* First, make sure bus is idle */
         if (wait_timeout(I2C_PNX_TIMEOUT, alg_data)) {
                 /* Somebody else is monopolizing the bus */
-                dev_err(&adap->dev, "%s: Bus busy. Slave addr = %02x, "
-                       "cntrl = %x, stat = %x\n",
-                       adap->name, slave_addr,
-                       ioread32(I2C_REG_CTL(alg_data)),
-                       ioread32(I2C_REG_STS(alg_data)));
+                dev_err(&alg_data->adapter.dev,
+                        "%s: Bus busy. Slave addr = %02x, cntrl = %x, stat = %x\n",
+                        alg_data->adapter.name, slave_addr,
+                        ioread32(I2C_REG_CTL(alg_data)),
+                        ioread32(I2C_REG_STS(alg_data)));
                 return -EBUSY;
         } else if (ioread32(I2C_REG_STS(alg_data)) & mstatus_afi) {
                 /* Sorry, we lost the bus */
-                dev_err(&adap->dev, "%s: Arbitration failure. "
-                       "Slave addr = %02x\n", adap->name, slave_addr);
+                dev_err(&alg_data->adapter.dev,
+                        "%s: Arbitration failure. Slave addr = %02x\n",
+                        alg_data->adapter.name, slave_addr);
                 return -EIO;
         }
 
@@ -110,14 +115,14 @@ static int i2c_pnx_start(unsigned char slave_addr, struct i2c_adapter *adap)
         iowrite32(ioread32(I2C_REG_STS(alg_data)) | mstatus_tdi | mstatus_afi,
                   I2C_REG_STS(alg_data));
 
-        dev_dbg(&adap->dev, "%s(): sending %#x\n", __func__,
+        dev_dbg(&alg_data->adapter.dev, "%s(): sending %#x\n", __func__,
                 (slave_addr << 1) | start_bit | alg_data->mif.mode);
 
         /* Write the slave address, START bit and R/W bit */
         iowrite32((slave_addr << 1) | start_bit | alg_data->mif.mode,
                   I2C_REG_TX(alg_data));
 
-        dev_dbg(&adap->dev, "%s(): exit\n", __func__);
+        dev_dbg(&alg_data->adapter.dev, "%s(): exit\n", __func__);
 
         return 0;
 }
@@ -128,13 +133,12 @@ static int i2c_pnx_start(unsigned char slave_addr, struct i2c_adapter *adap)
  *
  * Generate a STOP signal to terminate the master transaction.
  */
-static void i2c_pnx_stop(struct i2c_adapter *adap)
+static void i2c_pnx_stop(struct i2c_pnx_algo_data *alg_data)
 {
-        struct i2c_pnx_algo_data *alg_data = adap->algo_data;
         /* Only 1 msec max timeout due to interrupt context */
         long timeout = 1000;
 
-        dev_dbg(&adap->dev, "%s(): entering: stat = %04x.\n",
+        dev_dbg(&alg_data->adapter.dev, "%s(): entering: stat = %04x.\n",
                 __func__, ioread32(I2C_REG_STS(alg_data)));
 
         /* Write a STOP bit to TX FIFO */
@@ -148,7 +152,7 @@ static void i2c_pnx_stop(struct i2c_adapter *adap)
                 timeout--;
         }
 
-        dev_dbg(&adap->dev, "%s(): exiting: stat = %04x.\n",
+        dev_dbg(&alg_data->adapter.dev, "%s(): exiting: stat = %04x.\n",
                 __func__, ioread32(I2C_REG_STS(alg_data)));
 }
 
@@ -158,36 +162,32 @@ static void i2c_pnx_stop(struct i2c_adapter *adap)
  *
  * Sends one byte of data to the slave
  */
-static int i2c_pnx_master_xmit(struct i2c_adapter *adap)
+static int i2c_pnx_master_xmit(struct i2c_pnx_algo_data *alg_data)
 {
-        struct i2c_pnx_algo_data *alg_data = adap->algo_data;
         u32 val;
 
-        dev_dbg(&adap->dev, "%s(): entering: stat = %04x.\n",
+        dev_dbg(&alg_data->adapter.dev, "%s(): entering: stat = %04x.\n",
                 __func__, ioread32(I2C_REG_STS(alg_data)));
 
         if (alg_data->mif.len > 0) {
                 /* We still have something to talk about... */
                 val = *alg_data->mif.buf++;
 
-                if (alg_data->mif.len == 1) {
+                if (alg_data->mif.len == 1)
                         val |= stop_bit;
-                        if (!alg_data->last)
-                                val |= start_bit;
-                }
 
                 alg_data->mif.len--;
                 iowrite32(val, I2C_REG_TX(alg_data));
 
-                dev_dbg(&adap->dev, "%s(): xmit %#x [%d]\n", __func__,
-                        val, alg_data->mif.len + 1);
+                dev_dbg(&alg_data->adapter.dev, "%s(): xmit %#x [%d]\n",
+                        __func__, val, alg_data->mif.len + 1);
 
                 if (alg_data->mif.len == 0) {
                         if (alg_data->last) {
                                 /* Wait until the STOP is seen. */
                                 if (wait_timeout(I2C_PNX_TIMEOUT, alg_data))
-                                        dev_err(&adap->dev, "The bus is still "
-                                                "active after timeout\n");
+                                        dev_err(&alg_data->adapter.dev,
+                                                "The bus is still active after timeout\n");
                         }
                         /* Disable master interrupts */
                         iowrite32(ioread32(I2C_REG_CTL(alg_data)) &
@@ -196,14 +196,15 @@ static int i2c_pnx_master_xmit(struct i2c_adapter *adap)
 
                         del_timer_sync(&alg_data->mif.timer);
 
-                        dev_dbg(&adap->dev, "%s(): Waking up xfer routine.\n",
+                        dev_dbg(&alg_data->adapter.dev,
+                                "%s(): Waking up xfer routine.\n",
                                 __func__);
 
                         complete(&alg_data->mif.complete);
                 }
         } else if (alg_data->mif.len == 0) {
                 /* zero-sized transfer */
-                i2c_pnx_stop(adap);
+                i2c_pnx_stop(alg_data);
 
                 /* Disable master interrupts. */
                 iowrite32(ioread32(I2C_REG_CTL(alg_data)) &
@@ -212,13 +213,14 @@ static int i2c_pnx_master_xmit(struct i2c_adapter *adap)
 
                 /* Stop timer. */
                 del_timer_sync(&alg_data->mif.timer);
-                dev_dbg(&adap->dev, "%s(): Waking up xfer routine after "
-                        "zero-xfer.\n", __func__);
+                dev_dbg(&alg_data->adapter.dev,
+                        "%s(): Waking up xfer routine after zero-xfer.\n",
+                        __func__);
 
                 complete(&alg_data->mif.complete);
         }
 
-        dev_dbg(&adap->dev, "%s(): exiting: stat = %04x.\n",
+        dev_dbg(&alg_data->adapter.dev, "%s(): exiting: stat = %04x.\n",
                 __func__, ioread32(I2C_REG_STS(alg_data)));
 
         return 0;
@@ -230,27 +232,25 @@ static int i2c_pnx_master_xmit(struct i2c_adapter *adap)
  *
  * Reads one byte data from the slave
  */
-static int i2c_pnx_master_rcv(struct i2c_adapter *adap)
+static int i2c_pnx_master_rcv(struct i2c_pnx_algo_data *alg_data)
 {
-        struct i2c_pnx_algo_data *alg_data = adap->algo_data;
         unsigned int val = 0;
         u32 ctl = 0;
 
-        dev_dbg(&adap->dev, "%s(): entering: stat = %04x.\n",
+        dev_dbg(&alg_data->adapter.dev, "%s(): entering: stat = %04x.\n",
                 __func__, ioread32(I2C_REG_STS(alg_data)));
 
         /* Check, whether there is already data,
          * or we didn't 'ask' for it yet.
          */
         if (ioread32(I2C_REG_STS(alg_data)) & mstatus_rfe) {
-                dev_dbg(&adap->dev, "%s(): Write dummy data to fill "
-                        "Rx-fifo...\n", __func__);
+                dev_dbg(&alg_data->adapter.dev,
+                        "%s(): Write dummy data to fill Rx-fifo...\n",
+                        __func__);
 
                 if (alg_data->mif.len == 1) {
                         /* Last byte, do not acknowledge next rcv. */
                         val |= stop_bit;
-                        if (!alg_data->last)
-                                val |= start_bit;
 
                         /*
                          * Enable interrupt RFDAIE (data in Rx fifo),
@@ -276,16 +276,16 @@ static int i2c_pnx_master_rcv(struct i2c_adapter *adap)
         if (alg_data->mif.len > 0) {
                 val = ioread32(I2C_REG_RX(alg_data));
                 *alg_data->mif.buf++ = (u8) (val & 0xff);
-                dev_dbg(&adap->dev, "%s(): rcv 0x%x [%d]\n", __func__, val,
-                        alg_data->mif.len);
+                dev_dbg(&alg_data->adapter.dev, "%s(): rcv 0x%x [%d]\n",
+                        __func__, val, alg_data->mif.len);
 
                 alg_data->mif.len--;
                 if (alg_data->mif.len == 0) {
                         if (alg_data->last)
                                 /* Wait until the STOP is seen. */
                                 if (wait_timeout(I2C_PNX_TIMEOUT, alg_data))
-                                        dev_err(&adap->dev, "The bus is still "
-                                                "active after timeout\n");
+                                        dev_err(&alg_data->adapter.dev,
+                                                "The bus is still active after timeout\n");
 
                         /* Disable master interrupts */
                         ctl = ioread32(I2C_REG_CTL(alg_data));
@@ -299,7 +299,7 @@ static int i2c_pnx_master_rcv(struct i2c_adapter *adap)
                 }
         }
 
-        dev_dbg(&adap->dev, "%s(): exiting: stat = %04x.\n",
+        dev_dbg(&alg_data->adapter.dev, "%s(): exiting: stat = %04x.\n",
                 __func__, ioread32(I2C_REG_STS(alg_data)));
 
         return 0;
@@ -307,11 +307,11 @@ static int i2c_pnx_master_rcv(struct i2c_adapter *adap)
 
 static irqreturn_t i2c_pnx_interrupt(int irq, void *dev_id)
 {
+        struct i2c_pnx_algo_data *alg_data = dev_id;
         u32 stat, ctl;
-        struct i2c_adapter *adap = dev_id;
-        struct i2c_pnx_algo_data *alg_data = adap->algo_data;
 
-        dev_dbg(&adap->dev, "%s(): mstat = %x mctrl = %x, mode = %d\n",
+        dev_dbg(&alg_data->adapter.dev,
+                "%s(): mstat = %x mctrl = %x, mode = %d\n",
                 __func__,
                 ioread32(I2C_REG_STS(alg_data)),
                 ioread32(I2C_REG_CTL(alg_data)),
@@ -334,10 +334,10 @@ static irqreturn_t i2c_pnx_interrupt(int irq, void *dev_id)
                 complete(&alg_data->mif.complete);
         } else if (stat & mstatus_nai) {
                 /* Slave did not acknowledge, generate a STOP */
-                dev_dbg(&adap->dev, "%s(): "
-                        "Slave did not acknowledge, generating a STOP.\n",
+                dev_dbg(&alg_data->adapter.dev,
+                        "%s(): Slave did not acknowledge, generating a STOP.\n",
                         __func__);
-                i2c_pnx_stop(adap);
+                i2c_pnx_stop(alg_data);
 
                 /* Disable master interrupts. */
                 ctl = ioread32(I2C_REG_CTL(alg_data));
@@ -363,9 +363,9 @@ static irqreturn_t i2c_pnx_interrupt(int irq, void *dev_id)
                  */
                 if ((stat & mstatus_drmi) || !(stat & mstatus_rfe)) {
                         if (alg_data->mif.mode == I2C_SMBUS_WRITE) {
-                                i2c_pnx_master_xmit(adap);
+                                i2c_pnx_master_xmit(alg_data);
                         } else if (alg_data->mif.mode == I2C_SMBUS_READ) {
-                                i2c_pnx_master_rcv(adap);
+                                i2c_pnx_master_rcv(alg_data);
                         }
                 }
         }
@@ -374,7 +374,8 @@ static irqreturn_t i2c_pnx_interrupt(int irq, void *dev_id)
         stat = ioread32(I2C_REG_STS(alg_data));
         iowrite32(stat | mstatus_tdi | mstatus_afi, I2C_REG_STS(alg_data));
 
-        dev_dbg(&adap->dev, "%s(): exiting, stat = %x ctrl = %x.\n",
+        dev_dbg(&alg_data->adapter.dev,
+                "%s(): exiting, stat = %x ctrl = %x.\n",
                  __func__, ioread32(I2C_REG_STS(alg_data)),
                  ioread32(I2C_REG_CTL(alg_data)));
 
@@ -383,14 +384,13 @@ static irqreturn_t i2c_pnx_interrupt(int irq, void *dev_id)
 
 static void i2c_pnx_timeout(unsigned long data)
 {
-        struct i2c_adapter *adap = (struct i2c_adapter *)data;
-        struct i2c_pnx_algo_data *alg_data = adap->algo_data;
+        struct i2c_pnx_algo_data *alg_data = (struct i2c_pnx_algo_data *)data;
         u32 ctl;
 
-        dev_err(&adap->dev, "Master timed out. stat = %04x, cntrl = %04x. "
-               "Resetting master...\n",
-               ioread32(I2C_REG_STS(alg_data)),
-               ioread32(I2C_REG_CTL(alg_data)));
+        dev_err(&alg_data->adapter.dev,
+                "Master timed out. stat = %04x, cntrl = %04x. Resetting master...\n",
+                ioread32(I2C_REG_STS(alg_data)),
+                ioread32(I2C_REG_CTL(alg_data)));
 
         /* Reset master and disable interrupts */
         ctl = ioread32(I2C_REG_CTL(alg_data));
@@ -404,15 +404,14 @@ static void i2c_pnx_timeout(unsigned long data)
         complete(&alg_data->mif.complete);
 }
 
-static inline void bus_reset_if_active(struct i2c_adapter *adap)
+static inline void bus_reset_if_active(struct i2c_pnx_algo_data *alg_data)
 {
-        struct i2c_pnx_algo_data *alg_data = adap->algo_data;
         u32 stat;
 
         if ((stat = ioread32(I2C_REG_STS(alg_data))) & mstatus_active) {
-                dev_err(&adap->dev,
+                dev_err(&alg_data->adapter.dev,
                         "%s: Bus is still active after xfer. Reset it...\n",
-                       adap->name);
+                        alg_data->adapter.name);
                 iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_reset,
                           I2C_REG_CTL(alg_data));
                 wait_reset(I2C_PNX_TIMEOUT, alg_data);
@@ -446,10 +445,11 @@ i2c_pnx_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
         struct i2c_pnx_algo_data *alg_data = adap->algo_data;
         u32 stat = ioread32(I2C_REG_STS(alg_data));
 
-        dev_dbg(&adap->dev, "%s(): entering: %d messages, stat = %04x.\n",
+        dev_dbg(&alg_data->adapter.dev,
+                "%s(): entering: %d messages, stat = %04x.\n",
                 __func__, num, ioread32(I2C_REG_STS(alg_data)));
 
-        bus_reset_if_active(adap);
+        bus_reset_if_active(alg_data);
 
         /* Process transactions in a loop. */
         for (i = 0; rc >= 0 && i < num; i++) {
@@ -459,9 +459,9 @@ i2c_pnx_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
                 addr = pmsg->addr;
 
                 if (pmsg->flags & I2C_M_TEN) {
-                        dev_err(&adap->dev,
+                        dev_err(&alg_data->adapter.dev,
                                 "%s: 10 bits addr not supported!\n",
-                                adap->name);
+                                alg_data->adapter.name);
                         rc = -EINVAL;
                         break;
                 }
@@ -473,11 +473,10 @@ i2c_pnx_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
                 alg_data->mif.ret = 0;
                 alg_data->last = (i == num - 1);
 
-                dev_dbg(&adap->dev, "%s(): mode %d, %d bytes\n", __func__,
-                        alg_data->mif.mode,
-                        alg_data->mif.len);
+                dev_dbg(&alg_data->adapter.dev, "%s(): mode %d, %d bytes\n",
+                        __func__, alg_data->mif.mode, alg_data->mif.len);
 
-                i2c_pnx_arm_timer(adap);
+                i2c_pnx_arm_timer(alg_data);
 
                 /* initialize the completion var */
                 init_completion(&alg_data->mif.complete);
@@ -488,7 +487,7 @@ i2c_pnx_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
                           I2C_REG_CTL(alg_data));
 
                 /* Put start-code and slave-address on the bus. */
-                rc = i2c_pnx_start(addr, adap);
+                rc = i2c_pnx_start(addr, alg_data);
                 if (rc < 0)
                         break;
 
@@ -497,31 +496,32 @@ i2c_pnx_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
 
                 if (!(rc = alg_data->mif.ret))
                         completed++;
-                dev_dbg(&adap->dev, "%s(): Complete, return code = %d.\n",
+                dev_dbg(&alg_data->adapter.dev,
+                        "%s(): Complete, return code = %d.\n",
                         __func__, rc);
 
                 /* Clear TDI and AFI bits in case they are set. */
                 if ((stat = ioread32(I2C_REG_STS(alg_data))) & mstatus_tdi) {
-                        dev_dbg(&adap->dev,
+                        dev_dbg(&alg_data->adapter.dev,
                                 "%s: TDI still set... clearing now.\n",
-                               adap->name);
+                                alg_data->adapter.name);
                         iowrite32(stat, I2C_REG_STS(alg_data));
                 }
                 if ((stat = ioread32(I2C_REG_STS(alg_data))) & mstatus_afi) {
-                        dev_dbg(&adap->dev,
+                        dev_dbg(&alg_data->adapter.dev,
                                 "%s: AFI still set... clearing now.\n",
-                               adap->name);
+                                alg_data->adapter.name);
                         iowrite32(stat, I2C_REG_STS(alg_data));
                 }
         }
 
-        bus_reset_if_active(adap);
+        bus_reset_if_active(alg_data);
 
         /* Cleanup to be sure... */
         alg_data->mif.buf = NULL;
         alg_data->mif.len = 0;
 
-        dev_dbg(&adap->dev, "%s(): exiting, stat = %x\n",
+        dev_dbg(&alg_data->adapter.dev, "%s(): exiting, stat = %x\n",
                 __func__, ioread32(I2C_REG_STS(alg_data)));
 
         if (completed != num)
@@ -540,68 +540,92 @@ static struct i2c_algorithm pnx_algorithm = {
         .functionality = i2c_pnx_func,
 };
 
+#ifdef CONFIG_PM
 static int i2c_pnx_controller_suspend(struct platform_device *pdev,
                                       pm_message_t state)
 {
-        struct i2c_pnx_data *i2c_pnx = platform_get_drvdata(pdev);
-        return i2c_pnx->suspend(pdev, state);
+        struct i2c_pnx_algo_data *alg_data = platform_get_drvdata(pdev);
+
+        /* FIXME: shouldn't this be clk_disable? */
+        clk_enable(alg_data->clk);
+
+        return 0;
 }
 
 static int i2c_pnx_controller_resume(struct platform_device *pdev)
 {
-        struct i2c_pnx_data *i2c_pnx = platform_get_drvdata(pdev);
-        return i2c_pnx->resume(pdev);
+        struct i2c_pnx_algo_data *alg_data = platform_get_drvdata(pdev);
+
+        return clk_enable(alg_data->clk);
 }
+#else
+#define i2c_pnx_controller_suspend      NULL
+#define i2c_pnx_controller_resume       NULL
+#endif
 
 static int __devinit i2c_pnx_probe(struct platform_device *pdev)
 {
         unsigned long tmp;
         int ret = 0;
         struct i2c_pnx_algo_data *alg_data;
-        int freq_mhz;
+        unsigned long freq;
         struct i2c_pnx_data *i2c_pnx = pdev->dev.platform_data;
 
-        if (!i2c_pnx || !i2c_pnx->adapter) {
+        if (!i2c_pnx || !i2c_pnx->name) {
                 dev_err(&pdev->dev, "%s: no platform data supplied\n",
                        __func__);
                 ret = -EINVAL;
                 goto out;
         }
 
-        platform_set_drvdata(pdev, i2c_pnx);
-
-        if (i2c_pnx->calculate_input_freq)
-                freq_mhz = i2c_pnx->calculate_input_freq(pdev);
-        else {
-                freq_mhz = PNX_DEFAULT_FREQ;
-                dev_info(&pdev->dev, "Setting bus frequency to default value: "
-                       "%d MHz\n", freq_mhz);
+        alg_data = kzalloc(sizeof(*alg_data), GFP_KERNEL);
+        if (!alg_data) {
+                ret = -ENOMEM;
+                goto err_kzalloc;
         }
 
-        i2c_pnx->adapter->algo = &pnx_algorithm;
+        platform_set_drvdata(pdev, alg_data);
+
+        strlcpy(alg_data->adapter.name, i2c_pnx->name,
+                sizeof(alg_data->adapter.name));
+        alg_data->adapter.dev.parent = &pdev->dev;
+        alg_data->adapter.algo = &pnx_algorithm;
+        alg_data->adapter.algo_data = alg_data;
+        alg_data->adapter.nr = pdev->id;
+        alg_data->i2c_pnx = i2c_pnx;
+
+        alg_data->clk = clk_get(&pdev->dev, NULL);
+        if (IS_ERR(alg_data->clk)) {
+                ret = PTR_ERR(alg_data->clk);
+                goto out_drvdata;
+        }
 
-        alg_data = i2c_pnx->adapter->algo_data;
         init_timer(&alg_data->mif.timer);
         alg_data->mif.timer.function = i2c_pnx_timeout;
-        alg_data->mif.timer.data = (unsigned long)i2c_pnx->adapter;
+        alg_data->mif.timer.data = (unsigned long)alg_data;
 
         /* Register I/O resource */
-        if (!request_region(alg_data->base, I2C_PNX_REGION_SIZE, pdev->name)) {
+        if (!request_mem_region(i2c_pnx->base, I2C_PNX_REGION_SIZE,
+                                pdev->name)) {
                 dev_err(&pdev->dev,
                        "I/O region 0x%08x for I2C already in use.\n",
-                       alg_data->base);
+                       i2c_pnx->base);
                 ret = -ENODEV;
-                goto out_drvdata;
+                goto out_clkget;
         }
 
-        if (!(alg_data->ioaddr =
-                        (u32)ioremap(alg_data->base, I2C_PNX_REGION_SIZE))) {
+        alg_data->ioaddr = ioremap(i2c_pnx->base, I2C_PNX_REGION_SIZE);
+        if (!alg_data->ioaddr) {
                 dev_err(&pdev->dev, "Couldn't ioremap I2C I/O region\n");
                 ret = -ENOMEM;
                 goto out_release;
         }
 
-        i2c_pnx->set_clock_run(pdev);
+        ret = clk_enable(alg_data->clk);
+        if (ret)
+                goto out_unmap;
+
+        freq = clk_get_rate(alg_data->clk);
 
         /*
          * Clock Divisor High This value is the number of system clocks
@@ -614,44 +638,49 @@ static int __devinit i2c_pnx_probe(struct platform_device *pdev)
          * the deglitching filter length.
          */
 
-        tmp = ((freq_mhz * 1000) / I2C_PNX_SPEED_KHZ) / 2 - 2;
+        tmp = ((freq / 1000) / I2C_PNX_SPEED_KHZ) / 2 - 2;
+        if (tmp > 0x3FF)
+                tmp = 0x3FF;
         iowrite32(tmp, I2C_REG_CKH(alg_data));
         iowrite32(tmp, I2C_REG_CKL(alg_data));
 
         iowrite32(mcntrl_reset, I2C_REG_CTL(alg_data));
         if (wait_reset(I2C_PNX_TIMEOUT, alg_data)) {
                 ret = -ENODEV;
-                goto out_unmap;
+                goto out_clock;
         }
         init_completion(&alg_data->mif.complete);
 
-        ret = request_irq(alg_data->irq, i2c_pnx_interrupt,
-                        0, pdev->name, i2c_pnx->adapter);
+        ret = request_irq(i2c_pnx->irq, i2c_pnx_interrupt,
+                        0, pdev->name, alg_data);
         if (ret)
                 goto out_clock;
 
         /* Register this adapter with the I2C subsystem */
-        i2c_pnx->adapter->dev.parent = &pdev->dev;
-        ret = i2c_add_adapter(i2c_pnx->adapter);
+        ret = i2c_add_numbered_adapter(&alg_data->adapter);
         if (ret < 0) {
                 dev_err(&pdev->dev, "I2C: Failed to add bus\n");
                 goto out_irq;
         }
 
         dev_dbg(&pdev->dev, "%s: Master at %#8x, irq %d.\n",
-               i2c_pnx->adapter->name, alg_data->base, alg_data->irq);
+               alg_data->adapter.name, i2c_pnx->base, i2c_pnx->irq);
 
         return 0;
 
 out_irq:
-        free_irq(alg_data->irq, alg_data);
+        free_irq(i2c_pnx->irq, alg_data);
 out_clock:
-        i2c_pnx->set_clock_stop(pdev);
+        clk_disable(alg_data->clk);
 out_unmap:
-        iounmap((void *)alg_data->ioaddr);
+        iounmap(alg_data->ioaddr);
 out_release:
-        release_region(alg_data->base, I2C_PNX_REGION_SIZE);
+        release_mem_region(i2c_pnx->base, I2C_PNX_REGION_SIZE);
+out_clkget:
+        clk_put(alg_data->clk);
 out_drvdata:
+        kfree(alg_data);
+err_kzalloc:
         platform_set_drvdata(pdev, NULL);
 out:
         return ret;
@@ -659,15 +688,16 @@ out:
 
 static int __devexit i2c_pnx_remove(struct platform_device *pdev)
 {
-        struct i2c_pnx_data *i2c_pnx = platform_get_drvdata(pdev);
-        struct i2c_adapter *adap = i2c_pnx->adapter;
-        struct i2c_pnx_algo_data *alg_data = adap->algo_data;
-
-        free_irq(alg_data->irq, alg_data);
-        i2c_del_adapter(adap);
-        i2c_pnx->set_clock_stop(pdev);
-        iounmap((void *)alg_data->ioaddr);
-        release_region(alg_data->base, I2C_PNX_REGION_SIZE);
+        struct i2c_pnx_algo_data *alg_data = platform_get_drvdata(pdev);
+        struct i2c_pnx_data *i2c_pnx = alg_data->i2c_pnx;
+
+        free_irq(i2c_pnx->irq, alg_data);
+        i2c_del_adapter(&alg_data->adapter);
+        clk_disable(alg_data->clk);
+        iounmap(alg_data->ioaddr);
+        release_mem_region(i2c_pnx->base, I2C_PNX_REGION_SIZE);
+        clk_put(alg_data->clk);
+        kfree(alg_data);
         platform_set_drvdata(pdev, NULL);
 
         return 0;
diff --git a/drivers/i2c/busses/i2c-powermac.c b/drivers/i2c/busses/i2c-powermac.c
index 3c9d71f60187..b289ec99eeba 100644
--- a/drivers/i2c/busses/i2c-powermac.c
+++ b/drivers/i2c/busses/i2c-powermac.c
@@ -49,48 +49,38 @@ static s32 i2c_powermac_smbus_xfer(	struct i2c_adapter*	adap,
         int                     rc = 0;
         int                     read = (read_write == I2C_SMBUS_READ);
         int                     addrdir = (addr << 1) | read;
+        int                     mode, subsize, len;
+        u32                     subaddr;
+        u8                      *buf;
         u8                      local[2];
 
-        rc = pmac_i2c_open(bus, 0);
-        if (rc)
-                return rc;
+        if (size == I2C_SMBUS_QUICK || size == I2C_SMBUS_BYTE) {
+                mode = pmac_i2c_mode_std;
+                subsize = 0;
+                subaddr = 0;
+        } else {
+                mode = read ? pmac_i2c_mode_combined : pmac_i2c_mode_stdsub;
+                subsize = 1;
+                subaddr = command;
+        }
 
         switch (size) {
         case I2C_SMBUS_QUICK:
-                rc = pmac_i2c_setmode(bus, pmac_i2c_mode_std);
-                if (rc)
-                        goto bail;
-                rc = pmac_i2c_xfer(bus, addrdir, 0, 0, NULL, 0);
+                buf = NULL;
+                len = 0;
                 break;
         case I2C_SMBUS_BYTE:
-                rc = pmac_i2c_setmode(bus, pmac_i2c_mode_std);
-                if (rc)
-                        goto bail;
-                rc = pmac_i2c_xfer(bus, addrdir, 0, 0, &data->byte, 1);
-                break;
         case I2C_SMBUS_BYTE_DATA:
-                rc = pmac_i2c_setmode(bus, read ?
-                                      pmac_i2c_mode_combined :
-                                      pmac_i2c_mode_stdsub);
-                if (rc)
-                        goto bail;
-                rc = pmac_i2c_xfer(bus, addrdir, 1, command, &data->byte, 1);
+                buf = &data->byte;
+                len = 1;
                 break;
         case I2C_SMBUS_WORD_DATA:
-                rc = pmac_i2c_setmode(bus, read ?
-                                      pmac_i2c_mode_combined :
-                                      pmac_i2c_mode_stdsub);
-                if (rc)
-                        goto bail;
                 if (!read) {
                         local[0] = data->word & 0xff;
                         local[1] = (data->word >> 8) & 0xff;
                 }
-                rc = pmac_i2c_xfer(bus, addrdir, 1, command, local, 2);
-                if (rc == 0 && read) {
-                        data->word = ((u16)local[1]) << 8;
-                        data->word |= local[0];
-                }
+                buf = local;
+                len = 2;
                 break;
 
         /* Note that these are broken vs. the expected smbus API where
@@ -105,28 +95,49 @@ static s32 i2c_powermac_smbus_xfer(	struct i2c_adapter*	adap,
          * a repeat start/addr phase (but not stop in between)
          */
         case I2C_SMBUS_BLOCK_DATA:
-                rc = pmac_i2c_setmode(bus, read ?
-                                      pmac_i2c_mode_combined :
-                                      pmac_i2c_mode_stdsub);
-                if (rc)
-                        goto bail;
-                rc = pmac_i2c_xfer(bus, addrdir, 1, command, data->block,
-                                   data->block[0] + 1);
-
+                buf = data->block;
+                len = data->block[0] + 1;
                 break;
         case I2C_SMBUS_I2C_BLOCK_DATA:
-                rc = pmac_i2c_setmode(bus, read ?
-                                      pmac_i2c_mode_combined :
-                                      pmac_i2c_mode_stdsub);
-                if (rc)
-                        goto bail;
-                rc = pmac_i2c_xfer(bus, addrdir, 1, command,
-                                   &data->block[1], data->block[0]);
+                buf = &data->block[1];
+                len = data->block[0];
                 break;
 
         default:
-                rc = -EINVAL;
+                return -EINVAL;
+        }
+
+        rc = pmac_i2c_open(bus, 0);
+        if (rc) {
+                dev_err(&adap->dev, "Failed to open I2C, err %d\n", rc);
+                return rc;
+        }
+
+        rc = pmac_i2c_setmode(bus, mode);
+        if (rc) {
+                dev_err(&adap->dev, "Failed to set I2C mode %d, err %d\n",
+                        mode, rc);
+                goto bail;
         }
+
+        rc = pmac_i2c_xfer(bus, addrdir, subsize, subaddr, buf, len);
+        if (rc) {
+                if (rc == -ENXIO)
+                        dev_dbg(&adap->dev,
+                                "I2C transfer at 0x%02x failed, size %d, "
+                                "err %d\n", addrdir >> 1, size, rc);
+                else
+                        dev_err(&adap->dev,
+                                "I2C transfer at 0x%02x failed, size %d, "
+                                "err %d\n", addrdir >> 1, size, rc);
+                goto bail;
+        }
+
+        if (size == I2C_SMBUS_WORD_DATA && read) {
+                data->word = ((u16)local[1]) << 8;
+                data->word |= local[0];
+        }
+
  bail:
         pmac_i2c_close(bus);
         return rc;
@@ -146,20 +157,39 @@ static int i2c_powermac_master_xfer(	struct i2c_adapter *adap,
         int                     read;
         int                     addrdir;
 
+        if (num != 1) {
+                dev_err(&adap->dev,
+                        "Multi-message I2C transactions not supported\n");
+                return -EOPNOTSUPP;
+        }
+
         if (msgs->flags & I2C_M_TEN)
                 return -EINVAL;
         read = (msgs->flags & I2C_M_RD) != 0;
         addrdir = (msgs->addr << 1) | read;
-        if (msgs->flags & I2C_M_REV_DIR_ADDR)
-                addrdir ^= 1;
 
         rc = pmac_i2c_open(bus, 0);
-        if (rc)
+        if (rc) {
+                dev_err(&adap->dev, "Failed to open I2C, err %d\n", rc);
                 return rc;
+        }
         rc = pmac_i2c_setmode(bus, pmac_i2c_mode_std);
-        if (rc)
+        if (rc) {
+                dev_err(&adap->dev, "Failed to set I2C mode %d, err %d\n",
+                        pmac_i2c_mode_std, rc);
                 goto bail;
+        }
         rc = pmac_i2c_xfer(bus, addrdir, 0, 0, msgs->buf, msgs->len);
+        if (rc < 0) {
+                if (rc == -ENXIO)
+                        dev_dbg(&adap->dev, "I2C %s 0x%02x failed, err %d\n",
+                                addrdir & 1 ? "read from" : "write to",
+                                addrdir >> 1, rc);
+                else
+                        dev_err(&adap->dev, "I2C %s 0x%02x failed, err %d\n",
+                                addrdir & 1 ? "read from" : "write to",
+                                addrdir >> 1, rc);
+        }
  bail:
         pmac_i2c_close(bus);
         return rc < 0 ? rc : 1;
@@ -183,19 +213,16 @@ static const struct i2c_algorithm i2c_powermac_algorithm = {
 static int __devexit i2c_powermac_remove(struct platform_device *dev)
 {
         struct i2c_adapter      *adapter = platform_get_drvdata(dev);
-        struct pmac_i2c_bus     *bus = i2c_get_adapdata(adapter);
         int                     rc;
 
         rc = i2c_del_adapter(adapter);
-        pmac_i2c_detach_adapter(bus, adapter);
-        i2c_set_adapdata(adapter, NULL);
         /* We aren't that prepared to deal with this... */
         if (rc)
                 printk(KERN_WARNING
                        "i2c-powermac.c: Failed to remove bus %s !\n",
                        adapter->name);
         platform_set_drvdata(dev, NULL);
-        kfree(adapter);
+        memset(adapter, 0, sizeof(*adapter));
 
         return 0;
 }
@@ -206,12 +233,12 @@ static int __devinit i2c_powermac_probe(struct platform_device *dev)
         struct pmac_i2c_bus *bus = dev->dev.platform_data;
         struct device_node *parent = NULL;
         struct i2c_adapter *adapter;
-        char name[32];
         const char *basename;
         int rc;
 
         if (bus == NULL)
                 return -EINVAL;
+        adapter = pmac_i2c_get_adapter(bus);
 
         /* Ok, now we need to make up a name for the interface that will
          * match what we used to do in the past, that is basically the
@@ -237,29 +264,22 @@ static int __devinit i2c_powermac_probe(struct platform_device *dev)
         default:
                 return -EINVAL;
         }
-        snprintf(name, 32, "%s %d", basename, pmac_i2c_get_channel(bus));
+        snprintf(adapter->name, sizeof(adapter->name), "%s %d", basename,
+                 pmac_i2c_get_channel(bus));
         of_node_put(parent);
 
-        adapter = kzalloc(sizeof(struct i2c_adapter), GFP_KERNEL);
-        if (adapter == NULL) {
-                printk(KERN_ERR "i2c-powermac: can't allocate inteface !\n");
-                return -ENOMEM;
-        }
         platform_set_drvdata(dev, adapter);
-        strcpy(adapter->name, name);
         adapter->algo = &i2c_powermac_algorithm;
         i2c_set_adapdata(adapter, bus);
         adapter->dev.parent = &dev->dev;
-        pmac_i2c_attach_adapter(bus, adapter);
         rc = i2c_add_adapter(adapter);
         if (rc) {
                 printk(KERN_ERR "i2c-powermac: Adapter %s registration "
-                       "failed\n", name);
-                i2c_set_adapdata(adapter, NULL);
-                pmac_i2c_detach_adapter(bus, adapter);
+                       "failed\n", adapter->name);
+                memset(adapter, 0, sizeof(*adapter));
         }
 
-        printk(KERN_INFO "PowerMac i2c bus %s registered\n", name);
+        printk(KERN_INFO "PowerMac i2c bus %s registered\n", adapter->name);
 
         if (!strncmp(basename, "uni-n", 5)) {
                 struct device_node *np;
diff --git a/drivers/i2c/busses/i2c-pxa.c b/drivers/i2c/busses/i2c-pxa.c
index 762e1e530882..f4c19a97e0b3 100644
--- a/drivers/i2c/busses/i2c-pxa.c
+++ b/drivers/i2c/busses/i2c-pxa.c
@@ -12,7 +12,7 @@
  *
  *  History:
  *    Apr 2002: Initial version [CS]
- *    Jun 2002: Properly seperated algo/adap [FB]
+ *    Jun 2002: Properly separated algo/adap [FB]
  *    Jan 2003: Fixed several bugs concerning interrupt handling [Kai-Uwe Bloem]
  *    Jan 2003: added limited signal handling [Kai-Uwe Bloem]
  *    Sep 2004: Major rework to ensure efficient bus handling [RMK]
@@ -22,7 +22,6 @@
 #include <linux/kernel.h>
 #include <linux/module.h>
 #include <linux/i2c.h>
-#include <linux/i2c-id.h>
 #include <linux/init.h>
 #include <linux/time.h>
 #include <linux/sched.h>
@@ -33,9 +32,10 @@
 #include <linux/platform_device.h>
 #include <linux/err.h>
 #include <linux/clk.h>
+#include <linux/slab.h>
+#include <linux/io.h>
 
 #include <asm/irq.h>
-#include <asm/io.h>
 #include <plat/i2c.h>
 
 /*
@@ -208,18 +208,6 @@ static void i2c_pxa_show_state(struct pxa_i2c *i2c, int lno, const char *fname)
 }
 
 #define show_state(i2c) i2c_pxa_show_state(i2c, __LINE__, __func__)
-#else
-#define i2c_debug       0
-
-#define show_state(i2c) do { } while (0)
-#define decode_ISR(val) do { } while (0)
-#define decode_ICR(val) do { } while (0)
-#endif
-
-#define eedbg(lvl, x...) do { if ((lvl) < 1) { printk(KERN_DEBUG "" x); } } while(0)
-
-static void i2c_pxa_master_complete(struct pxa_i2c *i2c, int ret);
-static irqreturn_t i2c_pxa_handler(int this_irq, void *dev_id);
 
 static void i2c_pxa_scream_blue_murder(struct pxa_i2c *i2c, const char *why)
 {
@@ -235,6 +223,20 @@ static void i2c_pxa_scream_blue_murder(struct pxa_i2c *i2c, const char *why)
         printk("\n");
 }
 
+#else /* ifdef DEBUG */
+
+#define i2c_debug       0
+
+#define show_state(i2c) do { } while (0)
+#define decode_ISR(val) do { } while (0)
+#define decode_ICR(val) do { } while (0)
+#define i2c_pxa_scream_blue_murder(i2c, why) do { } while (0)
+
+#endif /* ifdef DEBUG / else */
+
+static void i2c_pxa_master_complete(struct pxa_i2c *i2c, int ret);
+static irqreturn_t i2c_pxa_handler(int this_irq, void *dev_id);
+
 static inline int i2c_pxa_is_slavemode(struct pxa_i2c *i2c)
 {
         return !(readl(_ICR(i2c)) & ICR_SCLE);
@@ -998,7 +1000,7 @@ static int i2c_pxa_probe(struct platform_device *dev)
         struct pxa_i2c *i2c;
         struct resource *res;
         struct i2c_pxa_platform_data *plat = dev->dev.platform_data;
-        struct platform_device_id *id = platform_get_device_id(dev);
+        const struct platform_device_id *id = platform_get_device_id(dev);
         int ret;
         int irq;
 
@@ -1134,35 +1136,44 @@ static int __exit i2c_pxa_remove(struct platform_device *dev)
 }
 
 #ifdef CONFIG_PM
-static int i2c_pxa_suspend_late(struct platform_device *dev, pm_message_t state)
+static int i2c_pxa_suspend_noirq(struct device *dev)
 {
-        struct pxa_i2c *i2c = platform_get_drvdata(dev);
+        struct platform_device *pdev = to_platform_device(dev);
+        struct pxa_i2c *i2c = platform_get_drvdata(pdev);
+
         clk_disable(i2c->clk);
+
         return 0;
 }
 
-static int i2c_pxa_resume_early(struct platform_device *dev)
+static int i2c_pxa_resume_noirq(struct device *dev)
 {
-        struct pxa_i2c *i2c = platform_get_drvdata(dev);
+        struct platform_device *pdev = to_platform_device(dev);
+        struct pxa_i2c *i2c = platform_get_drvdata(pdev);
 
         clk_enable(i2c->clk);
         i2c_pxa_reset(i2c);
 
         return 0;
 }
+
+static const struct dev_pm_ops i2c_pxa_dev_pm_ops = {
+        .suspend_noirq = i2c_pxa_suspend_noirq,
+        .resume_noirq = i2c_pxa_resume_noirq,
+};
+
+#define I2C_PXA_DEV_PM_OPS (&i2c_pxa_dev_pm_ops)
 #else
-#define i2c_pxa_suspend_late NULL
-#define i2c_pxa_resume_early NULL
+#define I2C_PXA_DEV_PM_OPS NULL
 #endif
 
 static struct platform_driver i2c_pxa_driver = {
         .probe          = i2c_pxa_probe,
         .remove         = __exit_p(i2c_pxa_remove),
-        .suspend_late   = i2c_pxa_suspend_late,
-        .resume_early   = i2c_pxa_resume_early,
         .driver         = {
                 .name   = "pxa2xx-i2c",
                 .owner  = THIS_MODULE,
+                .pm     = I2C_PXA_DEV_PM_OPS,
         },
         .id_table       = i2c_pxa_id_table,
 };
diff --git a/drivers/i2c/busses/i2c-s3c2410.c b/drivers/i2c/busses/i2c-s3c2410.c
index 8f42a4536cdf..6c00c107ebf3 100644
--- a/drivers/i2c/busses/i2c-s3c2410.c
+++ b/drivers/i2c/busses/i2c-s3c2410.c
@@ -24,7 +24,6 @@
 #include <linux/module.h>
 
 #include <linux/i2c.h>
-#include <linux/i2c-id.h>
 #include <linux/init.h>
 #include <linux/time.h>
 #include <linux/interrupt.h>
@@ -34,9 +33,10 @@
 #include <linux/platform_device.h>
 #include <linux/clk.h>
 #include <linux/cpufreq.h>
+#include <linux/slab.h>
+#include <linux/io.h>
 
 #include <asm/irq.h>
-#include <asm/io.h>
 
 #include <plat/regs-iic.h>
 #include <plat/iic.h>
@@ -481,7 +481,8 @@ static int s3c24xx_i2c_set_master(struct s3c24xx_i2c *i2c)
 static int s3c24xx_i2c_doxfer(struct s3c24xx_i2c *i2c,
                               struct i2c_msg *msgs, int num)
 {
-        unsigned long timeout;
+        unsigned long iicstat, timeout;
+        int spins = 20;
         int ret;
 
         if (i2c->suspended)
@@ -520,7 +521,21 @@ static int s3c24xx_i2c_doxfer(struct s3c24xx_i2c *i2c,
 
         /* ensure the stop has been through the bus */
 
-        msleep(1);
+        dev_dbg(i2c->dev, "waiting for bus idle\n");
+
+        /* first, try busy waiting briefly */
+        do {
+                iicstat = readl(i2c->regs + S3C2410_IICSTAT);
+        } while ((iicstat & S3C2410_IICSTAT_START) && --spins);
+
+        /* if that timed out sleep */
+        if (!spins) {
+                msleep(1);
+                iicstat = readl(i2c->regs + S3C2410_IICSTAT);
+        }
+
+        if (iicstat & S3C2410_IICSTAT_START)
+                dev_warn(i2c->dev, "timeout waiting for bus idle\n");
 
  out:
         return ret;
@@ -539,18 +554,23 @@ static int s3c24xx_i2c_xfer(struct i2c_adapter *adap,
         int retry;
         int ret;
 
+        clk_enable(i2c->clk);
+
         for (retry = 0; retry < adap->retries; retry++) {
 
                 ret = s3c24xx_i2c_doxfer(i2c, msgs, num);
 
-                if (ret != -EAGAIN)
+                if (ret != -EAGAIN) {
+                        clk_disable(i2c->clk);
                         return ret;
+                }
 
                 dev_dbg(i2c->dev, "Retrying transmission (%d)\n", retry);
 
                 udelay(100);
         }
 
+        clk_disable(i2c->clk);
         return -EREMOTEIO;
 }
 
@@ -646,8 +666,8 @@ static int s3c24xx_i2c_clockrate(struct s3c24xx_i2c *i2c, unsigned int *got)
                 unsigned long sda_delay;
 
                 if (pdata->sda_delay) {
-                        sda_delay = (freq / 1000) * pdata->sda_delay;
-                        sda_delay /= 1000000;
+                        sda_delay = clkin * pdata->sda_delay;
+                        sda_delay = DIV_ROUND_UP(sda_delay, 1000000);
                         sda_delay = DIV_ROUND_UP(sda_delay, 5);
                         if (sda_delay > 3)
                                 sda_delay = 3;
@@ -763,11 +783,6 @@ static int s3c24xx_i2c_init(struct s3c24xx_i2c *i2c)
         dev_info(i2c->dev, "bus frequency set to %d KHz\n", freq);
         dev_dbg(i2c->dev, "S3C2410_IICCON=0x%02lx\n", iicon);
 
-        /* check for s3c2440 i2c controller  */
-
-        if (s3c24xx_i2c_is2440(i2c))
-                writel(0x0, i2c->regs + S3C2440_IICLC);
-
         return 0;
 }
 
@@ -900,6 +915,7 @@ static int s3c24xx_i2c_probe(struct platform_device *pdev)
         platform_set_drvdata(pdev, i2c);
 
         dev_info(&pdev->dev, "%s: S3C I2C adapter\n", dev_name(&i2c->adap.dev));
+        clk_disable(i2c->clk);
         return 0;
 
  err_cpufreq:
@@ -951,27 +967,37 @@ static int s3c24xx_i2c_remove(struct platform_device *pdev)
 }
 
 #ifdef CONFIG_PM
-static int s3c24xx_i2c_suspend_late(struct platform_device *dev,
-                                    pm_message_t msg)
+static int s3c24xx_i2c_suspend_noirq(struct device *dev)
 {
-        struct s3c24xx_i2c *i2c = platform_get_drvdata(dev);
+        struct platform_device *pdev = to_platform_device(dev);
+        struct s3c24xx_i2c *i2c = platform_get_drvdata(pdev);
+
         i2c->suspended = 1;
+
         return 0;
 }
 
-static int s3c24xx_i2c_resume(struct platform_device *dev)
+static int s3c24xx_i2c_resume(struct device *dev)
 {
-        struct s3c24xx_i2c *i2c = platform_get_drvdata(dev);
+        struct platform_device *pdev = to_platform_device(dev);
+        struct s3c24xx_i2c *i2c = platform_get_drvdata(pdev);
 
         i2c->suspended = 0;
+        clk_enable(i2c->clk);
         s3c24xx_i2c_init(i2c);
+        clk_disable(i2c->clk);
 
         return 0;
 }
 
+static const struct dev_pm_ops s3c24xx_i2c_dev_pm_ops = {
+        .suspend_noirq = s3c24xx_i2c_suspend_noirq,
+        .resume = s3c24xx_i2c_resume,
+};
+
+#define S3C24XX_DEV_PM_OPS (&s3c24xx_i2c_dev_pm_ops)
 #else
-#define s3c24xx_i2c_suspend_late NULL
-#define s3c24xx_i2c_resume NULL
+#define S3C24XX_DEV_PM_OPS NULL
 #endif
 
 /* device driver for platform bus bits */
@@ -990,12 +1016,11 @@ MODULE_DEVICE_TABLE(platform, s3c24xx_driver_ids);
 static struct platform_driver s3c24xx_i2c_driver = {
         .probe          = s3c24xx_i2c_probe,
         .remove         = s3c24xx_i2c_remove,
-        .suspend_late   = s3c24xx_i2c_suspend_late,
-        .resume         = s3c24xx_i2c_resume,
         .id_table       = s3c24xx_driver_ids,
         .driver         = {
                 .owner  = THIS_MODULE,
                 .name   = "s3c-i2c",
+                .pm     = S3C24XX_DEV_PM_OPS,
         },
 };
 
diff --git a/drivers/i2c/busses/i2c-s6000.c b/drivers/i2c/busses/i2c-s6000.c
index c91359f4965c..cadc0216e02f 100644
--- a/drivers/i2c/busses/i2c-s6000.c
+++ b/drivers/i2c/busses/i2c-s6000.c
@@ -36,8 +36,8 @@
 #include <linux/completion.h>
 #include <linux/interrupt.h>
 #include <linux/platform_device.h>
+#include <linux/io.h>
 
-#include <asm/io.h>
 #include "i2c-s6000.h"
 
 #define DRV_NAME "i2c-s6000"
diff --git a/drivers/i2c/busses/i2c-scmi.c b/drivers/i2c/busses/i2c-scmi.c
new file mode 100644
index 000000000000..388cbdc96db7
--- /dev/null
+++ b/drivers/i2c/busses/i2c-scmi.c
@@ -0,0 +1,445 @@
+/*
+ * SMBus driver for ACPI SMBus CMI
+ *
+ * Copyright (C) 2009 Crane Cai <crane.cai@amd.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation version 2.
+ */
+
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/kernel.h>
+#include <linux/stddef.h>
+#include <linux/init.h>
+#include <linux/i2c.h>
+#include <linux/acpi.h>
+
+#define ACPI_SMBUS_HC_CLASS             "smbus"
+#define ACPI_SMBUS_HC_DEVICE_NAME       "cmi"
+
+ACPI_MODULE_NAME("smbus_cmi");
+
+struct smbus_methods_t {
+        char *mt_info;
+        char *mt_sbr;
+        char *mt_sbw;
+};
+
+struct acpi_smbus_cmi {
+        acpi_handle handle;
+        struct i2c_adapter adapter;
+        u8 cap_info:1;
+        u8 cap_read:1;
+        u8 cap_write:1;
+        struct smbus_methods_t *methods;
+};
+
+static const struct smbus_methods_t smbus_methods = {
+        .mt_info = "_SBI",
+        .mt_sbr  = "_SBR",
+        .mt_sbw  = "_SBW",
+};
+
+/* Some IBM BIOSes omit the leading underscore */
+static const struct smbus_methods_t ibm_smbus_methods = {
+        .mt_info = "SBI_",
+        .mt_sbr  = "SBR_",
+        .mt_sbw  = "SBW_",
+};
+
+static const struct acpi_device_id acpi_smbus_cmi_ids[] = {
+        {"SMBUS01", (kernel_ulong_t)&smbus_methods},
+        {ACPI_SMBUS_IBM_HID, (kernel_ulong_t)&ibm_smbus_methods},
+        {"", 0}
+};
+MODULE_DEVICE_TABLE(acpi, acpi_smbus_cmi_ids);
+
+#define ACPI_SMBUS_STATUS_OK                    0x00
+#define ACPI_SMBUS_STATUS_FAIL                  0x07
+#define ACPI_SMBUS_STATUS_DNAK                  0x10
+#define ACPI_SMBUS_STATUS_DERR                  0x11
+#define ACPI_SMBUS_STATUS_CMD_DENY              0x12
+#define ACPI_SMBUS_STATUS_UNKNOWN               0x13
+#define ACPI_SMBUS_STATUS_ACC_DENY              0x17
+#define ACPI_SMBUS_STATUS_TIMEOUT               0x18
+#define ACPI_SMBUS_STATUS_NOTSUP                0x19
+#define ACPI_SMBUS_STATUS_BUSY                  0x1a
+#define ACPI_SMBUS_STATUS_PEC                   0x1f
+
+#define ACPI_SMBUS_PRTCL_WRITE                  0x00
+#define ACPI_SMBUS_PRTCL_READ                   0x01
+#define ACPI_SMBUS_PRTCL_QUICK                  0x02
+#define ACPI_SMBUS_PRTCL_BYTE                   0x04
+#define ACPI_SMBUS_PRTCL_BYTE_DATA              0x06
+#define ACPI_SMBUS_PRTCL_WORD_DATA              0x08
+#define ACPI_SMBUS_PRTCL_BLOCK_DATA             0x0a
+
+
+static int
+acpi_smbus_cmi_access(struct i2c_adapter *adap, u16 addr, unsigned short flags,
+                   char read_write, u8 command, int size,
+                   union i2c_smbus_data *data)
+{
+        int result = 0;
+        struct acpi_smbus_cmi *smbus_cmi = adap->algo_data;
+        unsigned char protocol;
+        acpi_status status = 0;
+        struct acpi_object_list input;
+        union acpi_object mt_params[5];
+        struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
+        union acpi_object *obj;
+        union acpi_object *pkg;
+        char *method;
+        int len = 0;
+
+        dev_dbg(&adap->dev, "access size: %d %s\n", size,
+                (read_write) ? "READ" : "WRITE");
+        switch (size) {
+        case I2C_SMBUS_QUICK:
+                protocol = ACPI_SMBUS_PRTCL_QUICK;
+                command = 0;
+                if (read_write == I2C_SMBUS_WRITE) {
+                        mt_params[3].type = ACPI_TYPE_INTEGER;
+                        mt_params[3].integer.value = 0;
+                        mt_params[4].type = ACPI_TYPE_INTEGER;
+                        mt_params[4].integer.value = 0;
+                }
+                break;
+
+        case I2C_SMBUS_BYTE:
+                protocol = ACPI_SMBUS_PRTCL_BYTE;
+                if (read_write == I2C_SMBUS_WRITE) {
+                        mt_params[3].type = ACPI_TYPE_INTEGER;
+                        mt_params[3].integer.value = 0;
+                        mt_params[4].type = ACPI_TYPE_INTEGER;
+                        mt_params[4].integer.value = 0;
+                } else {
+                        command = 0;
+                }
+                break;
+
+        case I2C_SMBUS_BYTE_DATA:
+                protocol = ACPI_SMBUS_PRTCL_BYTE_DATA;
+                if (read_write == I2C_SMBUS_WRITE) {
+                        mt_params[3].type = ACPI_TYPE_INTEGER;
+                        mt_params[3].integer.value = 1;
+                        mt_params[4].type = ACPI_TYPE_INTEGER;
+                        mt_params[4].integer.value = data->byte;
+                }
+                break;
+
+        case I2C_SMBUS_WORD_DATA:
+                protocol = ACPI_SMBUS_PRTCL_WORD_DATA;
+                if (read_write == I2C_SMBUS_WRITE) {
+                        mt_params[3].type = ACPI_TYPE_INTEGER;
+                        mt_params[3].integer.value = 2;
+                        mt_params[4].type = ACPI_TYPE_INTEGER;
+                        mt_params[4].integer.value = data->word;
+                }
+                break;
+
+        case I2C_SMBUS_BLOCK_DATA:
+                protocol = ACPI_SMBUS_PRTCL_BLOCK_DATA;
+                if (read_write == I2C_SMBUS_WRITE) {
+                        len = data->block[0];
+                        if (len == 0 || len > I2C_SMBUS_BLOCK_MAX)
+                                return -EINVAL;
+                        mt_params[3].type = ACPI_TYPE_INTEGER;
+                        mt_params[3].integer.value = len;
+                        mt_params[4].type = ACPI_TYPE_BUFFER;
+                        mt_params[4].buffer.pointer = data->block + 1;
+                }
+                break;
+
+        default:
+                dev_warn(&adap->dev, "Unsupported transaction %d\n", size);
+                return -EOPNOTSUPP;
+        }
+
+        if (read_write == I2C_SMBUS_READ) {
+                protocol |= ACPI_SMBUS_PRTCL_READ;
+                method = smbus_cmi->methods->mt_sbr;
+                input.count = 3;
+        } else {
+                protocol |= ACPI_SMBUS_PRTCL_WRITE;
+                method = smbus_cmi->methods->mt_sbw;
+                input.count = 5;
+        }
+
+        input.pointer = mt_params;
+        mt_params[0].type = ACPI_TYPE_INTEGER;
+        mt_params[0].integer.value = protocol;
+        mt_params[1].type = ACPI_TYPE_INTEGER;
+        mt_params[1].integer.value = addr;
+        mt_params[2].type = ACPI_TYPE_INTEGER;
+        mt_params[2].integer.value = command;
+
+        status = acpi_evaluate_object(smbus_cmi->handle, method, &input,
+                                      &buffer);
+        if (ACPI_FAILURE(status)) {
+                ACPI_ERROR((AE_INFO, "Evaluating %s: %i", method, status));
+                return -EIO;
+        }
+
+        pkg = buffer.pointer;
+        if (pkg && pkg->type == ACPI_TYPE_PACKAGE)
+                obj = pkg->package.elements;
+        else {
+                ACPI_ERROR((AE_INFO, "Invalid argument type"));
+                result = -EIO;
+                goto out;
+        }
+        if (obj == NULL || obj->type != ACPI_TYPE_INTEGER) {
+                ACPI_ERROR((AE_INFO, "Invalid argument type"));
+                result = -EIO;
+                goto out;
+        }
+
+        result = obj->integer.value;
+        ACPI_DEBUG_PRINT((ACPI_DB_INFO, "%s return status: %i\n",
+                          method, result));
+
+        switch (result) {
+        case ACPI_SMBUS_STATUS_OK:
+                result = 0;
+                break;
+        case ACPI_SMBUS_STATUS_BUSY:
+                result = -EBUSY;
+                goto out;
+        case ACPI_SMBUS_STATUS_TIMEOUT:
+                result = -ETIMEDOUT;
+                goto out;
+        case ACPI_SMBUS_STATUS_DNAK:
+                result = -ENXIO;
+                goto out;
+        default:
+                result = -EIO;
+                goto out;
+        }
+
+        if (read_write == I2C_SMBUS_WRITE || size == I2C_SMBUS_QUICK)
+                goto out;
+
+        obj = pkg->package.elements + 1;
+        if (obj == NULL || obj->type != ACPI_TYPE_INTEGER) {
+                ACPI_ERROR((AE_INFO, "Invalid argument type"));
+                result = -EIO;
+                goto out;
+        }
+
+        len = obj->integer.value;
+        obj = pkg->package.elements + 2;
+        switch (size) {
+        case I2C_SMBUS_BYTE:
+        case I2C_SMBUS_BYTE_DATA:
+        case I2C_SMBUS_WORD_DATA:
+                if (obj == NULL || obj->type != ACPI_TYPE_INTEGER) {
+                        ACPI_ERROR((AE_INFO, "Invalid argument type"));
+                        result = -EIO;
+                        goto out;
+                }
+                if (len == 2)
+                        data->word = obj->integer.value;
+                else
+                        data->byte = obj->integer.value;
+                break;
+        case I2C_SMBUS_BLOCK_DATA:
+                if (obj == NULL || obj->type != ACPI_TYPE_BUFFER) {
+                        ACPI_ERROR((AE_INFO, "Invalid argument type"));
+                        result = -EIO;
+                        goto out;
+                }
+                if (len == 0 || len > I2C_SMBUS_BLOCK_MAX)
+                        return -EPROTO;
+                data->block[0] = len;
+                memcpy(data->block + 1, obj->buffer.pointer, len);
+                break;
+        }
+
+out:
+        kfree(buffer.pointer);
+        dev_dbg(&adap->dev, "Transaction status: %i\n", result);
+        return result;
+}
+
+static u32 acpi_smbus_cmi_func(struct i2c_adapter *adapter)
+{
+        struct acpi_smbus_cmi *smbus_cmi = adapter->algo_data;
+        u32 ret;
+
+        ret = smbus_cmi->cap_read | smbus_cmi->cap_write ?
+                I2C_FUNC_SMBUS_QUICK : 0;
+
+        ret |= smbus_cmi->cap_read ?
+                (I2C_FUNC_SMBUS_READ_BYTE |
+                I2C_FUNC_SMBUS_READ_BYTE_DATA |
+                I2C_FUNC_SMBUS_READ_WORD_DATA |
+                I2C_FUNC_SMBUS_READ_BLOCK_DATA) : 0;
+
+        ret |= smbus_cmi->cap_write ?
+                (I2C_FUNC_SMBUS_WRITE_BYTE |
+                I2C_FUNC_SMBUS_WRITE_BYTE_DATA |
+                I2C_FUNC_SMBUS_WRITE_WORD_DATA |
+                I2C_FUNC_SMBUS_WRITE_BLOCK_DATA) : 0;
+
+        return ret;
+}
+
+static const struct i2c_algorithm acpi_smbus_cmi_algorithm = {
+        .smbus_xfer = acpi_smbus_cmi_access,
+        .functionality = acpi_smbus_cmi_func,
+};
+
+
+static int acpi_smbus_cmi_add_cap(struct acpi_smbus_cmi *smbus_cmi,
+                                  const char *name)
+{
+        struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
+        union acpi_object *obj;
+        acpi_status status;
+
+        if (!strcmp(name, smbus_cmi->methods->mt_info)) {
+                status = acpi_evaluate_object(smbus_cmi->handle,
+                                        smbus_cmi->methods->mt_info,
+                                        NULL, &buffer);
+                if (ACPI_FAILURE(status)) {
+                        ACPI_ERROR((AE_INFO, "Evaluating %s: %i",
+                                   smbus_cmi->methods->mt_info, status));
+                        return -EIO;
+                }
+
+                obj = buffer.pointer;
+                if (obj && obj->type == ACPI_TYPE_PACKAGE)
+                        obj = obj->package.elements;
+                else {
+                        ACPI_ERROR((AE_INFO, "Invalid argument type"));
+                        kfree(buffer.pointer);
+                        return -EIO;
+                }
+
+                if (obj->type != ACPI_TYPE_INTEGER) {
+                        ACPI_ERROR((AE_INFO, "Invalid argument type"));
+                        kfree(buffer.pointer);
+                        return -EIO;
+                } else
+                        ACPI_DEBUG_PRINT((ACPI_DB_INFO, "SMBus CMI Version %x"
+                                          "\n", (int)obj->integer.value));
+
+                kfree(buffer.pointer);
+                smbus_cmi->cap_info = 1;
+        } else if (!strcmp(name, smbus_cmi->methods->mt_sbr))
+                smbus_cmi->cap_read = 1;
+        else if (!strcmp(name, smbus_cmi->methods->mt_sbw))
+                smbus_cmi->cap_write = 1;
+        else
+                ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Unsupported CMI method: %s\n",
+                                 name));
+
+        return 0;
+}
+
+static acpi_status acpi_smbus_cmi_query_methods(acpi_handle handle, u32 level,
+                        void *context, void **return_value)
+{
+        char node_name[5];
+        struct acpi_buffer buffer = { sizeof(node_name), node_name };
+        struct acpi_smbus_cmi *smbus_cmi = context;
+        acpi_status status;
+
+        status = acpi_get_name(handle, ACPI_SINGLE_NAME, &buffer);
+
+        if (ACPI_SUCCESS(status))
+                acpi_smbus_cmi_add_cap(smbus_cmi, node_name);
+
+        return AE_OK;
+}
+
+static int acpi_smbus_cmi_add(struct acpi_device *device)
+{
+        struct acpi_smbus_cmi *smbus_cmi;
+        const struct acpi_device_id *id;
+
+        smbus_cmi = kzalloc(sizeof(struct acpi_smbus_cmi), GFP_KERNEL);
+        if (!smbus_cmi)
+                return -ENOMEM;
+
+        smbus_cmi->handle = device->handle;
+        strcpy(acpi_device_name(device), ACPI_SMBUS_HC_DEVICE_NAME);
+        strcpy(acpi_device_class(device), ACPI_SMBUS_HC_CLASS);
+        device->driver_data = smbus_cmi;
+        smbus_cmi->cap_info = 0;
+        smbus_cmi->cap_read = 0;
+        smbus_cmi->cap_write = 0;
+
+        for (id = acpi_smbus_cmi_ids; id->id[0]; id++)
+                if (!strcmp(id->id, acpi_device_hid(device)))
+                        smbus_cmi->methods =
+                                (struct smbus_methods_t *) id->driver_data;
+
+        acpi_walk_namespace(ACPI_TYPE_METHOD, smbus_cmi->handle, 1,
+                            acpi_smbus_cmi_query_methods, NULL, smbus_cmi, NULL);
+
+        if (smbus_cmi->cap_info == 0)
+                goto err;
+
+        snprintf(smbus_cmi->adapter.name, sizeof(smbus_cmi->adapter.name),
+                "SMBus CMI adapter %s",
+                acpi_device_name(device));
+        smbus_cmi->adapter.owner = THIS_MODULE;
+        smbus_cmi->adapter.algo = &acpi_smbus_cmi_algorithm;
+        smbus_cmi->adapter.algo_data = smbus_cmi;
+        smbus_cmi->adapter.class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
+        smbus_cmi->adapter.dev.parent = &device->dev;
+
+        if (i2c_add_adapter(&smbus_cmi->adapter)) {
+                dev_err(&device->dev, "Couldn't register adapter!\n");
+                goto err;
+        }
+
+        return 0;
+
+err:
+        kfree(smbus_cmi);
+        device->driver_data = NULL;
+        return -EIO;
+}
+
+static int acpi_smbus_cmi_remove(struct acpi_device *device, int type)
+{
+        struct acpi_smbus_cmi *smbus_cmi = acpi_driver_data(device);
+
+        i2c_del_adapter(&smbus_cmi->adapter);
+        kfree(smbus_cmi);
+        device->driver_data = NULL;
+
+        return 0;
+}
+
+static struct acpi_driver acpi_smbus_cmi_driver = {
+        .name = ACPI_SMBUS_HC_DEVICE_NAME,
+        .class = ACPI_SMBUS_HC_CLASS,
+        .ids = acpi_smbus_cmi_ids,
+        .ops = {
+                .add = acpi_smbus_cmi_add,
+                .remove = acpi_smbus_cmi_remove,
+        },
+};
+
+static int __init acpi_smbus_cmi_init(void)
+{
+        return acpi_bus_register_driver(&acpi_smbus_cmi_driver);
+}
+
+static void __exit acpi_smbus_cmi_exit(void)
+{
+        acpi_bus_unregister_driver(&acpi_smbus_cmi_driver);
+}
+
+module_init(acpi_smbus_cmi_init);
+module_exit(acpi_smbus_cmi_exit);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Crane Cai <crane.cai@amd.com>");
+MODULE_DESCRIPTION("ACPI SMBus CMI driver");
diff --git a/drivers/i2c/busses/i2c-sh7760.c b/drivers/i2c/busses/i2c-sh7760.c
index b9680f50f541..3cad8fecc3d3 100644
--- a/drivers/i2c/busses/i2c-sh7760.c
+++ b/drivers/i2c/busses/i2c-sh7760.c
@@ -16,10 +16,10 @@
 #include <linux/ioport.h>
 #include <linux/platform_device.h>
 #include <linux/slab.h>
+#include <linux/io.h>
 
 #include <asm/clock.h>
 #include <asm/i2c-sh7760.h>
-#include <asm/io.h>
 
 /* register offsets */
 #define I2CSCR          0x0             /* slave ctrl           */
@@ -101,12 +101,12 @@ struct cami2c {
 
 static inline void OUT32(struct cami2c *cam, int reg, unsigned long val)
 {
-        ctrl_outl(val, (unsigned long)cam->iobase + reg);
+        __raw_writel(val, (unsigned long)cam->iobase + reg);
 }
 
 static inline unsigned long IN32(struct cami2c *cam, int reg)
 {
-        return ctrl_inl((unsigned long)cam->iobase + reg);
+        return __raw_readl((unsigned long)cam->iobase + reg);
 }
 
 static irqreturn_t sh7760_i2c_irq(int irq, void *ptr)
diff --git a/drivers/i2c/busses/i2c-sh_mobile.c b/drivers/i2c/busses/i2c-sh_mobile.c
index 1c01083b01b5..2707f5e17158 100644
--- a/drivers/i2c/busses/i2c-sh_mobile.c
+++ b/drivers/i2c/busses/i2c-sh_mobile.c
@@ -28,8 +28,10 @@
 #include <linux/interrupt.h>
 #include <linux/i2c.h>
 #include <linux/err.h>
+#include <linux/pm_runtime.h>
 #include <linux/clk.h>
 #include <linux/io.h>
+#include <linux/slab.h>
 
 /* Transmit operation:                                                      */
 /*                                                                          */
@@ -117,8 +119,10 @@ struct sh_mobile_i2c_data {
         struct i2c_adapter adap;
 
         struct clk *clk;
+        u_int8_t icic;
         u_int8_t iccl;
         u_int8_t icch;
+        u_int8_t flags;
 
         spinlock_t lock;
         wait_queue_head_t wait;
@@ -127,15 +131,17 @@ struct sh_mobile_i2c_data {
         int sr;
 };
 
+#define IIC_FLAG_HAS_ICIC67     (1 << 0)
+
 #define NORMAL_SPEED            100000 /* FAST_SPEED 400000 */
 
 /* Register offsets */
-#define ICDR(pd)                (pd->reg + 0x00)
-#define ICCR(pd)                (pd->reg + 0x04)
-#define ICSR(pd)                (pd->reg + 0x08)
-#define ICIC(pd)                (pd->reg + 0x0c)
-#define ICCL(pd)                (pd->reg + 0x10)
-#define ICCH(pd)                (pd->reg + 0x14)
+#define ICDR                    0x00
+#define ICCR                    0x04
+#define ICSR                    0x08
+#define ICIC                    0x0c
+#define ICCL                    0x10
+#define ICCH                    0x14
 
 /* Register bits */
 #define ICCR_ICE                0x80
@@ -153,11 +159,32 @@ struct sh_mobile_i2c_data {
 #define ICSR_WAIT               0x02
 #define ICSR_DTE                0x01
 
+#define ICIC_ICCLB8             0x80
+#define ICIC_ICCHB8             0x40
 #define ICIC_ALE                0x08
 #define ICIC_TACKE              0x04
 #define ICIC_WAITE              0x02
 #define ICIC_DTEE               0x01
 
+static void iic_wr(struct sh_mobile_i2c_data *pd, int offs, unsigned char data)
+{
+        if (offs == ICIC)
+                data |= pd->icic;
+
+        iowrite8(data, pd->reg + offs);
+}
+
+static unsigned char iic_rd(struct sh_mobile_i2c_data *pd, int offs)
+{
+        return ioread8(pd->reg + offs);
+}
+
+static void iic_set_clr(struct sh_mobile_i2c_data *pd, int offs,
+                        unsigned char set, unsigned char clr)
+{
+        iic_wr(pd, offs, (iic_rd(pd, offs) | set) & ~clr);
+}
+
 static void activate_ch(struct sh_mobile_i2c_data *pd)
 {
         unsigned long i2c_clk;
@@ -165,7 +192,8 @@ static void activate_ch(struct sh_mobile_i2c_data *pd)
         u_int32_t denom;
         u_int32_t tmp;
 
-        /* Make sure the clock is enabled */
+        /* Wake up device and enable clock */
+        pm_runtime_get_sync(pd->dev);
         clk_enable(pd->clk);
 
         /* Get clock rate after clock is enabled */
@@ -184,6 +212,14 @@ static void activate_ch(struct sh_mobile_i2c_data *pd)
         else
                 pd->iccl = (u_int8_t)(num/denom);
 
+        /* one more bit of ICCL in ICIC */
+        if (pd->flags & IIC_FLAG_HAS_ICIC67) {
+                if ((num/denom) > 0xff)
+                        pd->icic |= ICIC_ICCLB8;
+                else
+                        pd->icic &= ~ICIC_ICCLB8;
+        }
+
         /* Calculate the value for icch. From the data sheet:
            icch = (p clock / transfer rate) * (H / (L + H)) */
         num = i2c_clk * 4;
@@ -193,28 +229,37 @@ static void activate_ch(struct sh_mobile_i2c_data *pd)
         else
                 pd->icch = (u_int8_t)(num/denom);
 
+        /* one more bit of ICCH in ICIC */
+        if (pd->flags & IIC_FLAG_HAS_ICIC67) {
+                if ((num/denom) > 0xff)
+                        pd->icic |= ICIC_ICCHB8;
+                else
+                        pd->icic &= ~ICIC_ICCHB8;
+        }
+
         /* Enable channel and configure rx ack */
-        iowrite8(ioread8(ICCR(pd)) | ICCR_ICE, ICCR(pd));
+        iic_set_clr(pd, ICCR, ICCR_ICE, 0);
 
         /* Mask all interrupts */
-        iowrite8(0, ICIC(pd));
+        iic_wr(pd, ICIC, 0);
 
         /* Set the clock */
-        iowrite8(pd->iccl, ICCL(pd));
-        iowrite8(pd->icch, ICCH(pd));
+        iic_wr(pd, ICCL, pd->iccl);
+        iic_wr(pd, ICCH, pd->icch);
 }
 
 static void deactivate_ch(struct sh_mobile_i2c_data *pd)
 {
         /* Clear/disable interrupts */
-        iowrite8(0, ICSR(pd));
-        iowrite8(0, ICIC(pd));
+        iic_wr(pd, ICSR, 0);
+        iic_wr(pd, ICIC, 0);
 
         /* Disable channel */
-        iowrite8(ioread8(ICCR(pd)) & ~ICCR_ICE, ICCR(pd));
+        iic_set_clr(pd, ICCR, 0, ICCR_ICE);
 
-        /* Disable clock */
+        /* Disable clock and mark device as idle */
         clk_disable(pd->clk);
+        pm_runtime_put_sync(pd->dev);
 }
 
 static unsigned char i2c_op(struct sh_mobile_i2c_data *pd,
@@ -229,35 +274,35 @@ static unsigned char i2c_op(struct sh_mobile_i2c_data *pd,
 
         switch (op) {
         case OP_START: /* issue start and trigger DTE interrupt */
-                iowrite8(0x94, ICCR(pd));
+                iic_wr(pd, ICCR, 0x94);
                 break;
         case OP_TX_FIRST: /* disable DTE interrupt and write data */
-                iowrite8(ICIC_WAITE | ICIC_ALE | ICIC_TACKE, ICIC(pd));
-                iowrite8(data, ICDR(pd));
+                iic_wr(pd, ICIC, ICIC_WAITE | ICIC_ALE | ICIC_TACKE);
+                iic_wr(pd, ICDR, data);
                 break;
         case OP_TX: /* write data */
-                iowrite8(data, ICDR(pd));
+                iic_wr(pd, ICDR, data);
                 break;
         case OP_TX_STOP: /* write data and issue a stop afterwards */
-                iowrite8(data, ICDR(pd));
-                iowrite8(0x90, ICCR(pd));
+                iic_wr(pd, ICDR, data);
+                iic_wr(pd, ICCR, 0x90);
                 break;
         case OP_TX_TO_RX: /* select read mode */
-                iowrite8(0x81, ICCR(pd));
+                iic_wr(pd, ICCR, 0x81);
                 break;
         case OP_RX: /* just read data */
-                ret = ioread8(ICDR(pd));
+                ret = iic_rd(pd, ICDR);
                 break;
         case OP_RX_STOP: /* enable DTE interrupt, issue stop */
-                iowrite8(ICIC_DTEE | ICIC_WAITE | ICIC_ALE | ICIC_TACKE,
-                         ICIC(pd));
-                iowrite8(0xc0, ICCR(pd));
+                iic_wr(pd, ICIC,
+                       ICIC_DTEE | ICIC_WAITE | ICIC_ALE | ICIC_TACKE);
+                iic_wr(pd, ICCR, 0xc0);
                 break;
         case OP_RX_STOP_DATA: /* enable DTE interrupt, read data, issue stop */
-                iowrite8(ICIC_DTEE | ICIC_WAITE | ICIC_ALE | ICIC_TACKE,
-                         ICIC(pd));
-                ret = ioread8(ICDR(pd));
-                iowrite8(0xc0, ICCR(pd));
+                iic_wr(pd, ICIC,
+                       ICIC_DTEE | ICIC_WAITE | ICIC_ALE | ICIC_TACKE);
+                ret = iic_rd(pd, ICDR);
+                iic_wr(pd, ICCR, 0xc0);
                 break;
         }
 
@@ -363,7 +408,7 @@ static irqreturn_t sh_mobile_i2c_isr(int irq, void *dev_id)
         unsigned char sr;
         int wakeup;
 
-        sr = ioread8(ICSR(pd));
+        sr = iic_rd(pd, ICSR);
         pd->sr |= sr; /* remember state */
 
         dev_dbg(pd->dev, "i2c_isr 0x%02x 0x%02x %s %d %d!\n", sr, pd->sr,
@@ -372,7 +417,7 @@ static irqreturn_t sh_mobile_i2c_isr(int irq, void *dev_id)
 
         if (sr & (ICSR_AL | ICSR_TACK)) {
                 /* don't interrupt transaction - continue to issue stop */
-                iowrite8(sr & ~(ICSR_AL | ICSR_TACK), ICSR(pd));
+                iic_wr(pd, ICSR, sr & ~(ICSR_AL | ICSR_TACK));
                 wakeup = 0;
         } else if (pd->msg->flags & I2C_M_RD)
                 wakeup = sh_mobile_i2c_isr_rx(pd);
@@ -380,7 +425,7 @@ static irqreturn_t sh_mobile_i2c_isr(int irq, void *dev_id)
                 wakeup = sh_mobile_i2c_isr_tx(pd);
 
         if (sr & ICSR_WAIT) /* TODO: add delay here to support slow acks */
-                iowrite8(sr & ~ICSR_WAIT, ICSR(pd));
+                iic_wr(pd, ICSR, sr & ~ICSR_WAIT);
 
         if (wakeup) {
                 pd->sr |= SW_DONE;
@@ -398,21 +443,21 @@ static int start_ch(struct sh_mobile_i2c_data *pd, struct i2c_msg *usr_msg)
         }
 
         /* Initialize channel registers */
-        iowrite8(ioread8(ICCR(pd)) & ~ICCR_ICE, ICCR(pd));
+        iic_set_clr(pd, ICCR, 0, ICCR_ICE);
 
         /* Enable channel and configure rx ack */
-        iowrite8(ioread8(ICCR(pd)) | ICCR_ICE, ICCR(pd));
+        iic_set_clr(pd, ICCR, ICCR_ICE, 0);
 
         /* Set the clock */
-        iowrite8(pd->iccl, ICCL(pd));
-        iowrite8(pd->icch, ICCH(pd));
+        iic_wr(pd, ICCL, pd->iccl);
+        iic_wr(pd, ICCH, pd->icch);
 
         pd->msg = usr_msg;
         pd->pos = -1;
         pd->sr = 0;
 
         /* Enable all interrupts to begin with */
-        iowrite8(ICIC_WAITE | ICIC_ALE | ICIC_TACKE | ICIC_DTEE, ICIC(pd));
+        iic_wr(pd, ICIC, ICIC_DTEE | ICIC_WAITE | ICIC_ALE | ICIC_TACKE);
         return 0;
 }
 
@@ -447,7 +492,7 @@ static int sh_mobile_i2c_xfer(struct i2c_adapter *adapter,
 
                 retry_count = 1000;
 again:
-                val = ioread8(ICSR(pd));
+                val = iic_rd(pd, ICSR);
 
                 dev_dbg(pd->dev, "val 0x%02x pd->sr 0x%02x\n", val, pd->sr);
 
@@ -493,15 +538,17 @@ static int sh_mobile_i2c_hook_irqs(struct platform_device *dev, int hook)
 {
         struct resource *res;
         int ret = -ENXIO;
-        int q, m;
-        int k = 0;
-        int n = 0;
+        int n, k = 0;
 
         while ((res = platform_get_resource(dev, IORESOURCE_IRQ, k))) {
                 for (n = res->start; hook && n <= res->end; n++) {
                         if (request_irq(n, sh_mobile_i2c_isr, IRQF_DISABLED,
-                                        dev_name(&dev->dev), dev))
+                                        dev_name(&dev->dev), dev)) {
+                                for (n--; n >= res->start; n--)
+                                        free_irq(n, dev);
+
                                 goto rollback;
+                        }
                 }
                 k++;
         }
@@ -509,16 +556,17 @@ static int sh_mobile_i2c_hook_irqs(struct platform_device *dev, int hook)
         if (hook)
                 return k > 0 ? 0 : -ENOENT;
 
-        k--;
         ret = 0;
 
  rollback:
-        for (q = k; k >= 0; k--) {
-                for (m = n; m >= res->start; m--)
-                        free_irq(m, dev);
+        k--;
 
-                res = platform_get_resource(dev, IORESOURCE_IRQ, k - 1);
-                m = res->end;
+        while (k >= 0) {
+                res = platform_get_resource(dev, IORESOURCE_IRQ, k);
+                for (n = res->start; n <= res->end; n++)
+                        free_irq(n, dev);
+
+                k--;
         }
 
         return ret;
@@ -563,7 +611,7 @@ static int sh_mobile_i2c_probe(struct platform_device *dev)
                 goto err_irq;
         }
 
-        size = (res->end - res->start) + 1;
+        size = resource_size(res);
 
         pd->reg = ioremap(res->start, size);
         if (pd->reg == NULL) {
@@ -572,6 +620,25 @@ static int sh_mobile_i2c_probe(struct platform_device *dev)
                 goto err_irq;
         }
 
+        /* The IIC blocks on SH-Mobile ARM processors
+         * come with two new bits in ICIC.
+         */
+        if (size > 0x17)
+                pd->flags |= IIC_FLAG_HAS_ICIC67;
+
+        /* Enable Runtime PM for this device.
+         *
+         * Also tell the Runtime PM core to ignore children
+         * for this device since it is valid for us to suspend
+         * this I2C master driver even though the slave devices
+         * on the I2C bus may not be suspended.
+         *
+         * The state of the I2C hardware bus is unaffected by
+         * the Runtime PM state.
+         */
+        pm_suspend_ignore_children(&dev->dev, true);
+        pm_runtime_enable(&dev->dev);
+
         /* setup the private data */
         adap = &pd->adap;
         i2c_set_adapdata(adap, pd);
@@ -614,14 +681,33 @@ static int sh_mobile_i2c_remove(struct platform_device *dev)
         iounmap(pd->reg);
         sh_mobile_i2c_hook_irqs(dev, 0);
         clk_put(pd->clk);
+        pm_runtime_disable(&dev->dev);
         kfree(pd);
         return 0;
 }
 
+static int sh_mobile_i2c_runtime_nop(struct device *dev)
+{
+        /* Runtime PM callback shared between ->runtime_suspend()
+         * and ->runtime_resume(). Simply returns success.
+         *
+         * This driver re-initializes all registers after
+         * pm_runtime_get_sync() anyway so there is no need
+         * to save and restore registers here.
+         */
+        return 0;
+}
+
+static const struct dev_pm_ops sh_mobile_i2c_dev_pm_ops = {
+        .runtime_suspend = sh_mobile_i2c_runtime_nop,
+        .runtime_resume = sh_mobile_i2c_runtime_nop,
+};
+
 static struct platform_driver sh_mobile_i2c_driver = {
         .driver         = {
                 .name           = "i2c-sh_mobile",
                 .owner          = THIS_MODULE,
+                .pm             = &sh_mobile_i2c_dev_pm_ops,
         },
         .probe          = sh_mobile_i2c_probe,
         .remove         = sh_mobile_i2c_remove,
@@ -637,7 +723,7 @@ static void __exit sh_mobile_i2c_adap_exit(void)
         platform_driver_unregister(&sh_mobile_i2c_driver);
 }
 
-module_init(sh_mobile_i2c_adap_init);
+subsys_initcall(sh_mobile_i2c_adap_init);
 module_exit(sh_mobile_i2c_adap_exit);
 
 MODULE_DESCRIPTION("SuperH Mobile I2C Bus Controller driver");
diff --git a/drivers/i2c/busses/i2c-sibyte.c b/drivers/i2c/busses/i2c-sibyte.c
index 98b1ec489159..0fe505d7abe9 100644
--- a/drivers/i2c/busses/i2c-sibyte.c
+++ b/drivers/i2c/busses/i2c-sibyte.c
@@ -22,7 +22,7 @@
 #include <linux/module.h>
 #include <linux/init.h>
 #include <linux/i2c.h>
-#include <asm/io.h>
+#include <linux/io.h>
 #include <asm/sibyte/sb1250_regs.h>
 #include <asm/sibyte/sb1250_smbus.h>
 
@@ -94,7 +94,7 @@ static int smbus_xfer(struct i2c_adapter *i2c_adap, u16 addr,
                 }
                 break;
         default:
-                return -1;      /* XXXKW better error code? */
+                return -EOPNOTSUPP;
         }
 
         while (csr_in32(SMB_CSR(adap, R_SMB_STATUS)) & M_SMB_BUSY)
@@ -104,7 +104,7 @@ static int smbus_xfer(struct i2c_adapter *i2c_adap, u16 addr,
         if (error & M_SMB_ERROR) {
                 /* Clear error bit by writing a 1 */
                 csr_out32(M_SMB_ERROR, SMB_CSR(adap, R_SMB_STATUS));
-                return -1;      /* XXXKW better error code? */
+                return (error & M_SMB_ERROR_TYPE) ? -EIO : -ENXIO;
         }
 
         if (data_bytes == 1)
diff --git a/drivers/i2c/busses/i2c-simtec.c b/drivers/i2c/busses/i2c-simtec.c
index 042fda295f3a..2fc08fbf67a2 100644
--- a/drivers/i2c/busses/i2c-simtec.c
+++ b/drivers/i2c/busses/i2c-simtec.c
@@ -23,12 +23,12 @@
 #include <linux/init.h>
 #include <linux/delay.h>
 #include <linux/platform_device.h>
+#include <linux/slab.h>
+#include <linux/io.h>
 
 #include <linux/i2c.h>
 #include <linux/i2c-algo-bit.h>
 
-#include <asm/io.h>
-
 struct simtec_i2c_data {
         struct resource         *ioarea;
         void __iomem            *reg;
@@ -92,7 +92,7 @@ static int simtec_i2c_probe(struct platform_device *dev)
                 goto err;
         }
 
-        size = (res->end-res->start)+1;
+        size = resource_size(res);
 
         pd->ioarea = request_mem_region(res->start, size, dev->name);
         if (pd->ioarea == NULL) {
diff --git a/drivers/i2c/busses/i2c-sis5595.c b/drivers/i2c/busses/i2c-sis5595.c
index 139f0c7f12a4..437586611d4a 100644
--- a/drivers/i2c/busses/i2c-sis5595.c
+++ b/drivers/i2c/busses/i2c-sis5595.c
@@ -61,7 +61,7 @@
 #include <linux/init.h>
 #include <linux/i2c.h>
 #include <linux/acpi.h>
-#include <asm/io.h>
+#include <linux/io.h>
 
 static int blacklist[] = {
         PCI_DEVICE_ID_SI_540,
@@ -142,7 +142,7 @@ static void sis5595_write(u8 reg, u8 data)
         outb(data, sis5595_base + SMB_DAT);
 }
 
-static int sis5595_setup(struct pci_dev *SIS5595_dev)
+static int __devinit sis5595_setup(struct pci_dev *SIS5595_dev)
 {
         u16 a;
         u8 val;
@@ -369,7 +369,7 @@ static struct i2c_adapter sis5595_adapter = {
         .algo           = &smbus_algorithm,
 };
 
-static struct pci_device_id sis5595_ids[] __devinitdata = {
+static const struct pci_device_id sis5595_ids[] __devinitconst = {
         { PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_503) }, 
         { 0, }
 };
diff --git a/drivers/i2c/busses/i2c-sis630.c b/drivers/i2c/busses/i2c-sis630.c
index 70ca41e90e58..e6f539e26f65 100644
--- a/drivers/i2c/busses/i2c-sis630.c
+++ b/drivers/i2c/busses/i2c-sis630.c
@@ -53,7 +53,7 @@
 #include <linux/init.h>
 #include <linux/i2c.h>
 #include <linux/acpi.h>
-#include <asm/io.h>
+#include <linux/io.h>
 
 /* SIS630 SMBus registers */
 #define SMB_STS                 0x80    /* status */
@@ -389,7 +389,7 @@ static u32 sis630_func(struct i2c_adapter *adapter)
                 I2C_FUNC_SMBUS_BLOCK_DATA;
 }
 
-static int sis630_setup(struct pci_dev *sis630_dev)
+static int __devinit sis630_setup(struct pci_dev *sis630_dev)
 {
         unsigned char b;
         struct pci_dev *dummy = NULL;
@@ -468,7 +468,7 @@ static struct i2c_adapter sis630_adapter = {
         .algo           = &smbus_algorithm,
 };
 
-static struct pci_device_id sis630_ids[] __devinitdata = {
+static const struct pci_device_id sis630_ids[] __devinitconst = {
         { PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_503) },
         { PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_LPC) },
         { 0, }
diff --git a/drivers/i2c/busses/i2c-sis96x.c b/drivers/i2c/busses/i2c-sis96x.c
index 8295885b2fdb..86837f0c4cb9 100644
--- a/drivers/i2c/busses/i2c-sis96x.c
+++ b/drivers/i2c/busses/i2c-sis96x.c
@@ -38,7 +38,7 @@
 #include <linux/i2c.h>
 #include <linux/init.h>
 #include <linux/acpi.h>
-#include <asm/io.h>
+#include <linux/io.h>
 
 /* base address register in PCI config space */
 #define SIS96x_BAR 0x04
@@ -245,7 +245,7 @@ static struct i2c_adapter sis96x_adapter = {
         .algo           = &smbus_algorithm,
 };
 
-static struct pci_device_id sis96x_ids[] = {
+static const struct pci_device_id sis96x_ids[] = {
         { PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_SMBUS) },
         { 0, }
 };
@@ -280,7 +280,7 @@ static int __devinit sis96x_probe(struct pci_dev *dev,
 
         retval = acpi_check_resource_conflict(&dev->resource[SIS96x_BAR]);
         if (retval)
-                return retval;
+                return -ENODEV;
 
         /* Everything is happy, let's grab the memory and set things up. */
         if (!request_region(sis96x_smbus_base, SMB_IOSIZE,
diff --git a/drivers/i2c/busses/i2c-stu300.c b/drivers/i2c/busses/i2c-stu300.c
index 182e711318ba..495be451d326 100644
--- a/drivers/i2c/busses/i2c-stu300.c
+++ b/drivers/i2c/busses/i2c-stu300.c
@@ -16,6 +16,7 @@
 #include <linux/interrupt.h>
 #include <linux/clk.h>
 #include <linux/io.h>
+#include <linux/slab.h>
 
 /* the name of this kernel module */
 #define NAME "stu300"
@@ -117,7 +118,8 @@ enum stu300_error {
         STU300_ERROR_NONE = 0,
         STU300_ERROR_ACKNOWLEDGE_FAILURE,
         STU300_ERROR_BUS_ERROR,
-        STU300_ERROR_ARBITRATION_LOST
+        STU300_ERROR_ARBITRATION_LOST,
+        STU300_ERROR_UNKNOWN
 };
 
 /* timeout waiting for the controller to respond */
@@ -127,7 +129,7 @@ enum stu300_error {
  * The number of address send athemps tried before giving up.
  * If the first one failes it seems like 5 to 8 attempts are required.
  */
-#define NUM_ADDR_RESEND_ATTEMPTS 10
+#define NUM_ADDR_RESEND_ATTEMPTS 12
 
 /* I2C clock speed, in Hz 0-400kHz*/
 static unsigned int scl_frequency = 100000;
@@ -149,6 +151,7 @@ module_param(scl_frequency, uint,  0644);
  * @msg_index: index of current message
  * @msg_len: length of current message
  */
+
 struct stu300_dev {
         struct platform_device  *pdev;
         struct i2c_adapter      adapter;
@@ -188,6 +191,27 @@ static inline u32 stu300_r8(void __iomem *address)
         return readl(address) & 0x000000FFU;
 }
 
+static void stu300_irq_enable(struct stu300_dev *dev)
+{
+        u32 val;
+        val = stu300_r8(dev->virtbase + I2C_CR);
+        val |= I2C_CR_INTERRUPT_ENABLE;
+        /* Twice paranoia (possible HW glitch) */
+        stu300_wr8(val, dev->virtbase + I2C_CR);
+        stu300_wr8(val, dev->virtbase + I2C_CR);
+}
+
+static void stu300_irq_disable(struct stu300_dev *dev)
+{
+        u32 val;
+        val = stu300_r8(dev->virtbase + I2C_CR);
+        val &= ~I2C_CR_INTERRUPT_ENABLE;
+        /* Twice paranoia (possible HW glitch) */
+        stu300_wr8(val, dev->virtbase + I2C_CR);
+        stu300_wr8(val, dev->virtbase + I2C_CR);
+}
+
+
 /*
  * Tells whether a certain event or events occurred in
  * response to a command. The events represent states in
@@ -196,9 +220,10 @@ static inline u32 stu300_r8(void __iomem *address)
  * documentation and can only be treated as abstract state
  * machine states.
  *
- * @ret 0 = event has not occurred, any other value means
- * the event occurred.
+ * @ret 0 = event has not occurred or unknown error, any
+ * other value means the correct event occurred or an error.
  */
+
 static int stu300_event_occurred(struct stu300_dev *dev,
                                    enum stu300_event mr_event) {
         u32 status1;
@@ -206,11 +231,28 @@ static int stu300_event_occurred(struct stu300_dev *dev,
 
         /* What event happened? */
         status1 = stu300_r8(dev->virtbase + I2C_SR1);
+
         if (!(status1 & I2C_SR1_EVF_IND))
                 /* No event at all */
                 return 0;
+
         status2 = stu300_r8(dev->virtbase + I2C_SR2);
 
+        /* Block any multiple interrupts */
+        stu300_irq_disable(dev);
+
+        /* Check for errors first */
+        if (status2 & I2C_SR2_AF_IND) {
+                dev->cmd_err = STU300_ERROR_ACKNOWLEDGE_FAILURE;
+                return 1;
+        } else if (status2 & I2C_SR2_BERR_IND) {
+                dev->cmd_err = STU300_ERROR_BUS_ERROR;
+                return 1;
+        } else if (status2 & I2C_SR2_ARLO_IND) {
+                dev->cmd_err = STU300_ERROR_ARBITRATION_LOST;
+                return 1;
+        }
+
         switch (mr_event) {
         case STU300_EVENT_1:
                 if (status1 & I2C_SR1_ADSL_IND)
@@ -221,10 +263,6 @@ static int stu300_event_occurred(struct stu300_dev *dev,
         case STU300_EVENT_7:
         case STU300_EVENT_8:
                 if (status1 & I2C_SR1_BTF_IND) {
-                        if (status2 & I2C_SR2_AF_IND)
-                                dev->cmd_err = STU300_ERROR_ACKNOWLEDGE_FAILURE;
-                        else if (status2 & I2C_SR2_BERR_IND)
-                                dev->cmd_err = STU300_ERROR_BUS_ERROR;
                         return 1;
                 }
                 break;
@@ -240,8 +278,6 @@ static int stu300_event_occurred(struct stu300_dev *dev,
         case STU300_EVENT_6:
                 if (status2 & I2C_SR2_ENDAD_IND) {
                         /* First check for any errors */
-                        if (status2 & I2C_SR2_AF_IND)
-                                dev->cmd_err = STU300_ERROR_ACKNOWLEDGE_FAILURE;
                         return 1;
                 }
                 break;
@@ -252,8 +288,15 @@ static int stu300_event_occurred(struct stu300_dev *dev,
         default:
                 break;
         }
-        if (status2 & I2C_SR2_ARLO_IND)
-                dev->cmd_err = STU300_ERROR_ARBITRATION_LOST;
+        /* If we get here, we're on thin ice.
+         * Here we are in a status where we have
+         * gotten a response that does not match
+         * what we requested.
+         */
+        dev->cmd_err = STU300_ERROR_UNKNOWN;
+        dev_err(&dev->pdev->dev,
+                "Unhandled interrupt! %d sr1: 0x%x sr2: 0x%x\n",
+                mr_event, status1, status2);
         return 0;
 }
 
@@ -262,21 +305,20 @@ static irqreturn_t stu300_irh(int irq, void *data)
         struct stu300_dev *dev = data;
         int res;
 
+        /* Just make sure that the block is clocked */
+        clk_enable(dev->clk);
+
         /* See if this was what we were waiting for */
         spin_lock(&dev->cmd_issue_lock);
-        if (dev->cmd_event != STU300_EVENT_NONE) {
-                res = stu300_event_occurred(dev, dev->cmd_event);
-                if (res || dev->cmd_err != STU300_ERROR_NONE) {
-                        u32 val;
-
-                        complete(&dev->cmd_complete);
-                        /* Block any multiple interrupts */
-                        val = stu300_r8(dev->virtbase + I2C_CR);
-                        val &= ~I2C_CR_INTERRUPT_ENABLE;
-                        stu300_wr8(val, dev->virtbase + I2C_CR);
-                }
-        }
+
+        res = stu300_event_occurred(dev, dev->cmd_event);
+        if (res || dev->cmd_err != STU300_ERROR_NONE)
+                complete(&dev->cmd_complete);
+
         spin_unlock(&dev->cmd_issue_lock);
+
+        clk_disable(dev->clk);
+
         return IRQ_HANDLED;
 }
 
@@ -308,7 +350,6 @@ static int stu300_start_and_await_event(struct stu300_dev *dev,
         stu300_wr8(cr_value, dev->virtbase + I2C_CR);
         ret = wait_for_completion_interruptible_timeout(&dev->cmd_complete,
                                                         STU300_TIMEOUT);
-
         if (ret < 0) {
                 dev_err(&dev->pdev->dev,
                        "wait_for_completion_interruptible_timeout() "
@@ -342,7 +383,6 @@ static int stu300_await_event(struct stu300_dev *dev,
                                 enum stu300_event mr_event)
 {
         int ret;
-        u32 val;
 
         if (unlikely(irqs_disabled())) {
                 /* TODO: implement polling for this case if need be. */
@@ -354,36 +394,18 @@ static int stu300_await_event(struct stu300_dev *dev,
         /* Is it already here? */
         spin_lock_irq(&dev->cmd_issue_lock);
         dev->cmd_err = STU300_ERROR_NONE;
-        if (stu300_event_occurred(dev, mr_event)) {
-                spin_unlock_irq(&dev->cmd_issue_lock);
-                goto exit_await_check_err;
-        }
-        init_completion(&dev->cmd_complete);
-        dev->cmd_err = STU300_ERROR_NONE;
         dev->cmd_event = mr_event;
 
-        /* Turn on the I2C interrupt for current operation */
-        val = stu300_r8(dev->virtbase + I2C_CR);
-        val |= I2C_CR_INTERRUPT_ENABLE;
-        stu300_wr8(val, dev->virtbase + I2C_CR);
-
-        /* Twice paranoia (possible HW glitch) */
-        stu300_wr8(val, dev->virtbase + I2C_CR);
+        init_completion(&dev->cmd_complete);
 
-        /* Check again: is it already here? */
-        if (unlikely(stu300_event_occurred(dev, mr_event))) {
-                /* Disable IRQ again. */
-                val &= ~I2C_CR_INTERRUPT_ENABLE;
-                stu300_wr8(val, dev->virtbase + I2C_CR);
-                spin_unlock_irq(&dev->cmd_issue_lock);
-                goto exit_await_check_err;
-        }
+        /* Turn on the I2C interrupt for current operation */
+        stu300_irq_enable(dev);
 
         /* Unlock the command block and wait for the event to occur */
         spin_unlock_irq(&dev->cmd_issue_lock);
+
         ret = wait_for_completion_interruptible_timeout(&dev->cmd_complete,
                                                         STU300_TIMEOUT);
-
         if (ret < 0) {
                 dev_err(&dev->pdev->dev,
                        "wait_for_completion_interruptible_timeout()"
@@ -401,7 +423,6 @@ static int stu300_await_event(struct stu300_dev *dev,
                 return -ETIMEDOUT;
         }
 
- exit_await_check_err:
         if (dev->cmd_err != STU300_ERROR_NONE) {
                 if (mr_event != STU300_EVENT_6) {
                         dev_err(&dev->pdev->dev, "controller "
@@ -457,18 +478,19 @@ struct stu300_clkset {
 };
 
 static const struct stu300_clkset stu300_clktable[] = {
-        { 0, 0xFFU },
-        { 2500000, I2C_OAR2_FR_25_10MHZ },
-        { 10000000, I2C_OAR2_FR_10_1667MHZ },
-        { 16670000, I2C_OAR2_FR_1667_2667MHZ },
-        { 26670000, I2C_OAR2_FR_2667_40MHZ },
-        { 40000000, I2C_OAR2_FR_40_5333MHZ },
-        { 53330000, I2C_OAR2_FR_5333_66MHZ },
-        { 66000000, I2C_OAR2_FR_66_80MHZ },
-        { 80000000, I2C_OAR2_FR_80_100MHZ },
+        { 0,         0xFFU },
+        { 2500000,   I2C_OAR2_FR_25_10MHZ },
+        { 10000000,  I2C_OAR2_FR_10_1667MHZ },
+        { 16670000,  I2C_OAR2_FR_1667_2667MHZ },
+        { 26670000,  I2C_OAR2_FR_2667_40MHZ },
+        { 40000000,  I2C_OAR2_FR_40_5333MHZ },
+        { 53330000,  I2C_OAR2_FR_5333_66MHZ },
+        { 66000000,  I2C_OAR2_FR_66_80MHZ },
+        { 80000000,  I2C_OAR2_FR_80_100MHZ },
         { 100000000, 0xFFU },
 };
 
+
 static int stu300_set_clk(struct stu300_dev *dev, unsigned long clkrate)
 {
 
@@ -476,7 +498,7 @@ static int stu300_set_clk(struct stu300_dev *dev, unsigned long clkrate)
         int i = 0;
 
         /* Locate the apropriate clock setting */
-        while (i < ARRAY_SIZE(stu300_clktable) &&
+        while (i < ARRAY_SIZE(stu300_clktable) - 1 &&
                stu300_clktable[i].rate < clkrate)
                 i++;
 
@@ -494,10 +516,10 @@ static int stu300_set_clk(struct stu300_dev *dev, unsigned long clkrate)
 
         if (dev->speed > 100000)
                 /* Fast Mode I2C */
-                val = ((clkrate/dev->speed)-9)/3;
+                val = ((clkrate/dev->speed) - 9)/3 + 1;
         else
                 /* Standard Mode I2C */
-                val = ((clkrate/dev->speed)-7)/2;
+                val = ((clkrate/dev->speed) - 7)/2 + 1;
 
         /* According to spec the divider must be > 2 */
         if (val < 0x002) {
@@ -557,6 +579,7 @@ static int stu300_init_hw(struct stu300_dev *dev)
          */
         clkrate = clk_get_rate(dev->clk);
         ret = stu300_set_clk(dev, clkrate);
+
         if (ret)
                 return ret;
         /*
@@ -641,7 +664,6 @@ static int stu300_xfer_msg(struct i2c_adapter *adap,
         int attempts = 0;
         struct stu300_dev *dev = i2c_get_adapdata(adap);
 
-
         clk_enable(dev->clk);
 
         /* Remove this if (0) to trace each and every message. */
@@ -715,14 +737,15 @@ static int stu300_xfer_msg(struct i2c_adapter *adap,
 
         if (attempts < NUM_ADDR_RESEND_ATTEMPTS && attempts > 0) {
                 dev_dbg(&dev->pdev->dev, "managed to get address "
-                       "through after %d attempts\n", attempts);
+                        "through after %d attempts\n", attempts);
         } else if (attempts == NUM_ADDR_RESEND_ATTEMPTS) {
                 dev_dbg(&dev->pdev->dev, "I give up, tried %d times "
-                       "to resend address.\n",
-                       NUM_ADDR_RESEND_ATTEMPTS);
+                        "to resend address.\n",
+                        NUM_ADDR_RESEND_ATTEMPTS);
                 goto exit_disable;
         }
 
+
         if (msg->flags & I2C_M_RD) {
                 /* READ: we read the actual bytes one at a time */
                 for (i = 0; i < msg->len; i++) {
@@ -804,8 +827,10 @@ static int stu300_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
 {
         int ret = -1;
         int i;
+
         struct stu300_dev *dev = i2c_get_adapdata(adap);
         dev->msg_len = num;
+
         for (i = 0; i < num; i++) {
                 /*
                  * Another driver appears to send stop for each message,
@@ -817,6 +842,7 @@ static int stu300_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
                 dev->msg_index = i;
 
                 ret = stu300_xfer_msg(adap, &msgs[i], (i == (num - 1)));
+
                 if (ret != 0) {
                         num = ret;
                         break;
@@ -845,6 +871,7 @@ stu300_probe(struct platform_device *pdev)
         struct resource *res;
         int bus_nr;
         int ret = 0;
+        char clk_name[] = "I2C0";
 
         dev = kzalloc(sizeof(struct stu300_dev), GFP_KERNEL);
         if (!dev) {
@@ -854,7 +881,8 @@ stu300_probe(struct platform_device *pdev)
         }
 
         bus_nr = pdev->id;
-        dev->clk = clk_get(&pdev->dev, NULL);
+        clk_name[3] += (char)bus_nr;
+        dev->clk = clk_get(&pdev->dev, clk_name);
         if (IS_ERR(dev->clk)) {
                 ret = PTR_ERR(dev->clk);
                 dev_err(&pdev->dev, "could not retrieve i2c bus clock\n");
diff --git a/drivers/i2c/busses/i2c-stub.c b/drivers/i2c/busses/i2c-stub.c
index 1b7b2af94036..b1b3447942c9 100644
--- a/drivers/i2c/busses/i2c-stub.c
+++ b/drivers/i2c/busses/i2c-stub.c
@@ -29,12 +29,19 @@
 #include <linux/i2c.h>
 
 #define MAX_CHIPS 10
+#define STUB_FUNC (I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | \
+                   I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA | \
+                   I2C_FUNC_SMBUS_I2C_BLOCK)
 
 static unsigned short chip_addr[MAX_CHIPS];
 module_param_array(chip_addr, ushort, NULL, S_IRUGO);
 MODULE_PARM_DESC(chip_addr,
                  "Chip addresses (up to 10, between 0x03 and 0x77)");
 
+static unsigned long functionality = STUB_FUNC;
+module_param(functionality, ulong, S_IRUGO | S_IWUSR);
+MODULE_PARM_DESC(functionality, "Override functionality bitfield");
+
 struct stub_chip {
         u8 pointer;
         u16 words[256];         /* Byte operations use the LSB as per SMBus
@@ -48,7 +55,7 @@ static s32 stub_xfer(struct i2c_adapter * adap, u16 addr, unsigned short flags,
         char read_write, u8 command, int size, union i2c_smbus_data * data)
 {
         s32 ret;
-        int i;
+        int i, len;
         struct stub_chip *chip = NULL;
 
         /* Search for the right chip */
@@ -118,6 +125,29 @@ static s32 stub_xfer(struct i2c_adapter * adap, u16 addr, unsigned short flags,
                 ret = 0;
                 break;
 
+        case I2C_SMBUS_I2C_BLOCK_DATA:
+                len = data->block[0];
+                if (read_write == I2C_SMBUS_WRITE) {
+                        for (i = 0; i < len; i++) {
+                                chip->words[command + i] &= 0xff00;
+                                chip->words[command + i] |= data->block[1 + i];
+                        }
+                        dev_dbg(&adap->dev, "i2c block data - addr 0x%02x, "
+                                        "wrote %d bytes at 0x%02x.\n",
+                                        addr, len, command);
+                } else {
+                        for (i = 0; i < len; i++) {
+                                data->block[1 + i] =
+                                        chip->words[command + i] & 0xff;
+                        }
+                        dev_dbg(&adap->dev, "i2c block data - addr 0x%02x, "
+                                        "read  %d bytes at 0x%02x.\n",
+                                        addr, len, command);
+                }
+
+                ret = 0;
+                break;
+
         default:
                 dev_dbg(&adap->dev, "Unsupported I2C/SMBus command\n");
                 ret = -EOPNOTSUPP;
@@ -129,8 +159,7 @@ static s32 stub_xfer(struct i2c_adapter * adap, u16 addr, unsigned short flags,
 
 static u32 stub_func(struct i2c_adapter *adapter)
 {
-        return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
-                I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA;
+        return STUB_FUNC & functionality;
 }
 
 static const struct i2c_algorithm smbus_algorithm = {
diff --git a/drivers/i2c/busses/i2c-taos-evm.c b/drivers/i2c/busses/i2c-taos-evm.c
index 224aa12ee7c8..dd39c1eb03ed 100644
--- a/drivers/i2c/busses/i2c-taos-evm.c
+++ b/drivers/i2c/busses/i2c-taos-evm.c
@@ -32,10 +32,12 @@
 
 #define TAOS_STATE_INIT         0
 #define TAOS_STATE_IDLE         1
-#define TAOS_STATE_SEND         2
+#define TAOS_STATE_EOFF         2
 #define TAOS_STATE_RECV         3
 
 #define TAOS_CMD_RESET          0x12
+#define TAOS_CMD_ECHO_ON        '+'
+#define TAOS_CMD_ECHO_OFF       '-'
 
 static DECLARE_WAIT_QUEUE_HEAD(wq);
 
@@ -102,17 +104,9 @@ static int taos_smbus_xfer(struct i2c_adapter *adapter, u16 addr,
 
         /* Send the transaction to the TAOS EVM */
         dev_dbg(&adapter->dev, "Command buffer: %s\n", taos->buffer);
-        taos->pos = 0;
-        taos->state = TAOS_STATE_SEND;
-        serio_write(serio, taos->buffer[0]);
-        wait_event_interruptible_timeout(wq, taos->state == TAOS_STATE_IDLE,
-                                         msecs_to_jiffies(250));
-        if (taos->state != TAOS_STATE_IDLE) {
-                dev_err(&adapter->dev, "Transaction failed "
-                        "(state=%d, pos=%d)\n", taos->state, taos->pos);
-                taos->addr = 0;
-                return -EIO;
-        }
+        for (p = taos->buffer; *p; p++)
+                serio_write(serio, *p);
+
         taos->addr = addr;
 
         /* Start the transaction and read the answer */
@@ -122,7 +116,7 @@ static int taos_smbus_xfer(struct i2c_adapter *adapter, u16 addr,
         wait_event_interruptible_timeout(wq, taos->state == TAOS_STATE_IDLE,
                                          msecs_to_jiffies(150));
         if (taos->state != TAOS_STATE_IDLE
-         || taos->pos != 6) {
+         || taos->pos != 5) {
                 dev_err(&adapter->dev, "Transaction timeout (pos=%d)\n",
                         taos->pos);
                 return -EIO;
@@ -130,7 +124,7 @@ static int taos_smbus_xfer(struct i2c_adapter *adapter, u16 addr,
         dev_dbg(&adapter->dev, "Answer buffer: %s\n", taos->buffer);
 
         /* Interpret the returned string */
-        p = taos->buffer + 2;
+        p = taos->buffer + 1;
         p[3] = '\0';
         if (!strcmp(p, "NAK"))
                 return -ENODEV;
@@ -173,13 +167,9 @@ static irqreturn_t taos_interrupt(struct serio *serio, unsigned char data,
                         wake_up_interruptible(&wq);
                 }
                 break;
-        case TAOS_STATE_SEND:
-                if (taos->buffer[++taos->pos])
-                        serio_write(serio, taos->buffer[taos->pos]);
-                else {
-                        taos->state = TAOS_STATE_IDLE;
-                        wake_up_interruptible(&wq);
-                }
+        case TAOS_STATE_EOFF:
+                taos->state = TAOS_STATE_IDLE;
+                wake_up_interruptible(&wq);
                 break;
         case TAOS_STATE_RECV:
                 taos->buffer[taos->pos++] = data;
@@ -257,6 +247,19 @@ static int taos_connect(struct serio *serio, struct serio_driver *drv)
         }
         strlcpy(adapter->name, name, sizeof(adapter->name));
 
+        /* Turn echo off for better performance */
+        taos->state = TAOS_STATE_EOFF;
+        serio_write(serio, TAOS_CMD_ECHO_OFF);
+
+        wait_event_interruptible_timeout(wq, taos->state == TAOS_STATE_IDLE,
+                                         msecs_to_jiffies(250));
+        if (taos->state != TAOS_STATE_IDLE) {
+                err = -ENODEV;
+                dev_err(&adapter->dev, "Echo off failed "
+                        "(state=%d)\n", taos->state);
+                goto exit_close;
+        }
+
         err = i2c_add_adapter(adapter);
         if (err)
                 goto exit_close;
diff --git a/drivers/i2c/busses/i2c-tiny-usb.c b/drivers/i2c/busses/i2c-tiny-usb.c
index b1c050ff311d..d03b04002f0d 100644
--- a/drivers/i2c/busses/i2c-tiny-usb.c
+++ b/drivers/i2c/busses/i2c-tiny-usb.c
@@ -13,6 +13,8 @@
 #include <linux/kernel.h>
 #include <linux/errno.h>
 #include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/types.h>
 
 /* include interfaces to usb layer */
 #include <linux/usb.h>
@@ -30,11 +32,13 @@
 #define CMD_I2C_IO_BEGIN        (1<<0)
 #define CMD_I2C_IO_END          (1<<1)
 
-/* i2c bit delay, default is 10us -> 100kHz */
-static int delay = 10;
-module_param(delay, int, 0);
-MODULE_PARM_DESC(delay, "bit delay in microseconds, "
-                 "e.g. 10 for 100kHz (default is 100kHz)");
+/* i2c bit delay, default is 10us -> 100kHz max
+   (in practice, due to additional delays in the i2c bitbanging
+   code this results in a i2c clock of about 50kHz) */
+static unsigned short delay = 10;
+module_param(delay, ushort, 0);
+MODULE_PARM_DESC(delay, "bit delay in microseconds "
+                 "(default is 10us for 100kHz max)");
 
 static int usb_read(struct i2c_adapter *adapter, int cmd,
                     int value, int index, void *data, int len);
@@ -109,7 +113,7 @@ static int usb_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs, int num)
 
 static u32 usb_func(struct i2c_adapter *adapter)
 {
-        u32 func;
+        __le32 func;
 
         /* get functionality from adapter */
         if (usb_read(adapter, CMD_GET_FUNC, 0, 0, &func, sizeof(func)) !=
@@ -118,7 +122,7 @@ static u32 usb_func(struct i2c_adapter *adapter)
                 return 0;
         }
 
-        return func;
+        return le32_to_cpu(func);
 }
 
 /* This is the actual algorithm we define */
@@ -136,7 +140,7 @@ static const struct i2c_algorithm usb_algorithm = {
  * Future Technology Devices International Ltd., later a pair was
  * bought from EZPrototypes
  */
-static struct usb_device_id i2c_tiny_usb_table [] = {
+static const struct usb_device_id i2c_tiny_usb_table[] = {
         { USB_DEVICE(0x0403, 0xc631) },   /* FTDI */
         { USB_DEVICE(0x1c40, 0x0534) },   /* EZPrototypes */
         { }                               /* Terminating entry */
@@ -216,8 +220,7 @@ static int i2c_tiny_usb_probe(struct usb_interface *interface,
                  "i2c-tiny-usb at bus %03d device %03d",
                  dev->usb_dev->bus->busnum, dev->usb_dev->devnum);
 
-        if (usb_write(&dev->adapter, CMD_SET_DELAY,
-                      cpu_to_le16(delay), 0, NULL, 0) != 0) {
+        if (usb_write(&dev->adapter, CMD_SET_DELAY, delay, 0, NULL, 0) != 0) {
                 dev_err(&dev->adapter.dev,
                         "failure setting delay to %dus\n", delay);
                 retval = -EIO;
diff --git a/drivers/i2c/busses/i2c-versatile.c b/drivers/i2c/busses/i2c-versatile.c
index 70de82163463..60556012312f 100644
--- a/drivers/i2c/busses/i2c-versatile.c
+++ b/drivers/i2c/busses/i2c-versatile.c
@@ -14,8 +14,8 @@
 #include <linux/i2c-algo-bit.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
-
-#include <asm/io.h>
+#include <linux/slab.h>
+#include <linux/io.h>
 
 #define I2C_CONTROL     0x00
 #define I2C_CONTROLS    0x00
diff --git a/drivers/i2c/busses/i2c-via.c b/drivers/i2c/busses/i2c-via.c
index 8b24f192103a..7799fe5bda88 100644
--- a/drivers/i2c/busses/i2c-via.c
+++ b/drivers/i2c/busses/i2c-via.c
@@ -25,7 +25,7 @@
 #include <linux/init.h>
 #include <linux/i2c.h>
 #include <linux/i2c-algo-bit.h>
-#include <asm/io.h>
+#include <linux/io.h>
 
 /* Power management registers */
 #define PM_CFG_REVID    0x08    /* silicon revision code */
@@ -89,7 +89,7 @@ static struct i2c_adapter vt586b_adapter = {
 };
 
 
-static struct pci_device_id vt586b_ids[] __devinitdata = {
+static const struct pci_device_id vt586b_ids[] __devinitconst = {
         { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_3) },
         { 0, }
 };
diff --git a/drivers/i2c/busses/i2c-viapro.c b/drivers/i2c/busses/i2c-viapro.c
index 54d810a4d00f..0b012f1f8ac5 100644
--- a/drivers/i2c/busses/i2c-viapro.c
+++ b/drivers/i2c/busses/i2c-viapro.c
@@ -51,7 +51,7 @@
 #include <linux/i2c.h>
 #include <linux/init.h>
 #include <linux/acpi.h>
-#include <asm/io.h>
+#include <linux/io.h>
 
 static struct pci_dev *vt596_pdev;
 
@@ -165,10 +165,10 @@ static int vt596_transaction(u8 size)
         do {
                 msleep(1);
                 temp = inb_p(SMBHSTSTS);
-        } while ((temp & 0x01) && (timeout++ < MAX_TIMEOUT));
+        } while ((temp & 0x01) && (++timeout < MAX_TIMEOUT));
 
         /* If the SMBus is still busy, we give up */
-        if (timeout >= MAX_TIMEOUT) {
+        if (timeout == MAX_TIMEOUT) {
                 result = -ETIMEDOUT;
                 dev_err(&vt596_adapter.dev, "SMBus timeout!\n");
         }
@@ -185,14 +185,8 @@ static int vt596_transaction(u8 size)
         }
 
         if (temp & 0x04) {
-                int read = inb_p(SMBHSTADD) & 0x01;
                 result = -ENXIO;
-                /* The quick and receive byte commands are used to probe
-                   for chips, so errors are expected, and we don't want
-                   to frighten the user. */
-                if (!((size == VT596_QUICK && !read) ||
-                      (size == VT596_BYTE && read)))
-                        dev_err(&vt596_adapter.dev, "Transaction error!\n");
+                dev_dbg(&vt596_adapter.dev, "No response\n");
         }
 
         /* Resetting status register */
@@ -365,7 +359,7 @@ static int __devinit vt596_probe(struct pci_dev *pdev,
 found:
         error = acpi_check_region(vt596_smba, 8, vt596_driver.name);
         if (error)
-                return error;
+                return -ENODEV;
 
         if (!request_region(vt596_smba, 8, vt596_driver.name)) {
                 dev_err(&pdev->dev, "SMBus region 0x%x already in use!\n",
@@ -444,7 +438,7 @@ release_region:
         return error;
 }
 
-static struct pci_device_id vt596_ids[] = {
+static const struct pci_device_id vt596_ids[] = {
         { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C596_3),
           .driver_data = SMBBA1 },
         { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C596B_3),
diff --git a/drivers/i2c/busses/i2c-voodoo3.c b/drivers/i2c/busses/i2c-voodoo3.c
deleted file mode 100644
index 7663d57833a0..000000000000
--- a/drivers/i2c/busses/i2c-voodoo3.c
+++ /dev/null
@@ -1,248 +0,0 @@
-/*
-    Copyright (c) 1998, 1999  Frodo Looijaard <frodol@dds.nl>,
-    Philip Edelbrock <phil@netroedge.com>,
-    Ralph Metzler <rjkm@thp.uni-koeln.de>, and
-    Mark D. Studebaker <mdsxyz123@yahoo.com>
-    
-    Based on code written by Ralph Metzler <rjkm@thp.uni-koeln.de> and
-    Simon Vogl
-
-    This program is free software; you can redistribute it and/or modify
-    it under the terms of the GNU General Public License as published by
-    the Free Software Foundation; either version 2 of the License, or
-    (at your option) any later version.
-
-    This program is distributed in the hope that it will be useful,
-    but WITHOUT ANY WARRANTY; without even the implied warranty of
-    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-    GNU General Public License for more details.
-
-    You should have received a copy of the GNU General Public License
-    along with this program; if not, write to the Free Software
-    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-*/
-
-/* This interfaces to the I2C bus of the Voodoo3 to gain access to
-    the BT869 and possibly other I2C devices. */
-
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/pci.h>
-#include <linux/i2c.h>
-#include <linux/i2c-algo-bit.h>
-#include <asm/io.h>
-
-/* the only registers we use */
-#define REG             0x78
-#define REG2            0x70
-
-/* bit locations in the register */
-#define DDC_ENAB        0x00040000
-#define DDC_SCL_OUT     0x00080000
-#define DDC_SDA_OUT     0x00100000
-#define DDC_SCL_IN      0x00200000
-#define DDC_SDA_IN      0x00400000
-#define I2C_ENAB        0x00800000
-#define I2C_SCL_OUT     0x01000000
-#define I2C_SDA_OUT     0x02000000
-#define I2C_SCL_IN      0x04000000
-#define I2C_SDA_IN      0x08000000
-
-/* initialization states */
-#define INIT2           0x2
-#define INIT3           0x4
-
-/* delays */
-#define CYCLE_DELAY     10
-#define TIMEOUT         (HZ / 2)
-
-
-static void __iomem *ioaddr;
-
-/* The voo GPIO registers don't have individual masks for each bit
-   so we always have to read before writing. */
-
-static void bit_vooi2c_setscl(void *data, int val)
-{
-        unsigned int r;
-        r = readl(ioaddr + REG);
-        if (val)
-                r |= I2C_SCL_OUT;
-        else
-                r &= ~I2C_SCL_OUT;
-        writel(r, ioaddr + REG);
-        readl(ioaddr + REG);    /* flush posted write */
-}
-
-static void bit_vooi2c_setsda(void *data, int val)
-{
-        unsigned int r;
-        r = readl(ioaddr + REG);
-        if (val)
-                r |= I2C_SDA_OUT;
-        else
-                r &= ~I2C_SDA_OUT;
-        writel(r, ioaddr + REG);
-        readl(ioaddr + REG);    /* flush posted write */
-}
-
-/* The GPIO pins are open drain, so the pins always remain outputs.
-   We rely on the i2c-algo-bit routines to set the pins high before
-   reading the input from other chips. */
-
-static int bit_vooi2c_getscl(void *data)
-{
-        return (0 != (readl(ioaddr + REG) & I2C_SCL_IN));
-}
-
-static int bit_vooi2c_getsda(void *data)
-{
-        return (0 != (readl(ioaddr + REG) & I2C_SDA_IN));
-}
-
-static void bit_vooddc_setscl(void *data, int val)
-{
-        unsigned int r;
-        r = readl(ioaddr + REG);
-        if (val)
-                r |= DDC_SCL_OUT;
-        else
-                r &= ~DDC_SCL_OUT;
-        writel(r, ioaddr + REG);
-        readl(ioaddr + REG);    /* flush posted write */
-}
-
-static void bit_vooddc_setsda(void *data, int val)
-{
-        unsigned int r;
-        r = readl(ioaddr + REG);
-        if (val)
-                r |= DDC_SDA_OUT;
-        else
-                r &= ~DDC_SDA_OUT;
-        writel(r, ioaddr + REG);
-        readl(ioaddr + REG);    /* flush posted write */
-}
-
-static int bit_vooddc_getscl(void *data)
-{
-        return (0 != (readl(ioaddr + REG) & DDC_SCL_IN));
-}
-
-static int bit_vooddc_getsda(void *data)
-{
-        return (0 != (readl(ioaddr + REG) & DDC_SDA_IN));
-}
-
-static int config_v3(struct pci_dev *dev)
-{
-        unsigned long cadr;
-
-        /* map Voodoo3 memory */
-        cadr = dev->resource[0].start;
-        cadr &= PCI_BASE_ADDRESS_MEM_MASK;
-        ioaddr = ioremap_nocache(cadr, 0x1000);
-        if (ioaddr) {
-                writel(0x8160, ioaddr + REG2);
-                writel(0xcffc0020, ioaddr + REG);
-                dev_info(&dev->dev, "Using Banshee/Voodoo3 I2C device at %p\n", ioaddr);
-                return 0;
-        }
-        return -ENODEV;
-}
-
-static struct i2c_algo_bit_data voo_i2c_bit_data = {
-        .setsda         = bit_vooi2c_setsda,
-        .setscl         = bit_vooi2c_setscl,
-        .getsda         = bit_vooi2c_getsda,
-        .getscl         = bit_vooi2c_getscl,
-        .udelay         = CYCLE_DELAY,
-        .timeout        = TIMEOUT
-};
-
-static struct i2c_adapter voodoo3_i2c_adapter = {
-        .owner          = THIS_MODULE,
-        .name           = "I2C Voodoo3/Banshee adapter",
-        .algo_data      = &voo_i2c_bit_data,
-};
-
-static struct i2c_algo_bit_data voo_ddc_bit_data = {
-        .setsda         = bit_vooddc_setsda,
-        .setscl         = bit_vooddc_setscl,
-        .getsda         = bit_vooddc_getsda,
-        .getscl         = bit_vooddc_getscl,
-        .udelay         = CYCLE_DELAY,
-        .timeout        = TIMEOUT
-};
-
-static struct i2c_adapter voodoo3_ddc_adapter = {
-        .owner          = THIS_MODULE,
-        .class          = I2C_CLASS_DDC, 
-        .name           = "DDC Voodoo3/Banshee adapter",
-        .algo_data      = &voo_ddc_bit_data,
-};
-
-static struct pci_device_id voodoo3_ids[] __devinitdata = {
-        { PCI_DEVICE(PCI_VENDOR_ID_3DFX, PCI_DEVICE_ID_3DFX_VOODOO3) },
-        { PCI_DEVICE(PCI_VENDOR_ID_3DFX, PCI_DEVICE_ID_3DFX_BANSHEE) },
-        { 0, }
-};
-
-MODULE_DEVICE_TABLE (pci, voodoo3_ids);
-
-static int __devinit voodoo3_probe(struct pci_dev *dev, const struct pci_device_id *id)
-{
-        int retval;
-
-        retval = config_v3(dev);
-        if (retval)
-                return retval;
-
-        /* set up the sysfs linkage to our parent device */
-        voodoo3_i2c_adapter.dev.parent = &dev->dev;
-        voodoo3_ddc_adapter.dev.parent = &dev->dev;
-
-        retval = i2c_bit_add_bus(&voodoo3_i2c_adapter);
-        if (retval)
-                return retval;
-        retval = i2c_bit_add_bus(&voodoo3_ddc_adapter);
-        if (retval)
-                i2c_del_adapter(&voodoo3_i2c_adapter);
-        return retval;
-}
-
-static void __devexit voodoo3_remove(struct pci_dev *dev)
-{
-        i2c_del_adapter(&voodoo3_i2c_adapter);
-        i2c_del_adapter(&voodoo3_ddc_adapter);
-        iounmap(ioaddr);
-}
-
-static struct pci_driver voodoo3_driver = {
-        .name           = "voodoo3_smbus",
-        .id_table       = voodoo3_ids,
-        .probe          = voodoo3_probe,
-        .remove         = __devexit_p(voodoo3_remove),
-};
-
-static int __init i2c_voodoo3_init(void)
-{
-        return pci_register_driver(&voodoo3_driver);
-}
-
-static void __exit i2c_voodoo3_exit(void)
-{
-        pci_unregister_driver(&voodoo3_driver);
-}
-
-
-MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
-                "Philip Edelbrock <phil@netroedge.com>, "
-                "Ralph Metzler <rjkm@thp.uni-koeln.de>, "
-                "and Mark D. Studebaker <mdsxyz123@yahoo.com>");
-MODULE_DESCRIPTION("Voodoo3 I2C/SMBus driver");
-MODULE_LICENSE("GPL");
-
-module_init(i2c_voodoo3_init);
-module_exit(i2c_voodoo3_exit);
diff --git a/drivers/i2c/busses/i2c-xiic.c b/drivers/i2c/busses/i2c-xiic.c
new file mode 100644
index 000000000000..a9c419e075a5
--- /dev/null
+++ b/drivers/i2c/busses/i2c-xiic.c
@@ -0,0 +1,826 @@
+/*
+ * i2c-xiic.c
+ * Copyright (c) 2002-2007 Xilinx Inc.
+ * Copyright (c) 2009-2010 Intel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ *
+ * This code was implemented by Mocean Laboratories AB when porting linux
+ * to the automotive development board Russellville. The copyright holder
+ * as seen in the header is Intel corporation.
+ * Mocean Laboratories forked off the GNU/Linux platform work into a
+ * separate company called Pelagicore AB, which commited the code to the
+ * kernel.
+ */
+
+/* Supports:
+ * Xilinx IIC
+ */
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/errno.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+#include <linux/i2c.h>
+#include <linux/interrupt.h>
+#include <linux/wait.h>
+#include <linux/i2c-xiic.h>
+#include <linux/io.h>
+#include <linux/slab.h>
+
+#define DRIVER_NAME "xiic-i2c"
+
+enum xilinx_i2c_state {
+        STATE_DONE,
+        STATE_ERROR,
+        STATE_START
+};
+
+/**
+ * struct xiic_i2c - Internal representation of the XIIC I2C bus
+ * @base:       Memory base of the HW registers
+ * @wait:       Wait queue for callers
+ * @adap:       Kernel adapter representation
+ * @tx_msg:     Messages from above to be sent
+ * @lock:       Mutual exclusion
+ * @tx_pos:     Current pos in TX message
+ * @nmsgs:      Number of messages in tx_msg
+ * @state:      See STATE_
+ * @rx_msg:     Current RX message
+ * @rx_pos:     Position within current RX message
+ */
+struct xiic_i2c {
+        void __iomem            *base;
+        wait_queue_head_t       wait;
+        struct i2c_adapter      adap;
+        struct i2c_msg          *tx_msg;
+        spinlock_t              lock;
+        unsigned int            tx_pos;
+        unsigned int            nmsgs;
+        enum xilinx_i2c_state   state;
+        struct i2c_msg          *rx_msg;
+        int                     rx_pos;
+};
+
+
+#define XIIC_MSB_OFFSET 0
+#define XIIC_REG_OFFSET (0x100+XIIC_MSB_OFFSET)
+
+/*
+ * Register offsets in bytes from RegisterBase. Three is added to the
+ * base offset to access LSB (IBM style) of the word
+ */
+#define XIIC_CR_REG_OFFSET   (0x00+XIIC_REG_OFFSET)     /* Control Register   */
+#define XIIC_SR_REG_OFFSET   (0x04+XIIC_REG_OFFSET)     /* Status Register    */
+#define XIIC_DTR_REG_OFFSET  (0x08+XIIC_REG_OFFSET)     /* Data Tx Register   */
+#define XIIC_DRR_REG_OFFSET  (0x0C+XIIC_REG_OFFSET)     /* Data Rx Register   */
+#define XIIC_ADR_REG_OFFSET  (0x10+XIIC_REG_OFFSET)     /* Address Register   */
+#define XIIC_TFO_REG_OFFSET  (0x14+XIIC_REG_OFFSET)     /* Tx FIFO Occupancy  */
+#define XIIC_RFO_REG_OFFSET  (0x18+XIIC_REG_OFFSET)     /* Rx FIFO Occupancy  */
+#define XIIC_TBA_REG_OFFSET  (0x1C+XIIC_REG_OFFSET)     /* 10 Bit Address reg */
+#define XIIC_RFD_REG_OFFSET  (0x20+XIIC_REG_OFFSET)     /* Rx FIFO Depth reg  */
+#define XIIC_GPO_REG_OFFSET  (0x24+XIIC_REG_OFFSET)     /* Output Register    */
+
+/* Control Register masks */
+#define XIIC_CR_ENABLE_DEVICE_MASK        0x01  /* Device enable = 1      */
+#define XIIC_CR_TX_FIFO_RESET_MASK        0x02  /* Transmit FIFO reset=1  */
+#define XIIC_CR_MSMS_MASK                 0x04  /* Master starts Txing=1  */
+#define XIIC_CR_DIR_IS_TX_MASK            0x08  /* Dir of tx. Txing=1     */
+#define XIIC_CR_NO_ACK_MASK               0x10  /* Tx Ack. NO ack = 1     */
+#define XIIC_CR_REPEATED_START_MASK       0x20  /* Repeated start = 1     */
+#define XIIC_CR_GENERAL_CALL_MASK         0x40  /* Gen Call enabled = 1   */
+
+/* Status Register masks */
+#define XIIC_SR_GEN_CALL_MASK             0x01  /* 1=a mstr issued a GC   */
+#define XIIC_SR_ADDR_AS_SLAVE_MASK        0x02  /* 1=when addr as slave   */
+#define XIIC_SR_BUS_BUSY_MASK             0x04  /* 1 = bus is busy        */
+#define XIIC_SR_MSTR_RDING_SLAVE_MASK     0x08  /* 1=Dir: mstr <-- slave  */
+#define XIIC_SR_TX_FIFO_FULL_MASK         0x10  /* 1 = Tx FIFO full       */
+#define XIIC_SR_RX_FIFO_FULL_MASK         0x20  /* 1 = Rx FIFO full       */
+#define XIIC_SR_RX_FIFO_EMPTY_MASK        0x40  /* 1 = Rx FIFO empty      */
+#define XIIC_SR_TX_FIFO_EMPTY_MASK        0x80  /* 1 = Tx FIFO empty      */
+
+/* Interrupt Status Register masks    Interrupt occurs when...       */
+#define XIIC_INTR_ARB_LOST_MASK           0x01  /* 1 = arbitration lost   */
+#define XIIC_INTR_TX_ERROR_MASK           0x02  /* 1=Tx error/msg complete */
+#define XIIC_INTR_TX_EMPTY_MASK           0x04  /* 1 = Tx FIFO/reg empty  */
+#define XIIC_INTR_RX_FULL_MASK            0x08  /* 1=Rx FIFO/reg=OCY level */
+#define XIIC_INTR_BNB_MASK                0x10  /* 1 = Bus not busy       */
+#define XIIC_INTR_AAS_MASK                0x20  /* 1 = when addr as slave */
+#define XIIC_INTR_NAAS_MASK               0x40  /* 1 = not addr as slave  */
+#define XIIC_INTR_TX_HALF_MASK            0x80  /* 1 = TX FIFO half empty */
+
+/* The following constants specify the depth of the FIFOs */
+#define IIC_RX_FIFO_DEPTH         16    /* Rx fifo capacity               */
+#define IIC_TX_FIFO_DEPTH         16    /* Tx fifo capacity               */
+
+/* The following constants specify groups of interrupts that are typically
+ * enabled or disables at the same time
+ */
+#define XIIC_TX_INTERRUPTS                           \
+(XIIC_INTR_TX_ERROR_MASK | XIIC_INTR_TX_EMPTY_MASK | XIIC_INTR_TX_HALF_MASK)
+
+#define XIIC_TX_RX_INTERRUPTS (XIIC_INTR_RX_FULL_MASK | XIIC_TX_INTERRUPTS)
+
+/* The following constants are used with the following macros to specify the
+ * operation, a read or write operation.
+ */
+#define XIIC_READ_OPERATION  1
+#define XIIC_WRITE_OPERATION 0
+
+/*
+ * Tx Fifo upper bit masks.
+ */
+#define XIIC_TX_DYN_START_MASK            0x0100 /* 1 = Set dynamic start */
+#define XIIC_TX_DYN_STOP_MASK             0x0200 /* 1 = Set dynamic stop */
+
+/*
+ * The following constants define the register offsets for the Interrupt
+ * registers. There are some holes in the memory map for reserved addresses
+ * to allow other registers to be added and still match the memory map of the
+ * interrupt controller registers
+ */
+#define XIIC_DGIER_OFFSET    0x1C /* Device Global Interrupt Enable Register */
+#define XIIC_IISR_OFFSET     0x20 /* Interrupt Status Register */
+#define XIIC_IIER_OFFSET     0x28 /* Interrupt Enable Register */
+#define XIIC_RESETR_OFFSET   0x40 /* Reset Register */
+
+#define XIIC_RESET_MASK             0xAUL
+
+/*
+ * The following constant is used for the device global interrupt enable
+ * register, to enable all interrupts for the device, this is the only bit
+ * in the register
+ */
+#define XIIC_GINTR_ENABLE_MASK      0x80000000UL
+
+#define xiic_tx_space(i2c) ((i2c)->tx_msg->len - (i2c)->tx_pos)
+#define xiic_rx_space(i2c) ((i2c)->rx_msg->len - (i2c)->rx_pos)
+
+static void xiic_start_xfer(struct xiic_i2c *i2c);
+static void __xiic_start_xfer(struct xiic_i2c *i2c);
+
+static inline void xiic_setreg8(struct xiic_i2c *i2c, int reg, u8 value)
+{
+        iowrite8(value, i2c->base + reg);
+}
+
+static inline u8 xiic_getreg8(struct xiic_i2c *i2c, int reg)
+{
+        return ioread8(i2c->base + reg);
+}
+
+static inline void xiic_setreg16(struct xiic_i2c *i2c, int reg, u16 value)
+{
+        iowrite16(value, i2c->base + reg);
+}
+
+static inline void xiic_setreg32(struct xiic_i2c *i2c, int reg, int value)
+{
+        iowrite32(value, i2c->base + reg);
+}
+
+static inline int xiic_getreg32(struct xiic_i2c *i2c, int reg)
+{
+        return ioread32(i2c->base + reg);
+}
+
+static inline void xiic_irq_dis(struct xiic_i2c *i2c, u32 mask)
+{
+        u32 ier = xiic_getreg32(i2c, XIIC_IIER_OFFSET);
+        xiic_setreg32(i2c, XIIC_IIER_OFFSET, ier & ~mask);
+}
+
+static inline void xiic_irq_en(struct xiic_i2c *i2c, u32 mask)
+{
+        u32 ier = xiic_getreg32(i2c, XIIC_IIER_OFFSET);
+        xiic_setreg32(i2c, XIIC_IIER_OFFSET, ier | mask);
+}
+
+static inline void xiic_irq_clr(struct xiic_i2c *i2c, u32 mask)
+{
+        u32 isr = xiic_getreg32(i2c, XIIC_IISR_OFFSET);
+        xiic_setreg32(i2c, XIIC_IISR_OFFSET, isr & mask);
+}
+
+static inline void xiic_irq_clr_en(struct xiic_i2c *i2c, u32 mask)
+{
+        xiic_irq_clr(i2c, mask);
+        xiic_irq_en(i2c, mask);
+}
+
+static void xiic_clear_rx_fifo(struct xiic_i2c *i2c)
+{
+        u8 sr;
+        for (sr = xiic_getreg8(i2c, XIIC_SR_REG_OFFSET);
+                !(sr & XIIC_SR_RX_FIFO_EMPTY_MASK);
+                sr = xiic_getreg8(i2c, XIIC_SR_REG_OFFSET))
+                xiic_getreg8(i2c, XIIC_DRR_REG_OFFSET);
+}
+
+static void xiic_reinit(struct xiic_i2c *i2c)
+{
+        xiic_setreg32(i2c, XIIC_RESETR_OFFSET, XIIC_RESET_MASK);
+
+        /* Set receive Fifo depth to maximum (zero based). */
+        xiic_setreg8(i2c, XIIC_RFD_REG_OFFSET, IIC_RX_FIFO_DEPTH - 1);
+
+        /* Reset Tx Fifo. */
+        xiic_setreg8(i2c, XIIC_CR_REG_OFFSET, XIIC_CR_TX_FIFO_RESET_MASK);
+
+        /* Enable IIC Device, remove Tx Fifo reset & disable general call. */
+        xiic_setreg8(i2c, XIIC_CR_REG_OFFSET, XIIC_CR_ENABLE_DEVICE_MASK);
+
+        /* make sure RX fifo is empty */
+        xiic_clear_rx_fifo(i2c);
+
+        /* Enable interrupts */
+        xiic_setreg32(i2c, XIIC_DGIER_OFFSET, XIIC_GINTR_ENABLE_MASK);
+
+        xiic_irq_clr_en(i2c, XIIC_INTR_AAS_MASK | XIIC_INTR_ARB_LOST_MASK);
+}
+
+static void xiic_deinit(struct xiic_i2c *i2c)
+{
+        u8 cr;
+
+        xiic_setreg32(i2c, XIIC_RESETR_OFFSET, XIIC_RESET_MASK);
+
+        /* Disable IIC Device. */
+        cr = xiic_getreg8(i2c, XIIC_CR_REG_OFFSET);
+        xiic_setreg8(i2c, XIIC_CR_REG_OFFSET, cr & ~XIIC_CR_ENABLE_DEVICE_MASK);
+}
+
+static void xiic_read_rx(struct xiic_i2c *i2c)
+{
+        u8 bytes_in_fifo;
+        int i;
+
+        bytes_in_fifo = xiic_getreg8(i2c, XIIC_RFO_REG_OFFSET) + 1;
+
+        dev_dbg(i2c->adap.dev.parent, "%s entry, bytes in fifo: %d, msg: %d"
+                ", SR: 0x%x, CR: 0x%x\n",
+                __func__, bytes_in_fifo, xiic_rx_space(i2c),
+                xiic_getreg8(i2c, XIIC_SR_REG_OFFSET),
+                xiic_getreg8(i2c, XIIC_CR_REG_OFFSET));
+
+        if (bytes_in_fifo > xiic_rx_space(i2c))
+                bytes_in_fifo = xiic_rx_space(i2c);
+
+        for (i = 0; i < bytes_in_fifo; i++)
+                i2c->rx_msg->buf[i2c->rx_pos++] =
+                        xiic_getreg8(i2c, XIIC_DRR_REG_OFFSET);
+
+        xiic_setreg8(i2c, XIIC_RFD_REG_OFFSET,
+                (xiic_rx_space(i2c) > IIC_RX_FIFO_DEPTH) ?
+                IIC_RX_FIFO_DEPTH - 1 :  xiic_rx_space(i2c) - 1);
+}
+
+static int xiic_tx_fifo_space(struct xiic_i2c *i2c)
+{
+        /* return the actual space left in the FIFO */
+        return IIC_TX_FIFO_DEPTH - xiic_getreg8(i2c, XIIC_TFO_REG_OFFSET) - 1;
+}
+
+static void xiic_fill_tx_fifo(struct xiic_i2c *i2c)
+{
+        u8 fifo_space = xiic_tx_fifo_space(i2c);
+        int len = xiic_tx_space(i2c);
+
+        len = (len > fifo_space) ? fifo_space : len;
+
+        dev_dbg(i2c->adap.dev.parent, "%s entry, len: %d, fifo space: %d\n",
+                __func__, len, fifo_space);
+
+        while (len--) {
+                u16 data = i2c->tx_msg->buf[i2c->tx_pos++];
+                if ((xiic_tx_space(i2c) == 0) && (i2c->nmsgs == 1)) {
+                        /* last message in transfer -> STOP */
+                        data |= XIIC_TX_DYN_STOP_MASK;
+                        dev_dbg(i2c->adap.dev.parent, "%s TX STOP\n", __func__);
+
+                        xiic_setreg16(i2c, XIIC_DTR_REG_OFFSET, data);
+                } else
+                        xiic_setreg8(i2c, XIIC_DTR_REG_OFFSET, data);
+        }
+}
+
+static void xiic_wakeup(struct xiic_i2c *i2c, int code)
+{
+        i2c->tx_msg = NULL;
+        i2c->rx_msg = NULL;
+        i2c->nmsgs = 0;
+        i2c->state = code;
+        wake_up(&i2c->wait);
+}
+
+static void xiic_process(struct xiic_i2c *i2c)
+{
+        u32 pend, isr, ier;
+        u32 clr = 0;
+
+        /* Get the interrupt Status from the IPIF. There is no clearing of
+         * interrupts in the IPIF. Interrupts must be cleared at the source.
+         * To find which interrupts are pending; AND interrupts pending with
+         * interrupts masked.
+         */
+        isr = xiic_getreg32(i2c, XIIC_IISR_OFFSET);
+        ier = xiic_getreg32(i2c, XIIC_IIER_OFFSET);
+        pend = isr & ier;
+
+        dev_dbg(i2c->adap.dev.parent, "%s entry, IER: 0x%x, ISR: 0x%x, "
+                "pend: 0x%x, SR: 0x%x, msg: %p, nmsgs: %d\n",
+                __func__, ier, isr, pend, xiic_getreg8(i2c, XIIC_SR_REG_OFFSET),
+                i2c->tx_msg, i2c->nmsgs);
+
+        /* Do not processes a devices interrupts if the device has no
+         * interrupts pending
+         */
+        if (!pend)
+                return;
+
+        /* Service requesting interrupt */
+        if ((pend & XIIC_INTR_ARB_LOST_MASK) ||
+                ((pend & XIIC_INTR_TX_ERROR_MASK) &&
+                !(pend & XIIC_INTR_RX_FULL_MASK))) {
+                /* bus arbritration lost, or...
+                 * Transmit error _OR_ RX completed
+                 * if this happens when RX_FULL is not set
+                 * this is probably a TX error
+                 */
+
+                dev_dbg(i2c->adap.dev.parent, "%s error\n", __func__);
+
+                /* dynamic mode seem to suffer from problems if we just flushes
+                 * fifos and the next message is a TX with len 0 (only addr)
+                 * reset the IP instead of just flush fifos
+                 */
+                xiic_reinit(i2c);
+
+                if (i2c->tx_msg)
+                        xiic_wakeup(i2c, STATE_ERROR);
+
+        } else if (pend & XIIC_INTR_RX_FULL_MASK) {
+                /* Receive register/FIFO is full */
+
+                clr = XIIC_INTR_RX_FULL_MASK;
+                if (!i2c->rx_msg) {
+                        dev_dbg(i2c->adap.dev.parent,
+                                "%s unexpexted RX IRQ\n", __func__);
+                        xiic_clear_rx_fifo(i2c);
+                        goto out;
+                }
+
+                xiic_read_rx(i2c);
+                if (xiic_rx_space(i2c) == 0) {
+                        /* this is the last part of the message */
+                        i2c->rx_msg = NULL;
+
+                        /* also clear TX error if there (RX complete) */
+                        clr |= (isr & XIIC_INTR_TX_ERROR_MASK);
+
+                        dev_dbg(i2c->adap.dev.parent,
+                                "%s end of message, nmsgs: %d\n",
+                                __func__, i2c->nmsgs);
+
+                        /* send next message if this wasn't the last,
+                         * otherwise the transfer will be finialise when
+                         * receiving the bus not busy interrupt
+                         */
+                        if (i2c->nmsgs > 1) {
+                                i2c->nmsgs--;
+                                i2c->tx_msg++;
+                                dev_dbg(i2c->adap.dev.parent,
+                                        "%s will start next...\n", __func__);
+
+                                __xiic_start_xfer(i2c);
+                        }
+                }
+        } else if (pend & XIIC_INTR_BNB_MASK) {
+                /* IIC bus has transitioned to not busy */
+                clr = XIIC_INTR_BNB_MASK;
+
+                /* The bus is not busy, disable BusNotBusy interrupt */
+                xiic_irq_dis(i2c, XIIC_INTR_BNB_MASK);
+
+                if (!i2c->tx_msg)
+                        goto out;
+
+                if ((i2c->nmsgs == 1) && !i2c->rx_msg &&
+                        xiic_tx_space(i2c) == 0)
+                        xiic_wakeup(i2c, STATE_DONE);
+                else
+                        xiic_wakeup(i2c, STATE_ERROR);
+
+        } else if (pend & (XIIC_INTR_TX_EMPTY_MASK | XIIC_INTR_TX_HALF_MASK)) {
+                /* Transmit register/FIFO is empty or ½ empty */
+
+                clr = pend &
+                        (XIIC_INTR_TX_EMPTY_MASK | XIIC_INTR_TX_HALF_MASK);
+
+                if (!i2c->tx_msg) {
+                        dev_dbg(i2c->adap.dev.parent,
+                                "%s unexpexted TX IRQ\n", __func__);
+                        goto out;
+                }
+
+                xiic_fill_tx_fifo(i2c);
+
+                /* current message sent and there is space in the fifo */
+                if (!xiic_tx_space(i2c) && xiic_tx_fifo_space(i2c) >= 2) {
+                        dev_dbg(i2c->adap.dev.parent,
+                                "%s end of message sent, nmsgs: %d\n",
+                                __func__, i2c->nmsgs);
+                        if (i2c->nmsgs > 1) {
+                                i2c->nmsgs--;
+                                i2c->tx_msg++;
+                                __xiic_start_xfer(i2c);
+                        } else {
+                                xiic_irq_dis(i2c, XIIC_INTR_TX_HALF_MASK);
+
+                                dev_dbg(i2c->adap.dev.parent,
+                                        "%s Got TX IRQ but no more to do...\n",
+                                        __func__);
+                        }
+                } else if (!xiic_tx_space(i2c) && (i2c->nmsgs == 1))
+                        /* current frame is sent and is last,
+                         * make sure to disable tx half
+                         */
+                        xiic_irq_dis(i2c, XIIC_INTR_TX_HALF_MASK);
+        } else {
+                /* got IRQ which is not acked */
+                dev_err(i2c->adap.dev.parent, "%s Got unexpected IRQ\n",
+                        __func__);
+                clr = pend;
+        }
+out:
+        dev_dbg(i2c->adap.dev.parent, "%s clr: 0x%x\n", __func__, clr);
+
+        xiic_setreg32(i2c, XIIC_IISR_OFFSET, clr);
+}
+
+static int xiic_bus_busy(struct xiic_i2c *i2c)
+{
+        u8 sr = xiic_getreg8(i2c, XIIC_SR_REG_OFFSET);
+
+        return (sr & XIIC_SR_BUS_BUSY_MASK) ? -EBUSY : 0;
+}
+
+static int xiic_busy(struct xiic_i2c *i2c)
+{
+        int tries = 3;
+        int err;
+
+        if (i2c->tx_msg)
+                return -EBUSY;
+
+        /* for instance if previous transfer was terminated due to TX error
+         * it might be that the bus is on it's way to become available
+         * give it at most 3 ms to wake
+         */
+        err = xiic_bus_busy(i2c);
+        while (err && tries--) {
+                mdelay(1);
+                err = xiic_bus_busy(i2c);
+        }
+
+        return err;
+}
+
+static void xiic_start_recv(struct xiic_i2c *i2c)
+{
+        u8 rx_watermark;
+        struct i2c_msg *msg = i2c->rx_msg = i2c->tx_msg;
+
+        /* Clear and enable Rx full interrupt. */
+        xiic_irq_clr_en(i2c, XIIC_INTR_RX_FULL_MASK | XIIC_INTR_TX_ERROR_MASK);
+
+        /* we want to get all but last byte, because the TX_ERROR IRQ is used
+         * to inidicate error ACK on the address, and negative ack on the last
+         * received byte, so to not mix them receive all but last.
+         * In the case where there is only one byte to receive
+         * we can check if ERROR and RX full is set at the same time
+         */
+        rx_watermark = msg->len;
+        if (rx_watermark > IIC_RX_FIFO_DEPTH)
+                rx_watermark = IIC_RX_FIFO_DEPTH;
+        xiic_setreg8(i2c, XIIC_RFD_REG_OFFSET, rx_watermark - 1);
+
+        if (!(msg->flags & I2C_M_NOSTART))
+                /* write the address */
+                xiic_setreg16(i2c, XIIC_DTR_REG_OFFSET,
+                        (msg->addr << 1) | XIIC_READ_OPERATION |
+                        XIIC_TX_DYN_START_MASK);
+
+        xiic_irq_clr_en(i2c, XIIC_INTR_BNB_MASK);
+
+        xiic_setreg16(i2c, XIIC_DTR_REG_OFFSET,
+                msg->len | ((i2c->nmsgs == 1) ? XIIC_TX_DYN_STOP_MASK : 0));
+        if (i2c->nmsgs == 1)
+                /* very last, enable bus not busy as well */
+                xiic_irq_clr_en(i2c, XIIC_INTR_BNB_MASK);
+
+        /* the message is tx:ed */
+        i2c->tx_pos = msg->len;
+}
+
+static void xiic_start_send(struct xiic_i2c *i2c)
+{
+        struct i2c_msg *msg = i2c->tx_msg;
+
+        xiic_irq_clr(i2c, XIIC_INTR_TX_ERROR_MASK);
+
+        dev_dbg(i2c->adap.dev.parent, "%s entry, msg: %p, len: %d, "
+                "ISR: 0x%x, CR: 0x%x\n",
+                __func__, msg, msg->len, xiic_getreg32(i2c, XIIC_IISR_OFFSET),
+                xiic_getreg8(i2c, XIIC_CR_REG_OFFSET));
+
+        if (!(msg->flags & I2C_M_NOSTART)) {
+                /* write the address */
+                u16 data = ((msg->addr << 1) & 0xfe) | XIIC_WRITE_OPERATION |
+                        XIIC_TX_DYN_START_MASK;
+                if ((i2c->nmsgs == 1) && msg->len == 0)
+                        /* no data and last message -> add STOP */
+                        data |= XIIC_TX_DYN_STOP_MASK;
+
+                xiic_setreg16(i2c, XIIC_DTR_REG_OFFSET, data);
+        }
+
+        xiic_fill_tx_fifo(i2c);
+
+        /* Clear any pending Tx empty, Tx Error and then enable them. */
+        xiic_irq_clr_en(i2c, XIIC_INTR_TX_EMPTY_MASK | XIIC_INTR_TX_ERROR_MASK |
+                XIIC_INTR_BNB_MASK);
+}
+
+static irqreturn_t xiic_isr(int irq, void *dev_id)
+{
+        struct xiic_i2c *i2c = dev_id;
+
+        spin_lock(&i2c->lock);
+        /* disable interrupts globally */
+        xiic_setreg32(i2c, XIIC_DGIER_OFFSET, 0);
+
+        dev_dbg(i2c->adap.dev.parent, "%s entry\n", __func__);
+
+        xiic_process(i2c);
+
+        xiic_setreg32(i2c, XIIC_DGIER_OFFSET, XIIC_GINTR_ENABLE_MASK);
+        spin_unlock(&i2c->lock);
+
+        return IRQ_HANDLED;
+}
+
+static void __xiic_start_xfer(struct xiic_i2c *i2c)
+{
+        int first = 1;
+        int fifo_space = xiic_tx_fifo_space(i2c);
+        dev_dbg(i2c->adap.dev.parent, "%s entry, msg: %p, fifos space: %d\n",
+                __func__, i2c->tx_msg, fifo_space);
+
+        if (!i2c->tx_msg)
+                return;
+
+        i2c->rx_pos = 0;
+        i2c->tx_pos = 0;
+        i2c->state = STATE_START;
+        while ((fifo_space >= 2) && (first || (i2c->nmsgs > 1))) {
+                if (!first) {
+                        i2c->nmsgs--;
+                        i2c->tx_msg++;
+                        i2c->tx_pos = 0;
+                } else
+                        first = 0;
+
+                if (i2c->tx_msg->flags & I2C_M_RD) {
+                        /* we dont date putting several reads in the FIFO */
+                        xiic_start_recv(i2c);
+                        return;
+                } else {
+                        xiic_start_send(i2c);
+                        if (xiic_tx_space(i2c) != 0) {
+                                /* the message could not be completely sent */
+                                break;
+                        }
+                }
+
+                fifo_space = xiic_tx_fifo_space(i2c);
+        }
+
+        /* there are more messages or the current one could not be completely
+         * put into the FIFO, also enable the half empty interrupt
+         */
+        if (i2c->nmsgs > 1 || xiic_tx_space(i2c))
+                xiic_irq_clr_en(i2c, XIIC_INTR_TX_HALF_MASK);
+
+}
+
+static void xiic_start_xfer(struct xiic_i2c *i2c)
+{
+        unsigned long flags;
+
+        spin_lock_irqsave(&i2c->lock, flags);
+        xiic_reinit(i2c);
+        /* disable interrupts globally */
+        xiic_setreg32(i2c, XIIC_DGIER_OFFSET, 0);
+        spin_unlock_irqrestore(&i2c->lock, flags);
+
+        __xiic_start_xfer(i2c);
+        xiic_setreg32(i2c, XIIC_DGIER_OFFSET, XIIC_GINTR_ENABLE_MASK);
+}
+
+static int xiic_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
+{
+        struct xiic_i2c *i2c = i2c_get_adapdata(adap);
+        int err;
+
+        dev_dbg(adap->dev.parent, "%s entry SR: 0x%x\n", __func__,
+                xiic_getreg8(i2c, XIIC_SR_REG_OFFSET));
+
+        err = xiic_busy(i2c);
+        if (err)
+                return err;
+
+        i2c->tx_msg = msgs;
+        i2c->nmsgs = num;
+
+        xiic_start_xfer(i2c);
+
+        if (wait_event_timeout(i2c->wait, (i2c->state == STATE_ERROR) ||
+                (i2c->state == STATE_DONE), HZ))
+                return (i2c->state == STATE_DONE) ? num : -EIO;
+        else {
+                i2c->tx_msg = NULL;
+                i2c->rx_msg = NULL;
+                i2c->nmsgs = 0;
+                return -ETIMEDOUT;
+        }
+}
+
+static u32 xiic_func(struct i2c_adapter *adap)
+{
+        return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
+}
+
+static const struct i2c_algorithm xiic_algorithm = {
+        .master_xfer    = xiic_xfer,
+        .functionality  = xiic_func,
+};
+
+static struct i2c_adapter xiic_adapter = {
+        .owner          = THIS_MODULE,
+        .name           = DRIVER_NAME,
+        .class          = I2C_CLASS_HWMON | I2C_CLASS_SPD,
+        .algo           = &xiic_algorithm,
+};
+
+
+static int __devinit xiic_i2c_probe(struct platform_device *pdev)
+{
+        struct xiic_i2c *i2c;
+        struct xiic_i2c_platform_data *pdata;
+        struct resource *res;
+        int ret, irq;
+        u8 i;
+
+        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        if (!res)
+                goto resource_missing;
+
+        irq = platform_get_irq(pdev, 0);
+        if (irq < 0)
+                goto resource_missing;
+
+        pdata = (struct xiic_i2c_platform_data *) pdev->dev.platform_data;
+        if (!pdata)
+                return -EINVAL;
+
+        i2c = kzalloc(sizeof(*i2c), GFP_KERNEL);
+        if (!i2c)
+                return -ENOMEM;
+
+        if (!request_mem_region(res->start, resource_size(res), pdev->name)) {
+                dev_err(&pdev->dev, "Memory region busy\n");
+                ret = -EBUSY;
+                goto request_mem_failed;
+        }
+
+        i2c->base = ioremap(res->start, resource_size(res));
+        if (!i2c->base) {
+                dev_err(&pdev->dev, "Unable to map registers\n");
+                ret = -EIO;
+                goto map_failed;
+        }
+
+        /* hook up driver to tree */
+        platform_set_drvdata(pdev, i2c);
+        i2c->adap = xiic_adapter;
+        i2c_set_adapdata(&i2c->adap, i2c);
+        i2c->adap.dev.parent = &pdev->dev;
+
+        xiic_reinit(i2c);
+
+        spin_lock_init(&i2c->lock);
+        init_waitqueue_head(&i2c->wait);
+        ret = request_irq(irq, xiic_isr, 0, pdev->name, i2c);
+        if (ret) {
+                dev_err(&pdev->dev, "Cannot claim IRQ\n");
+                goto request_irq_failed;
+        }
+
+        /* add i2c adapter to i2c tree */
+        ret = i2c_add_adapter(&i2c->adap);
+        if (ret) {
+                dev_err(&pdev->dev, "Failed to add adapter\n");
+                goto add_adapter_failed;
+        }
+
+        /* add in known devices to the bus */
+        for (i = 0; i < pdata->num_devices; i++)
+                i2c_new_device(&i2c->adap, pdata->devices + i);
+
+        return 0;
+
+add_adapter_failed:
+        free_irq(irq, i2c);
+request_irq_failed:
+        xiic_deinit(i2c);
+        iounmap(i2c->base);
+map_failed:
+        release_mem_region(res->start, resource_size(res));
+request_mem_failed:
+        kfree(i2c);
+
+        return ret;
+resource_missing:
+        dev_err(&pdev->dev, "IRQ or Memory resource is missing\n");
+        return -ENOENT;
+}
+
+static int __devexit xiic_i2c_remove(struct platform_device* pdev)
+{
+        struct xiic_i2c *i2c = platform_get_drvdata(pdev);
+        struct resource *res;
+
+        /* remove adapter & data */
+        i2c_del_adapter(&i2c->adap);
+
+        xiic_deinit(i2c);
+
+        platform_set_drvdata(pdev, NULL);
+
+        free_irq(platform_get_irq(pdev, 0), i2c);
+
+        iounmap(i2c->base);
+
+        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        if (res)
+                release_mem_region(res->start, resource_size(res));
+
+        kfree(i2c);
+
+        return 0;
+}
+
+
+/* work with hotplug and coldplug */
+MODULE_ALIAS("platform:"DRIVER_NAME);
+
+static struct platform_driver xiic_i2c_driver = {
+        .probe   = xiic_i2c_probe,
+        .remove  = __devexit_p(xiic_i2c_remove),
+        .driver  = {
+                .owner = THIS_MODULE,
+                .name = DRIVER_NAME,
+        },
+};
+
+static int __init xiic_i2c_init(void)
+{
+        return platform_driver_register(&xiic_i2c_driver);
+}
+
+static void __exit xiic_i2c_exit(void)
+{
+        platform_driver_unregister(&xiic_i2c_driver);
+}
+
+module_init(xiic_i2c_init);
+module_exit(xiic_i2c_exit);
+
+MODULE_AUTHOR("info@mocean-labs.com");
+MODULE_DESCRIPTION("Xilinx I2C bus driver");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/i2c/busses/scx200_acb.c b/drivers/i2c/busses/scx200_acb.c
index 648ecc6f60e6..53fab518b3da 100644
--- a/drivers/i2c/busses/scx200_acb.c
+++ b/drivers/i2c/busses/scx200_acb.c
@@ -31,7 +31,8 @@
 #include <linux/pci.h>
 #include <linux/delay.h>
 #include <linux/mutex.h>
-#include <asm/io.h>
+#include <linux/slab.h>
+#include <linux/io.h>
 
 #include <linux/scx200.h>
 
@@ -217,8 +218,10 @@ static void scx200_acb_machine(struct scx200_acb_iface *iface, u8 status)
         return;
 
  error:
-        dev_err(&iface->adapter.dev, "%s in state %s\n", errmsg,
-                scx200_acb_state_name[iface->state]);
+        dev_err(&iface->adapter.dev,
+                "%s in state %s (addr=0x%02x, len=%d, status=0x%02x)\n", errmsg,
+                scx200_acb_state_name[iface->state], iface->address_byte,
+                iface->len, status);
 
         iface->state = state_idle;
         iface->result = -EIO;
@@ -549,7 +552,7 @@ static int __init scx200_create_isa(const char *text, unsigned long base,
  * the name and the BAR where the I/O address resource is located.  ISA
  * devices are flagged with a bar value of -1 */
 
-static struct pci_device_id scx200_pci[] = {
+static const struct pci_device_id scx200_pci[] __initconst = {
         { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SCx200_BRIDGE),
           .driver_data = 0 },
         { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SC1100_BRIDGE),
@@ -557,7 +560,8 @@ static struct pci_device_id scx200_pci[] = {
         { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_CS5535_ISA),
           .driver_data = 1 },
         { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_ISA),
-          .driver_data = 2 }
+          .driver_data = 2 },
+        { 0, }
 };
 
 static struct {
diff --git a/drivers/i2c/busses/scx200_i2c.c b/drivers/i2c/busses/scx200_i2c.c
index 42df0eca43d5..7ee0d502ceab 100644
--- a/drivers/i2c/busses/scx200_i2c.c
+++ b/drivers/i2c/busses/scx200_i2c.c
@@ -27,7 +27,7 @@
 #include <linux/init.h>
 #include <linux/i2c.h>
 #include <linux/i2c-algo-bit.h>
-#include <asm/io.h>
+#include <linux/io.h>
 
 #include <linux/scx200_gpio.h>
 
diff --git a/drivers/i2c/chips/Kconfig b/drivers/i2c/chips/Kconfig
deleted file mode 100644
index 02d746c9c474..000000000000
--- a/drivers/i2c/chips/Kconfig
+++ /dev/null
@@ -1,77 +0,0 @@
-#
-# Miscellaneous I2C chip drivers configuration
-#
-# *** DEPRECATED! Do not add new entries! See Makefile ***
-#
-
-menu "Miscellaneous I2C Chip support"
-
-config DS1682
-        tristate "Dallas DS1682 Total Elapsed Time Recorder with Alarm"
-        depends on EXPERIMENTAL
-        help
-          If you say yes here you get support for Dallas Semiconductor
-          DS1682 Total Elapsed Time Recorder.
-
-          This driver can also be built as a module.  If so, the module
-          will be called ds1682.
-
-config SENSORS_PCF8574
-        tristate "Philips PCF8574 and PCF8574A (DEPRECATED)"
-        depends on EXPERIMENTAL && GPIO_PCF857X = "n"
-        default n
-        help
-          If you say yes here you get support for Philips PCF8574 and 
-          PCF8574A chips. These chips are 8-bit I/O expanders for the I2C bus.
-
-          This driver can also be built as a module.  If so, the module
-          will be called pcf8574.
-
-          This driver is deprecated and will be dropped soon. Use
-          drivers/gpio/pcf857x.c instead.
-
-          These devices are hard to detect and rarely found on mainstream
-          hardware.  If unsure, say N.
-
-config PCF8575
-        tristate "Philips PCF8575 (DEPRECATED)"
-        default n
-        depends on GPIO_PCF857X = "n"
-        help
-          If you say yes here you get support for Philips PCF8575 chip.
-          This chip is a 16-bit I/O expander for the I2C bus.  Several other
-          chip manufacturers sell equivalent chips, e.g. Texas Instruments.
-
-          This driver can also be built as a module.  If so, the module
-          will be called pcf8575.
-
-          This driver is deprecated and will be dropped soon. Use
-          drivers/gpio/pcf857x.c instead.
-
-          This device is hard to detect and is rarely found on mainstream
-          hardware.  If unsure, say N.
-
-config SENSORS_PCA9539
-        tristate "Philips PCA9539 16-bit I/O port (DEPRECATED)"
-        depends on EXPERIMENTAL && GPIO_PCA953X = "n"
-        help
-          If you say yes here you get support for the Philips PCA9539
-          16-bit I/O port.
-
-          This driver can also be built as a module.  If so, the module
-          will be called pca9539.
-
-          This driver is deprecated and will be dropped soon. Use
-          drivers/gpio/pca953x.c instead.
-
-config SENSORS_TSL2550
-        tristate "Taos TSL2550 ambient light sensor"
-        depends on EXPERIMENTAL
-        help
-          If you say yes here you get support for the Taos TSL2550
-          ambient light sensor.
-
-          This driver can also be built as a module.  If so, the module
-          will be called tsl2550.
-
-endmenu
diff --git a/drivers/i2c/chips/Makefile b/drivers/i2c/chips/Makefile
deleted file mode 100644
index f4680d16ee34..000000000000
--- a/drivers/i2c/chips/Makefile
+++ /dev/null
@@ -1,22 +0,0 @@
-#
-# Makefile for miscellaneous I2C chip drivers.
-#
-# Do not add new drivers to this directory! It is DEPRECATED.
-#
-# Device drivers are better grouped according to the functionality they
-# implement rather than to the bus they are connected to. In particular:
-# * Hardware monitoring chip drivers go to drivers/hwmon
-# * RTC chip drivers go to drivers/rtc
-# * I/O expander drivers go to drivers/gpio
-#
-
-obj-$(CONFIG_DS1682)            += ds1682.o
-obj-$(CONFIG_SENSORS_PCA9539)   += pca9539.o
-obj-$(CONFIG_SENSORS_PCF8574)   += pcf8574.o
-obj-$(CONFIG_PCF8575)           += pcf8575.o
-obj-$(CONFIG_SENSORS_TSL2550)   += tsl2550.o
-
-ifeq ($(CONFIG_I2C_DEBUG_CHIP),y)
-EXTRA_CFLAGS += -DDEBUG
-endif
-
diff --git a/drivers/i2c/chips/ds1682.c b/drivers/i2c/chips/ds1682.c
deleted file mode 100644
index f3ee4a1abb77..000000000000
--- a/drivers/i2c/chips/ds1682.c
+++ /dev/null
@@ -1,267 +0,0 @@
-/*
- * Dallas Semiconductor DS1682 Elapsed Time Recorder device driver
- *
- * Written by: Grant Likely <grant.likely@secretlab.ca>
- *
- * Copyright (C) 2007 Secret Lab Technologies Ltd.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-/*
- * The DS1682 elapsed timer recorder is a simple device that implements
- * one elapsed time counter, one event counter, an alarm signal and 10
- * bytes of general purpose EEPROM.
- *
- * This driver provides access to the DS1682 counters and user data via
- * the sysfs.  The following attributes are added to the device node:
- *     elapsed_time (u32): Total elapsed event time in ms resolution
- *     alarm_time (u32): When elapsed time exceeds the value in alarm_time,
- *                       then the alarm pin is asserted.
- *     event_count (u16): number of times the event pin has gone low.
- *     eeprom (u8[10]): general purpose EEPROM
- *
- * Counter registers and user data are both read/write unless the device
- * has been write protected.  This driver does not support turning off write
- * protection.  Once write protection is turned on, it is impossible to
- * turn it off again, so I have left the feature out of this driver to avoid
- * accidental enabling, but it is trivial to add write protect support.
- *
- */
-
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/slab.h>
-#include <linux/i2c.h>
-#include <linux/string.h>
-#include <linux/list.h>
-#include <linux/sysfs.h>
-#include <linux/ctype.h>
-#include <linux/hwmon-sysfs.h>
-
-/* Device registers */
-#define DS1682_REG_CONFIG               0x00
-#define DS1682_REG_ALARM                0x01
-#define DS1682_REG_ELAPSED              0x05
-#define DS1682_REG_EVT_CNTR             0x09
-#define DS1682_REG_EEPROM               0x0b
-#define DS1682_REG_RESET                0x1d
-#define DS1682_REG_WRITE_DISABLE        0x1e
-#define DS1682_REG_WRITE_MEM_DISABLE    0x1f
-
-#define DS1682_EEPROM_SIZE              10
-
-/*
- * Generic counter attributes
- */
-static ssize_t ds1682_show(struct device *dev, struct device_attribute *attr,
-                           char *buf)
-{
-        struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
-        struct i2c_client *client = to_i2c_client(dev);
-        __le32 val = 0;
-        int rc;
-
-        dev_dbg(dev, "ds1682_show() called on %s\n", attr->attr.name);
-
-        /* Read the register */
-        rc = i2c_smbus_read_i2c_block_data(client, sattr->index, sattr->nr,
-                                           (u8 *) & val);
-        if (rc < 0)
-                return -EIO;
-
-        /* Special case: the 32 bit regs are time values with 1/4s
-         * resolution, scale them up to milliseconds */
-        if (sattr->nr == 4)
-                return sprintf(buf, "%llu\n",
-                        ((unsigned long long)le32_to_cpu(val)) * 250);
-
-        /* Format the output string and return # of bytes */
-        return sprintf(buf, "%li\n", (long)le32_to_cpu(val));
-}
-
-static ssize_t ds1682_store(struct device *dev, struct device_attribute *attr,
-                            const char *buf, size_t count)
-{
-        struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
-        struct i2c_client *client = to_i2c_client(dev);
-        char *endp;
-        u64 val;
-        __le32 val_le;
-        int rc;
-
-        dev_dbg(dev, "ds1682_store() called on %s\n", attr->attr.name);
-
-        /* Decode input */
-        val = simple_strtoull(buf, &endp, 0);
-        if (buf == endp) {
-                dev_dbg(dev, "input string not a number\n");
-                return -EINVAL;
-        }
-
-        /* Special case: the 32 bit regs are time values with 1/4s
-         * resolution, scale input down to quarter-seconds */
-        if (sattr->nr == 4)
-                do_div(val, 250);
-
-        /* write out the value */
-        val_le = cpu_to_le32(val);
-        rc = i2c_smbus_write_i2c_block_data(client, sattr->index, sattr->nr,
-                                            (u8 *) & val_le);
-        if (rc < 0) {
-                dev_err(dev, "register write failed; reg=0x%x, size=%i\n",
-                        sattr->index, sattr->nr);
-                return -EIO;
-        }
-
-        return count;
-}
-
-/*
- * Simple register attributes
- */
-static SENSOR_DEVICE_ATTR_2(elapsed_time, S_IRUGO | S_IWUSR, ds1682_show,
-                            ds1682_store, 4, DS1682_REG_ELAPSED);
-static SENSOR_DEVICE_ATTR_2(alarm_time, S_IRUGO | S_IWUSR, ds1682_show,
-                            ds1682_store, 4, DS1682_REG_ALARM);
-static SENSOR_DEVICE_ATTR_2(event_count, S_IRUGO | S_IWUSR, ds1682_show,
-                            ds1682_store, 2, DS1682_REG_EVT_CNTR);
-
-static const struct attribute_group ds1682_group = {
-        .attrs = (struct attribute *[]) {
-                &sensor_dev_attr_elapsed_time.dev_attr.attr,
-                &sensor_dev_attr_alarm_time.dev_attr.attr,
-                &sensor_dev_attr_event_count.dev_attr.attr,
-                NULL,
-        },
-};
-
-/*
- * User data attribute
- */
-static ssize_t ds1682_eeprom_read(struct kobject *kobj, struct bin_attribute *attr,
-                                  char *buf, loff_t off, size_t count)
-{
-        struct i2c_client *client = kobj_to_i2c_client(kobj);
-        int rc;
-
-        dev_dbg(&client->dev, "ds1682_eeprom_read(p=%p, off=%lli, c=%zi)\n",
-                buf, off, count);
-
-        if (off >= DS1682_EEPROM_SIZE)
-                return 0;
-
-        if (off + count > DS1682_EEPROM_SIZE)
-                count = DS1682_EEPROM_SIZE - off;
-
-        rc = i2c_smbus_read_i2c_block_data(client, DS1682_REG_EEPROM + off,
-                                           count, buf);
-        if (rc < 0)
-                return -EIO;
-
-        return count;
-}
-
-static ssize_t ds1682_eeprom_write(struct kobject *kobj, struct bin_attribute *attr,
-                                   char *buf, loff_t off, size_t count)
-{
-        struct i2c_client *client = kobj_to_i2c_client(kobj);
-
-        dev_dbg(&client->dev, "ds1682_eeprom_write(p=%p, off=%lli, c=%zi)\n",
-                buf, off, count);
-
-        if (off >= DS1682_EEPROM_SIZE)
-                return -ENOSPC;
-
-        if (off + count > DS1682_EEPROM_SIZE)
-                count = DS1682_EEPROM_SIZE - off;
-
-        /* Write out to the device */
-        if (i2c_smbus_write_i2c_block_data(client, DS1682_REG_EEPROM + off,
-                                           count, buf) < 0)
-                return -EIO;
-
-        return count;
-}
-
-static struct bin_attribute ds1682_eeprom_attr = {
-        .attr = {
-                .name = "eeprom",
-                .mode = S_IRUGO | S_IWUSR,
-        },
-        .size = DS1682_EEPROM_SIZE,
-        .read = ds1682_eeprom_read,
-        .write = ds1682_eeprom_write,
-};
-
-/*
- * Called when a ds1682 device is matched with this driver
- */
-static int ds1682_probe(struct i2c_client *client,
-                        const struct i2c_device_id *id)
-{
-        int rc;
-
-        if (!i2c_check_functionality(client->adapter,
-                                     I2C_FUNC_SMBUS_I2C_BLOCK)) {
-                dev_err(&client->dev, "i2c bus does not support the ds1682\n");
-                rc = -ENODEV;
-                goto exit;
-        }
-
-        rc = sysfs_create_group(&client->dev.kobj, &ds1682_group);
-        if (rc)
-                goto exit;
-
-        rc = sysfs_create_bin_file(&client->dev.kobj, &ds1682_eeprom_attr);
-        if (rc)
-                goto exit_bin_attr;
-
-        return 0;
-
- exit_bin_attr:
-        sysfs_remove_group(&client->dev.kobj, &ds1682_group);
- exit:
-        return rc;
-}
-
-static int ds1682_remove(struct i2c_client *client)
-{
-        sysfs_remove_bin_file(&client->dev.kobj, &ds1682_eeprom_attr);
-        sysfs_remove_group(&client->dev.kobj, &ds1682_group);
-        return 0;
-}
-
-static const struct i2c_device_id ds1682_id[] = {
-        { "ds1682", 0 },
-        { }
-};
-MODULE_DEVICE_TABLE(i2c, ds1682_id);
-
-static struct i2c_driver ds1682_driver = {
-        .driver = {
-                .name = "ds1682",
-        },
-        .probe = ds1682_probe,
-        .remove = ds1682_remove,
-        .id_table = ds1682_id,
-};
-
-static int __init ds1682_init(void)
-{
-        return i2c_add_driver(&ds1682_driver);
-}
-
-static void __exit ds1682_exit(void)
-{
-        i2c_del_driver(&ds1682_driver);
-}
-
-MODULE_AUTHOR("Grant Likely <grant.likely@secretlab.ca>");
-MODULE_DESCRIPTION("DS1682 Elapsed Time Indicator driver");
-MODULE_LICENSE("GPL");
-
-module_init(ds1682_init);
-module_exit(ds1682_exit);
diff --git a/drivers/i2c/chips/pca9539.c b/drivers/i2c/chips/pca9539.c
deleted file mode 100644
index 270de4e56a81..000000000000
--- a/drivers/i2c/chips/pca9539.c
+++ /dev/null
@@ -1,152 +0,0 @@
-/*
-    pca9539.c - 16-bit I/O port with interrupt and reset
-
-    Copyright (C) 2005 Ben Gardner <bgardner@wabtec.com>
-
-    This program is free software; you can redistribute it and/or modify
-    it under the terms of the GNU General Public License as published by
-    the Free Software Foundation; version 2 of the License.
-*/
-
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/slab.h>
-#include <linux/i2c.h>
-#include <linux/hwmon-sysfs.h>
-
-/* Addresses to scan: none, device is not autodetected */
-static const unsigned short normal_i2c[] = { I2C_CLIENT_END };
-
-/* Insmod parameters */
-I2C_CLIENT_INSMOD_1(pca9539);
-
-enum pca9539_cmd
-{
-        PCA9539_INPUT_0         = 0,
-        PCA9539_INPUT_1         = 1,
-        PCA9539_OUTPUT_0        = 2,
-        PCA9539_OUTPUT_1        = 3,
-        PCA9539_INVERT_0        = 4,
-        PCA9539_INVERT_1        = 5,
-        PCA9539_DIRECTION_0     = 6,
-        PCA9539_DIRECTION_1     = 7,
-};
-
-/* following are the sysfs callback functions */
-static ssize_t pca9539_show(struct device *dev, struct device_attribute *attr,
-                            char *buf)
-{
-        struct sensor_device_attribute *psa = to_sensor_dev_attr(attr);
-        struct i2c_client *client = to_i2c_client(dev);
-        return sprintf(buf, "%d\n", i2c_smbus_read_byte_data(client,
-                                                             psa->index));
-}
-
-static ssize_t pca9539_store(struct device *dev, struct device_attribute *attr,
-                             const char *buf, size_t count)
-{
-        struct sensor_device_attribute *psa = to_sensor_dev_attr(attr);
-        struct i2c_client *client = to_i2c_client(dev);
-        unsigned long val = simple_strtoul(buf, NULL, 0);
-        if (val > 0xff)
-                return -EINVAL;
-        i2c_smbus_write_byte_data(client, psa->index, val);
-        return count;
-}
-
-/* Define the device attributes */
-
-#define PCA9539_ENTRY_RO(name, cmd_idx) \
-        static SENSOR_DEVICE_ATTR(name, S_IRUGO, pca9539_show, NULL, cmd_idx)
-
-#define PCA9539_ENTRY_RW(name, cmd_idx) \
-        static SENSOR_DEVICE_ATTR(name, S_IRUGO | S_IWUSR, pca9539_show, \
-                                  pca9539_store, cmd_idx)
-
-PCA9539_ENTRY_RO(input0, PCA9539_INPUT_0);
-PCA9539_ENTRY_RO(input1, PCA9539_INPUT_1);
-PCA9539_ENTRY_RW(output0, PCA9539_OUTPUT_0);
-PCA9539_ENTRY_RW(output1, PCA9539_OUTPUT_1);
-PCA9539_ENTRY_RW(invert0, PCA9539_INVERT_0);
-PCA9539_ENTRY_RW(invert1, PCA9539_INVERT_1);
-PCA9539_ENTRY_RW(direction0, PCA9539_DIRECTION_0);
-PCA9539_ENTRY_RW(direction1, PCA9539_DIRECTION_1);
-
-static struct attribute *pca9539_attributes[] = {
-        &sensor_dev_attr_input0.dev_attr.attr,
-        &sensor_dev_attr_input1.dev_attr.attr,
-        &sensor_dev_attr_output0.dev_attr.attr,
-        &sensor_dev_attr_output1.dev_attr.attr,
-        &sensor_dev_attr_invert0.dev_attr.attr,
-        &sensor_dev_attr_invert1.dev_attr.attr,
-        &sensor_dev_attr_direction0.dev_attr.attr,
-        &sensor_dev_attr_direction1.dev_attr.attr,
-        NULL
-};
-
-static struct attribute_group pca9539_defattr_group = {
-        .attrs = pca9539_attributes,
-};
-
-/* Return 0 if detection is successful, -ENODEV otherwise */
-static int pca9539_detect(struct i2c_client *client, int kind,
-                          struct i2c_board_info *info)
-{
-        struct i2c_adapter *adapter = client->adapter;
-
-        if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
-                return -ENODEV;
-
-        strlcpy(info->type, "pca9539", I2C_NAME_SIZE);
-
-        return 0;
-}
-
-static int pca9539_probe(struct i2c_client *client,
-                         const struct i2c_device_id *id)
-{
-        /* Register sysfs hooks */
-        return sysfs_create_group(&client->dev.kobj,
-                                  &pca9539_defattr_group);
-}
-
-static int pca9539_remove(struct i2c_client *client)
-{
-        sysfs_remove_group(&client->dev.kobj, &pca9539_defattr_group);
-        return 0;
-}
-
-static const struct i2c_device_id pca9539_id[] = {
-        { "pca9539", 0 },
-        { }
-};
-
-static struct i2c_driver pca9539_driver = {
-        .driver = {
-                .name   = "pca9539",
-        },
-        .probe          = pca9539_probe,
-        .remove         = pca9539_remove,
-        .id_table       = pca9539_id,
-
-        .detect         = pca9539_detect,
-        .address_data   = &addr_data,
-};
-
-static int __init pca9539_init(void)
-{
-        return i2c_add_driver(&pca9539_driver);
-}
-
-static void __exit pca9539_exit(void)
-{
-        i2c_del_driver(&pca9539_driver);
-}
-
-MODULE_AUTHOR("Ben Gardner <bgardner@wabtec.com>");
-MODULE_DESCRIPTION("PCA9539 driver");
-MODULE_LICENSE("GPL");
-
-module_init(pca9539_init);
-module_exit(pca9539_exit);
-
diff --git a/drivers/i2c/chips/pcf8574.c b/drivers/i2c/chips/pcf8574.c
deleted file mode 100644
index 6ec309894c88..000000000000
--- a/drivers/i2c/chips/pcf8574.c
+++ /dev/null
@@ -1,215 +0,0 @@
-/*
-    Copyright (c) 2000  Frodo Looijaard <frodol@dds.nl>, 
-                        Philip Edelbrock <phil@netroedge.com>,
-                        Dan Eaton <dan.eaton@rocketlogix.com>
-    Ported to Linux 2.6 by Aurelien Jarno <aurel32@debian.org> with 
-    the help of Jean Delvare <khali@linux-fr.org>
-
-    This program is free software; you can redistribute it and/or modify
-    it under the terms of the GNU General Public License as published by
-    the Free Software Foundation; either version 2 of the License, or
-    (at your option) any later version.
-    
-    This program is distributed in the hope that it will be useful,
-    but WITHOUT ANY WARRANTY; without even the implied warranty of
-    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-    GNU General Public License for more details.
-
-    You should have received a copy of the GNU General Public License
-    along with this program; if not, write to the Free Software
-    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-*/
-
-/* A few notes about the PCF8574:
-
-* The PCF8574 is an 8-bit I/O expander for the I2C bus produced by
-  Philips Semiconductors.  It is designed to provide a byte I2C
-  interface to up to 8 separate devices.
-  
-* The PCF8574 appears as a very simple SMBus device which can be
-  read from or written to with SMBUS byte read/write accesses.
-
-  --Dan
-
-*/
-
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/slab.h>
-#include <linux/i2c.h>
-
-/* Addresses to scan: none, device can't be detected */
-static const unsigned short normal_i2c[] = { I2C_CLIENT_END };
-
-/* Insmod parameters */
-I2C_CLIENT_INSMOD_2(pcf8574, pcf8574a);
-
-/* Each client has this additional data */
-struct pcf8574_data {
-        int write;                      /* Remember last written value */
-};
-
-static void pcf8574_init_client(struct i2c_client *client);
-
-/* following are the sysfs callback functions */
-static ssize_t show_read(struct device *dev, struct device_attribute *attr, char *buf)
-{
-        struct i2c_client *client = to_i2c_client(dev);
-        return sprintf(buf, "%u\n", i2c_smbus_read_byte(client));
-}
-
-static DEVICE_ATTR(read, S_IRUGO, show_read, NULL);
-
-static ssize_t show_write(struct device *dev, struct device_attribute *attr, char *buf)
-{
-        struct pcf8574_data *data = i2c_get_clientdata(to_i2c_client(dev));
-
-        if (data->write < 0)
-                return data->write;
-
-        return sprintf(buf, "%d\n", data->write);
-}
-
-static ssize_t set_write(struct device *dev, struct device_attribute *attr, const char *buf,
-                         size_t count)
-{
-        struct i2c_client *client = to_i2c_client(dev);
-        struct pcf8574_data *data = i2c_get_clientdata(client);
-        unsigned long val = simple_strtoul(buf, NULL, 10);
-
-        if (val > 0xff)
-                return -EINVAL;
-
-        data->write = val;
-        i2c_smbus_write_byte(client, data->write);
-        return count;
-}
-
-static DEVICE_ATTR(write, S_IWUSR | S_IRUGO, show_write, set_write);
-
-static struct attribute *pcf8574_attributes[] = {
-        &dev_attr_read.attr,
-        &dev_attr_write.attr,
-        NULL
-};
-
-static const struct attribute_group pcf8574_attr_group = {
-        .attrs = pcf8574_attributes,
-};
-
-/*
- * Real code
- */
-
-/* Return 0 if detection is successful, -ENODEV otherwise */
-static int pcf8574_detect(struct i2c_client *client, int kind,
-                          struct i2c_board_info *info)
-{
-        struct i2c_adapter *adapter = client->adapter;
-        const char *client_name;
-
-        if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE))
-                return -ENODEV;
-
-        /* Now, we would do the remaining detection. But the PCF8574 is plainly
-           impossible to detect! Stupid chip. */
-
-        /* Determine the chip type */
-        if (kind <= 0) {
-                if (client->addr >= 0x38 && client->addr <= 0x3f)
-                        kind = pcf8574a;
-                else
-                        kind = pcf8574;
-        }
-
-        if (kind == pcf8574a)
-                client_name = "pcf8574a";
-        else
-                client_name = "pcf8574";
-        strlcpy(info->type, client_name, I2C_NAME_SIZE);
-
-        return 0;
-}
-
-static int pcf8574_probe(struct i2c_client *client,
-                         const struct i2c_device_id *id)
-{
-        struct pcf8574_data *data;
-        int err;
-
-        data = kzalloc(sizeof(struct pcf8574_data), GFP_KERNEL);
-        if (!data) {
-                err = -ENOMEM;
-                goto exit;
-        }
-
-        i2c_set_clientdata(client, data);
-
-        /* Initialize the PCF8574 chip */
-        pcf8574_init_client(client);
-
-        /* Register sysfs hooks */
-        err = sysfs_create_group(&client->dev.kobj, &pcf8574_attr_group);
-        if (err)
-                goto exit_free;
-        return 0;
-
-      exit_free:
-        kfree(data);
-      exit:
-        return err;
-}
-
-static int pcf8574_remove(struct i2c_client *client)
-{
-        sysfs_remove_group(&client->dev.kobj, &pcf8574_attr_group);
-        kfree(i2c_get_clientdata(client));
-        return 0;
-}
-
-/* Called when we have found a new PCF8574. */
-static void pcf8574_init_client(struct i2c_client *client)
-{
-        struct pcf8574_data *data = i2c_get_clientdata(client);
-        data->write = -EAGAIN;
-}
-
-static const struct i2c_device_id pcf8574_id[] = {
-        { "pcf8574", 0 },
-        { "pcf8574a", 0 },
-        { }
-};
-
-static struct i2c_driver pcf8574_driver = {
-        .driver = {
-                .name   = "pcf8574",
-        },
-        .probe          = pcf8574_probe,
-        .remove         = pcf8574_remove,
-        .id_table       = pcf8574_id,
-
-        .detect         = pcf8574_detect,
-        .address_data   = &addr_data,
-};
-
-static int __init pcf8574_init(void)
-{
-        return i2c_add_driver(&pcf8574_driver);
-}
-
-static void __exit pcf8574_exit(void)
-{
-        i2c_del_driver(&pcf8574_driver);
-}
-
-
-MODULE_AUTHOR
-    ("Frodo Looijaard <frodol@dds.nl>, "
-     "Philip Edelbrock <phil@netroedge.com>, "
-     "Dan Eaton <dan.eaton@rocketlogix.com> "
-     "and Aurelien Jarno <aurelien@aurel32.net>");
-MODULE_DESCRIPTION("PCF8574 driver");
-MODULE_LICENSE("GPL");
-
-module_init(pcf8574_init);
-module_exit(pcf8574_exit);
diff --git a/drivers/i2c/chips/pcf8575.c b/drivers/i2c/chips/pcf8575.c
deleted file mode 100644
index 07fd7cb3c57d..000000000000
--- a/drivers/i2c/chips/pcf8575.c
+++ /dev/null
@@ -1,198 +0,0 @@
-/*
-  pcf8575.c
-
-  About the PCF8575 chip: the PCF8575 is a 16-bit I/O expander for the I2C bus
-  produced by a.o. Philips Semiconductors.
-
-  Copyright (C) 2006 Michael Hennerich, Analog Devices Inc.
-  <hennerich@blackfin.uclinux.org>
-  Based on pcf8574.c.
-
-  Copyright (c) 2007 Bart Van Assche <bart.vanassche@gmail.com>.
-  Ported this driver from ucLinux to the mainstream Linux kernel.
-
-  This program is free software; you can redistribute it and/or modify
-  it under the terms of the GNU General Public License as published by
-  the Free Software Foundation; either version 2 of the License, or
-  (at your option) any later version.
-
-  This program is distributed in the hope that it will be useful,
-  but WITHOUT ANY WARRANTY; without even the implied warranty of
-  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-  GNU General Public License for more details.
-
-  You should have received a copy of the GNU General Public License
-  along with this program; if not, write to the Free Software
-  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-*/
-
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/i2c.h>
-#include <linux/slab.h>  /* kzalloc() */
-#include <linux/sysfs.h> /* sysfs_create_group() */
-
-/* Addresses to scan: none, device can't be detected */
-static const unsigned short normal_i2c[] = { I2C_CLIENT_END };
-
-/* Insmod parameters */
-I2C_CLIENT_INSMOD;
-
-
-/* Each client has this additional data */
-struct pcf8575_data {
-        int write;              /* last written value, or error code */
-};
-
-/* following are the sysfs callback functions */
-static ssize_t show_read(struct device *dev, struct device_attribute *attr,
-                         char *buf)
-{
-        struct i2c_client *client = to_i2c_client(dev);
-        u16 val;
-        u8 iopin_state[2];
-
-        i2c_master_recv(client, iopin_state, 2);
-
-        val = iopin_state[0];
-        val |= iopin_state[1] << 8;
-
-        return sprintf(buf, "%u\n", val);
-}
-
-static DEVICE_ATTR(read, S_IRUGO, show_read, NULL);
-
-static ssize_t show_write(struct device *dev, struct device_attribute *attr,
-                          char *buf)
-{
-        struct pcf8575_data *data = dev_get_drvdata(dev);
-        if (data->write < 0)
-                return data->write;
-        return sprintf(buf, "%d\n", data->write);
-}
-
-static ssize_t set_write(struct device *dev, struct device_attribute *attr,
-                         const char *buf, size_t count)
-{
-        struct i2c_client *client = to_i2c_client(dev);
-        struct pcf8575_data *data = i2c_get_clientdata(client);
-        unsigned long val = simple_strtoul(buf, NULL, 10);
-        u8 iopin_state[2];
-
-        if (val > 0xffff)
-                return -EINVAL;
-
-        data->write = val;
-
-        iopin_state[0] = val & 0xFF;
-        iopin_state[1] = val >> 8;
-
-        i2c_master_send(client, iopin_state, 2);
-
-        return count;
-}
-
-static DEVICE_ATTR(write, S_IWUSR | S_IRUGO, show_write, set_write);
-
-static struct attribute *pcf8575_attributes[] = {
-        &dev_attr_read.attr,
-        &dev_attr_write.attr,
-        NULL
-};
-
-static const struct attribute_group pcf8575_attr_group = {
-        .attrs = pcf8575_attributes,
-};
-
-/*
- * Real code
- */
-
-/* Return 0 if detection is successful, -ENODEV otherwise */
-static int pcf8575_detect(struct i2c_client *client, int kind,
-                          struct i2c_board_info *info)
-{
-        struct i2c_adapter *adapter = client->adapter;
-
-        if (!i2c_check_functionality(adapter, I2C_FUNC_I2C))
-                return -ENODEV;
-
-        /* This is the place to detect whether the chip at the specified
-           address really is a PCF8575 chip. However, there is no method known
-           to detect whether an I2C chip is a PCF8575 or any other I2C chip. */
-
-        strlcpy(info->type, "pcf8575", I2C_NAME_SIZE);
-
-        return 0;
-}
-
-static int pcf8575_probe(struct i2c_client *client,
-                         const struct i2c_device_id *id)
-{
-        struct pcf8575_data *data;
-        int err;
-
-        data = kzalloc(sizeof(struct pcf8575_data), GFP_KERNEL);
-        if (!data) {
-                err = -ENOMEM;
-                goto exit;
-        }
-
-        i2c_set_clientdata(client, data);
-        data->write = -EAGAIN;
-
-        /* Register sysfs hooks */
-        err = sysfs_create_group(&client->dev.kobj, &pcf8575_attr_group);
-        if (err)
-                goto exit_free;
-
-        return 0;
-
-exit_free:
-        kfree(data);
-exit:
-        return err;
-}
-
-static int pcf8575_remove(struct i2c_client *client)
-{
-        sysfs_remove_group(&client->dev.kobj, &pcf8575_attr_group);
-        kfree(i2c_get_clientdata(client));
-        return 0;
-}
-
-static const struct i2c_device_id pcf8575_id[] = {
-        { "pcf8575", 0 },
-        { }
-};
-
-static struct i2c_driver pcf8575_driver = {
-        .driver = {
-                .owner  = THIS_MODULE,
-                .name   = "pcf8575",
-        },
-        .probe          = pcf8575_probe,
-        .remove         = pcf8575_remove,
-        .id_table       = pcf8575_id,
-
-        .detect         = pcf8575_detect,
-        .address_data   = &addr_data,
-};
-
-static int __init pcf8575_init(void)
-{
-        return i2c_add_driver(&pcf8575_driver);
-}
-
-static void __exit pcf8575_exit(void)
-{
-        i2c_del_driver(&pcf8575_driver);
-}
-
-MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>, "
-              "Bart Van Assche <bart.vanassche@gmail.com>");
-MODULE_DESCRIPTION("pcf8575 driver");
-MODULE_LICENSE("GPL");
-
-module_init(pcf8575_init);
-module_exit(pcf8575_exit);
diff --git a/drivers/i2c/chips/tsl2550.c b/drivers/i2c/chips/tsl2550.c
deleted file mode 100644
index 1a9cc135219f..000000000000
--- a/drivers/i2c/chips/tsl2550.c
+++ /dev/null
@@ -1,489 +0,0 @@
-/*
- *  tsl2550.c - Linux kernel modules for ambient light sensor
- *
- *  Copyright (C) 2007 Rodolfo Giometti <giometti@linux.it>
- *  Copyright (C) 2007 Eurotech S.p.A. <info@eurotech.it>
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License
- *  along with this program; if not, write to the Free Software
- *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/slab.h>
-#include <linux/i2c.h>
-#include <linux/mutex.h>
-#include <linux/delay.h>
-
-#define TSL2550_DRV_NAME        "tsl2550"
-#define DRIVER_VERSION          "1.1.1"
-
-/*
- * Defines
- */
-
-#define TSL2550_POWER_DOWN              0x00
-#define TSL2550_POWER_UP                0x03
-#define TSL2550_STANDARD_RANGE          0x18
-#define TSL2550_EXTENDED_RANGE          0x1d
-#define TSL2550_READ_ADC0               0x43
-#define TSL2550_READ_ADC1               0x83
-
-/*
- * Structs
- */
-
-struct tsl2550_data {
-        struct i2c_client *client;
-        struct mutex update_lock;
-
-        unsigned int power_state : 1;
-        unsigned int operating_mode : 1;
-};
-
-/*
- * Global data
- */
-
-static const u8 TSL2550_MODE_RANGE[2] = {
-        TSL2550_STANDARD_RANGE, TSL2550_EXTENDED_RANGE,
-};
-
-/*
- * Management functions
- */
-
-static int tsl2550_set_operating_mode(struct i2c_client *client, int mode)
-{
-        struct tsl2550_data *data = i2c_get_clientdata(client);
-
-        int ret = i2c_smbus_write_byte(client, TSL2550_MODE_RANGE[mode]);
-
-        data->operating_mode = mode;
-
-        return ret;
-}
-
-static int tsl2550_set_power_state(struct i2c_client *client, int state)
-{
-        struct tsl2550_data *data = i2c_get_clientdata(client);
-        int ret;
-
-        if (state == 0)
-                ret = i2c_smbus_write_byte(client, TSL2550_POWER_DOWN);
-        else {
-                ret = i2c_smbus_write_byte(client, TSL2550_POWER_UP);
-
-                /* On power up we should reset operating mode also... */
-                tsl2550_set_operating_mode(client, data->operating_mode);
-        }
-
-        data->power_state = state;
-
-        return ret;
-}
-
-static int tsl2550_get_adc_value(struct i2c_client *client, u8 cmd)
-{
-        unsigned long end;
-        int loop = 0, ret = 0;
-
-        /*
-         * Read ADC channel waiting at most 400ms (see data sheet for further
-         * info).
-         * To avoid long busy wait we spin for few milliseconds then
-         * start sleeping.
-         */
-        end = jiffies + msecs_to_jiffies(400);
-        while (time_before(jiffies, end)) {
-                i2c_smbus_write_byte(client, cmd);
-
-                if (loop++ < 5)
-                        mdelay(1);
-                else
-                        msleep(1);
-
-                ret = i2c_smbus_read_byte(client);
-                if (ret < 0)
-                        return ret;
-                else if (ret & 0x0080)
-                        break;
-        }
-        if (!(ret & 0x80))
-                return -EIO;
-        return ret & 0x7f;      /* remove the "valid" bit */
-}
-
-/*
- * LUX calculation
- */
-
-#define TSL2550_MAX_LUX         1846
-
-static const u8 ratio_lut[] = {
-        100, 100, 100, 100, 100, 100, 100, 100,
-        100, 100, 100, 100, 100, 100, 99, 99,
-        99, 99, 99, 99, 99, 99, 99, 99,
-        99, 99, 99, 98, 98, 98, 98, 98,
-        98, 98, 97, 97, 97, 97, 97, 96,
-        96, 96, 96, 95, 95, 95, 94, 94,
-        93, 93, 93, 92, 92, 91, 91, 90,
-        89, 89, 88, 87, 87, 86, 85, 84,
-        83, 82, 81, 80, 79, 78, 77, 75,
-        74, 73, 71, 69, 68, 66, 64, 62,
-        60, 58, 56, 54, 52, 49, 47, 44,
-        42, 41, 40, 40, 39, 39, 38, 38,
-        37, 37, 37, 36, 36, 36, 35, 35,
-        35, 35, 34, 34, 34, 34, 33, 33,
-        33, 33, 32, 32, 32, 32, 32, 31,
-        31, 31, 31, 31, 30, 30, 30, 30,
-        30,
-};
-
-static const u16 count_lut[] = {
-        0, 1, 2, 3, 4, 5, 6, 7,
-        8, 9, 10, 11, 12, 13, 14, 15,
-        16, 18, 20, 22, 24, 26, 28, 30,
-        32, 34, 36, 38, 40, 42, 44, 46,
-        49, 53, 57, 61, 65, 69, 73, 77,
-        81, 85, 89, 93, 97, 101, 105, 109,
-        115, 123, 131, 139, 147, 155, 163, 171,
-        179, 187, 195, 203, 211, 219, 227, 235,
-        247, 263, 279, 295, 311, 327, 343, 359,
-        375, 391, 407, 423, 439, 455, 471, 487,
-        511, 543, 575, 607, 639, 671, 703, 735,
-        767, 799, 831, 863, 895, 927, 959, 991,
-        1039, 1103, 1167, 1231, 1295, 1359, 1423, 1487,
-        1551, 1615, 1679, 1743, 1807, 1871, 1935, 1999,
-        2095, 2223, 2351, 2479, 2607, 2735, 2863, 2991,
-        3119, 3247, 3375, 3503, 3631, 3759, 3887, 4015,
-};
-
-/*
- * This function is described into Taos TSL2550 Designer's Notebook
- * pages 2, 3.
- */
-static int tsl2550_calculate_lux(u8 ch0, u8 ch1)
-{
-        unsigned int lux;
-
-        /* Look up count from channel values */
-        u16 c0 = count_lut[ch0];
-        u16 c1 = count_lut[ch1];
-
-        /*
-         * Calculate ratio.
-         * Note: the "128" is a scaling factor
-         */
-        u8 r = 128;
-
-        /* Avoid division by 0 and count 1 cannot be greater than count 0 */
-        if (c0 && (c1 <= c0))
-                r = c1 * 128 / c0;
-        else
-                return -1;
-
-        /* Calculate LUX */
-        lux = ((c0 - c1) * ratio_lut[r]) / 256;
-
-        /* LUX range check */
-        return lux > TSL2550_MAX_LUX ? TSL2550_MAX_LUX : lux;
-}
-
-/*
- * SysFS support
- */
-
-static ssize_t tsl2550_show_power_state(struct device *dev,
-                struct device_attribute *attr, char *buf)
-{
-        struct tsl2550_data *data = i2c_get_clientdata(to_i2c_client(dev));
-
-        return sprintf(buf, "%u\n", data->power_state);
-}
-
-static ssize_t tsl2550_store_power_state(struct device *dev,
-                struct device_attribute *attr, const char *buf, size_t count)
-{
-        struct i2c_client *client = to_i2c_client(dev);
-        struct tsl2550_data *data = i2c_get_clientdata(client);
-        unsigned long val = simple_strtoul(buf, NULL, 10);
-        int ret;
-
-        if (val < 0 || val > 1)
-                return -EINVAL;
-
-        mutex_lock(&data->update_lock);
-        ret = tsl2550_set_power_state(client, val);
-        mutex_unlock(&data->update_lock);
-
-        if (ret < 0)
-                return ret;
-
-        return count;
-}
-
-static DEVICE_ATTR(power_state, S_IWUSR | S_IRUGO,
-                   tsl2550_show_power_state, tsl2550_store_power_state);
-
-static ssize_t tsl2550_show_operating_mode(struct device *dev,
-                struct device_attribute *attr, char *buf)
-{
-        struct tsl2550_data *data = i2c_get_clientdata(to_i2c_client(dev));
-
-        return sprintf(buf, "%u\n", data->operating_mode);
-}
-
-static ssize_t tsl2550_store_operating_mode(struct device *dev,
-                struct device_attribute *attr, const char *buf, size_t count)
-{
-        struct i2c_client *client = to_i2c_client(dev);
-        struct tsl2550_data *data = i2c_get_clientdata(client);
-        unsigned long val = simple_strtoul(buf, NULL, 10);
-        int ret;
-
-        if (val < 0 || val > 1)
-                return -EINVAL;
-
-        if (data->power_state == 0)
-                return -EBUSY;
-
-        mutex_lock(&data->update_lock);
-        ret = tsl2550_set_operating_mode(client, val);
-        mutex_unlock(&data->update_lock);
-
-        if (ret < 0)
-                return ret;
-
-        return count;
-}
-
-static DEVICE_ATTR(operating_mode, S_IWUSR | S_IRUGO,
-                   tsl2550_show_operating_mode, tsl2550_store_operating_mode);
-
-static ssize_t __tsl2550_show_lux(struct i2c_client *client, char *buf)
-{
-        u8 ch0, ch1;
-        int ret;
-
-        ret = tsl2550_get_adc_value(client, TSL2550_READ_ADC0);
-        if (ret < 0)
-                return ret;
-        ch0 = ret;
-
-        mdelay(1);
-
-        ret = tsl2550_get_adc_value(client, TSL2550_READ_ADC1);
-        if (ret < 0)
-                return ret;
-        ch1 = ret;
-
-        /* Do the job */
-        ret = tsl2550_calculate_lux(ch0, ch1);
-        if (ret < 0)
-                return ret;
-
-        return sprintf(buf, "%d\n", ret);
-}
-
-static ssize_t tsl2550_show_lux1_input(struct device *dev,
-                        struct device_attribute *attr, char *buf)
-{
-        struct i2c_client *client = to_i2c_client(dev);
-        struct tsl2550_data *data = i2c_get_clientdata(client);
-        int ret;
-
-        /* No LUX data if not operational */
-        if (!data->power_state)
-                return -EBUSY;
-
-        mutex_lock(&data->update_lock);
-        ret = __tsl2550_show_lux(client, buf);
-        mutex_unlock(&data->update_lock);
-
-        return ret;
-}
-
-static DEVICE_ATTR(lux1_input, S_IRUGO,
-                   tsl2550_show_lux1_input, NULL);
-
-static struct attribute *tsl2550_attributes[] = {
-        &dev_attr_power_state.attr,
-        &dev_attr_operating_mode.attr,
-        &dev_attr_lux1_input.attr,
-        NULL
-};
-
-static const struct attribute_group tsl2550_attr_group = {
-        .attrs = tsl2550_attributes,
-};
-
-/*
- * Initialization function
- */
-
-static int tsl2550_init_client(struct i2c_client *client)
-{
-        struct tsl2550_data *data = i2c_get_clientdata(client);
-        int err;
-
-        /*
-         * Probe the chip. To do so we try to power up the device and then to
-         * read back the 0x03 code
-         */
-        err = i2c_smbus_write_byte(client, TSL2550_POWER_UP);
-        if (err < 0)
-                return err;
-        mdelay(1);
-        if (i2c_smbus_read_byte(client) != TSL2550_POWER_UP)
-                return -ENODEV;
-        data->power_state = 1;
-
-        /* Set the default operating mode */
-        err = i2c_smbus_write_byte(client,
-                                   TSL2550_MODE_RANGE[data->operating_mode]);
-        if (err < 0)
-                return err;
-
-        return 0;
-}
-
-/*
- * I2C init/probing/exit functions
- */
-
-static struct i2c_driver tsl2550_driver;
-static int __devinit tsl2550_probe(struct i2c_client *client,
-                                   const struct i2c_device_id *id)
-{
-        struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
-        struct tsl2550_data *data;
-        int *opmode, err = 0;
-
-        if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE)) {
-                err = -EIO;
-                goto exit;
-        }
-
-        data = kzalloc(sizeof(struct tsl2550_data), GFP_KERNEL);
-        if (!data) {
-                err = -ENOMEM;
-                goto exit;
-        }
-        data->client = client;
-        i2c_set_clientdata(client, data);
-
-        /* Check platform data */
-        opmode = client->dev.platform_data;
-        if (opmode) {
-                if (*opmode < 0 || *opmode > 1) {
-                        dev_err(&client->dev, "invalid operating_mode (%d)\n",
-                                        *opmode);
-                        err = -EINVAL;
-                        goto exit_kfree;
-                }
-                data->operating_mode = *opmode;
-        } else
-                data->operating_mode = 0;       /* default mode is standard */
-        dev_info(&client->dev, "%s operating mode\n",
-                        data->operating_mode ? "extended" : "standard");
-
-        mutex_init(&data->update_lock);
-
-        /* Initialize the TSL2550 chip */
-        err = tsl2550_init_client(client);
-        if (err)
-                goto exit_kfree;
-
-        /* Register sysfs hooks */
-        err = sysfs_create_group(&client->dev.kobj, &tsl2550_attr_group);
-        if (err)
-                goto exit_kfree;
-
-        dev_info(&client->dev, "support ver. %s enabled\n", DRIVER_VERSION);
-
-        return 0;
-
-exit_kfree:
-        kfree(data);
-exit:
-        return err;
-}
-
-static int __devexit tsl2550_remove(struct i2c_client *client)
-{
-        sysfs_remove_group(&client->dev.kobj, &tsl2550_attr_group);
-
-        /* Power down the device */
-        tsl2550_set_power_state(client, 0);
-
-        kfree(i2c_get_clientdata(client));
-
-        return 0;
-}
-
-#ifdef CONFIG_PM
-
-static int tsl2550_suspend(struct i2c_client *client, pm_message_t mesg)
-{
-        return tsl2550_set_power_state(client, 0);
-}
-
-static int tsl2550_resume(struct i2c_client *client)
-{
-        return tsl2550_set_power_state(client, 1);
-}
-
-#else
-
-#define tsl2550_suspend         NULL
-#define tsl2550_resume          NULL
-
-#endif /* CONFIG_PM */
-
-static const struct i2c_device_id tsl2550_id[] = {
-        { "tsl2550", 0 },
-        { }
-};
-MODULE_DEVICE_TABLE(i2c, tsl2550_id);
-
-static struct i2c_driver tsl2550_driver = {
-        .driver = {
-                .name   = TSL2550_DRV_NAME,
-                .owner  = THIS_MODULE,
-        },
-        .suspend = tsl2550_suspend,
-        .resume = tsl2550_resume,
-        .probe  = tsl2550_probe,
-        .remove = __devexit_p(tsl2550_remove),
-        .id_table = tsl2550_id,
-};
-
-static int __init tsl2550_init(void)
-{
-        return i2c_add_driver(&tsl2550_driver);
-}
-
-static void __exit tsl2550_exit(void)
-{
-        i2c_del_driver(&tsl2550_driver);
-}
-
-MODULE_AUTHOR("Rodolfo Giometti <giometti@linux.it>");
-MODULE_DESCRIPTION("TSL2550 ambient light sensor driver");
-MODULE_LICENSE("GPL");
-MODULE_VERSION(DRIVER_VERSION);
-
-module_init(tsl2550_init);
-module_exit(tsl2550_exit);
diff --git a/drivers/i2c/i2c-boardinfo.c b/drivers/i2c/i2c-boardinfo.c
index a26a34a06641..7e6a63b57165 100644
--- a/drivers/i2c/i2c-boardinfo.c
+++ b/drivers/i2c/i2c-boardinfo.c
@@ -18,6 +18,7 @@
 
 #include <linux/kernel.h>
 #include <linux/i2c.h>
+#include <linux/slab.h>
 #include <linux/rwsem.h>
 
 #include "i2c-core.h"
diff --git a/drivers/i2c/i2c-core.c b/drivers/i2c/i2c-core.c
index 0e45c296d3d2..c7db6980e3a3 100644
--- a/drivers/i2c/i2c-core.c
+++ b/drivers/i2c/i2c-core.c
@@ -20,7 +20,9 @@
 /* With some changes from Kyösti Mälkki <kmalkki@cc.hut.fi>.
    All SMBus-related things are written by Frodo Looijaard <frodol@dds.nl>
    SMBus 2.0 support by Mark Studebaker <mdsxyz123@yahoo.com> and
-   Jean Delvare <khali@linux-fr.org> */
+   Jean Delvare <khali@linux-fr.org>
+   Mux support by Rodolfo Giometti <giometti@enneenne.com> and
+   Michael Lawnick <michael.lawnick.ext@nsn.com> */
 
 #include <linux/module.h>
 #include <linux/kernel.h>
@@ -30,23 +32,24 @@
 #include <linux/init.h>
 #include <linux/idr.h>
 #include <linux/mutex.h>
+#include <linux/of_device.h>
 #include <linux/completion.h>
 #include <linux/hardirq.h>
 #include <linux/irqflags.h>
 #include <linux/rwsem.h>
+#include <linux/pm_runtime.h>
 #include <asm/uaccess.h>
 
 #include "i2c-core.h"
 
 
-/* core_lock protects i2c_adapter_idr, userspace_devices, and guarantees
+/* core_lock protects i2c_adapter_idr, and guarantees
    that device detection, deletion of detected devices, and attach_adapter
    and detach_adapter calls are serialized */
 static DEFINE_MUTEX(core_lock);
 static DEFINE_IDR(i2c_adapter_idr);
-static LIST_HEAD(userspace_devices);
 
-static int i2c_check_addr(struct i2c_adapter *adapter, int addr);
+static struct device_type i2c_client_type;
 static int i2c_detect(struct i2c_adapter *adapter, struct i2c_driver *driver);
 
 /* ------------------------------------------------------------------------- */
@@ -64,9 +67,17 @@ static const struct i2c_device_id *i2c_match_id(const struct i2c_device_id *id,
 
 static int i2c_device_match(struct device *dev, struct device_driver *drv)
 {
-        struct i2c_client       *client = to_i2c_client(dev);
-        struct i2c_driver       *driver = to_i2c_driver(drv);
+        struct i2c_client       *client = i2c_verify_client(dev);
+        struct i2c_driver       *driver;
+
+        if (!client)
+                return 0;
+
+        /* Attempt an OF style match */
+        if (of_driver_match_device(dev, drv))
+                return 1;
 
+        driver = to_i2c_driver(drv);
         /* match on an id table if there is one */
         if (driver->id_table)
                 return i2c_match_id(driver->id_table, client) != NULL;
@@ -94,10 +105,14 @@ static int i2c_device_uevent(struct device *dev, struct kobj_uevent_env *env)
 
 static int i2c_device_probe(struct device *dev)
 {
-        struct i2c_client       *client = to_i2c_client(dev);
-        struct i2c_driver       *driver = to_i2c_driver(dev->driver);
+        struct i2c_client       *client = i2c_verify_client(dev);
+        struct i2c_driver       *driver;
         int status;
 
+        if (!client)
+                return 0;
+
+        driver = to_i2c_driver(dev->driver);
         if (!driver->probe || !driver->id_table)
                 return -ENODEV;
         client->driver = driver;
@@ -107,18 +122,20 @@ static int i2c_device_probe(struct device *dev)
         dev_dbg(dev, "probe\n");
 
         status = driver->probe(client, i2c_match_id(driver->id_table, client));
-        if (status)
+        if (status) {
                 client->driver = NULL;
+                i2c_set_clientdata(client, NULL);
+        }
         return status;
 }
 
 static int i2c_device_remove(struct device *dev)
 {
-        struct i2c_client       *client = to_i2c_client(dev);
+        struct i2c_client       *client = i2c_verify_client(dev);
         struct i2c_driver       *driver;
         int                     status;
 
-        if (!dev->driver)
+        if (!client || !dev->driver)
                 return 0;
 
         driver = to_i2c_driver(dev->driver);
@@ -129,56 +146,158 @@ static int i2c_device_remove(struct device *dev)
                 dev->driver = NULL;
                 status = 0;
         }
-        if (status == 0)
+        if (status == 0) {
                 client->driver = NULL;
+                i2c_set_clientdata(client, NULL);
+        }
         return status;
 }
 
 static void i2c_device_shutdown(struct device *dev)
 {
+        struct i2c_client *client = i2c_verify_client(dev);
         struct i2c_driver *driver;
 
-        if (!dev->driver)
+        if (!client || !dev->driver)
                 return;
         driver = to_i2c_driver(dev->driver);
         if (driver->shutdown)
-                driver->shutdown(to_i2c_client(dev));
+                driver->shutdown(client);
 }
 
-static int i2c_device_suspend(struct device *dev, pm_message_t mesg)
+#ifdef CONFIG_PM_SLEEP
+static int i2c_legacy_suspend(struct device *dev, pm_message_t mesg)
 {
+        struct i2c_client *client = i2c_verify_client(dev);
         struct i2c_driver *driver;
 
-        if (!dev->driver)
+        if (!client || !dev->driver)
                 return 0;
         driver = to_i2c_driver(dev->driver);
         if (!driver->suspend)
                 return 0;
-        return driver->suspend(to_i2c_client(dev), mesg);
+        return driver->suspend(client, mesg);
 }
 
-static int i2c_device_resume(struct device *dev)
+static int i2c_legacy_resume(struct device *dev)
 {
+        struct i2c_client *client = i2c_verify_client(dev);
         struct i2c_driver *driver;
 
-        if (!dev->driver)
+        if (!client || !dev->driver)
                 return 0;
         driver = to_i2c_driver(dev->driver);
         if (!driver->resume)
                 return 0;
-        return driver->resume(to_i2c_client(dev));
+        return driver->resume(client);
+}
+
+static int i2c_device_pm_suspend(struct device *dev)
+{
+        const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL;
+
+        if (pm) {
+                if (pm_runtime_suspended(dev))
+                        return 0;
+                else
+                        return pm->suspend ? pm->suspend(dev) : 0;
+        }
+
+        return i2c_legacy_suspend(dev, PMSG_SUSPEND);
+}
+
+static int i2c_device_pm_resume(struct device *dev)
+{
+        const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL;
+        int ret;
+
+        if (pm)
+                ret = pm->resume ? pm->resume(dev) : 0;
+        else
+                ret = i2c_legacy_resume(dev);
+
+        return ret;
 }
 
+static int i2c_device_pm_freeze(struct device *dev)
+{
+        const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL;
+
+        if (pm) {
+                if (pm_runtime_suspended(dev))
+                        return 0;
+                else
+                        return pm->freeze ? pm->freeze(dev) : 0;
+        }
+
+        return i2c_legacy_suspend(dev, PMSG_FREEZE);
+}
+
+static int i2c_device_pm_thaw(struct device *dev)
+{
+        const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL;
+
+        if (pm) {
+                if (pm_runtime_suspended(dev))
+                        return 0;
+                else
+                        return pm->thaw ? pm->thaw(dev) : 0;
+        }
+
+        return i2c_legacy_resume(dev);
+}
+
+static int i2c_device_pm_poweroff(struct device *dev)
+{
+        const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL;
+
+        if (pm) {
+                if (pm_runtime_suspended(dev))
+                        return 0;
+                else
+                        return pm->poweroff ? pm->poweroff(dev) : 0;
+        }
+
+        return i2c_legacy_suspend(dev, PMSG_HIBERNATE);
+}
+
+static int i2c_device_pm_restore(struct device *dev)
+{
+        const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL;
+        int ret;
+
+        if (pm)
+                ret = pm->restore ? pm->restore(dev) : 0;
+        else
+                ret = i2c_legacy_resume(dev);
+
+        if (!ret) {
+                pm_runtime_disable(dev);
+                pm_runtime_set_active(dev);
+                pm_runtime_enable(dev);
+        }
+
+        return ret;
+}
+#else /* !CONFIG_PM_SLEEP */
+#define i2c_device_pm_suspend   NULL
+#define i2c_device_pm_resume    NULL
+#define i2c_device_pm_freeze    NULL
+#define i2c_device_pm_thaw      NULL
+#define i2c_device_pm_poweroff  NULL
+#define i2c_device_pm_restore   NULL
+#endif /* !CONFIG_PM_SLEEP */
+
 static void i2c_client_dev_release(struct device *dev)
 {
         kfree(to_i2c_client(dev));
 }
 
 static ssize_t
-show_client_name(struct device *dev, struct device_attribute *attr, char *buf)
+show_name(struct device *dev, struct device_attribute *attr, char *buf)
 {
-        struct i2c_client *client = to_i2c_client(dev);
-        return sprintf(buf, "%s\n", client->name);
+        return sprintf(buf, "%s\n", dev->type == &i2c_client_type ?
+                       to_i2c_client(dev)->name : to_i2c_adapter(dev)->name);
 }
 
 static ssize_t
@@ -188,26 +307,55 @@ show_modalias(struct device *dev, struct device_attribute *attr, char *buf)
         return sprintf(buf, "%s%s\n", I2C_MODULE_PREFIX, client->name);
 }
 
-static struct device_attribute i2c_dev_attrs[] = {
-        __ATTR(name, S_IRUGO, show_client_name, NULL),
+static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
+static DEVICE_ATTR(modalias, S_IRUGO, show_modalias, NULL);
+
+static struct attribute *i2c_dev_attrs[] = {
+        &dev_attr_name.attr,
         /* modalias helps coldplug:  modprobe $(cat .../modalias) */
-        __ATTR(modalias, S_IRUGO, show_modalias, NULL),
-        { },
+        &dev_attr_modalias.attr,
+        NULL
+};
+
+static struct attribute_group i2c_dev_attr_group = {
+        .attrs          = i2c_dev_attrs,
+};
+
+static const struct attribute_group *i2c_dev_attr_groups[] = {
+        &i2c_dev_attr_group,
+        NULL
+};
+
+static const struct dev_pm_ops i2c_device_pm_ops = {
+        .suspend = i2c_device_pm_suspend,
+        .resume = i2c_device_pm_resume,
+        .freeze = i2c_device_pm_freeze,
+        .thaw = i2c_device_pm_thaw,
+        .poweroff = i2c_device_pm_poweroff,
+        .restore = i2c_device_pm_restore,
+        SET_RUNTIME_PM_OPS(
+                pm_generic_runtime_suspend,
+                pm_generic_runtime_resume,
+                pm_generic_runtime_idle
+        )
 };
 
 struct bus_type i2c_bus_type = {
         .name           = "i2c",
-        .dev_attrs      = i2c_dev_attrs,
         .match          = i2c_device_match,
-        .uevent         = i2c_device_uevent,
         .probe          = i2c_device_probe,
         .remove         = i2c_device_remove,
         .shutdown       = i2c_device_shutdown,
-        .suspend        = i2c_device_suspend,
-        .resume         = i2c_device_resume,
+        .pm             = &i2c_device_pm_ops,
 };
 EXPORT_SYMBOL_GPL(i2c_bus_type);
 
+static struct device_type i2c_client_type = {
+        .groups         = i2c_dev_attr_groups,
+        .uevent         = i2c_device_uevent,
+        .release        = i2c_client_dev_release,
+};
+
 
 /**
  * i2c_verify_client - return parameter as i2c_client, or NULL
@@ -220,13 +368,148 @@ EXPORT_SYMBOL_GPL(i2c_bus_type);
  */
 struct i2c_client *i2c_verify_client(struct device *dev)
 {
-        return (dev->bus == &i2c_bus_type)
+        return (dev->type == &i2c_client_type)
                         ? to_i2c_client(dev)
                         : NULL;
 }
 EXPORT_SYMBOL(i2c_verify_client);
 
 
+/* This is a permissive address validity check, I2C address map constraints
+ * are purposedly not enforced, except for the general call address. */
+static int i2c_check_client_addr_validity(const struct i2c_client *client)
+{
+        if (client->flags & I2C_CLIENT_TEN) {
+                /* 10-bit address, all values are valid */
+                if (client->addr > 0x3ff)
+                        return -EINVAL;
+        } else {
+                /* 7-bit address, reject the general call address */
+                if (client->addr == 0x00 || client->addr > 0x7f)
+                        return -EINVAL;
+        }
+        return 0;
+}
+
+/* And this is a strict address validity check, used when probing. If a
+ * device uses a reserved address, then it shouldn't be probed. 7-bit
+ * addressing is assumed, 10-bit address devices are rare and should be
+ * explicitly enumerated. */
+static int i2c_check_addr_validity(unsigned short addr)
+{
+        /*
+         * Reserved addresses per I2C specification:
+         *  0x00       General call address / START byte
+         *  0x01       CBUS address
+         *  0x02       Reserved for different bus format
+         *  0x03       Reserved for future purposes
+         *  0x04-0x07  Hs-mode master code
+         *  0x78-0x7b  10-bit slave addressing
+         *  0x7c-0x7f  Reserved for future purposes
+         */
+        if (addr < 0x08 || addr > 0x77)
+                return -EINVAL;
+        return 0;
+}
+
+static int __i2c_check_addr_busy(struct device *dev, void *addrp)
+{
+        struct i2c_client       *client = i2c_verify_client(dev);
+        int                     addr = *(int *)addrp;
+
+        if (client && client->addr == addr)
+                return -EBUSY;
+        return 0;
+}
+
+/* walk up mux tree */
+static int i2c_check_mux_parents(struct i2c_adapter *adapter, int addr)
+{
+        struct i2c_adapter *parent = i2c_parent_is_i2c_adapter(adapter);
+        int result;
+
+        result = device_for_each_child(&adapter->dev, &addr,
+                                        __i2c_check_addr_busy);
+
+        if (!result && parent)
+                result = i2c_check_mux_parents(parent, addr);
+
+        return result;
+}
+
+/* recurse down mux tree */
+static int i2c_check_mux_children(struct device *dev, void *addrp)
+{
+        int result;
+
+        if (dev->type == &i2c_adapter_type)
+                result = device_for_each_child(dev, addrp,
+                                                i2c_check_mux_children);
+        else
+                result = __i2c_check_addr_busy(dev, addrp);
+
+        return result;
+}
+
+static int i2c_check_addr_busy(struct i2c_adapter *adapter, int addr)
+{
+        struct i2c_adapter *parent = i2c_parent_is_i2c_adapter(adapter);
+        int result = 0;
+
+        if (parent)
+                result = i2c_check_mux_parents(parent, addr);
+
+        if (!result)
+                result = device_for_each_child(&adapter->dev, &addr,
+                                                i2c_check_mux_children);
+
+        return result;
+}
+
+/**
+ * i2c_lock_adapter - Get exclusive access to an I2C bus segment
+ * @adapter: Target I2C bus segment
+ */
+void i2c_lock_adapter(struct i2c_adapter *adapter)
+{
+        struct i2c_adapter *parent = i2c_parent_is_i2c_adapter(adapter);
+
+        if (parent)
+                i2c_lock_adapter(parent);
+        else
+                rt_mutex_lock(&adapter->bus_lock);
+}
+EXPORT_SYMBOL_GPL(i2c_lock_adapter);
+
+/**
+ * i2c_trylock_adapter - Try to get exclusive access to an I2C bus segment
+ * @adapter: Target I2C bus segment
+ */
+static int i2c_trylock_adapter(struct i2c_adapter *adapter)
+{
+        struct i2c_adapter *parent = i2c_parent_is_i2c_adapter(adapter);
+
+        if (parent)
+                return i2c_trylock_adapter(parent);
+        else
+                return rt_mutex_trylock(&adapter->bus_lock);
+}
+
+/**
+ * i2c_unlock_adapter - Release exclusive access to an I2C bus segment
+ * @adapter: Target I2C bus segment
+ */
+void i2c_unlock_adapter(struct i2c_adapter *adapter)
+{
+        struct i2c_adapter *parent = i2c_parent_is_i2c_adapter(adapter);
+
+        if (parent)
+                i2c_unlock_adapter(parent);
+        else
+                rt_mutex_unlock(&adapter->bus_lock);
+}
+EXPORT_SYMBOL_GPL(i2c_unlock_adapter);
+
 /**
  * i2c_new_device - instantiate an i2c device
  * @adap: the adapter managing the device
@@ -266,14 +549,25 @@ i2c_new_device(struct i2c_adapter *adap, struct i2c_board_info const *info)
 
         strlcpy(client->name, info->type, sizeof(client->name));
 
+        /* Check for address validity */
+        status = i2c_check_client_addr_validity(client);
+        if (status) {
+                dev_err(&adap->dev, "Invalid %d-bit I2C address 0x%02hx\n",
+                        client->flags & I2C_CLIENT_TEN ? 10 : 7, client->addr);
+                goto out_err_silent;
+        }
+
         /* Check for address business */
-        status = i2c_check_addr(adap, client->addr);
+        status = i2c_check_addr_busy(adap, client->addr);
         if (status)
                 goto out_err;
 
         client->dev.parent = &client->adapter->dev;
         client->dev.bus = &i2c_bus_type;
-        client->dev.release = i2c_client_dev_release;
+        client->dev.type = &i2c_client_type;
+#ifdef CONFIG_OF
+        client->dev.of_node = info->of_node;
+#endif
 
         dev_set_name(&client->dev, "%d-%04x", i2c_adapter_id(adap),
                      client->addr);
@@ -289,6 +583,7 @@ i2c_new_device(struct i2c_adapter *adap, struct i2c_board_info const *info)
 out_err:
         dev_err(&adap->dev, "Failed to register i2c client %s at 0x%02x "
                 "(%d)\n", client->name, client->addr, status);
+out_err_silent:
         kfree(client);
         return NULL;
 }
@@ -368,13 +663,6 @@ static void i2c_adapter_dev_release(struct device *dev)
         complete(&adap->dev_released);
 }
 
-static ssize_t
-show_adapter_name(struct device *dev, struct device_attribute *attr, char *buf)
-{
-        struct i2c_adapter *adap = to_i2c_adapter(dev);
-        return sprintf(buf, "%s\n", adap->name);
-}
-
 /*
  * Let users instantiate I2C devices through sysfs. This can be used when
  * platform initialization code doesn't contain the proper data for
@@ -395,8 +683,6 @@ i2c_sysfs_new_device(struct device *dev, struct device_attribute *attr,
         char *blank, end;
         int res;
 
-        dev_warn(dev, "The new_device interface is still experimental "
-                 "and may change in a near future\n");
         memset(&info, 0, sizeof(struct i2c_board_info));
 
         blank = strchr(buf, ' ');
@@ -421,20 +707,14 @@ i2c_sysfs_new_device(struct device *dev, struct device_attribute *attr,
                 return -EINVAL;
         }
 
-        if (info.addr < 0x03 || info.addr > 0x77) {
-                dev_err(dev, "%s: Invalid I2C address 0x%hx\n", "new_device",
-                        info.addr);
-                return -EINVAL;
-        }
-
         client = i2c_new_device(adap, &info);
         if (!client)
-                return -EEXIST;
+                return -EINVAL;
 
         /* Keep track of the added device */
-        mutex_lock(&core_lock);
-        list_add_tail(&client->detected, &userspace_devices);
-        mutex_unlock(&core_lock);
+        mutex_lock(&adap->userspace_clients_lock);
+        list_add_tail(&client->detected, &adap->userspace_clients);
+        mutex_unlock(&adap->userspace_clients_lock);
         dev_info(dev, "%s: Instantiated device %s at 0x%02hx\n", "new_device",
                  info.type, info.addr);
 
@@ -473,9 +753,10 @@ i2c_sysfs_delete_device(struct device *dev, struct device_attribute *attr,
 
         /* Make sure the device was added through sysfs */
         res = -ENOENT;
-        mutex_lock(&core_lock);
-        list_for_each_entry_safe(client, next, &userspace_devices, detected) {
-                if (client->addr == addr && client->adapter == adap) {
+        mutex_lock(&adap->userspace_clients_lock);
+        list_for_each_entry_safe(client, next, &adap->userspace_clients,
+                                 detected) {
+                if (client->addr == addr) {
                         dev_info(dev, "%s: Deleting device %s at 0x%02hx\n",
                                  "delete_device", client->name, client->addr);
 
@@ -485,7 +766,7 @@ i2c_sysfs_delete_device(struct device *dev, struct device_attribute *attr,
                         break;
                 }
         }
-        mutex_unlock(&core_lock);
+        mutex_unlock(&adap->userspace_clients_lock);
 
         if (res < 0)
                 dev_err(dev, "%s: Can't find device in list\n",
@@ -493,19 +774,35 @@ i2c_sysfs_delete_device(struct device *dev, struct device_attribute *attr,
         return res;
 }
 
-static struct device_attribute i2c_adapter_attrs[] = {
-        __ATTR(name, S_IRUGO, show_adapter_name, NULL),
-        __ATTR(new_device, S_IWUSR, NULL, i2c_sysfs_new_device),
-        __ATTR(delete_device, S_IWUSR, NULL, i2c_sysfs_delete_device),
-        { },
+static DEVICE_ATTR(new_device, S_IWUSR, NULL, i2c_sysfs_new_device);
+static DEVICE_ATTR(delete_device, S_IWUSR, NULL, i2c_sysfs_delete_device);
+
+static struct attribute *i2c_adapter_attrs[] = {
+        &dev_attr_name.attr,
+        &dev_attr_new_device.attr,
+        &dev_attr_delete_device.attr,
+        NULL
 };
 
-static struct class i2c_adapter_class = {
-        .owner                  = THIS_MODULE,
-        .name                   = "i2c-adapter",
-        .dev_attrs              = i2c_adapter_attrs,
+static struct attribute_group i2c_adapter_attr_group = {
+        .attrs          = i2c_adapter_attrs,
 };
 
+static const struct attribute_group *i2c_adapter_attr_groups[] = {
+        &i2c_adapter_attr_group,
+        NULL
+};
+
+struct device_type i2c_adapter_type = {
+        .groups         = i2c_adapter_attr_groups,
+        .release        = i2c_adapter_dev_release,
+};
+EXPORT_SYMBOL_GPL(i2c_adapter_type);
+
+#ifdef CONFIG_I2C_COMPAT
+static struct class_compat *i2c_adapter_compat_class;
+#endif
+
 static void i2c_scan_static_board_info(struct i2c_adapter *adapter)
 {
         struct i2c_devinfo      *devinfo;
@@ -522,11 +819,9 @@ static void i2c_scan_static_board_info(struct i2c_adapter *adapter)
         up_read(&__i2c_board_lock);
 }
 
-static int i2c_do_add_adapter(struct device_driver *d, void *data)
+static int i2c_do_add_adapter(struct i2c_driver *driver,
+                              struct i2c_adapter *adap)
 {
-        struct i2c_driver *driver = to_i2c_driver(d);
-        struct i2c_adapter *adap = data;
-
         /* Detect supported devices on that bus, and instantiate them */
         i2c_detect(adap, driver);
 
@@ -538,9 +833,14 @@ static int i2c_do_add_adapter(struct device_driver *d, void *data)
         return 0;
 }
 
+static int __process_new_adapter(struct device_driver *d, void *data)
+{
+        return i2c_do_add_adapter(to_i2c_driver(d), data);
+}
+
 static int i2c_register_adapter(struct i2c_adapter *adap)
 {
-        int res = 0, dummy;
+        int res = 0;
 
         /* Can't register until after driver model init */
         if (unlikely(WARN_ON(!i2c_bus_type.p))) {
@@ -548,29 +848,50 @@ static int i2c_register_adapter(struct i2c_adapter *adap)
                 goto out_list;
         }
 
-        mutex_init(&adap->bus_lock);
+        /* Sanity checks */
+        if (unlikely(adap->name[0] == '\0')) {
+                pr_err("i2c-core: Attempt to register an adapter with "
+                       "no name!\n");
+                return -EINVAL;
+        }
+        if (unlikely(!adap->algo)) {
+                pr_err("i2c-core: Attempt to register adapter '%s' with "
+                       "no algo!\n", adap->name);
+                return -EINVAL;
+        }
+
+        rt_mutex_init(&adap->bus_lock);
+        mutex_init(&adap->userspace_clients_lock);
+        INIT_LIST_HEAD(&adap->userspace_clients);
 
         /* Set default timeout to 1 second if not already set */
         if (adap->timeout == 0)
                 adap->timeout = HZ;
 
         dev_set_name(&adap->dev, "i2c-%d", adap->nr);
-        adap->dev.release = &i2c_adapter_dev_release;
-        adap->dev.class = &i2c_adapter_class;
+        adap->dev.bus = &i2c_bus_type;
+        adap->dev.type = &i2c_adapter_type;
         res = device_register(&adap->dev);
         if (res)
                 goto out_list;
 
         dev_dbg(&adap->dev, "adapter [%s] registered\n", adap->name);
 
+#ifdef CONFIG_I2C_COMPAT
+        res = class_compat_create_link(i2c_adapter_compat_class, &adap->dev,
+                                       adap->dev.parent);
+        if (res)
+                dev_warn(&adap->dev,
+                         "Failed to create compatibility class link\n");
+#endif
+
         /* create pre-declared device nodes */
         if (adap->nr < __i2c_first_dynamic_bus_num)
                 i2c_scan_static_board_info(adap);
 
         /* Notify drivers */
         mutex_lock(&core_lock);
-        dummy = bus_for_each_drv(&i2c_bus_type, NULL, adap,
-                                 i2c_do_add_adapter);
+        bus_for_each_drv(&i2c_bus_type, NULL, adap, __process_new_adapter);
         mutex_unlock(&core_lock);
 
         return 0;
@@ -671,10 +992,9 @@ retry:
 }
 EXPORT_SYMBOL_GPL(i2c_add_numbered_adapter);
 
-static int i2c_do_del_adapter(struct device_driver *d, void *data)
+static int i2c_do_del_adapter(struct i2c_driver *driver,
+                              struct i2c_adapter *adapter)
 {
-        struct i2c_driver *driver = to_i2c_driver(d);
-        struct i2c_adapter *adapter = data;
         struct i2c_client *client, *_n;
         int res;
 
@@ -706,6 +1026,11 @@ static int __unregister_client(struct device *dev, void *dummy)
         return 0;
 }
 
+static int __process_removed_adapter(struct device_driver *d, void *data)
+{
+        return i2c_do_del_adapter(to_i2c_driver(d), data);
+}
+
 /**
  * i2c_del_adapter - unregister I2C adapter
  * @adap: the adapter being unregistered
@@ -718,6 +1043,7 @@ int i2c_del_adapter(struct i2c_adapter *adap)
 {
         int res = 0;
         struct i2c_adapter *found;
+        struct i2c_client *client, *next;
 
         /* First make sure that this adapter was ever added */
         mutex_lock(&core_lock);
@@ -732,15 +1058,34 @@ int i2c_del_adapter(struct i2c_adapter *adap)
         /* Tell drivers about this removal */
         mutex_lock(&core_lock);
         res = bus_for_each_drv(&i2c_bus_type, NULL, adap,
-                               i2c_do_del_adapter);
+                               __process_removed_adapter);
         mutex_unlock(&core_lock);
         if (res)
                 return res;
 
+        /* Remove devices instantiated from sysfs */
+        mutex_lock(&adap->userspace_clients_lock);
+        list_for_each_entry_safe(client, next, &adap->userspace_clients,
+                                 detected) {
+                dev_dbg(&adap->dev, "Removing %s at 0x%x\n", client->name,
+                        client->addr);
+                list_del(&client->detected);
+                i2c_unregister_device(client);
+        }
+        mutex_unlock(&adap->userspace_clients_lock);
+
         /* Detach any active clients. This can't fail, thus we do not
            checking the returned value. */
         res = device_for_each_child(&adap->dev, NULL, __unregister_client);
 
+#ifdef CONFIG_I2C_COMPAT
+        class_compat_remove_link(i2c_adapter_compat_class, &adap->dev,
+                                 adap->dev.parent);
+#endif
+
+        /* device name is gone after device_unregister */
+        dev_dbg(&adap->dev, "adapter [%s] unregistered\n", adap->name);
+
         /* clean up the sysfs representation */
         init_completion(&adap->dev_released);
         device_unregister(&adap->dev);
@@ -753,8 +1098,6 @@ int i2c_del_adapter(struct i2c_adapter *adap)
         idr_remove(&i2c_adapter_idr, adap->nr);
         mutex_unlock(&core_lock);
 
-        dev_dbg(&adap->dev, "adapter [%s] unregistered\n", adap->name);
-
         /* Clear the device structure in case this adapter is ever going to be
            added again */
         memset(&adap->dev, 0, sizeof(adap->dev));
@@ -766,18 +1109,11 @@ EXPORT_SYMBOL(i2c_del_adapter);
 
 /* ------------------------------------------------------------------------- */
 
-static int __attach_adapter(struct device *dev, void *data)
+static int __process_new_driver(struct device *dev, void *data)
 {
-        struct i2c_adapter *adapter = to_i2c_adapter(dev);
-        struct i2c_driver *driver = data;
-
-        i2c_detect(adapter, driver);
-
-        /* Legacy drivers scan i2c busses directly */
-        if (driver->attach_adapter)
-                driver->attach_adapter(adapter);
-
-        return 0;
+        if (dev->type != &i2c_adapter_type)
+                return 0;
+        return i2c_do_add_adapter(data, to_i2c_adapter(dev));
 }
 
 /*
@@ -809,37 +1145,18 @@ int i2c_register_driver(struct module *owner, struct i2c_driver *driver)
         INIT_LIST_HEAD(&driver->clients);
         /* Walk the adapters that are already present */
         mutex_lock(&core_lock);
-        class_for_each_device(&i2c_adapter_class, NULL, driver,
-                              __attach_adapter);
+        bus_for_each_dev(&i2c_bus_type, NULL, driver, __process_new_driver);
         mutex_unlock(&core_lock);
 
         return 0;
 }
 EXPORT_SYMBOL(i2c_register_driver);
 
-static int __detach_adapter(struct device *dev, void *data)
+static int __process_removed_driver(struct device *dev, void *data)
 {
-        struct i2c_adapter *adapter = to_i2c_adapter(dev);
-        struct i2c_driver *driver = data;
-        struct i2c_client *client, *_n;
-
-        /* Remove the devices we created ourselves as the result of hardware
-         * probing (using a driver's detect method) */
-        list_for_each_entry_safe(client, _n, &driver->clients, detected) {
-                dev_dbg(&adapter->dev, "Removing %s at 0x%x\n",
-                        client->name, client->addr);
-                list_del(&client->detected);
-                i2c_unregister_device(client);
-        }
-
-        if (driver->detach_adapter) {
-                if (driver->detach_adapter(adapter))
-                        dev_err(&adapter->dev,
-                                "detach_adapter failed for driver [%s]\n",
-                                driver->driver.name);
-        }
-
-        return 0;
+        if (dev->type != &i2c_adapter_type)
+                return 0;
+        return i2c_do_del_adapter(data, to_i2c_adapter(dev));
 }
 
 /**
@@ -850,8 +1167,7 @@ static int __detach_adapter(struct device *dev, void *data)
 void i2c_del_driver(struct i2c_driver *driver)
 {
         mutex_lock(&core_lock);
-        class_for_each_device(&i2c_adapter_class, NULL, driver,
-                              __detach_adapter);
+        bus_for_each_dev(&i2c_bus_type, NULL, driver, __process_removed_driver);
         mutex_unlock(&core_lock);
 
         driver_unregister(&driver->driver);
@@ -861,21 +1177,6 @@ EXPORT_SYMBOL(i2c_del_driver);
 
 /* ------------------------------------------------------------------------- */
 
-static int __i2c_check_addr(struct device *dev, void *addrp)
-{
-        struct i2c_client       *client = i2c_verify_client(dev);
-        int                     addr = *(int *)addrp;
-
-        if (client && client->addr == addr)
-                return -EBUSY;
-        return 0;
-}
-
-static int i2c_check_addr(struct i2c_adapter *adapter, int addr)
-{
-        return device_for_each_child(&adapter->dev, &addr, __i2c_check_addr);
-}
-
 /**
  * i2c_use_client - increments the reference count of the i2c client structure
  * @client: the client being referenced
@@ -940,17 +1241,23 @@ static int __init i2c_init(void)
         retval = bus_register(&i2c_bus_type);
         if (retval)
                 return retval;
-        retval = class_register(&i2c_adapter_class);
-        if (retval)
+#ifdef CONFIG_I2C_COMPAT
+        i2c_adapter_compat_class = class_compat_register("i2c-adapter");
+        if (!i2c_adapter_compat_class) {
+                retval = -ENOMEM;
                 goto bus_err;
+        }
+#endif
         retval = i2c_add_driver(&dummy_driver);
         if (retval)
                 goto class_err;
         return 0;
 
 class_err:
-        class_unregister(&i2c_adapter_class);
+#ifdef CONFIG_I2C_COMPAT
+        class_compat_unregister(i2c_adapter_compat_class);
 bus_err:
+#endif
         bus_unregister(&i2c_bus_type);
         return retval;
 }
@@ -958,7 +1265,9 @@ bus_err:
 static void __exit i2c_exit(void)
 {
         i2c_del_driver(&dummy_driver);
-        class_unregister(&i2c_adapter_class);
+#ifdef CONFIG_I2C_COMPAT
+        class_compat_unregister(i2c_adapter_compat_class);
+#endif
         bus_unregister(&i2c_bus_type);
 }
 
@@ -1018,12 +1327,12 @@ int i2c_transfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
 #endif
 
                 if (in_atomic() || irqs_disabled()) {
-                        ret = mutex_trylock(&adap->bus_lock);
+                        ret = i2c_trylock_adapter(adap);
                         if (!ret)
                                 /* I2C activity is ongoing. */
                                 return -EAGAIN;
                 } else {
-                        mutex_lock_nested(&adap->bus_lock, adap->level);
+                        i2c_lock_adapter(adap);
                 }
 
                 /* Retry automatically on arbitration loss */
@@ -1035,7 +1344,7 @@ int i2c_transfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
                         if (time_after(jiffies, orig_jiffies + adap->timeout))
                                 break;
                 }
-                mutex_unlock(&adap->bus_lock);
+                i2c_unlock_adapter(adap);
 
                 return ret;
         } else {
@@ -1049,14 +1358,14 @@ EXPORT_SYMBOL(i2c_transfer);
  * i2c_master_send - issue a single I2C message in master transmit mode
  * @client: Handle to slave device
  * @buf: Data that will be written to the slave
- * @count: How many bytes to write
+ * @count: How many bytes to write, must be less than 64k since msg.len is u16
  *
  * Returns negative errno, or else the number of bytes written.
  */
-int i2c_master_send(struct i2c_client *client,const char *buf ,int count)
+int i2c_master_send(const struct i2c_client *client, const char *buf, int count)
 {
         int ret;
-        struct i2c_adapter *adap=client->adapter;
+        struct i2c_adapter *adap = client->adapter;
         struct i2c_msg msg;
 
         msg.addr = client->addr;
@@ -1076,13 +1385,13 @@ EXPORT_SYMBOL(i2c_master_send);
  * i2c_master_recv - issue a single I2C message in master receive mode
  * @client: Handle to slave device
  * @buf: Where to store data read from slave
- * @count: How many bytes to read
+ * @count: How many bytes to read, must be less than 64k since msg.len is u16
  *
  * Returns negative errno, or else the number of bytes read.
  */
-int i2c_master_recv(struct i2c_client *client, char *buf ,int count)
+int i2c_master_recv(const struct i2c_client *client, char *buf, int count)
 {
-        struct i2c_adapter *adap=client->adapter;
+        struct i2c_adapter *adap = client->adapter;
         struct i2c_msg msg;
         int ret;
 
@@ -1106,7 +1415,46 @@ EXPORT_SYMBOL(i2c_master_recv);
  * ----------------------------------------------------
  */
 
-static int i2c_detect_address(struct i2c_client *temp_client, int kind,
+/*
+ * Legacy default probe function, mostly relevant for SMBus. The default
+ * probe method is a quick write, but it is known to corrupt the 24RF08
+ * EEPROMs due to a state machine bug, and could also irreversibly
+ * write-protect some EEPROMs, so for address ranges 0x30-0x37 and 0x50-0x5f,
+ * we use a short byte read instead. Also, some bus drivers don't implement
+ * quick write, so we fallback to a byte read in that case too.
+ * On x86, there is another special case for FSC hardware monitoring chips,
+ * which want regular byte reads (address 0x73.) Fortunately, these are the
+ * only known chips using this I2C address on PC hardware.
+ * Returns 1 if probe succeeded, 0 if not.
+ */
+static int i2c_default_probe(struct i2c_adapter *adap, unsigned short addr)
+{
+        int err;
+        union i2c_smbus_data dummy;
+
+#ifdef CONFIG_X86
+        if (addr == 0x73 && (adap->class & I2C_CLASS_HWMON)
+         && i2c_check_functionality(adap, I2C_FUNC_SMBUS_READ_BYTE_DATA))
+                err = i2c_smbus_xfer(adap, addr, 0, I2C_SMBUS_READ, 0,
+                                     I2C_SMBUS_BYTE_DATA, &dummy);
+        else
+#endif
+        if (!((addr & ~0x07) == 0x30 || (addr & ~0x0f) == 0x50)
+         && i2c_check_functionality(adap, I2C_FUNC_SMBUS_QUICK))
+                err = i2c_smbus_xfer(adap, addr, 0, I2C_SMBUS_WRITE, 0,
+                                     I2C_SMBUS_QUICK, NULL);
+        else if (i2c_check_functionality(adap, I2C_FUNC_SMBUS_READ_BYTE))
+                err = i2c_smbus_xfer(adap, addr, 0, I2C_SMBUS_READ, 0,
+                                     I2C_SMBUS_BYTE, &dummy);
+        else {
+                dev_warn(&adap->dev, "No suitable probing method supported\n");
+                err = -EOPNOTSUPP;
+        }
+
+        return err >= 0;
+}
+
+static int i2c_detect_address(struct i2c_client *temp_client,
                               struct i2c_driver *driver)
 {
         struct i2c_board_info info;
@@ -1115,32 +1463,25 @@ static int i2c_detect_address(struct i2c_client *temp_client, int kind,
         int err;
 
         /* Make sure the address is valid */
-        if (addr < 0x03 || addr > 0x77) {
+        err = i2c_check_addr_validity(addr);
+        if (err) {
                 dev_warn(&adapter->dev, "Invalid probe address 0x%02x\n",
                          addr);
-                return -EINVAL;
+                return err;
         }
 
         /* Skip if already in use */
-        if (i2c_check_addr(adapter, addr))
+        if (i2c_check_addr_busy(adapter, addr))
                 return 0;
 
-        /* Make sure there is something at this address, unless forced */
-        if (kind < 0) {
-                if (i2c_smbus_xfer(adapter, addr, 0, 0, 0,
-                                   I2C_SMBUS_QUICK, NULL) < 0)
-                        return 0;
-
-                /* prevent 24RF08 corruption */
-                if ((addr & ~0x0f) == 0x50)
-                        i2c_smbus_xfer(adapter, addr, 0, 0, 0,
-                                       I2C_SMBUS_QUICK, NULL);
-        }
+        /* Make sure there is something at this address */
+        if (!i2c_default_probe(adapter, addr))
+                return 0;
 
         /* Finally call the custom detection function */
         memset(&info, 0, sizeof(struct i2c_board_info));
         info.addr = addr;
-        err = driver->detect(temp_client, kind, &info);
+        err = driver->detect(temp_client, &info);
         if (err) {
                 /* -ENODEV is returned if the detection fails. We catch it
                    here as this isn't an error. */
@@ -1170,13 +1511,17 @@ static int i2c_detect_address(struct i2c_client *temp_client, int kind,
 
 static int i2c_detect(struct i2c_adapter *adapter, struct i2c_driver *driver)
 {
-        const struct i2c_client_address_data *address_data;
+        const unsigned short *address_list;
         struct i2c_client *temp_client;
         int i, err = 0;
         int adap_id = i2c_adapter_id(adapter);
 
-        address_data = driver->address_data;
-        if (!driver->detect || !address_data)
+        address_list = driver->address_list;
+        if (!driver->detect || !address_list)
+                return 0;
+
+        /* Stop here if the classes do not match */
+        if (!(adapter->class & driver->class))
                 return 0;
 
         /* Set up a temporary client to help detect callback */
@@ -1185,150 +1530,55 @@ static int i2c_detect(struct i2c_adapter *adapter, struct i2c_driver *driver)
                 return -ENOMEM;
         temp_client->adapter = adapter;
 
-        /* Force entries are done first, and are not affected by ignore
-           entries */
-        if (address_data->forces) {
-                const unsigned short * const *forces = address_data->forces;
-                int kind;
-
-                for (kind = 0; forces[kind]; kind++) {
-                        for (i = 0; forces[kind][i] != I2C_CLIENT_END;
-                             i += 2) {
-                                if (forces[kind][i] == adap_id
-                                 || forces[kind][i] == ANY_I2C_BUS) {
-                                        dev_dbg(&adapter->dev, "found force "
-                                                "parameter for adapter %d, "
-                                                "addr 0x%02x, kind %d\n",
-                                                adap_id, forces[kind][i + 1],
-                                                kind);
-                                        temp_client->addr = forces[kind][i + 1];
-                                        err = i2c_detect_address(temp_client,
-                                                kind, driver);
-                                        if (err)
-                                                goto exit_free;
-                                }
-                        }
-                }
-        }
-
-        /* Stop here if the classes do not match */
-        if (!(adapter->class & driver->class))
-                goto exit_free;
-
-        /* Stop here if we can't use SMBUS_QUICK */
-        if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_QUICK)) {
-                if (address_data->probe[0] == I2C_CLIENT_END
-                 && address_data->normal_i2c[0] == I2C_CLIENT_END)
-                        goto exit_free;
-
-                dev_warn(&adapter->dev, "SMBus Quick command not supported, "
-                         "can't probe for chips\n");
-                err = -EOPNOTSUPP;
-                goto exit_free;
-        }
-
-        /* Probe entries are done second, and are not affected by ignore
-           entries either */
-        for (i = 0; address_data->probe[i] != I2C_CLIENT_END; i += 2) {
-                if (address_data->probe[i] == adap_id
-                 || address_data->probe[i] == ANY_I2C_BUS) {
-                        dev_dbg(&adapter->dev, "found probe parameter for "
-                                "adapter %d, addr 0x%02x\n", adap_id,
-                                address_data->probe[i + 1]);
-                        temp_client->addr = address_data->probe[i + 1];
-                        err = i2c_detect_address(temp_client, -1, driver);
-                        if (err)
-                                goto exit_free;
-                }
-        }
-
-        /* Normal entries are done last, unless shadowed by an ignore entry */
-        for (i = 0; address_data->normal_i2c[i] != I2C_CLIENT_END; i += 1) {
-                int j, ignore;
-
-                ignore = 0;
-                for (j = 0; address_data->ignore[j] != I2C_CLIENT_END;
-                     j += 2) {
-                        if ((address_data->ignore[j] == adap_id ||
-                             address_data->ignore[j] == ANY_I2C_BUS)
-                         && address_data->ignore[j + 1]
-                            == address_data->normal_i2c[i]) {
-                                dev_dbg(&adapter->dev, "found ignore "
-                                        "parameter for adapter %d, "
-                                        "addr 0x%02x\n", adap_id,
-                                        address_data->ignore[j + 1]);
-                                ignore = 1;
-                                break;
-                        }
-                }
-                if (ignore)
-                        continue;
-
+        for (i = 0; address_list[i] != I2C_CLIENT_END; i += 1) {
                 dev_dbg(&adapter->dev, "found normal entry for adapter %d, "
-                        "addr 0x%02x\n", adap_id,
-                        address_data->normal_i2c[i]);
-                temp_client->addr = address_data->normal_i2c[i];
-                err = i2c_detect_address(temp_client, -1, driver);
-                if (err)
-                        goto exit_free;
+                        "addr 0x%02x\n", adap_id, address_list[i]);
+                temp_client->addr = address_list[i];
+                err = i2c_detect_address(temp_client, driver);
+                if (unlikely(err))
+                        break;
         }
 
- exit_free:
         kfree(temp_client);
         return err;
 }
 
+int i2c_probe_func_quick_read(struct i2c_adapter *adap, unsigned short addr)
+{
+        return i2c_smbus_xfer(adap, addr, 0, I2C_SMBUS_READ, 0,
+                              I2C_SMBUS_QUICK, NULL) >= 0;
+}
+EXPORT_SYMBOL_GPL(i2c_probe_func_quick_read);
+
 struct i2c_client *
 i2c_new_probed_device(struct i2c_adapter *adap,
                       struct i2c_board_info *info,
-                      unsigned short const *addr_list)
+                      unsigned short const *addr_list,
+                      int (*probe)(struct i2c_adapter *, unsigned short addr))
 {
         int i;
 
-        /* Stop here if the bus doesn't support probing */
-        if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_READ_BYTE)) {
-                dev_err(&adap->dev, "Probing not supported\n");
-                return NULL;
-        }
+        if (!probe)
+                probe = i2c_default_probe;
 
         for (i = 0; addr_list[i] != I2C_CLIENT_END; i++) {
                 /* Check address validity */
-                if (addr_list[i] < 0x03 || addr_list[i] > 0x77) {
+                if (i2c_check_addr_validity(addr_list[i]) < 0) {
                         dev_warn(&adap->dev, "Invalid 7-bit address "
                                  "0x%02x\n", addr_list[i]);
                         continue;
                 }
 
                 /* Check address availability */
-                if (i2c_check_addr(adap, addr_list[i])) {
+                if (i2c_check_addr_busy(adap, addr_list[i])) {
                         dev_dbg(&adap->dev, "Address 0x%02x already in "
                                 "use, not probing\n", addr_list[i]);
                         continue;
                 }
 
-                /* Test address responsiveness
-                   The default probe method is a quick write, but it is known
-                   to corrupt the 24RF08 EEPROMs due to a state machine bug,
-                   and could also irreversibly write-protect some EEPROMs, so
-                   for address ranges 0x30-0x37 and 0x50-0x5f, we use a byte
-                   read instead. Also, some bus drivers don't implement
-                   quick write, so we fallback to a byte read it that case
-                   too. */
-                if ((addr_list[i] & ~0x07) == 0x30
-                 || (addr_list[i] & ~0x0f) == 0x50
-                 || !i2c_check_functionality(adap, I2C_FUNC_SMBUS_QUICK)) {
-                        union i2c_smbus_data data;
-
-                        if (i2c_smbus_xfer(adap, addr_list[i], 0,
-                                           I2C_SMBUS_READ, 0,
-                                           I2C_SMBUS_BYTE, &data) >= 0)
-                                break;
-                } else {
-                        if (i2c_smbus_xfer(adap, addr_list[i], 0,
-                                           I2C_SMBUS_WRITE, 0,
-                                           I2C_SMBUS_QUICK, NULL) >= 0)
-                                break;
-                }
+                /* Test address responsiveness */
+                if (probe(adap, addr_list[i]))
+                        break;
         }
 
         if (addr_list[i] == I2C_CLIENT_END) {
@@ -1341,7 +1591,7 @@ i2c_new_probed_device(struct i2c_adapter *adap,
 }
 EXPORT_SYMBOL_GPL(i2c_new_probed_device);
 
-struct i2c_adapter* i2c_get_adapter(int id)
+struct i2c_adapter *i2c_get_adapter(int id)
 {
         struct i2c_adapter *adapter;
 
@@ -1368,7 +1618,7 @@ static u8 crc8(u16 data)
 {
         int i;
 
-        for(i = 0; i < 8; i++) {
+        for (i = 0; i < 8; i++) {
                 if (data & 0x8000)
                         data = data ^ POLY;
                 data = data << 1;
@@ -1381,7 +1631,7 @@ static u8 i2c_smbus_pec(u8 crc, u8 *p, size_t count)
 {
         int i;
 
-        for(i = 0; i < count; i++)
+        for (i = 0; i < count; i++)
                 crc = crc8((crc ^ p[i]) << 8);
         return crc;
 }
@@ -1429,7 +1679,7 @@ static int i2c_smbus_check_pec(u8 cpec, struct i2c_msg *msg)
  * This executes the SMBus "receive byte" protocol, returning negative errno
  * else the byte received from the device.
  */
-s32 i2c_smbus_read_byte(struct i2c_client *client)
+s32 i2c_smbus_read_byte(const struct i2c_client *client)
 {
         union i2c_smbus_data data;
         int status;
@@ -1449,9 +1699,9 @@ EXPORT_SYMBOL(i2c_smbus_read_byte);
  * This executes the SMBus "send byte" protocol, returning negative errno
  * else zero on success.
  */
-s32 i2c_smbus_write_byte(struct i2c_client *client, u8 value)
+s32 i2c_smbus_write_byte(const struct i2c_client *client, u8 value)
 {
-        return i2c_smbus_xfer(client->adapter,client->addr,client->flags,
+        return i2c_smbus_xfer(client->adapter, client->addr, client->flags,
                               I2C_SMBUS_WRITE, value, I2C_SMBUS_BYTE, NULL);
 }
 EXPORT_SYMBOL(i2c_smbus_write_byte);
@@ -1464,7 +1714,7 @@ EXPORT_SYMBOL(i2c_smbus_write_byte);
  * This executes the SMBus "read byte" protocol, returning negative errno
  * else a data byte received from the device.
  */
-s32 i2c_smbus_read_byte_data(struct i2c_client *client, u8 command)
+s32 i2c_smbus_read_byte_data(const struct i2c_client *client, u8 command)
 {
         union i2c_smbus_data data;
         int status;
@@ -1485,13 +1735,14 @@ EXPORT_SYMBOL(i2c_smbus_read_byte_data);
  * This executes the SMBus "write byte" protocol, returning negative errno
  * else zero on success.
  */
-s32 i2c_smbus_write_byte_data(struct i2c_client *client, u8 command, u8 value)
+s32 i2c_smbus_write_byte_data(const struct i2c_client *client, u8 command,
+                              u8 value)
 {
         union i2c_smbus_data data;
         data.byte = value;
-        return i2c_smbus_xfer(client->adapter,client->addr,client->flags,
-                              I2C_SMBUS_WRITE,command,
-                              I2C_SMBUS_BYTE_DATA,&data);
+        return i2c_smbus_xfer(client->adapter, client->addr, client->flags,
+                              I2C_SMBUS_WRITE, command,
+                              I2C_SMBUS_BYTE_DATA, &data);
 }
 EXPORT_SYMBOL(i2c_smbus_write_byte_data);
 
@@ -1503,7 +1754,7 @@ EXPORT_SYMBOL(i2c_smbus_write_byte_data);
  * This executes the SMBus "read word" protocol, returning negative errno
  * else a 16-bit unsigned "word" received from the device.
  */
-s32 i2c_smbus_read_word_data(struct i2c_client *client, u8 command)
+s32 i2c_smbus_read_word_data(const struct i2c_client *client, u8 command)
 {
         union i2c_smbus_data data;
         int status;
@@ -1524,13 +1775,14 @@ EXPORT_SYMBOL(i2c_smbus_read_word_data);
  * This executes the SMBus "write word" protocol, returning negative errno
  * else zero on success.
  */
-s32 i2c_smbus_write_word_data(struct i2c_client *client, u8 command, u16 value)
+s32 i2c_smbus_write_word_data(const struct i2c_client *client, u8 command,
+                              u16 value)
 {
         union i2c_smbus_data data;
         data.word = value;
-        return i2c_smbus_xfer(client->adapter,client->addr,client->flags,
-                              I2C_SMBUS_WRITE,command,
-                              I2C_SMBUS_WORD_DATA,&data);
+        return i2c_smbus_xfer(client->adapter, client->addr, client->flags,
+                              I2C_SMBUS_WRITE, command,
+                              I2C_SMBUS_WORD_DATA, &data);
 }
 EXPORT_SYMBOL(i2c_smbus_write_word_data);
 
@@ -1543,7 +1795,8 @@ EXPORT_SYMBOL(i2c_smbus_write_word_data);
  * This executes the SMBus "process call" protocol, returning negative errno
  * else a 16-bit unsigned "word" received from the device.
  */
-s32 i2c_smbus_process_call(struct i2c_client *client, u8 command, u16 value)
+s32 i2c_smbus_process_call(const struct i2c_client *client, u8 command,
+                           u16 value)
 {
         union i2c_smbus_data data;
         int status;
@@ -1571,7 +1824,7 @@ EXPORT_SYMBOL(i2c_smbus_process_call);
  * support this; its emulation through I2C messaging relies on a specific
  * mechanism (I2C_M_RECV_LEN) which may not be implemented.
  */
-s32 i2c_smbus_read_block_data(struct i2c_client *client, u8 command,
+s32 i2c_smbus_read_block_data(const struct i2c_client *client, u8 command,
                               u8 *values)
 {
         union i2c_smbus_data data;
@@ -1598,7 +1851,7 @@ EXPORT_SYMBOL(i2c_smbus_read_block_data);
  * This executes the SMBus "block write" protocol, returning negative errno
  * else zero on success.
  */
-s32 i2c_smbus_write_block_data(struct i2c_client *client, u8 command,
+s32 i2c_smbus_write_block_data(const struct i2c_client *client, u8 command,
                                u8 length, const u8 *values)
 {
         union i2c_smbus_data data;
@@ -1607,14 +1860,14 @@ s32 i2c_smbus_write_block_data(struct i2c_client *client, u8 command,
                 length = I2C_SMBUS_BLOCK_MAX;
         data.block[0] = length;
         memcpy(&data.block[1], values, length);
-        return i2c_smbus_xfer(client->adapter,client->addr,client->flags,
-                              I2C_SMBUS_WRITE,command,
-                              I2C_SMBUS_BLOCK_DATA,&data);
+        return i2c_smbus_xfer(client->adapter, client->addr, client->flags,
+                              I2C_SMBUS_WRITE, command,
+                              I2C_SMBUS_BLOCK_DATA, &data);
 }
 EXPORT_SYMBOL(i2c_smbus_write_block_data);
 
 /* Returns the number of read bytes */
-s32 i2c_smbus_read_i2c_block_data(struct i2c_client *client, u8 command,
+s32 i2c_smbus_read_i2c_block_data(const struct i2c_client *client, u8 command,
                                   u8 length, u8 *values)
 {
         union i2c_smbus_data data;
@@ -1634,7 +1887,7 @@ s32 i2c_smbus_read_i2c_block_data(struct i2c_client *client, u8 command,
 }
 EXPORT_SYMBOL(i2c_smbus_read_i2c_block_data);
 
-s32 i2c_smbus_write_i2c_block_data(struct i2c_client *client, u8 command,
+s32 i2c_smbus_write_i2c_block_data(const struct i2c_client *client, u8 command,
                                    u8 length, const u8 *values)
 {
         union i2c_smbus_data data;
@@ -1651,10 +1904,10 @@ EXPORT_SYMBOL(i2c_smbus_write_i2c_block_data);
 
 /* Simulate a SMBus command using the i2c protocol
    No checking of parameters is done!  */
-static s32 i2c_smbus_xfer_emulated(struct i2c_adapter * adapter, u16 addr,
-                                   unsigned short flags,
-                                   char read_write, u8 command, int size,
-                                   union i2c_smbus_data * data)
+static s32 i2c_smbus_xfer_emulated(struct i2c_adapter *adapter, u16 addr,
+                                   unsigned short flags,
+                                   char read_write, u8 command, int size,
+                                   union i2c_smbus_data *data)
 {
         /* So we need to generate a series of msgs. In the case of writing, we
           need to use only one message; when reading, we need two. We initialize
@@ -1662,7 +1915,7 @@ static s32 i2c_smbus_xfer_emulated(struct i2c_adapter * adapter, u16 addr,
           simpler. */
         unsigned char msgbuf0[I2C_SMBUS_BLOCK_MAX+3];
         unsigned char msgbuf1[I2C_SMBUS_BLOCK_MAX+2];
-        int num = read_write == I2C_SMBUS_READ?2:1;
+        int num = read_write == I2C_SMBUS_READ ? 2 : 1;
         struct i2c_msg msg[2] = { { addr, flags, 1, msgbuf0 },
                                   { addr, flags | I2C_M_RD, 0, msgbuf1 }
                                 };
@@ -1671,7 +1924,7 @@ static s32 i2c_smbus_xfer_emulated(struct i2c_adapter * adapter, u16 addr,
         int status;
 
         msgbuf0[0] = command;
-        switch(size) {
+        switch (size) {
         case I2C_SMBUS_QUICK:
                 msg[0].len = 0;
                 /* Special case: The read/write field is used as data */
@@ -1698,7 +1951,7 @@ static s32 i2c_smbus_xfer_emulated(struct i2c_adapter * adapter, u16 addr,
                 if (read_write == I2C_SMBUS_READ)
                         msg[1].len = 2;
                 else {
-                        msg[0].len=3;
+                        msg[0].len = 3;
                         msgbuf0[1] = data->word & 0xff;
                         msgbuf0[2] = data->word >> 8;
                 }
@@ -1791,26 +2044,26 @@ static s32 i2c_smbus_xfer_emulated(struct i2c_adapter * adapter, u16 addr,
         }
 
         if (read_write == I2C_SMBUS_READ)
-                switch(size) {
-                        case I2C_SMBUS_BYTE:
-                                data->byte = msgbuf0[0];
-                                break;
-                        case I2C_SMBUS_BYTE_DATA:
-                                data->byte = msgbuf1[0];
-                                break;
-                        case I2C_SMBUS_WORD_DATA:
-                        case I2C_SMBUS_PROC_CALL:
-                                data->word = msgbuf1[0] | (msgbuf1[1] << 8);
-                                break;
-                        case I2C_SMBUS_I2C_BLOCK_DATA:
-                                for (i = 0; i < data->block[0]; i++)
-                                        data->block[i+1] = msgbuf1[i];
-                                break;
-                        case I2C_SMBUS_BLOCK_DATA:
-                        case I2C_SMBUS_BLOCK_PROC_CALL:
-                                for (i = 0; i < msgbuf1[0] + 1; i++)
-                                        data->block[i] = msgbuf1[i];
-                                break;
+                switch (size) {
+                case I2C_SMBUS_BYTE:
+                        data->byte = msgbuf0[0];
+                        break;
+                case I2C_SMBUS_BYTE_DATA:
+                        data->byte = msgbuf1[0];
+                        break;
+                case I2C_SMBUS_WORD_DATA:
+                case I2C_SMBUS_PROC_CALL:
+                        data->word = msgbuf1[0] | (msgbuf1[1] << 8);
+                        break;
+                case I2C_SMBUS_I2C_BLOCK_DATA:
+                        for (i = 0; i < data->block[0]; i++)
+                                data->block[i+1] = msgbuf1[i];
+                        break;
+                case I2C_SMBUS_BLOCK_DATA:
+                case I2C_SMBUS_BLOCK_PROC_CALL:
+                        for (i = 0; i < msgbuf1[0] + 1; i++)
+                                data->block[i] = msgbuf1[i];
+                        break;
                 }
         return 0;
 }
@@ -1839,7 +2092,7 @@ s32 i2c_smbus_xfer(struct i2c_adapter *adapter, u16 addr, unsigned short flags,
         flags &= I2C_M_TEN | I2C_CLIENT_PEC;
 
         if (adapter->algo->smbus_xfer) {
-                mutex_lock(&adapter->bus_lock);
+                i2c_lock_adapter(adapter);
 
                 /* Retry automatically on arbitration loss */
                 orig_jiffies = jiffies;
@@ -1853,9 +2106,9 @@ s32 i2c_smbus_xfer(struct i2c_adapter *adapter, u16 addr, unsigned short flags,
                                        orig_jiffies + adapter->timeout))
                                 break;
                 }
-                mutex_unlock(&adapter->bus_lock);
+                i2c_unlock_adapter(adapter);
         } else
-                res = i2c_smbus_xfer_emulated(adapter,addr,flags,read_write,
+                res = i2c_smbus_xfer_emulated(adapter, addr, flags, read_write,
                                               command, protocol, data);
 
         return res;
diff --git a/drivers/i2c/i2c-dev.c b/drivers/i2c/i2c-dev.c
index 7e13d2df9af3..cec0f3ba97f8 100644
--- a/drivers/i2c/i2c-dev.c
+++ b/drivers/i2c/i2c-dev.c
@@ -34,9 +34,8 @@
 #include <linux/list.h>
 #include <linux/i2c.h>
 #include <linux/i2c-dev.h>
-#include <linux/smp_lock.h>
 #include <linux/jiffies.h>
-#include <asm/uaccess.h>
+#include <linux/uaccess.h>
 
 static struct i2c_driver i2cdev_driver;
 
@@ -133,53 +132,49 @@ static DEVICE_ATTR(name, S_IRUGO, show_adapter_name, NULL);
  * needed by those system calls and by this SMBus interface.
  */
 
-static ssize_t i2cdev_read (struct file *file, char __user *buf, size_t count,
-                            loff_t *offset)
+static ssize_t i2cdev_read(struct file *file, char __user *buf, size_t count,
+                loff_t *offset)
 {
         char *tmp;
         int ret;
 
-        struct i2c_client *client = (struct i2c_client *)file->private_data;
+        struct i2c_client *client = file->private_data;
 
         if (count > 8192)
                 count = 8192;
 
-        tmp = kmalloc(count,GFP_KERNEL);
-        if (tmp==NULL)
+        tmp = kmalloc(count, GFP_KERNEL);
+        if (tmp == NULL)
                 return -ENOMEM;
 
         pr_debug("i2c-dev: i2c-%d reading %zu bytes.\n",
                 iminor(file->f_path.dentry->d_inode), count);
 
-        ret = i2c_master_recv(client,tmp,count);
+        ret = i2c_master_recv(client, tmp, count);
         if (ret >= 0)
-                ret = copy_to_user(buf,tmp,count)?-EFAULT:ret;
+                ret = copy_to_user(buf, tmp, count) ? -EFAULT : ret;
         kfree(tmp);
         return ret;
 }
 
-static ssize_t i2cdev_write (struct file *file, const char __user *buf, size_t count,
-                             loff_t *offset)
+static ssize_t i2cdev_write(struct file *file, const char __user *buf,
+                size_t count, loff_t *offset)
 {
         int ret;
         char *tmp;
-        struct i2c_client *client = (struct i2c_client *)file->private_data;
+        struct i2c_client *client = file->private_data;
 
         if (count > 8192)
                 count = 8192;
 
-        tmp = kmalloc(count,GFP_KERNEL);
-        if (tmp==NULL)
-                return -ENOMEM;
-        if (copy_from_user(tmp,buf,count)) {
-                kfree(tmp);
-                return -EFAULT;
-        }
+        tmp = memdup_user(buf, count);
+        if (IS_ERR(tmp))
+                return PTR_ERR(tmp);
 
         pr_debug("i2c-dev: i2c-%d writing %zu bytes.\n",
                 iminor(file->f_path.dentry->d_inode), count);
 
-        ret = i2c_master_send(client,tmp,count);
+        ret = i2c_master_send(client, tmp, count);
         kfree(tmp);
         return ret;
 }
@@ -194,12 +189,49 @@ static int i2cdev_check(struct device *dev, void *addrp)
         return dev->driver ? -EBUSY : 0;
 }
 
+/* walk up mux tree */
+static int i2cdev_check_mux_parents(struct i2c_adapter *adapter, int addr)
+{
+        struct i2c_adapter *parent = i2c_parent_is_i2c_adapter(adapter);
+        int result;
+
+        result = device_for_each_child(&adapter->dev, &addr, i2cdev_check);
+        if (!result && parent)
+                result = i2cdev_check_mux_parents(parent, addr);
+
+        return result;
+}
+
+/* recurse down mux tree */
+static int i2cdev_check_mux_children(struct device *dev, void *addrp)
+{
+        int result;
+
+        if (dev->type == &i2c_adapter_type)
+                result = device_for_each_child(dev, addrp,
+                                                i2cdev_check_mux_children);
+        else
+                result = i2cdev_check(dev, addrp);
+
+        return result;
+}
+
 /* This address checking function differs from the one in i2c-core
    in that it considers an address with a registered device, but no
    driver bound to it, as NOT busy. */
 static int i2cdev_check_addr(struct i2c_adapter *adapter, unsigned int addr)
 {
-        return device_for_each_child(&adapter->dev, &addr, i2cdev_check);
+        struct i2c_adapter *parent = i2c_parent_is_i2c_adapter(adapter);
+        int result = 0;
+
+        if (parent)
+                result = i2cdev_check_mux_parents(parent, addr);
+
+        if (!result)
+                result = device_for_each_child(&adapter->dev, &addr,
+                                                i2cdev_check_mux_children);
+
+        return result;
 }
 
 static noinline int i2cdev_ioctl_rdrw(struct i2c_client *client,
@@ -220,9 +252,7 @@ static noinline int i2cdev_ioctl_rdrw(struct i2c_client *client,
         if (rdwr_arg.nmsgs > I2C_RDRW_IOCTL_MAX_MSGS)
                 return -EINVAL;
 
-        rdwr_pa = (struct i2c_msg *)
-                kmalloc(rdwr_arg.nmsgs * sizeof(struct i2c_msg),
-                GFP_KERNEL);
+        rdwr_pa = kmalloc(rdwr_arg.nmsgs * sizeof(struct i2c_msg), GFP_KERNEL);
         if (!rdwr_pa)
                 return -ENOMEM;
 
@@ -248,15 +278,9 @@ static noinline int i2cdev_ioctl_rdrw(struct i2c_client *client,
                         break;
                 }
                 data_ptrs[i] = (u8 __user *)rdwr_pa[i].buf;
-                rdwr_pa[i].buf = kmalloc(rdwr_pa[i].len, GFP_KERNEL);
-                if (rdwr_pa[i].buf == NULL) {
-                        res = -ENOMEM;
-                        break;
-                }
-                if (copy_from_user(rdwr_pa[i].buf, data_ptrs[i],
-                                   rdwr_pa[i].len)) {
-                                ++i; /* Needs to be kfreed too */
-                                res = -EFAULT;
+                rdwr_pa[i].buf = memdup_user(data_ptrs[i], rdwr_pa[i].len);
+                if (IS_ERR(rdwr_pa[i].buf)) {
+                        res = PTR_ERR(rdwr_pa[i].buf);
                         break;
                 }
         }
@@ -370,13 +394,13 @@ static noinline int i2cdev_ioctl_smbus(struct i2c_client *client,
 
 static long i2cdev_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
 {
-        struct i2c_client *client = (struct i2c_client *)file->private_data;
+        struct i2c_client *client = file->private_data;
         unsigned long funcs;
 
         dev_dbg(&client->adapter->dev, "ioctl, cmd=0x%02x, arg=0x%02lx\n",
                 cmd, arg);
 
-        switch ( cmd ) {
+        switch (cmd) {
         case I2C_SLAVE:
         case I2C_SLAVE_FORCE:
                 /* NOTE:  devices set up to work with "new style" drivers
@@ -445,20 +469,14 @@ static int i2cdev_open(struct inode *inode, struct file *file)
         struct i2c_client *client;
         struct i2c_adapter *adap;
         struct i2c_dev *i2c_dev;
-        int ret = 0;
 
-        lock_kernel();
         i2c_dev = i2c_dev_get_by_minor(minor);
-        if (!i2c_dev) {
-                ret = -ENODEV;
-                goto out;
-        }
+        if (!i2c_dev)
+                return -ENODEV;
 
         adap = i2c_get_adapter(i2c_dev->adap->nr);
-        if (!adap) {
-                ret = -ENODEV;
-                goto out;
-        }
+        if (!adap)
+                return -ENODEV;
 
         /* This creates an anonymous i2c_client, which may later be
          * pointed to some address using I2C_SLAVE or I2C_SLAVE_FORCE.
@@ -470,8 +488,7 @@ static int i2cdev_open(struct inode *inode, struct file *file)
         client = kzalloc(sizeof(*client), GFP_KERNEL);
         if (!client) {
                 i2c_put_adapter(adap);
-                ret = -ENOMEM;
-                goto out;
+                return -ENOMEM;
         }
         snprintf(client->name, I2C_NAME_SIZE, "i2c-dev %d", adap->nr);
         client->driver = &i2cdev_driver;
@@ -479,9 +496,7 @@ static int i2cdev_open(struct inode *inode, struct file *file)
         client->adapter = adap;
         file->private_data = client;
 
-out:
-        unlock_kernel();
-        return ret;
+        return 0;
 }
 
 static int i2cdev_release(struct inode *inode, struct file *file)
@@ -611,7 +626,7 @@ static void __exit i2c_dev_exit(void)
 {
         i2c_del_driver(&i2cdev_driver);
         class_destroy(i2c_dev_class);
-        unregister_chrdev(I2C_MAJOR,"i2c");
+        unregister_chrdev(I2C_MAJOR, "i2c");
 }
 
 MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl> and "
diff --git a/drivers/i2c/i2c-mux.c b/drivers/i2c/i2c-mux.c
new file mode 100644
index 000000000000..d7a4833be416
--- /dev/null
+++ b/drivers/i2c/i2c-mux.c
@@ -0,0 +1,164 @@
+/*
+ * Multiplexed I2C bus driver.
+ *
+ * Copyright (c) 2008-2009 Rodolfo Giometti <giometti@linux.it>
+ * Copyright (c) 2008-2009 Eurotech S.p.A. <info@eurotech.it>
+ * Copyright (c) 2009-2010 NSN GmbH & Co KG <michael.lawnick.ext@nsn.com>
+ *
+ * Simplifies access to complex multiplexed I2C bus topologies, by presenting
+ * each multiplexed bus segment as an additional I2C adapter.
+ * Supports multi-level mux'ing (mux behind a mux).
+ *
+ * Based on:
+ *      i2c-virt.c from Kumar Gala <galak@kernel.crashing.org>
+ *      i2c-virtual.c from Ken Harrenstien, Copyright (c) 2004 Google, Inc.
+ *      i2c-virtual.c from Brian Kuschak <bkuschak@yahoo.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/i2c.h>
+#include <linux/i2c-mux.h>
+
+/* multiplexer per channel data */
+struct i2c_mux_priv {
+        struct i2c_adapter adap;
+        struct i2c_algorithm algo;
+
+        struct i2c_adapter *parent;
+        void *mux_dev;  /* the mux chip/device */
+        u32  chan_id;   /* the channel id */
+
+        int (*select)(struct i2c_adapter *, void *mux_dev, u32 chan_id);
+        int (*deselect)(struct i2c_adapter *, void *mux_dev, u32 chan_id);
+};
+
+static int i2c_mux_master_xfer(struct i2c_adapter *adap,
+                               struct i2c_msg msgs[], int num)
+{
+        struct i2c_mux_priv *priv = adap->algo_data;
+        struct i2c_adapter *parent = priv->parent;
+        int ret;
+
+        /* Switch to the right mux port and perform the transfer. */
+
+        ret = priv->select(parent, priv->mux_dev, priv->chan_id);
+        if (ret >= 0)
+                ret = parent->algo->master_xfer(parent, msgs, num);
+        if (priv->deselect)
+                priv->deselect(parent, priv->mux_dev, priv->chan_id);
+
+        return ret;
+}
+
+static int i2c_mux_smbus_xfer(struct i2c_adapter *adap,
+                              u16 addr, unsigned short flags,
+                              char read_write, u8 command,
+                              int size, union i2c_smbus_data *data)
+{
+        struct i2c_mux_priv *priv = adap->algo_data;
+        struct i2c_adapter *parent = priv->parent;
+        int ret;
+
+        /* Select the right mux port and perform the transfer. */
+
+        ret = priv->select(parent, priv->mux_dev, priv->chan_id);
+        if (ret >= 0)
+                ret = parent->algo->smbus_xfer(parent, addr, flags,
+                                        read_write, command, size, data);
+        if (priv->deselect)
+                priv->deselect(parent, priv->mux_dev, priv->chan_id);
+
+        return ret;
+}
+
+/* Return the parent's functionality */
+static u32 i2c_mux_functionality(struct i2c_adapter *adap)
+{
+        struct i2c_mux_priv *priv = adap->algo_data;
+        struct i2c_adapter *parent = priv->parent;
+
+        return parent->algo->functionality(parent);
+}
+
+struct i2c_adapter *i2c_add_mux_adapter(struct i2c_adapter *parent,
+                                void *mux_dev, u32 force_nr, u32 chan_id,
+                                int (*select) (struct i2c_adapter *,
+                                               void *, u32),
+                                int (*deselect) (struct i2c_adapter *,
+                                                 void *, u32))
+{
+        struct i2c_mux_priv *priv;
+        int ret;
+
+        priv = kzalloc(sizeof(struct i2c_mux_priv), GFP_KERNEL);
+        if (!priv)
+                return NULL;
+
+        /* Set up private adapter data */
+        priv->parent = parent;
+        priv->mux_dev = mux_dev;
+        priv->chan_id = chan_id;
+        priv->select = select;
+        priv->deselect = deselect;
+
+        /* Need to do algo dynamically because we don't know ahead
+         * of time what sort of physical adapter we'll be dealing with.
+         */
+        if (parent->algo->master_xfer)
+                priv->algo.master_xfer = i2c_mux_master_xfer;
+        if (parent->algo->smbus_xfer)
+                priv->algo.smbus_xfer = i2c_mux_smbus_xfer;
+        priv->algo.functionality = i2c_mux_functionality;
+
+        /* Now fill out new adapter structure */
+        snprintf(priv->adap.name, sizeof(priv->adap.name),
+                 "i2c-%d-mux (chan_id %d)", i2c_adapter_id(parent), chan_id);
+        priv->adap.owner = THIS_MODULE;
+        priv->adap.algo = &priv->algo;
+        priv->adap.algo_data = priv;
+        priv->adap.dev.parent = &parent->dev;
+
+        if (force_nr) {
+                priv->adap.nr = force_nr;
+                ret = i2c_add_numbered_adapter(&priv->adap);
+        } else {
+                ret = i2c_add_adapter(&priv->adap);
+        }
+        if (ret < 0) {
+                dev_err(&parent->dev,
+                        "failed to add mux-adapter (error=%d)\n",
+                        ret);
+                kfree(priv);
+                return NULL;
+        }
+
+        dev_info(&parent->dev, "Added multiplexed i2c bus %d\n",
+                 i2c_adapter_id(&priv->adap));
+
+        return &priv->adap;
+}
+EXPORT_SYMBOL_GPL(i2c_add_mux_adapter);
+
+int i2c_del_mux_adapter(struct i2c_adapter *adap)
+{
+        struct i2c_mux_priv *priv = adap->algo_data;
+        int ret;
+
+        ret = i2c_del_adapter(adap);
+        if (ret < 0)
+                return ret;
+        kfree(priv);
+
+        return 0;
+}
+EXPORT_SYMBOL_GPL(i2c_del_mux_adapter);
+
+MODULE_AUTHOR("Rodolfo Giometti <giometti@linux.it>");
+MODULE_DESCRIPTION("I2C driver for multiplexed I2C busses");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/i2c/i2c-smbus.c b/drivers/i2c/i2c-smbus.c
new file mode 100644
index 000000000000..f61ccc1e5ea3
--- /dev/null
+++ b/drivers/i2c/i2c-smbus.c
@@ -0,0 +1,262 @@
+/*
+ * i2c-smbus.c - SMBus extensions to the I2C protocol
+ *
+ * Copyright (C) 2008 David Brownell
+ * Copyright (C) 2010 Jean Delvare <khali@linux-fr.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/device.h>
+#include <linux/interrupt.h>
+#include <linux/workqueue.h>
+#include <linux/i2c.h>
+#include <linux/i2c-smbus.h>
+#include <linux/slab.h>
+
+struct i2c_smbus_alert {
+        unsigned int            alert_edge_triggered:1;
+        int                     irq;
+        struct work_struct      alert;
+        struct i2c_client       *ara;           /* Alert response address */
+};
+
+struct alert_data {
+        unsigned short          addr;
+        u8                      flag:1;
+};
+
+/* If this is the alerting device, notify its driver */
+static int smbus_do_alert(struct device *dev, void *addrp)
+{
+        struct i2c_client *client = i2c_verify_client(dev);
+        struct alert_data *data = addrp;
+
+        if (!client || client->addr != data->addr)
+                return 0;
+        if (client->flags & I2C_CLIENT_TEN)
+                return 0;
+
+        /*
+         * Drivers should either disable alerts, or provide at least
+         * a minimal handler.  Lock so client->driver won't change.
+         */
+        device_lock(dev);
+        if (client->driver) {
+                if (client->driver->alert)
+                        client->driver->alert(client, data->flag);
+                else
+                        dev_warn(&client->dev, "no driver alert()!\n");
+        } else
+                dev_dbg(&client->dev, "alert with no driver\n");
+        device_unlock(dev);
+
+        /* Stop iterating after we find the device */
+        return -EBUSY;
+}
+
+/*
+ * The alert IRQ handler needs to hand work off to a task which can issue
+ * SMBus calls, because those sleeping calls can't be made in IRQ context.
+ */
+static void smbus_alert(struct work_struct *work)
+{
+        struct i2c_smbus_alert *alert;
+        struct i2c_client *ara;
+        unsigned short prev_addr = 0;   /* Not a valid address */
+
+        alert = container_of(work, struct i2c_smbus_alert, alert);
+        ara = alert->ara;
+
+        for (;;) {
+                s32 status;
+                struct alert_data data;
+
+                /*
+                 * Devices with pending alerts reply in address order, low
+                 * to high, because of slave transmit arbitration.  After
+                 * responding, an SMBus device stops asserting SMBALERT#.
+                 *
+                 * Note that SMBus 2.0 reserves 10-bit addresess for future
+                 * use.  We neither handle them, nor try to use PEC here.
+                 */
+                status = i2c_smbus_read_byte(ara);
+                if (status < 0)
+                        break;
+
+                data.flag = status & 1;
+                data.addr = status >> 1;
+
+                if (data.addr == prev_addr) {
+                        dev_warn(&ara->dev, "Duplicate SMBALERT# from dev "
+                                "0x%02x, skipping\n", data.addr);
+                        break;
+                }
+                dev_dbg(&ara->dev, "SMBALERT# from dev 0x%02x, flag %d\n",
+                        data.addr, data.flag);
+
+                /* Notify driver for the device which issued the alert */
+                device_for_each_child(&ara->adapter->dev, &data,
+                                      smbus_do_alert);
+                prev_addr = data.addr;
+        }
+
+        /* We handled all alerts; re-enable level-triggered IRQs */
+        if (!alert->alert_edge_triggered)
+                enable_irq(alert->irq);
+}
+
+static irqreturn_t smbalert_irq(int irq, void *d)
+{
+        struct i2c_smbus_alert *alert = d;
+
+        /* Disable level-triggered IRQs until we handle them */
+        if (!alert->alert_edge_triggered)
+                disable_irq_nosync(irq);
+
+        schedule_work(&alert->alert);
+        return IRQ_HANDLED;
+}
+
+/* Setup SMBALERT# infrastructure */
+static int smbalert_probe(struct i2c_client *ara,
+                          const struct i2c_device_id *id)
+{
+        struct i2c_smbus_alert_setup *setup = ara->dev.platform_data;
+        struct i2c_smbus_alert *alert;
+        struct i2c_adapter *adapter = ara->adapter;
+        int res;
+
+        alert = kzalloc(sizeof(struct i2c_smbus_alert), GFP_KERNEL);
+        if (!alert)
+                return -ENOMEM;
+
+        alert->alert_edge_triggered = setup->alert_edge_triggered;
+        alert->irq = setup->irq;
+        INIT_WORK(&alert->alert, smbus_alert);
+        alert->ara = ara;
+
+        if (setup->irq > 0) {
+                res = devm_request_irq(&ara->dev, setup->irq, smbalert_irq,
+                                       0, "smbus_alert", alert);
+                if (res) {
+                        kfree(alert);
+                        return res;
+                }
+        }
+
+        i2c_set_clientdata(ara, alert);
+        dev_info(&adapter->dev, "supports SMBALERT#, %s trigger\n",
+                 setup->alert_edge_triggered ? "edge" : "level");
+
+        return 0;
+}
+
+/* IRQ resource is managed so it is freed automatically */
+static int smbalert_remove(struct i2c_client *ara)
+{
+        struct i2c_smbus_alert *alert = i2c_get_clientdata(ara);
+
+        cancel_work_sync(&alert->alert);
+
+        kfree(alert);
+        return 0;
+}
+
+static const struct i2c_device_id smbalert_ids[] = {
+        { "smbus_alert", 0 },
+        { /* LIST END */ }
+};
+MODULE_DEVICE_TABLE(i2c, smbalert_ids);
+
+static struct i2c_driver smbalert_driver = {
+        .driver = {
+                .name   = "smbus_alert",
+        },
+        .probe          = smbalert_probe,
+        .remove         = smbalert_remove,
+        .id_table       = smbalert_ids,
+};
+
+/**
+ * i2c_setup_smbus_alert - Setup SMBus alert support
+ * @adapter: the target adapter
+ * @setup: setup data for the SMBus alert handler
+ * Context: can sleep
+ *
+ * Setup handling of the SMBus alert protocol on a given I2C bus segment.
+ *
+ * Handling can be done either through our IRQ handler, or by the
+ * adapter (from its handler, periodic polling, or whatever).
+ *
+ * NOTE that if we manage the IRQ, we *MUST* know if it's level or
+ * edge triggered in order to hand it to the workqueue correctly.
+ * If triggering the alert seems to wedge the system, you probably
+ * should have said it's level triggered.
+ *
+ * This returns the ara client, which should be saved for later use with
+ * i2c_handle_smbus_alert() and ultimately i2c_unregister_device(); or NULL
+ * to indicate an error.
+ */
+struct i2c_client *i2c_setup_smbus_alert(struct i2c_adapter *adapter,
+                                         struct i2c_smbus_alert_setup *setup)
+{
+        struct i2c_board_info ara_board_info = {
+                I2C_BOARD_INFO("smbus_alert", 0x0c),
+                .platform_data = setup,
+        };
+
+        return i2c_new_device(adapter, &ara_board_info);
+}
+EXPORT_SYMBOL_GPL(i2c_setup_smbus_alert);
+
+/**
+ * i2c_handle_smbus_alert - Handle an SMBus alert
+ * @ara: the ARA client on the relevant adapter
+ * Context: can't sleep
+ *
+ * Helper function to be called from an I2C bus driver's interrupt
+ * handler. It will schedule the alert work, in turn calling the
+ * corresponding I2C device driver's alert function.
+ *
+ * It is assumed that ara is a valid i2c client previously returned by
+ * i2c_setup_smbus_alert().
+ */
+int i2c_handle_smbus_alert(struct i2c_client *ara)
+{
+        struct i2c_smbus_alert *alert = i2c_get_clientdata(ara);
+
+        return schedule_work(&alert->alert);
+}
+EXPORT_SYMBOL_GPL(i2c_handle_smbus_alert);
+
+static int __init i2c_smbus_init(void)
+{
+        return i2c_add_driver(&smbalert_driver);
+}
+
+static void __exit i2c_smbus_exit(void)
+{
+        i2c_del_driver(&smbalert_driver);
+}
+
+module_init(i2c_smbus_init);
+module_exit(i2c_smbus_exit);
+
+MODULE_AUTHOR("Jean Delvare <khali@linux-fr.org>");
+MODULE_DESCRIPTION("SMBus protocol extensions support");
+MODULE_LICENSE("GPL");
diff --git a/drivers/i2c/muxes/Kconfig b/drivers/i2c/muxes/Kconfig
new file mode 100644
index 000000000000..90b7a0163899
--- /dev/null
+++ b/drivers/i2c/muxes/Kconfig
@@ -0,0 +1,40 @@
+#
+# Multiplexer I2C chip drivers configuration
+#
+
+menu "Multiplexer I2C Chip support"
+        depends on I2C_MUX
+
+config I2C_MUX_GPIO
+        tristate "GPIO-based I2C multiplexer"
+        depends on GENERIC_GPIO
+        help
+          If you say yes to this option, support will be included for a
+          GPIO based I2C multiplexer. This driver provides access to
+          I2C busses connected through a MUX, which is controlled
+          through GPIO pins.
+
+          This driver can also be built as a module.  If so, the module
+          will be called gpio-i2cmux.
+
+config I2C_MUX_PCA9541
+        tristate "NXP PCA9541 I2C Master Selector"
+        depends on EXPERIMENTAL
+        help
+          If you say yes here you get support for the NXP PCA9541
+          I2C Master Selector.
+
+          This driver can also be built as a module.  If so, the module
+          will be called pca9541.
+
+config I2C_MUX_PCA954x
+        tristate "Philips PCA954x I2C Mux/switches"
+        depends on EXPERIMENTAL
+        help
+          If you say yes here you get support for the Philips PCA954x
+          I2C mux/switch devices.
+
+          This driver can also be built as a module.  If so, the module
+          will be called pca954x.
+
+endmenu
diff --git a/drivers/i2c/muxes/Makefile b/drivers/i2c/muxes/Makefile
new file mode 100644
index 000000000000..4640436ea61f
--- /dev/null
+++ b/drivers/i2c/muxes/Makefile
@@ -0,0 +1,8 @@
+#
+# Makefile for multiplexer I2C chip drivers.
+
+obj-$(CONFIG_I2C_MUX_GPIO)      += gpio-i2cmux.o
+obj-$(CONFIG_I2C_MUX_PCA9541)   += pca9541.o
+obj-$(CONFIG_I2C_MUX_PCA954x)   += pca954x.o
+
+ccflags-$(CONFIG_I2C_DEBUG_BUS) := -DDEBUG
diff --git a/drivers/i2c/muxes/gpio-i2cmux.c b/drivers/i2c/muxes/gpio-i2cmux.c
new file mode 100644
index 000000000000..7b6ce624cd6e
--- /dev/null
+++ b/drivers/i2c/muxes/gpio-i2cmux.c
@@ -0,0 +1,184 @@
+/*
+ * I2C multiplexer using GPIO API
+ *
+ * Peter Korsgaard <peter.korsgaard@barco.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/i2c.h>
+#include <linux/i2c-mux.h>
+#include <linux/gpio-i2cmux.h>
+#include <linux/platform_device.h>
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/gpio.h>
+
+struct gpiomux {
+        struct i2c_adapter *parent;
+        struct i2c_adapter **adap; /* child busses */
+        struct gpio_i2cmux_platform_data data;
+};
+
+static void gpiomux_set(const struct gpiomux *mux, unsigned val)
+{
+        int i;
+
+        for (i = 0; i < mux->data.n_gpios; i++)
+                gpio_set_value(mux->data.gpios[i], val & (1 << i));
+}
+
+static int gpiomux_select(struct i2c_adapter *adap, void *data, u32 chan)
+{
+        struct gpiomux *mux = data;
+
+        gpiomux_set(mux, mux->data.values[chan]);
+
+        return 0;
+}
+
+static int gpiomux_deselect(struct i2c_adapter *adap, void *data, u32 chan)
+{
+        struct gpiomux *mux = data;
+
+        gpiomux_set(mux, mux->data.idle);
+
+        return 0;
+}
+
+static int __devinit gpiomux_probe(struct platform_device *pdev)
+{
+        struct gpiomux *mux;
+        struct gpio_i2cmux_platform_data *pdata;
+        struct i2c_adapter *parent;
+        int (*deselect) (struct i2c_adapter *, void *, u32);
+        unsigned initial_state;
+        int i, ret;
+
+        pdata = pdev->dev.platform_data;
+        if (!pdata) {
+                dev_err(&pdev->dev, "Missing platform data\n");
+                return -ENODEV;
+        }
+
+        parent = i2c_get_adapter(pdata->parent);
+        if (!parent) {
+                dev_err(&pdev->dev, "Parent adapter (%d) not found\n",
+                        pdata->parent);
+                return -ENODEV;
+        }
+
+        mux = kzalloc(sizeof(*mux), GFP_KERNEL);
+        if (!mux) {
+                ret = -ENOMEM;
+                goto alloc_failed;
+        }
+
+        mux->parent = parent;
+        mux->data = *pdata;
+        mux->adap = kzalloc(sizeof(struct i2c_adapter *) * pdata->n_values,
+                            GFP_KERNEL);
+        if (!mux->adap) {
+                ret = -ENOMEM;
+                goto alloc_failed2;
+        }
+
+        if (pdata->idle != GPIO_I2CMUX_NO_IDLE) {
+                initial_state = pdata->idle;
+                deselect = gpiomux_deselect;
+        } else {
+                initial_state = pdata->values[0];
+                deselect = NULL;
+        }
+
+        for (i = 0; i < pdata->n_gpios; i++) {
+                ret = gpio_request(pdata->gpios[i], "gpio-i2cmux");
+                if (ret)
+                        goto err_request_gpio;
+                gpio_direction_output(pdata->gpios[i],
+                                      initial_state & (1 << i));
+        }
+
+        for (i = 0; i < pdata->n_values; i++) {
+                u32 nr = pdata->base_nr ? (pdata->base_nr + i) : 0;
+
+                mux->adap[i] = i2c_add_mux_adapter(parent, mux, nr, i,
+                                                   gpiomux_select, deselect);
+                if (!mux->adap[i]) {
+                        ret = -ENODEV;
+                        dev_err(&pdev->dev, "Failed to add adapter %d\n", i);
+                        goto add_adapter_failed;
+                }
+        }
+
+        dev_info(&pdev->dev, "%d port mux on %s adapter\n",
+                 pdata->n_values, parent->name);
+
+        platform_set_drvdata(pdev, mux);
+
+        return 0;
+
+add_adapter_failed:
+        for (; i > 0; i--)
+                i2c_del_mux_adapter(mux->adap[i - 1]);
+        i = pdata->n_gpios;
+err_request_gpio:
+        for (; i > 0; i--)
+                gpio_free(pdata->gpios[i - 1]);
+        kfree(mux->adap);
+alloc_failed2:
+        kfree(mux);
+alloc_failed:
+        i2c_put_adapter(parent);
+
+        return ret;
+}
+
+static int __devexit gpiomux_remove(struct platform_device *pdev)
+{
+        struct gpiomux *mux = platform_get_drvdata(pdev);
+        int i;
+
+        for (i = 0; i < mux->data.n_values; i++)
+                i2c_del_mux_adapter(mux->adap[i]);
+
+        for (i = 0; i < mux->data.n_gpios; i++)
+                gpio_free(mux->data.gpios[i]);
+
+        platform_set_drvdata(pdev, NULL);
+        i2c_put_adapter(mux->parent);
+        kfree(mux->adap);
+        kfree(mux);
+
+        return 0;
+}
+
+static struct platform_driver gpiomux_driver = {
+        .probe  = gpiomux_probe,
+        .remove = __devexit_p(gpiomux_remove),
+        .driver = {
+                .owner  = THIS_MODULE,
+                .name   = "gpio-i2cmux",
+        },
+};
+
+static int __init gpiomux_init(void)
+{
+        return platform_driver_register(&gpiomux_driver);
+}
+
+static void __exit gpiomux_exit(void)
+{
+        platform_driver_unregister(&gpiomux_driver);
+}
+
+module_init(gpiomux_init);
+module_exit(gpiomux_exit);
+
+MODULE_DESCRIPTION("GPIO-based I2C multiplexer driver");
+MODULE_AUTHOR("Peter Korsgaard <peter.korsgaard@barco.com>");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:gpio-i2cmux");
diff --git a/drivers/i2c/muxes/pca9541.c b/drivers/i2c/muxes/pca9541.c
new file mode 100644
index 000000000000..ed699c5aa79d
--- /dev/null
+++ b/drivers/i2c/muxes/pca9541.c
@@ -0,0 +1,411 @@
+/*
+ * I2C multiplexer driver for PCA9541 bus master selector
+ *
+ * Copyright (c) 2010 Ericsson AB.
+ *
+ * Author: Guenter Roeck <guenter.roeck@ericsson.com>
+ *
+ * Derived from:
+ *  pca954x.c
+ *
+ *  Copyright (c) 2008-2009 Rodolfo Giometti <giometti@linux.it>
+ *  Copyright (c) 2008-2009 Eurotech S.p.A. <info@eurotech.it>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/jiffies.h>
+#include <linux/delay.h>
+#include <linux/slab.h>
+#include <linux/device.h>
+#include <linux/i2c.h>
+#include <linux/i2c-mux.h>
+
+#include <linux/i2c/pca954x.h>
+
+/*
+ * The PCA9541 is a bus master selector. It supports two I2C masters connected
+ * to a single slave bus.
+ *
+ * Before each bus transaction, a master has to acquire bus ownership. After the
+ * transaction is complete, bus ownership has to be released. This fits well
+ * into the I2C multiplexer framework, which provides select and release
+ * functions for this purpose. For this reason, this driver is modeled as
+ * single-channel I2C bus multiplexer.
+ *
+ * This driver assumes that the two bus masters are controlled by two different
+ * hosts. If a single host controls both masters, platform code has to ensure
+ * that only one of the masters is instantiated at any given time.
+ */
+
+#define PCA9541_CONTROL         0x01
+#define PCA9541_ISTAT           0x02
+
+#define PCA9541_CTL_MYBUS       (1 << 0)
+#define PCA9541_CTL_NMYBUS      (1 << 1)
+#define PCA9541_CTL_BUSON       (1 << 2)
+#define PCA9541_CTL_NBUSON      (1 << 3)
+#define PCA9541_CTL_BUSINIT     (1 << 4)
+#define PCA9541_CTL_TESTON      (1 << 6)
+#define PCA9541_CTL_NTESTON     (1 << 7)
+
+#define PCA9541_ISTAT_INTIN     (1 << 0)
+#define PCA9541_ISTAT_BUSINIT   (1 << 1)
+#define PCA9541_ISTAT_BUSOK     (1 << 2)
+#define PCA9541_ISTAT_BUSLOST   (1 << 3)
+#define PCA9541_ISTAT_MYTEST    (1 << 6)
+#define PCA9541_ISTAT_NMYTEST   (1 << 7)
+
+#define BUSON           (PCA9541_CTL_BUSON | PCA9541_CTL_NBUSON)
+#define MYBUS           (PCA9541_CTL_MYBUS | PCA9541_CTL_NMYBUS)
+#define mybus(x)        (!((x) & MYBUS) || ((x) & MYBUS) == MYBUS)
+#define busoff(x)       (!((x) & BUSON) || ((x) & BUSON) == BUSON)
+
+/* arbitration timeouts, in jiffies */
+#define ARB_TIMEOUT     (HZ / 8)        /* 125 ms until forcing bus ownership */
+#define ARB2_TIMEOUT    (HZ / 4)        /* 250 ms until acquisition failure */
+
+/* arbitration retry delays, in us */
+#define SELECT_DELAY_SHORT      50
+#define SELECT_DELAY_LONG       1000
+
+struct pca9541 {
+        struct i2c_adapter *mux_adap;
+        unsigned long select_timeout;
+        unsigned long arb_timeout;
+};
+
+static const struct i2c_device_id pca9541_id[] = {
+        {"pca9541", 0},
+        {}
+};
+
+MODULE_DEVICE_TABLE(i2c, pca9541_id);
+
+/*
+ * Write to chip register. Don't use i2c_transfer()/i2c_smbus_xfer()
+ * as they will try to lock the adapter a second time.
+ */
+static int pca9541_reg_write(struct i2c_client *client, u8 command, u8 val)
+{
+        struct i2c_adapter *adap = client->adapter;
+        int ret;
+
+        if (adap->algo->master_xfer) {
+                struct i2c_msg msg;
+                char buf[2];
+
+                msg.addr = client->addr;
+                msg.flags = 0;
+                msg.len = 2;
+                buf[0] = command;
+                buf[1] = val;
+                msg.buf = buf;
+                ret = adap->algo->master_xfer(adap, &msg, 1);
+        } else {
+                union i2c_smbus_data data;
+
+                data.byte = val;
+                ret = adap->algo->smbus_xfer(adap, client->addr,
+                                             client->flags,
+                                             I2C_SMBUS_WRITE,
+                                             command,
+                                             I2C_SMBUS_BYTE_DATA, &data);
+        }
+
+        return ret;
+}
+
+/*
+ * Read from chip register. Don't use i2c_transfer()/i2c_smbus_xfer()
+ * as they will try to lock adapter a second time.
+ */
+static int pca9541_reg_read(struct i2c_client *client, u8 command)
+{
+        struct i2c_adapter *adap = client->adapter;
+        int ret;
+        u8 val;
+
+        if (adap->algo->master_xfer) {
+                struct i2c_msg msg[2] = {
+                        {
+                                .addr = client->addr,
+                                .flags = 0,
+                                .len = 1,
+                                .buf = &command
+                        },
+                        {
+                                .addr = client->addr,
+                                .flags = I2C_M_RD,
+                                .len = 1,
+                                .buf = &val
+                        }
+                };
+                ret = adap->algo->master_xfer(adap, msg, 2);
+                if (ret == 2)
+                        ret = val;
+                else if (ret >= 0)
+                        ret = -EIO;
+        } else {
+                union i2c_smbus_data data;
+
+                ret = adap->algo->smbus_xfer(adap, client->addr,
+                                             client->flags,
+                                             I2C_SMBUS_READ,
+                                             command,
+                                             I2C_SMBUS_BYTE_DATA, &data);
+                if (!ret)
+                        ret = data.byte;
+        }
+        return ret;
+}
+
+/*
+ * Arbitration management functions
+ */
+
+/* Release bus. Also reset NTESTON and BUSINIT if it was set. */
+static void pca9541_release_bus(struct i2c_client *client)
+{
+        int reg;
+
+        reg = pca9541_reg_read(client, PCA9541_CONTROL);
+        if (reg >= 0 && !busoff(reg) && mybus(reg))
+                pca9541_reg_write(client, PCA9541_CONTROL,
+                                  (reg & PCA9541_CTL_NBUSON) >> 1);
+}
+
+/*
+ * Arbitration is defined as a two-step process. A bus master can only activate
+ * the slave bus if it owns it; otherwise it has to request ownership first.
+ * This multi-step process ensures that access contention is resolved
+ * gracefully.
+ *
+ * Bus  Ownership       Other master    Action
+ * state                requested access
+ * ----------------------------------------------------
+ * off  -               yes             wait for arbitration timeout or
+ *                                      for other master to drop request
+ * off  no              no              take ownership
+ * off  yes             no              turn on bus
+ * on   yes             -               done
+ * on   no              -               wait for arbitration timeout or
+ *                                      for other master to release bus
+ *
+ * The main contention point occurs if the slave bus is off and both masters
+ * request ownership at the same time. In this case, one master will turn on
+ * the slave bus, believing that it owns it. The other master will request
+ * bus ownership. Result is that the bus is turned on, and master which did
+ * _not_ own the slave bus before ends up owning it.
+ */
+
+/* Control commands per PCA9541 datasheet */
+static const u8 pca9541_control[16] = {
+        4, 0, 1, 5, 4, 4, 5, 5, 0, 0, 1, 1, 0, 4, 5, 1
+};
+
+/*
+ * Channel arbitration
+ *
+ * Return values:
+ *  <0: error
+ *  0 : bus not acquired
+ *  1 : bus acquired
+ */
+static int pca9541_arbitrate(struct i2c_client *client)
+{
+        struct pca9541 *data = i2c_get_clientdata(client);
+        int reg;
+
+        reg = pca9541_reg_read(client, PCA9541_CONTROL);
+        if (reg < 0)
+                return reg;
+
+        if (busoff(reg)) {
+                int istat;
+                /*
+                 * Bus is off. Request ownership or turn it on unless
+                 * other master requested ownership.
+                 */
+                istat = pca9541_reg_read(client, PCA9541_ISTAT);
+                if (!(istat & PCA9541_ISTAT_NMYTEST)
+                    || time_is_before_eq_jiffies(data->arb_timeout)) {
+                        /*
+                         * Other master did not request ownership,
+                         * or arbitration timeout expired. Take the bus.
+                         */
+                        pca9541_reg_write(client,
+                                          PCA9541_CONTROL,
+                                          pca9541_control[reg & 0x0f]
+                                          | PCA9541_CTL_NTESTON);
+                        data->select_timeout = SELECT_DELAY_SHORT;
+                } else {
+                        /*
+                         * Other master requested ownership.
+                         * Set extra long timeout to give it time to acquire it.
+                         */
+                        data->select_timeout = SELECT_DELAY_LONG * 2;
+                }
+        } else if (mybus(reg)) {
+                /*
+                 * Bus is on, and we own it. We are done with acquisition.
+                 * Reset NTESTON and BUSINIT, then return success.
+                 */
+                if (reg & (PCA9541_CTL_NTESTON | PCA9541_CTL_BUSINIT))
+                        pca9541_reg_write(client,
+                                          PCA9541_CONTROL,
+                                          reg & ~(PCA9541_CTL_NTESTON
+                                                  | PCA9541_CTL_BUSINIT));
+                return 1;
+        } else {
+                /*
+                 * Other master owns the bus.
+                 * If arbitration timeout has expired, force ownership.
+                 * Otherwise request it.
+                 */
+                data->select_timeout = SELECT_DELAY_LONG;
+                if (time_is_before_eq_jiffies(data->arb_timeout)) {
+                        /* Time is up, take the bus and reset it. */
+                        pca9541_reg_write(client,
+                                          PCA9541_CONTROL,
+                                          pca9541_control[reg & 0x0f]
+                                          | PCA9541_CTL_BUSINIT
+                                          | PCA9541_CTL_NTESTON);
+                } else {
+                        /* Request bus ownership if needed */
+                        if (!(reg & PCA9541_CTL_NTESTON))
+                                pca9541_reg_write(client,
+                                                  PCA9541_CONTROL,
+                                                  reg | PCA9541_CTL_NTESTON);
+                }
+        }
+        return 0;
+}
+
+static int pca9541_select_chan(struct i2c_adapter *adap, void *client, u32 chan)
+{
+        struct pca9541 *data = i2c_get_clientdata(client);
+        int ret;
+        unsigned long timeout = jiffies + ARB2_TIMEOUT;
+                /* give up after this time */
+
+        data->arb_timeout = jiffies + ARB_TIMEOUT;
+                /* force bus ownership after this time */
+
+        do {
+                ret = pca9541_arbitrate(client);
+                if (ret)
+                        return ret < 0 ? ret : 0;
+
+                if (data->select_timeout == SELECT_DELAY_SHORT)
+                        udelay(data->select_timeout);
+                else
+                        msleep(data->select_timeout / 1000);
+        } while (time_is_after_eq_jiffies(timeout));
+
+        return -ETIMEDOUT;
+}
+
+static int pca9541_release_chan(struct i2c_adapter *adap,
+                                void *client, u32 chan)
+{
+        pca9541_release_bus(client);
+        return 0;
+}
+
+/*
+ * I2C init/probing/exit functions
+ */
+static int pca9541_probe(struct i2c_client *client,
+                         const struct i2c_device_id *id)
+{
+        struct i2c_adapter *adap = client->adapter;
+        struct pca954x_platform_data *pdata = client->dev.platform_data;
+        struct pca9541 *data;
+        int force;
+        int ret = -ENODEV;
+
+        if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE_DATA))
+                goto err;
+
+        data = kzalloc(sizeof(struct pca9541), GFP_KERNEL);
+        if (!data) {
+                ret = -ENOMEM;
+                goto err;
+        }
+
+        i2c_set_clientdata(client, data);
+
+        /*
+         * I2C accesses are unprotected here.
+         * We have to lock the adapter before releasing the bus.
+         */
+        i2c_lock_adapter(adap);
+        pca9541_release_bus(client);
+        i2c_unlock_adapter(adap);
+
+        /* Create mux adapter */
+
+        force = 0;
+        if (pdata)
+                force = pdata->modes[0].adap_id;
+        data->mux_adap = i2c_add_mux_adapter(adap, client, force, 0,
+                                             pca9541_select_chan,
+                                             pca9541_release_chan);
+
+        if (data->mux_adap == NULL) {
+                dev_err(&client->dev, "failed to register master selector\n");
+                goto exit_free;
+        }
+
+        dev_info(&client->dev, "registered master selector for I2C %s\n",
+                 client->name);
+
+        return 0;
+
+exit_free:
+        kfree(data);
+err:
+        return ret;
+}
+
+static int pca9541_remove(struct i2c_client *client)
+{
+        struct pca9541 *data = i2c_get_clientdata(client);
+
+        i2c_del_mux_adapter(data->mux_adap);
+
+        kfree(data);
+        return 0;
+}
+
+static struct i2c_driver pca9541_driver = {
+        .driver = {
+                   .name = "pca9541",
+                   .owner = THIS_MODULE,
+                   },
+        .probe = pca9541_probe,
+        .remove = pca9541_remove,
+        .id_table = pca9541_id,
+};
+
+static int __init pca9541_init(void)
+{
+        return i2c_add_driver(&pca9541_driver);
+}
+
+static void __exit pca9541_exit(void)
+{
+        i2c_del_driver(&pca9541_driver);
+}
+
+module_init(pca9541_init);
+module_exit(pca9541_exit);
+
+MODULE_AUTHOR("Guenter Roeck <guenter.roeck@ericsson.com>");
+MODULE_DESCRIPTION("PCA9541 I2C master selector driver");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/i2c/muxes/pca954x.c b/drivers/i2c/muxes/pca954x.c
new file mode 100644
index 000000000000..54e1ce73534b
--- /dev/null
+++ b/drivers/i2c/muxes/pca954x.c
@@ -0,0 +1,301 @@
+/*
+ * I2C multiplexer
+ *
+ * Copyright (c) 2008-2009 Rodolfo Giometti <giometti@linux.it>
+ * Copyright (c) 2008-2009 Eurotech S.p.A. <info@eurotech.it>
+ *
+ * This module supports the PCA954x series of I2C multiplexer/switch chips
+ * made by Philips Semiconductors.
+ * This includes the:
+ *       PCA9540, PCA9542, PCA9543, PCA9544, PCA9545, PCA9546, PCA9547
+ *       and PCA9548.
+ *
+ * These chips are all controlled via the I2C bus itself, and all have a
+ * single 8-bit register. The upstream "parent" bus fans out to two,
+ * four, or eight downstream busses or channels; which of these
+ * are selected is determined by the chip type and register contents. A
+ * mux can select only one sub-bus at a time; a switch can select any
+ * combination simultaneously.
+ *
+ * Based on:
+ *      pca954x.c from Kumar Gala <galak@kernel.crashing.org>
+ * Copyright (C) 2006
+ *
+ * Based on:
+ *      pca954x.c from Ken Harrenstien
+ * Copyright (C) 2004 Google, Inc. (Ken Harrenstien)
+ *
+ * Based on:
+ *      i2c-virtual_cb.c from Brian Kuschak <bkuschak@yahoo.com>
+ * and
+ *      pca9540.c from Jean Delvare <khali@linux-fr.org>.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/device.h>
+#include <linux/i2c.h>
+#include <linux/i2c-mux.h>
+
+#include <linux/i2c/pca954x.h>
+
+#define PCA954X_MAX_NCHANS 8
+
+enum pca_type {
+        pca_9540,
+        pca_9542,
+        pca_9543,
+        pca_9544,
+        pca_9545,
+        pca_9546,
+        pca_9547,
+        pca_9548,
+};
+
+struct pca954x {
+        enum pca_type type;
+        struct i2c_adapter *virt_adaps[PCA954X_MAX_NCHANS];
+
+        u8 last_chan;           /* last register value */
+};
+
+struct chip_desc {
+        u8 nchans;
+        u8 enable;      /* used for muxes only */
+        enum muxtype {
+                pca954x_ismux = 0,
+                pca954x_isswi
+        } muxtype;
+};
+
+/* Provide specs for the PCA954x types we know about */
+static const struct chip_desc chips[] = {
+        [pca_9540] = {
+                .nchans = 2,
+                .enable = 0x4,
+                .muxtype = pca954x_ismux,
+        },
+        [pca_9543] = {
+                .nchans = 2,
+                .muxtype = pca954x_isswi,
+        },
+        [pca_9544] = {
+                .nchans = 4,
+                .enable = 0x4,
+                .muxtype = pca954x_ismux,
+        },
+        [pca_9545] = {
+                .nchans = 4,
+                .muxtype = pca954x_isswi,
+        },
+        [pca_9547] = {
+                .nchans = 8,
+                .enable = 0x8,
+                .muxtype = pca954x_ismux,
+        },
+        [pca_9548] = {
+                .nchans = 8,
+                .muxtype = pca954x_isswi,
+        },
+};
+
+static const struct i2c_device_id pca954x_id[] = {
+        { "pca9540", pca_9540 },
+        { "pca9542", pca_9540 },
+        { "pca9543", pca_9543 },
+        { "pca9544", pca_9544 },
+        { "pca9545", pca_9545 },
+        { "pca9546", pca_9545 },
+        { "pca9547", pca_9547 },
+        { "pca9548", pca_9548 },
+        { }
+};
+MODULE_DEVICE_TABLE(i2c, pca954x_id);
+
+/* Write to mux register. Don't use i2c_transfer()/i2c_smbus_xfer()
+   for this as they will try to lock adapter a second time */
+static int pca954x_reg_write(struct i2c_adapter *adap,
+                             struct i2c_client *client, u8 val)
+{
+        int ret = -ENODEV;
+
+        if (adap->algo->master_xfer) {
+                struct i2c_msg msg;
+                char buf[1];
+
+                msg.addr = client->addr;
+                msg.flags = 0;
+                msg.len = 1;
+                buf[0] = val;
+                msg.buf = buf;
+                ret = adap->algo->master_xfer(adap, &msg, 1);
+        } else {
+                union i2c_smbus_data data;
+                ret = adap->algo->smbus_xfer(adap, client->addr,
+                                             client->flags,
+                                             I2C_SMBUS_WRITE,
+                                             val, I2C_SMBUS_BYTE, &data);
+        }
+
+        return ret;
+}
+
+static int pca954x_select_chan(struct i2c_adapter *adap,
+                               void *client, u32 chan)
+{
+        struct pca954x *data = i2c_get_clientdata(client);
+        const struct chip_desc *chip = &chips[data->type];
+        u8 regval;
+        int ret = 0;
+
+        /* we make switches look like muxes, not sure how to be smarter */
+        if (chip->muxtype == pca954x_ismux)
+                regval = chan | chip->enable;
+        else
+                regval = 1 << chan;
+
+        /* Only select the channel if its different from the last channel */
+        if (data->last_chan != regval) {
+                ret = pca954x_reg_write(adap, client, regval);
+                data->last_chan = regval;
+        }
+
+        return ret;
+}
+
+static int pca954x_deselect_mux(struct i2c_adapter *adap,
+                                void *client, u32 chan)
+{
+        struct pca954x *data = i2c_get_clientdata(client);
+
+        /* Deselect active channel */
+        data->last_chan = 0;
+        return pca954x_reg_write(adap, client, data->last_chan);
+}
+
+/*
+ * I2C init/probing/exit functions
+ */
+static int pca954x_probe(struct i2c_client *client,
+                         const struct i2c_device_id *id)
+{
+        struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent);
+        struct pca954x_platform_data *pdata = client->dev.platform_data;
+        int num, force;
+        struct pca954x *data;
+        int ret = -ENODEV;
+
+        if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE))
+                goto err;
+
+        data = kzalloc(sizeof(struct pca954x), GFP_KERNEL);
+        if (!data) {
+                ret = -ENOMEM;
+                goto err;
+        }
+
+        i2c_set_clientdata(client, data);
+
+        /* Read the mux register at addr to verify
+         * that the mux is in fact present.
+         */
+        if (i2c_smbus_read_byte(client) < 0) {
+                dev_warn(&client->dev, "probe failed\n");
+                goto exit_free;
+        }
+
+        data->type = id->driver_data;
+        data->last_chan = 0;               /* force the first selection */
+
+        /* Now create an adapter for each channel */
+        for (num = 0; num < chips[data->type].nchans; num++) {
+                force = 0;                        /* dynamic adap number */
+                if (pdata) {
+                        if (num < pdata->num_modes)
+                                /* force static number */
+                                force = pdata->modes[num].adap_id;
+                        else
+                                /* discard unconfigured channels */
+                                break;
+                }
+
+                data->virt_adaps[num] =
+                        i2c_add_mux_adapter(adap, client,
+                                force, num, pca954x_select_chan,
+                                (pdata && pdata->modes[num].deselect_on_exit)
+                                        ? pca954x_deselect_mux : NULL);
+
+                if (data->virt_adaps[num] == NULL) {
+                        ret = -ENODEV;
+                        dev_err(&client->dev,
+                                "failed to register multiplexed adapter"
+                                " %d as bus %d\n", num, force);
+                        goto virt_reg_failed;
+                }
+        }
+
+        dev_info(&client->dev,
+                 "registered %d multiplexed busses for I2C %s %s\n",
+                 num, chips[data->type].muxtype == pca954x_ismux
+                                ? "mux" : "switch", client->name);
+
+        return 0;
+
+virt_reg_failed:
+        for (num--; num >= 0; num--)
+                i2c_del_mux_adapter(data->virt_adaps[num]);
+exit_free:
+        kfree(data);
+err:
+        return ret;
+}
+
+static int pca954x_remove(struct i2c_client *client)
+{
+        struct pca954x *data = i2c_get_clientdata(client);
+        const struct chip_desc *chip = &chips[data->type];
+        int i, err;
+
+        for (i = 0; i < chip->nchans; ++i)
+                if (data->virt_adaps[i]) {
+                        err = i2c_del_mux_adapter(data->virt_adaps[i]);
+                        if (err)
+                                return err;
+                        data->virt_adaps[i] = NULL;
+                }
+
+        kfree(data);
+        return 0;
+}
+
+static struct i2c_driver pca954x_driver = {
+        .driver         = {
+                .name   = "pca954x",
+                .owner  = THIS_MODULE,
+        },
+        .probe          = pca954x_probe,
+        .remove         = pca954x_remove,
+        .id_table       = pca954x_id,
+};
+
+static int __init pca954x_init(void)
+{
+        return i2c_add_driver(&pca954x_driver);
+}
+
+static void __exit pca954x_exit(void)
+{
+        i2c_del_driver(&pca954x_driver);
+}
+
+module_init(pca954x_init);
+module_exit(pca954x_exit);
+
+MODULE_AUTHOR("Rodolfo Giometti <giometti@linux.it>");
+MODULE_DESCRIPTION("PCA954x I2C mux/switch driver");
+MODULE_LICENSE("GPL v2");