diff options
author | Chew, Chiau Ee <chiau.ee.chew@intel.com> | 2014-03-07 09:12:50 -0500 |
---|---|---|
committer | Wolfram Sang <wsa@the-dreams.de> | 2014-03-10 11:17:47 -0400 |
commit | ceccd298f6fd537457576017d604fc5aa6d3c82a (patch) | |
tree | ba525fb7f0c9b5fdef04fa9dc79823afa0fc49a9 /drivers/i2c | |
parent | 0977f27338777fab04e20f769b869bc7726ab0ac (diff) |
i2c: designware-pci: add 10-bit addressing mode functionality for BYT I2C
All the I2C controllers on Intel BayTrail LPSS subsystem able
to support 10-bit addressing mode functionality.
Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
Signed-off-by: Ong, Boon Leong <boon.leong.ong@intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Diffstat (limited to 'drivers/i2c')
-rw-r--r-- | drivers/i2c/busses/i2c-designware-pcidrv.c | 17 |
1 files changed, 11 insertions, 6 deletions
diff --git a/drivers/i2c/busses/i2c-designware-pcidrv.c b/drivers/i2c/busses/i2c-designware-pcidrv.c index 80c3b5e0a5c8..094509bcc089 100644 --- a/drivers/i2c/busses/i2c-designware-pcidrv.c +++ b/drivers/i2c/busses/i2c-designware-pcidrv.c | |||
@@ -64,12 +64,19 @@ struct dw_pci_controller { | |||
64 | u32 tx_fifo_depth; | 64 | u32 tx_fifo_depth; |
65 | u32 rx_fifo_depth; | 65 | u32 rx_fifo_depth; |
66 | u32 clk_khz; | 66 | u32 clk_khz; |
67 | u32 functionality; | ||
67 | }; | 68 | }; |
68 | 69 | ||
69 | #define INTEL_MID_STD_CFG (DW_IC_CON_MASTER | \ | 70 | #define INTEL_MID_STD_CFG (DW_IC_CON_MASTER | \ |
70 | DW_IC_CON_SLAVE_DISABLE | \ | 71 | DW_IC_CON_SLAVE_DISABLE | \ |
71 | DW_IC_CON_RESTART_EN) | 72 | DW_IC_CON_RESTART_EN) |
72 | 73 | ||
74 | #define DW_DEFAULT_FUNCTIONALITY (I2C_FUNC_I2C | \ | ||
75 | I2C_FUNC_SMBUS_BYTE | \ | ||
76 | I2C_FUNC_SMBUS_BYTE_DATA | \ | ||
77 | I2C_FUNC_SMBUS_WORD_DATA | \ | ||
78 | I2C_FUNC_SMBUS_I2C_BLOCK) | ||
79 | |||
73 | static struct dw_pci_controller dw_pci_controllers[] = { | 80 | static struct dw_pci_controller dw_pci_controllers[] = { |
74 | [moorestown_0] = { | 81 | [moorestown_0] = { |
75 | .bus_num = 0, | 82 | .bus_num = 0, |
@@ -140,6 +147,7 @@ static struct dw_pci_controller dw_pci_controllers[] = { | |||
140 | .tx_fifo_depth = 32, | 147 | .tx_fifo_depth = 32, |
141 | .rx_fifo_depth = 32, | 148 | .rx_fifo_depth = 32, |
142 | .clk_khz = 100000, | 149 | .clk_khz = 100000, |
150 | .functionality = I2C_FUNC_10BIT_ADDR, | ||
143 | }, | 151 | }, |
144 | }; | 152 | }; |
145 | static struct i2c_algorithm i2c_dw_algo = { | 153 | static struct i2c_algorithm i2c_dw_algo = { |
@@ -212,12 +220,9 @@ static int i2c_dw_pci_probe(struct pci_dev *pdev, | |||
212 | dev->get_clk_rate_khz = i2c_dw_get_clk_rate_khz; | 220 | dev->get_clk_rate_khz = i2c_dw_get_clk_rate_khz; |
213 | dev->base = pcim_iomap_table(pdev)[0]; | 221 | dev->base = pcim_iomap_table(pdev)[0]; |
214 | dev->dev = &pdev->dev; | 222 | dev->dev = &pdev->dev; |
215 | dev->functionality = | 223 | dev->functionality = controller->functionality | |
216 | I2C_FUNC_I2C | | 224 | DW_DEFAULT_FUNCTIONALITY; |
217 | I2C_FUNC_SMBUS_BYTE | | 225 | |
218 | I2C_FUNC_SMBUS_BYTE_DATA | | ||
219 | I2C_FUNC_SMBUS_WORD_DATA | | ||
220 | I2C_FUNC_SMBUS_I2C_BLOCK; | ||
221 | dev->master_cfg = controller->bus_cfg; | 226 | dev->master_cfg = controller->bus_cfg; |
222 | 227 | ||
223 | pci_set_drvdata(pdev, dev); | 228 | pci_set_drvdata(pdev, dev); |