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authorGregory CLEMENT <gregory.clement@free-electrons.com>2013-08-22 10:19:06 -0400
committerWolfram Sang <wsa@the-dreams.de>2013-08-23 04:15:51 -0400
commitc1d15b68aab86f1f3b602fa65e7618c0065d46e6 (patch)
tree929537c122d396ce4e763b1e73a199a64eb70663 /drivers/i2c
parent930ab3d403ae43f19d7e6d972139e02c9b8a5ec6 (diff)
i2c: mv64xxx: Fix timing issue on Armada XP (errata FE-8471889)
All the Armada XP (mv78230, mv78260 and mv78460) have a silicon issue in the I2C controller which violate the i2c repeated start timing. The I2C standard requires a minimum of 4.7us for the repeated start condition whereas the I2C controller of the Armada XP this time is 2.9us. So this patch adds a 5us delay for the start case only if the the compatible i2c-mv78230 is set. Based on the initals patches from Zbigniew Bodek Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Zbigniew Bodek <zbb@semihalf.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Diffstat (limited to 'drivers/i2c')
-rw-r--r--drivers/i2c/busses/i2c-mv64xxx.c15
1 files changed, 13 insertions, 2 deletions
diff --git a/drivers/i2c/busses/i2c-mv64xxx.c b/drivers/i2c/busses/i2c-mv64xxx.c
index 2404c4e0f35c..bc60f9ac7c04 100644
--- a/drivers/i2c/busses/i2c-mv64xxx.c
+++ b/drivers/i2c/busses/i2c-mv64xxx.c
@@ -24,6 +24,7 @@
24#include <linux/of_i2c.h> 24#include <linux/of_i2c.h>
25#include <linux/clk.h> 25#include <linux/clk.h>
26#include <linux/err.h> 26#include <linux/err.h>
27#include <linux/delay.h>
27 28
28#define MV64XXX_I2C_ADDR_ADDR(val) ((val & 0x7f) << 1) 29#define MV64XXX_I2C_ADDR_ADDR(val) ((val & 0x7f) << 1)
29#define MV64XXX_I2C_BAUD_DIV_N(val) (val & 0x7) 30#define MV64XXX_I2C_BAUD_DIV_N(val) (val & 0x7)
@@ -147,6 +148,8 @@ struct mv64xxx_i2c_data {
147 struct i2c_msg *msg; 148 struct i2c_msg *msg;
148 struct i2c_adapter adapter; 149 struct i2c_adapter adapter;
149 bool offload_enabled; 150 bool offload_enabled;
151/* 5us delay in order to avoid repeated start timing violation */
152 bool errata_delay;
150}; 153};
151 154
152static struct mv64xxx_i2c_regs mv64xxx_i2c_regs_mv64xxx = { 155static struct mv64xxx_i2c_regs mv64xxx_i2c_regs_mv64xxx = {
@@ -440,6 +443,9 @@ mv64xxx_i2c_do_action(struct mv64xxx_i2c_data *drv_data)
440 /* Setup for the next message */ 443 /* Setup for the next message */
441 mv64xxx_i2c_prepare_for_io(drv_data, drv_data->msgs); 444 mv64xxx_i2c_prepare_for_io(drv_data, drv_data->msgs);
442 } 445 }
446 if (drv_data->errata_delay)
447 udelay(5);
448
443 /* 449 /*
444 * We're never at the start of the message here, and by this 450 * We're never at the start of the message here, and by this
445 * time it's already too late to do any protocol mangling. 451 * time it's already too late to do any protocol mangling.
@@ -499,6 +505,9 @@ mv64xxx_i2c_do_action(struct mv64xxx_i2c_data *drv_data)
499 writel(drv_data->cntl_bits | MV64XXX_I2C_REG_CONTROL_STOP, 505 writel(drv_data->cntl_bits | MV64XXX_I2C_REG_CONTROL_STOP,
500 drv_data->reg_base + drv_data->reg_offsets.control); 506 drv_data->reg_base + drv_data->reg_offsets.control);
501 drv_data->block = 0; 507 drv_data->block = 0;
508 if (drv_data->errata_delay)
509 udelay(5);
510
502 wake_up(&drv_data->waitq); 511 wake_up(&drv_data->waitq);
503 break; 512 break;
504 513
@@ -766,10 +775,12 @@ mv64xxx_of_config(struct mv64xxx_i2c_data *drv_data,
766 775
767 /* 776 /*
768 * For controllers embedded in new SoCs activate the 777 * For controllers embedded in new SoCs activate the
769 * Transaction Generator support. 778 * Transaction Generator support and the errata fix.
770 */ 779 */
771 if (of_device_is_compatible(np, "marvell,mv78230-i2c")) 780 if (of_device_is_compatible(np, "marvell,mv78230-i2c")) {
772 drv_data->offload_enabled = true; 781 drv_data->offload_enabled = true;
782 drv_data->errata_delay = true;
783 }
773 784
774out: 785out:
775 return rc; 786 return rc;