diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2010-08-14 14:57:54 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-08-14 14:57:54 -0400 |
commit | d0a0c28cf178943afaf22f87957b73c47497cb4b (patch) | |
tree | c07ee70a42bdf046d0ce8540b4e86d2c16f05b6c /drivers/i2c | |
parent | ce00f7feb0a497b4280e1efe16e03728ed292687 (diff) | |
parent | f6e1901c4c596238abe6735bb20593f2734f757e (diff) |
Merge branch 'for-linus/i2c-2636' of git://git.fluff.org/bjdooks/linux
* 'for-linus/i2c-2636' of git://git.fluff.org/bjdooks/linux:
i2c/nuc900: add i2c driver support for nuc900
i2c: Enable NXP LPC support in Kconfig
i2c-pxa: fix compiler warning, due to missing const
i2c: davinci: bus recovery procedure to clear the bus
i2c: davinci: Add cpufreq support
i2c: davinci: Add suspend/resume support
i2c: davinci: Add helper functions for power management
i2c: davinci: misc. cleanups: remove MOD_REG_BIT and IO_ADDRESS usage
i2c: davinci: Fix smbus Oops with AIC33 usage
Diffstat (limited to 'drivers/i2c')
-rw-r--r-- | drivers/i2c/busses/Kconfig | 11 | ||||
-rw-r--r-- | drivers/i2c/busses/Makefile | 1 | ||||
-rw-r--r-- | drivers/i2c/busses/i2c-davinci.c | 314 | ||||
-rw-r--r-- | drivers/i2c/busses/i2c-nuc900.c | 709 | ||||
-rw-r--r-- | drivers/i2c/busses/i2c-pxa.c | 2 |
5 files changed, 971 insertions, 66 deletions
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig index 15a9702e2941..6539ac2907e9 100644 --- a/drivers/i2c/busses/Kconfig +++ b/drivers/i2c/busses/Kconfig | |||
@@ -448,6 +448,13 @@ config I2C_NOMADIK | |||
448 | If you say yes to this option, support will be included for the | 448 | If you say yes to this option, support will be included for the |
449 | I2C interface from ST-Ericsson's Nomadik and Ux500 architectures. | 449 | I2C interface from ST-Ericsson's Nomadik and Ux500 architectures. |
450 | 450 | ||
451 | config I2C_NUC900 | ||
452 | tristate "NUC900 I2C Driver" | ||
453 | depends on ARCH_W90X900 | ||
454 | help | ||
455 | Say Y here to include support for I2C controller in the | ||
456 | Winbond/Nuvoton NUC900 based System-on-Chip devices. | ||
457 | |||
451 | config I2C_OCORES | 458 | config I2C_OCORES |
452 | tristate "OpenCores I2C Controller" | 459 | tristate "OpenCores I2C Controller" |
453 | depends on EXPERIMENTAL | 460 | depends on EXPERIMENTAL |
@@ -496,8 +503,8 @@ config I2C_PMCMSP | |||
496 | will be called i2c-pmcmsp. | 503 | will be called i2c-pmcmsp. |
497 | 504 | ||
498 | config I2C_PNX | 505 | config I2C_PNX |
499 | tristate "I2C bus support for Philips PNX targets" | 506 | tristate "I2C bus support for Philips PNX and NXP LPC targets" |
500 | depends on ARCH_PNX4008 | 507 | depends on ARCH_PNX4008 || ARCH_LPC32XX |
501 | help | 508 | help |
502 | This driver supports the Philips IP3204 I2C IP block master and/or | 509 | This driver supports the Philips IP3204 I2C IP block master and/or |
503 | slave controller | 510 | slave controller |
diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile index 936880bd1dc5..c3ef49230cba 100644 --- a/drivers/i2c/busses/Makefile +++ b/drivers/i2c/busses/Makefile | |||
@@ -43,6 +43,7 @@ obj-$(CONFIG_I2C_IXP2000) += i2c-ixp2000.o | |||
43 | obj-$(CONFIG_I2C_MPC) += i2c-mpc.o | 43 | obj-$(CONFIG_I2C_MPC) += i2c-mpc.o |
44 | obj-$(CONFIG_I2C_MV64XXX) += i2c-mv64xxx.o | 44 | obj-$(CONFIG_I2C_MV64XXX) += i2c-mv64xxx.o |
45 | obj-$(CONFIG_I2C_NOMADIK) += i2c-nomadik.o | 45 | obj-$(CONFIG_I2C_NOMADIK) += i2c-nomadik.o |
46 | obj-$(CONFIG_I2C_NUC900) += i2c-nuc900.o | ||
46 | obj-$(CONFIG_I2C_OCORES) += i2c-ocores.o | 47 | obj-$(CONFIG_I2C_OCORES) += i2c-ocores.o |
47 | obj-$(CONFIG_I2C_OMAP) += i2c-omap.o | 48 | obj-$(CONFIG_I2C_OMAP) += i2c-omap.o |
48 | obj-$(CONFIG_I2C_PASEMI) += i2c-pasemi.o | 49 | obj-$(CONFIG_I2C_PASEMI) += i2c-pasemi.o |
diff --git a/drivers/i2c/busses/i2c-davinci.c b/drivers/i2c/busses/i2c-davinci.c index 4523364e6722..2222c87876b9 100644 --- a/drivers/i2c/busses/i2c-davinci.c +++ b/drivers/i2c/busses/i2c-davinci.c | |||
@@ -36,14 +36,16 @@ | |||
36 | #include <linux/platform_device.h> | 36 | #include <linux/platform_device.h> |
37 | #include <linux/io.h> | 37 | #include <linux/io.h> |
38 | #include <linux/slab.h> | 38 | #include <linux/slab.h> |
39 | #include <linux/cpufreq.h> | ||
40 | #include <linux/gpio.h> | ||
39 | 41 | ||
40 | #include <mach/hardware.h> | 42 | #include <mach/hardware.h> |
41 | |||
42 | #include <mach/i2c.h> | 43 | #include <mach/i2c.h> |
43 | 44 | ||
44 | /* ----- global defines ----------------------------------------------- */ | 45 | /* ----- global defines ----------------------------------------------- */ |
45 | 46 | ||
46 | #define DAVINCI_I2C_TIMEOUT (1*HZ) | 47 | #define DAVINCI_I2C_TIMEOUT (1*HZ) |
48 | #define DAVINCI_I2C_MAX_TRIES 2 | ||
47 | #define I2C_DAVINCI_INTR_ALL (DAVINCI_I2C_IMR_AAS | \ | 49 | #define I2C_DAVINCI_INTR_ALL (DAVINCI_I2C_IMR_AAS | \ |
48 | DAVINCI_I2C_IMR_SCD | \ | 50 | DAVINCI_I2C_IMR_SCD | \ |
49 | DAVINCI_I2C_IMR_ARDY | \ | 51 | DAVINCI_I2C_IMR_ARDY | \ |
@@ -72,37 +74,29 @@ | |||
72 | #define DAVINCI_I2C_IVR_NACK 0x02 | 74 | #define DAVINCI_I2C_IVR_NACK 0x02 |
73 | #define DAVINCI_I2C_IVR_AL 0x01 | 75 | #define DAVINCI_I2C_IVR_AL 0x01 |
74 | 76 | ||
75 | #define DAVINCI_I2C_STR_BB (1 << 12) | 77 | #define DAVINCI_I2C_STR_BB BIT(12) |
76 | #define DAVINCI_I2C_STR_RSFULL (1 << 11) | 78 | #define DAVINCI_I2C_STR_RSFULL BIT(11) |
77 | #define DAVINCI_I2C_STR_SCD (1 << 5) | 79 | #define DAVINCI_I2C_STR_SCD BIT(5) |
78 | #define DAVINCI_I2C_STR_ARDY (1 << 2) | 80 | #define DAVINCI_I2C_STR_ARDY BIT(2) |
79 | #define DAVINCI_I2C_STR_NACK (1 << 1) | 81 | #define DAVINCI_I2C_STR_NACK BIT(1) |
80 | #define DAVINCI_I2C_STR_AL (1 << 0) | 82 | #define DAVINCI_I2C_STR_AL BIT(0) |
81 | 83 | ||
82 | #define DAVINCI_I2C_MDR_NACK (1 << 15) | 84 | #define DAVINCI_I2C_MDR_NACK BIT(15) |
83 | #define DAVINCI_I2C_MDR_STT (1 << 13) | 85 | #define DAVINCI_I2C_MDR_STT BIT(13) |
84 | #define DAVINCI_I2C_MDR_STP (1 << 11) | 86 | #define DAVINCI_I2C_MDR_STP BIT(11) |
85 | #define DAVINCI_I2C_MDR_MST (1 << 10) | 87 | #define DAVINCI_I2C_MDR_MST BIT(10) |
86 | #define DAVINCI_I2C_MDR_TRX (1 << 9) | 88 | #define DAVINCI_I2C_MDR_TRX BIT(9) |
87 | #define DAVINCI_I2C_MDR_XA (1 << 8) | 89 | #define DAVINCI_I2C_MDR_XA BIT(8) |
88 | #define DAVINCI_I2C_MDR_RM (1 << 7) | 90 | #define DAVINCI_I2C_MDR_RM BIT(7) |
89 | #define DAVINCI_I2C_MDR_IRS (1 << 5) | 91 | #define DAVINCI_I2C_MDR_IRS BIT(5) |
90 | 92 | ||
91 | #define DAVINCI_I2C_IMR_AAS (1 << 6) | 93 | #define DAVINCI_I2C_IMR_AAS BIT(6) |
92 | #define DAVINCI_I2C_IMR_SCD (1 << 5) | 94 | #define DAVINCI_I2C_IMR_SCD BIT(5) |
93 | #define DAVINCI_I2C_IMR_XRDY (1 << 4) | 95 | #define DAVINCI_I2C_IMR_XRDY BIT(4) |
94 | #define DAVINCI_I2C_IMR_RRDY (1 << 3) | 96 | #define DAVINCI_I2C_IMR_RRDY BIT(3) |
95 | #define DAVINCI_I2C_IMR_ARDY (1 << 2) | 97 | #define DAVINCI_I2C_IMR_ARDY BIT(2) |
96 | #define DAVINCI_I2C_IMR_NACK (1 << 1) | 98 | #define DAVINCI_I2C_IMR_NACK BIT(1) |
97 | #define DAVINCI_I2C_IMR_AL (1 << 0) | 99 | #define DAVINCI_I2C_IMR_AL BIT(0) |
98 | |||
99 | #define MOD_REG_BIT(val, mask, set) do { \ | ||
100 | if (set) { \ | ||
101 | val |= mask; \ | ||
102 | } else { \ | ||
103 | val &= ~mask; \ | ||
104 | } \ | ||
105 | } while (0) | ||
106 | 100 | ||
107 | struct davinci_i2c_dev { | 101 | struct davinci_i2c_dev { |
108 | struct device *dev; | 102 | struct device *dev; |
@@ -113,8 +107,13 @@ struct davinci_i2c_dev { | |||
113 | u8 *buf; | 107 | u8 *buf; |
114 | size_t buf_len; | 108 | size_t buf_len; |
115 | int irq; | 109 | int irq; |
110 | int stop; | ||
116 | u8 terminate; | 111 | u8 terminate; |
117 | struct i2c_adapter adapter; | 112 | struct i2c_adapter adapter; |
113 | #ifdef CONFIG_CPU_FREQ | ||
114 | struct completion xfr_complete; | ||
115 | struct notifier_block freq_transition; | ||
116 | #endif | ||
118 | }; | 117 | }; |
119 | 118 | ||
120 | /* default platform data to use if not supplied in the platform_device */ | 119 | /* default platform data to use if not supplied in the platform_device */ |
@@ -134,12 +133,59 @@ static inline u16 davinci_i2c_read_reg(struct davinci_i2c_dev *i2c_dev, int reg) | |||
134 | return __raw_readw(i2c_dev->base + reg); | 133 | return __raw_readw(i2c_dev->base + reg); |
135 | } | 134 | } |
136 | 135 | ||
137 | /* | 136 | /* Generate a pulse on the i2c clock pin. */ |
138 | * This functions configures I2C and brings I2C out of reset. | 137 | static void generic_i2c_clock_pulse(unsigned int scl_pin) |
139 | * This function is called during I2C init function. This function | 138 | { |
140 | * also gets called if I2C encounters any errors. | 139 | u16 i; |
140 | |||
141 | if (scl_pin) { | ||
142 | /* Send high and low on the SCL line */ | ||
143 | for (i = 0; i < 9; i++) { | ||
144 | gpio_set_value(scl_pin, 0); | ||
145 | udelay(20); | ||
146 | gpio_set_value(scl_pin, 1); | ||
147 | udelay(20); | ||
148 | } | ||
149 | } | ||
150 | } | ||
151 | |||
152 | /* This routine does i2c bus recovery as specified in the | ||
153 | * i2c protocol Rev. 03 section 3.16 titled "Bus clear" | ||
141 | */ | 154 | */ |
142 | static int i2c_davinci_init(struct davinci_i2c_dev *dev) | 155 | static void i2c_recover_bus(struct davinci_i2c_dev *dev) |
156 | { | ||
157 | u32 flag = 0; | ||
158 | struct davinci_i2c_platform_data *pdata = dev->dev->platform_data; | ||
159 | |||
160 | dev_err(dev->dev, "initiating i2c bus recovery\n"); | ||
161 | /* Send NACK to the slave */ | ||
162 | flag = davinci_i2c_read_reg(dev, DAVINCI_I2C_MDR_REG); | ||
163 | flag |= DAVINCI_I2C_MDR_NACK; | ||
164 | /* write the data into mode register */ | ||
165 | davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, flag); | ||
166 | if (pdata) | ||
167 | generic_i2c_clock_pulse(pdata->scl_pin); | ||
168 | /* Send STOP */ | ||
169 | flag = davinci_i2c_read_reg(dev, DAVINCI_I2C_MDR_REG); | ||
170 | flag |= DAVINCI_I2C_MDR_STP; | ||
171 | davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, flag); | ||
172 | } | ||
173 | |||
174 | static inline void davinci_i2c_reset_ctrl(struct davinci_i2c_dev *i2c_dev, | ||
175 | int val) | ||
176 | { | ||
177 | u16 w; | ||
178 | |||
179 | w = davinci_i2c_read_reg(i2c_dev, DAVINCI_I2C_MDR_REG); | ||
180 | if (!val) /* put I2C into reset */ | ||
181 | w &= ~DAVINCI_I2C_MDR_IRS; | ||
182 | else /* take I2C out of reset */ | ||
183 | w |= DAVINCI_I2C_MDR_IRS; | ||
184 | |||
185 | davinci_i2c_write_reg(i2c_dev, DAVINCI_I2C_MDR_REG, w); | ||
186 | } | ||
187 | |||
188 | static void i2c_davinci_calc_clk_dividers(struct davinci_i2c_dev *dev) | ||
143 | { | 189 | { |
144 | struct davinci_i2c_platform_data *pdata = dev->dev->platform_data; | 190 | struct davinci_i2c_platform_data *pdata = dev->dev->platform_data; |
145 | u16 psc; | 191 | u16 psc; |
@@ -148,15 +194,6 @@ static int i2c_davinci_init(struct davinci_i2c_dev *dev) | |||
148 | u32 clkh; | 194 | u32 clkh; |
149 | u32 clkl; | 195 | u32 clkl; |
150 | u32 input_clock = clk_get_rate(dev->clk); | 196 | u32 input_clock = clk_get_rate(dev->clk); |
151 | u16 w; | ||
152 | |||
153 | if (!pdata) | ||
154 | pdata = &davinci_i2c_platform_data_default; | ||
155 | |||
156 | /* put I2C into reset */ | ||
157 | w = davinci_i2c_read_reg(dev, DAVINCI_I2C_MDR_REG); | ||
158 | MOD_REG_BIT(w, DAVINCI_I2C_MDR_IRS, 0); | ||
159 | davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, w); | ||
160 | 197 | ||
161 | /* NOTE: I2C Clock divider programming info | 198 | /* NOTE: I2C Clock divider programming info |
162 | * As per I2C specs the following formulas provide prescaler | 199 | * As per I2C specs the following formulas provide prescaler |
@@ -188,12 +225,32 @@ static int i2c_davinci_init(struct davinci_i2c_dev *dev) | |||
188 | davinci_i2c_write_reg(dev, DAVINCI_I2C_CLKH_REG, clkh); | 225 | davinci_i2c_write_reg(dev, DAVINCI_I2C_CLKH_REG, clkh); |
189 | davinci_i2c_write_reg(dev, DAVINCI_I2C_CLKL_REG, clkl); | 226 | davinci_i2c_write_reg(dev, DAVINCI_I2C_CLKL_REG, clkl); |
190 | 227 | ||
228 | dev_dbg(dev->dev, "input_clock = %d, CLK = %d\n", input_clock, clk); | ||
229 | } | ||
230 | |||
231 | /* | ||
232 | * This function configures I2C and brings I2C out of reset. | ||
233 | * This function is called during I2C init function. This function | ||
234 | * also gets called if I2C encounters any errors. | ||
235 | */ | ||
236 | static int i2c_davinci_init(struct davinci_i2c_dev *dev) | ||
237 | { | ||
238 | struct davinci_i2c_platform_data *pdata = dev->dev->platform_data; | ||
239 | |||
240 | if (!pdata) | ||
241 | pdata = &davinci_i2c_platform_data_default; | ||
242 | |||
243 | /* put I2C into reset */ | ||
244 | davinci_i2c_reset_ctrl(dev, 0); | ||
245 | |||
246 | /* compute clock dividers */ | ||
247 | i2c_davinci_calc_clk_dividers(dev); | ||
248 | |||
191 | /* Respond at reserved "SMBus Host" slave address" (and zero); | 249 | /* Respond at reserved "SMBus Host" slave address" (and zero); |
192 | * we seem to have no option to not respond... | 250 | * we seem to have no option to not respond... |
193 | */ | 251 | */ |
194 | davinci_i2c_write_reg(dev, DAVINCI_I2C_OAR_REG, 0x08); | 252 | davinci_i2c_write_reg(dev, DAVINCI_I2C_OAR_REG, 0x08); |
195 | 253 | ||
196 | dev_dbg(dev->dev, "input_clock = %d, CLK = %d\n", input_clock, clk); | ||
197 | dev_dbg(dev->dev, "PSC = %d\n", | 254 | dev_dbg(dev->dev, "PSC = %d\n", |
198 | davinci_i2c_read_reg(dev, DAVINCI_I2C_PSC_REG)); | 255 | davinci_i2c_read_reg(dev, DAVINCI_I2C_PSC_REG)); |
199 | dev_dbg(dev->dev, "CLKL = %d\n", | 256 | dev_dbg(dev->dev, "CLKL = %d\n", |
@@ -204,9 +261,7 @@ static int i2c_davinci_init(struct davinci_i2c_dev *dev) | |||
204 | pdata->bus_freq, pdata->bus_delay); | 261 | pdata->bus_freq, pdata->bus_delay); |
205 | 262 | ||
206 | /* Take the I2C module out of reset: */ | 263 | /* Take the I2C module out of reset: */ |
207 | w = davinci_i2c_read_reg(dev, DAVINCI_I2C_MDR_REG); | 264 | davinci_i2c_reset_ctrl(dev, 1); |
208 | MOD_REG_BIT(w, DAVINCI_I2C_MDR_IRS, 1); | ||
209 | davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, w); | ||
210 | 265 | ||
211 | /* Enable interrupts */ | 266 | /* Enable interrupts */ |
212 | davinci_i2c_write_reg(dev, DAVINCI_I2C_IMR_REG, I2C_DAVINCI_INTR_ALL); | 267 | davinci_i2c_write_reg(dev, DAVINCI_I2C_IMR_REG, I2C_DAVINCI_INTR_ALL); |
@@ -221,14 +276,22 @@ static int i2c_davinci_wait_bus_not_busy(struct davinci_i2c_dev *dev, | |||
221 | char allow_sleep) | 276 | char allow_sleep) |
222 | { | 277 | { |
223 | unsigned long timeout; | 278 | unsigned long timeout; |
279 | static u16 to_cnt; | ||
224 | 280 | ||
225 | timeout = jiffies + dev->adapter.timeout; | 281 | timeout = jiffies + dev->adapter.timeout; |
226 | while (davinci_i2c_read_reg(dev, DAVINCI_I2C_STR_REG) | 282 | while (davinci_i2c_read_reg(dev, DAVINCI_I2C_STR_REG) |
227 | & DAVINCI_I2C_STR_BB) { | 283 | & DAVINCI_I2C_STR_BB) { |
228 | if (time_after(jiffies, timeout)) { | 284 | if (to_cnt <= DAVINCI_I2C_MAX_TRIES) { |
229 | dev_warn(dev->dev, | 285 | if (time_after(jiffies, timeout)) { |
230 | "timeout waiting for bus ready\n"); | 286 | dev_warn(dev->dev, |
231 | return -ETIMEDOUT; | 287 | "timeout waiting for bus ready\n"); |
288 | to_cnt++; | ||
289 | return -ETIMEDOUT; | ||
290 | } else { | ||
291 | to_cnt = 0; | ||
292 | i2c_recover_bus(dev); | ||
293 | i2c_davinci_init(dev); | ||
294 | } | ||
232 | } | 295 | } |
233 | if (allow_sleep) | 296 | if (allow_sleep) |
234 | schedule_timeout(1); | 297 | schedule_timeout(1); |
@@ -250,9 +313,6 @@ i2c_davinci_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg, int stop) | |||
250 | u16 w; | 313 | u16 w; |
251 | int r; | 314 | int r; |
252 | 315 | ||
253 | if (msg->len == 0) | ||
254 | return -EINVAL; | ||
255 | |||
256 | if (!pdata) | 316 | if (!pdata) |
257 | pdata = &davinci_i2c_platform_data_default; | 317 | pdata = &davinci_i2c_platform_data_default; |
258 | /* Introduce a delay, required for some boards (e.g Davinci EVM) */ | 318 | /* Introduce a delay, required for some boards (e.g Davinci EVM) */ |
@@ -264,6 +324,7 @@ i2c_davinci_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg, int stop) | |||
264 | 324 | ||
265 | dev->buf = msg->buf; | 325 | dev->buf = msg->buf; |
266 | dev->buf_len = msg->len; | 326 | dev->buf_len = msg->len; |
327 | dev->stop = stop; | ||
267 | 328 | ||
268 | davinci_i2c_write_reg(dev, DAVINCI_I2C_CNT_REG, dev->buf_len); | 329 | davinci_i2c_write_reg(dev, DAVINCI_I2C_CNT_REG, dev->buf_len); |
269 | 330 | ||
@@ -281,23 +342,40 @@ i2c_davinci_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg, int stop) | |||
281 | flag |= DAVINCI_I2C_MDR_TRX; | 342 | flag |= DAVINCI_I2C_MDR_TRX; |
282 | if (stop) | 343 | if (stop) |
283 | flag |= DAVINCI_I2C_MDR_STP; | 344 | flag |= DAVINCI_I2C_MDR_STP; |
345 | if (msg->len == 0) { | ||
346 | flag |= DAVINCI_I2C_MDR_RM; | ||
347 | flag &= ~DAVINCI_I2C_MDR_STP; | ||
348 | } | ||
284 | 349 | ||
285 | /* Enable receive or transmit interrupts */ | 350 | /* Enable receive or transmit interrupts */ |
286 | w = davinci_i2c_read_reg(dev, DAVINCI_I2C_IMR_REG); | 351 | w = davinci_i2c_read_reg(dev, DAVINCI_I2C_IMR_REG); |
287 | if (msg->flags & I2C_M_RD) | 352 | if (msg->flags & I2C_M_RD) |
288 | MOD_REG_BIT(w, DAVINCI_I2C_IMR_RRDY, 1); | 353 | w |= DAVINCI_I2C_IMR_RRDY; |
289 | else | 354 | else |
290 | MOD_REG_BIT(w, DAVINCI_I2C_IMR_XRDY, 1); | 355 | w |= DAVINCI_I2C_IMR_XRDY; |
291 | davinci_i2c_write_reg(dev, DAVINCI_I2C_IMR_REG, w); | 356 | davinci_i2c_write_reg(dev, DAVINCI_I2C_IMR_REG, w); |
292 | 357 | ||
293 | dev->terminate = 0; | 358 | dev->terminate = 0; |
359 | |||
294 | /* write the data into mode register */ | 360 | /* write the data into mode register */ |
295 | davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, flag); | 361 | davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, flag); |
296 | 362 | ||
363 | /* | ||
364 | * First byte should be set here, not after interrupt, | ||
365 | * because transmit-data-ready interrupt can come before | ||
366 | * NACK-interrupt during sending of previous message and | ||
367 | * ICDXR may have wrong data | ||
368 | */ | ||
369 | if ((!(msg->flags & I2C_M_RD)) && dev->buf_len) { | ||
370 | davinci_i2c_write_reg(dev, DAVINCI_I2C_DXR_REG, *dev->buf++); | ||
371 | dev->buf_len--; | ||
372 | } | ||
373 | |||
297 | r = wait_for_completion_interruptible_timeout(&dev->cmd_complete, | 374 | r = wait_for_completion_interruptible_timeout(&dev->cmd_complete, |
298 | dev->adapter.timeout); | 375 | dev->adapter.timeout); |
299 | if (r == 0) { | 376 | if (r == 0) { |
300 | dev_err(dev->dev, "controller timed out\n"); | 377 | dev_err(dev->dev, "controller timed out\n"); |
378 | i2c_recover_bus(dev); | ||
301 | i2c_davinci_init(dev); | 379 | i2c_davinci_init(dev); |
302 | dev->buf_len = 0; | 380 | dev->buf_len = 0; |
303 | return -ETIMEDOUT; | 381 | return -ETIMEDOUT; |
@@ -334,7 +412,7 @@ i2c_davinci_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg, int stop) | |||
334 | return msg->len; | 412 | return msg->len; |
335 | if (stop) { | 413 | if (stop) { |
336 | w = davinci_i2c_read_reg(dev, DAVINCI_I2C_MDR_REG); | 414 | w = davinci_i2c_read_reg(dev, DAVINCI_I2C_MDR_REG); |
337 | MOD_REG_BIT(w, DAVINCI_I2C_MDR_STP, 1); | 415 | w |= DAVINCI_I2C_MDR_STP; |
338 | davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, w); | 416 | davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, w); |
339 | } | 417 | } |
340 | return -EREMOTEIO; | 418 | return -EREMOTEIO; |
@@ -367,12 +445,17 @@ i2c_davinci_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num) | |||
367 | if (ret < 0) | 445 | if (ret < 0) |
368 | return ret; | 446 | return ret; |
369 | } | 447 | } |
448 | |||
449 | #ifdef CONFIG_CPU_FREQ | ||
450 | complete(&dev->xfr_complete); | ||
451 | #endif | ||
452 | |||
370 | return num; | 453 | return num; |
371 | } | 454 | } |
372 | 455 | ||
373 | static u32 i2c_davinci_func(struct i2c_adapter *adap) | 456 | static u32 i2c_davinci_func(struct i2c_adapter *adap) |
374 | { | 457 | { |
375 | return I2C_FUNC_I2C | (I2C_FUNC_SMBUS_EMUL & ~I2C_FUNC_SMBUS_QUICK); | 458 | return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; |
376 | } | 459 | } |
377 | 460 | ||
378 | static void terminate_read(struct davinci_i2c_dev *dev) | 461 | static void terminate_read(struct davinci_i2c_dev *dev) |
@@ -431,6 +514,14 @@ static irqreturn_t i2c_davinci_isr(int this_irq, void *dev_id) | |||
431 | case DAVINCI_I2C_IVR_ARDY: | 514 | case DAVINCI_I2C_IVR_ARDY: |
432 | davinci_i2c_write_reg(dev, | 515 | davinci_i2c_write_reg(dev, |
433 | DAVINCI_I2C_STR_REG, DAVINCI_I2C_STR_ARDY); | 516 | DAVINCI_I2C_STR_REG, DAVINCI_I2C_STR_ARDY); |
517 | if (((dev->buf_len == 0) && (dev->stop != 0)) || | ||
518 | (dev->cmd_err & DAVINCI_I2C_STR_NACK)) { | ||
519 | w = davinci_i2c_read_reg(dev, | ||
520 | DAVINCI_I2C_MDR_REG); | ||
521 | w |= DAVINCI_I2C_MDR_STP; | ||
522 | davinci_i2c_write_reg(dev, | ||
523 | DAVINCI_I2C_MDR_REG, w); | ||
524 | } | ||
434 | complete(&dev->cmd_complete); | 525 | complete(&dev->cmd_complete); |
435 | break; | 526 | break; |
436 | 527 | ||
@@ -462,7 +553,7 @@ static irqreturn_t i2c_davinci_isr(int this_irq, void *dev_id) | |||
462 | 553 | ||
463 | w = davinci_i2c_read_reg(dev, | 554 | w = davinci_i2c_read_reg(dev, |
464 | DAVINCI_I2C_IMR_REG); | 555 | DAVINCI_I2C_IMR_REG); |
465 | MOD_REG_BIT(w, DAVINCI_I2C_IMR_XRDY, 0); | 556 | w &= ~DAVINCI_I2C_IMR_XRDY; |
466 | davinci_i2c_write_reg(dev, | 557 | davinci_i2c_write_reg(dev, |
467 | DAVINCI_I2C_IMR_REG, | 558 | DAVINCI_I2C_IMR_REG, |
468 | w); | 559 | w); |
@@ -491,6 +582,48 @@ static irqreturn_t i2c_davinci_isr(int this_irq, void *dev_id) | |||
491 | return count ? IRQ_HANDLED : IRQ_NONE; | 582 | return count ? IRQ_HANDLED : IRQ_NONE; |
492 | } | 583 | } |
493 | 584 | ||
585 | #ifdef CONFIG_CPU_FREQ | ||
586 | static int i2c_davinci_cpufreq_transition(struct notifier_block *nb, | ||
587 | unsigned long val, void *data) | ||
588 | { | ||
589 | struct davinci_i2c_dev *dev; | ||
590 | |||
591 | dev = container_of(nb, struct davinci_i2c_dev, freq_transition); | ||
592 | if (val == CPUFREQ_PRECHANGE) { | ||
593 | wait_for_completion(&dev->xfr_complete); | ||
594 | davinci_i2c_reset_ctrl(dev, 0); | ||
595 | } else if (val == CPUFREQ_POSTCHANGE) { | ||
596 | i2c_davinci_calc_clk_dividers(dev); | ||
597 | davinci_i2c_reset_ctrl(dev, 1); | ||
598 | } | ||
599 | |||
600 | return 0; | ||
601 | } | ||
602 | |||
603 | static inline int i2c_davinci_cpufreq_register(struct davinci_i2c_dev *dev) | ||
604 | { | ||
605 | dev->freq_transition.notifier_call = i2c_davinci_cpufreq_transition; | ||
606 | |||
607 | return cpufreq_register_notifier(&dev->freq_transition, | ||
608 | CPUFREQ_TRANSITION_NOTIFIER); | ||
609 | } | ||
610 | |||
611 | static inline void i2c_davinci_cpufreq_deregister(struct davinci_i2c_dev *dev) | ||
612 | { | ||
613 | cpufreq_unregister_notifier(&dev->freq_transition, | ||
614 | CPUFREQ_TRANSITION_NOTIFIER); | ||
615 | } | ||
616 | #else | ||
617 | static inline int i2c_davinci_cpufreq_register(struct davinci_i2c_dev *dev) | ||
618 | { | ||
619 | return 0; | ||
620 | } | ||
621 | |||
622 | static inline void i2c_davinci_cpufreq_deregister(struct davinci_i2c_dev *dev) | ||
623 | { | ||
624 | } | ||
625 | #endif | ||
626 | |||
494 | static struct i2c_algorithm i2c_davinci_algo = { | 627 | static struct i2c_algorithm i2c_davinci_algo = { |
495 | .master_xfer = i2c_davinci_xfer, | 628 | .master_xfer = i2c_davinci_xfer, |
496 | .functionality = i2c_davinci_func, | 629 | .functionality = i2c_davinci_func, |
@@ -530,6 +663,9 @@ static int davinci_i2c_probe(struct platform_device *pdev) | |||
530 | } | 663 | } |
531 | 664 | ||
532 | init_completion(&dev->cmd_complete); | 665 | init_completion(&dev->cmd_complete); |
666 | #ifdef CONFIG_CPU_FREQ | ||
667 | init_completion(&dev->xfr_complete); | ||
668 | #endif | ||
533 | dev->dev = get_device(&pdev->dev); | 669 | dev->dev = get_device(&pdev->dev); |
534 | dev->irq = irq->start; | 670 | dev->irq = irq->start; |
535 | platform_set_drvdata(pdev, dev); | 671 | platform_set_drvdata(pdev, dev); |
@@ -541,7 +677,12 @@ static int davinci_i2c_probe(struct platform_device *pdev) | |||
541 | } | 677 | } |
542 | clk_enable(dev->clk); | 678 | clk_enable(dev->clk); |
543 | 679 | ||
544 | dev->base = (void __iomem *)IO_ADDRESS(mem->start); | 680 | dev->base = ioremap(mem->start, resource_size(mem)); |
681 | if (!dev->base) { | ||
682 | r = -EBUSY; | ||
683 | goto err_mem_ioremap; | ||
684 | } | ||
685 | |||
545 | i2c_davinci_init(dev); | 686 | i2c_davinci_init(dev); |
546 | 687 | ||
547 | r = request_irq(dev->irq, i2c_davinci_isr, 0, pdev->name, dev); | 688 | r = request_irq(dev->irq, i2c_davinci_isr, 0, pdev->name, dev); |
@@ -550,6 +691,12 @@ static int davinci_i2c_probe(struct platform_device *pdev) | |||
550 | goto err_unuse_clocks; | 691 | goto err_unuse_clocks; |
551 | } | 692 | } |
552 | 693 | ||
694 | r = i2c_davinci_cpufreq_register(dev); | ||
695 | if (r) { | ||
696 | dev_err(&pdev->dev, "failed to register cpufreq\n"); | ||
697 | goto err_free_irq; | ||
698 | } | ||
699 | |||
553 | adap = &dev->adapter; | 700 | adap = &dev->adapter; |
554 | i2c_set_adapdata(adap, dev); | 701 | i2c_set_adapdata(adap, dev); |
555 | adap->owner = THIS_MODULE; | 702 | adap->owner = THIS_MODULE; |
@@ -571,6 +718,8 @@ static int davinci_i2c_probe(struct platform_device *pdev) | |||
571 | err_free_irq: | 718 | err_free_irq: |
572 | free_irq(dev->irq, dev); | 719 | free_irq(dev->irq, dev); |
573 | err_unuse_clocks: | 720 | err_unuse_clocks: |
721 | iounmap(dev->base); | ||
722 | err_mem_ioremap: | ||
574 | clk_disable(dev->clk); | 723 | clk_disable(dev->clk); |
575 | clk_put(dev->clk); | 724 | clk_put(dev->clk); |
576 | dev->clk = NULL; | 725 | dev->clk = NULL; |
@@ -589,6 +738,8 @@ static int davinci_i2c_remove(struct platform_device *pdev) | |||
589 | struct davinci_i2c_dev *dev = platform_get_drvdata(pdev); | 738 | struct davinci_i2c_dev *dev = platform_get_drvdata(pdev); |
590 | struct resource *mem; | 739 | struct resource *mem; |
591 | 740 | ||
741 | i2c_davinci_cpufreq_deregister(dev); | ||
742 | |||
592 | platform_set_drvdata(pdev, NULL); | 743 | platform_set_drvdata(pdev, NULL); |
593 | i2c_del_adapter(&dev->adapter); | 744 | i2c_del_adapter(&dev->adapter); |
594 | put_device(&pdev->dev); | 745 | put_device(&pdev->dev); |
@@ -599,6 +750,7 @@ static int davinci_i2c_remove(struct platform_device *pdev) | |||
599 | 750 | ||
600 | davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, 0); | 751 | davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, 0); |
601 | free_irq(IRQ_I2C, dev); | 752 | free_irq(IRQ_I2C, dev); |
753 | iounmap(dev->base); | ||
602 | kfree(dev); | 754 | kfree(dev); |
603 | 755 | ||
604 | mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 756 | mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
@@ -606,6 +758,41 @@ static int davinci_i2c_remove(struct platform_device *pdev) | |||
606 | return 0; | 758 | return 0; |
607 | } | 759 | } |
608 | 760 | ||
761 | #ifdef CONFIG_PM | ||
762 | static int davinci_i2c_suspend(struct device *dev) | ||
763 | { | ||
764 | struct platform_device *pdev = to_platform_device(dev); | ||
765 | struct davinci_i2c_dev *i2c_dev = platform_get_drvdata(pdev); | ||
766 | |||
767 | /* put I2C into reset */ | ||
768 | davinci_i2c_reset_ctrl(i2c_dev, 0); | ||
769 | clk_disable(i2c_dev->clk); | ||
770 | |||
771 | return 0; | ||
772 | } | ||
773 | |||
774 | static int davinci_i2c_resume(struct device *dev) | ||
775 | { | ||
776 | struct platform_device *pdev = to_platform_device(dev); | ||
777 | struct davinci_i2c_dev *i2c_dev = platform_get_drvdata(pdev); | ||
778 | |||
779 | clk_enable(i2c_dev->clk); | ||
780 | /* take I2C out of reset */ | ||
781 | davinci_i2c_reset_ctrl(i2c_dev, 1); | ||
782 | |||
783 | return 0; | ||
784 | } | ||
785 | |||
786 | static const struct dev_pm_ops davinci_i2c_pm = { | ||
787 | .suspend = davinci_i2c_suspend, | ||
788 | .resume = davinci_i2c_resume, | ||
789 | }; | ||
790 | |||
791 | #define davinci_i2c_pm_ops (&davinci_i2c_pm) | ||
792 | #else | ||
793 | #define davinci_i2c_pm_ops NULL | ||
794 | #endif | ||
795 | |||
609 | /* work with hotplug and coldplug */ | 796 | /* work with hotplug and coldplug */ |
610 | MODULE_ALIAS("platform:i2c_davinci"); | 797 | MODULE_ALIAS("platform:i2c_davinci"); |
611 | 798 | ||
@@ -615,6 +802,7 @@ static struct platform_driver davinci_i2c_driver = { | |||
615 | .driver = { | 802 | .driver = { |
616 | .name = "i2c_davinci", | 803 | .name = "i2c_davinci", |
617 | .owner = THIS_MODULE, | 804 | .owner = THIS_MODULE, |
805 | .pm = davinci_i2c_pm_ops, | ||
618 | }, | 806 | }, |
619 | }; | 807 | }; |
620 | 808 | ||
diff --git a/drivers/i2c/busses/i2c-nuc900.c b/drivers/i2c/busses/i2c-nuc900.c new file mode 100644 index 000000000000..92d770d7bbc2 --- /dev/null +++ b/drivers/i2c/busses/i2c-nuc900.c | |||
@@ -0,0 +1,709 @@ | |||
1 | /* | ||
2 | * linux/drivers/i2c/busses/i2c-nuc900.c | ||
3 | * | ||
4 | * Copyright (c) 2010 Nuvoton technology corporation. | ||
5 | * | ||
6 | * This driver based on S3C2410 I2C driver of Ben Dooks <ben-Y5A6D6n0/KfQXOPxS62xeg@public.gmane.org>. | ||
7 | * Written by Wan ZongShun <mcuos.com-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License as published by | ||
11 | * the Free Software Foundation;version 2 of the License. | ||
12 | * | ||
13 | */ | ||
14 | |||
15 | #include <linux/kernel.h> | ||
16 | #include <linux/module.h> | ||
17 | |||
18 | #include <linux/i2c.h> | ||
19 | #include <linux/i2c-id.h> | ||
20 | #include <linux/init.h> | ||
21 | #include <linux/time.h> | ||
22 | #include <linux/interrupt.h> | ||
23 | #include <linux/delay.h> | ||
24 | #include <linux/errno.h> | ||
25 | #include <linux/err.h> | ||
26 | #include <linux/platform_device.h> | ||
27 | #include <linux/clk.h> | ||
28 | #include <linux/cpufreq.h> | ||
29 | #include <linux/slab.h> | ||
30 | #include <linux/io.h> | ||
31 | |||
32 | #include <mach/mfp.h> | ||
33 | #include <mach/i2c.h> | ||
34 | |||
35 | /* nuc900 i2c registers offset */ | ||
36 | |||
37 | #define CSR 0x00 | ||
38 | #define DIVIDER 0x04 | ||
39 | #define CMDR 0x08 | ||
40 | #define SWR 0x0C | ||
41 | #define RXR 0x10 | ||
42 | #define TXR 0x14 | ||
43 | |||
44 | /* nuc900 i2c CSR register bits */ | ||
45 | |||
46 | #define IRQEN 0x003 | ||
47 | #define I2CBUSY 0x400 | ||
48 | #define I2CSTART 0x018 | ||
49 | #define IRQFLAG 0x004 | ||
50 | #define ARBIT_LOST 0x200 | ||
51 | #define SLAVE_ACK 0x800 | ||
52 | |||
53 | /* nuc900 i2c CMDR register bits */ | ||
54 | |||
55 | #define I2C_CMD_START 0x10 | ||
56 | #define I2C_CMD_STOP 0x08 | ||
57 | #define I2C_CMD_READ 0x04 | ||
58 | #define I2C_CMD_WRITE 0x02 | ||
59 | #define I2C_CMD_NACK 0x01 | ||
60 | |||
61 | /* i2c controller state */ | ||
62 | |||
63 | enum nuc900_i2c_state { | ||
64 | STATE_IDLE, | ||
65 | STATE_START, | ||
66 | STATE_READ, | ||
67 | STATE_WRITE, | ||
68 | STATE_STOP | ||
69 | }; | ||
70 | |||
71 | /* i2c controller private data */ | ||
72 | |||
73 | struct nuc900_i2c { | ||
74 | spinlock_t lock; | ||
75 | wait_queue_head_t wait; | ||
76 | |||
77 | struct i2c_msg *msg; | ||
78 | unsigned int msg_num; | ||
79 | unsigned int msg_idx; | ||
80 | unsigned int msg_ptr; | ||
81 | unsigned int irq; | ||
82 | |||
83 | enum nuc900_i2c_state state; | ||
84 | |||
85 | void __iomem *regs; | ||
86 | struct clk *clk; | ||
87 | struct device *dev; | ||
88 | struct resource *ioarea; | ||
89 | struct i2c_adapter adap; | ||
90 | }; | ||
91 | |||
92 | /* nuc900_i2c_master_complete | ||
93 | * | ||
94 | * complete the message and wake up the caller, using the given return code, | ||
95 | * or zero to mean ok. | ||
96 | */ | ||
97 | |||
98 | static inline void nuc900_i2c_master_complete(struct nuc900_i2c *i2c, int ret) | ||
99 | { | ||
100 | dev_dbg(i2c->dev, "master_complete %d\n", ret); | ||
101 | |||
102 | i2c->msg_ptr = 0; | ||
103 | i2c->msg = NULL; | ||
104 | i2c->msg_idx++; | ||
105 | i2c->msg_num = 0; | ||
106 | if (ret) | ||
107 | i2c->msg_idx = ret; | ||
108 | |||
109 | wake_up(&i2c->wait); | ||
110 | } | ||
111 | |||
112 | /* irq enable/disable functions */ | ||
113 | |||
114 | static inline void nuc900_i2c_disable_irq(struct nuc900_i2c *i2c) | ||
115 | { | ||
116 | unsigned long tmp; | ||
117 | |||
118 | tmp = readl(i2c->regs + CSR); | ||
119 | writel(tmp & ~IRQEN, i2c->regs + CSR); | ||
120 | } | ||
121 | |||
122 | static inline void nuc900_i2c_enable_irq(struct nuc900_i2c *i2c) | ||
123 | { | ||
124 | unsigned long tmp; | ||
125 | |||
126 | tmp = readl(i2c->regs + CSR); | ||
127 | writel(tmp | IRQEN, i2c->regs + CSR); | ||
128 | } | ||
129 | |||
130 | |||
131 | /* nuc900_i2c_message_start | ||
132 | * | ||
133 | * put the start of a message onto the bus | ||
134 | */ | ||
135 | |||
136 | static void nuc900_i2c_message_start(struct nuc900_i2c *i2c, | ||
137 | struct i2c_msg *msg) | ||
138 | { | ||
139 | unsigned int addr = (msg->addr & 0x7f) << 1; | ||
140 | |||
141 | if (msg->flags & I2C_M_RD) | ||
142 | addr |= 0x1; | ||
143 | writel(addr & 0xff, i2c->regs + TXR); | ||
144 | writel(I2C_CMD_START | I2C_CMD_WRITE, i2c->regs + CMDR); | ||
145 | } | ||
146 | |||
147 | static inline void nuc900_i2c_stop(struct nuc900_i2c *i2c, int ret) | ||
148 | { | ||
149 | |||
150 | dev_dbg(i2c->dev, "STOP\n"); | ||
151 | |||
152 | /* stop the transfer */ | ||
153 | i2c->state = STATE_STOP; | ||
154 | writel(I2C_CMD_STOP, i2c->regs + CMDR); | ||
155 | |||
156 | nuc900_i2c_master_complete(i2c, ret); | ||
157 | nuc900_i2c_disable_irq(i2c); | ||
158 | } | ||
159 | |||
160 | /* helper functions to determine the current state in the set of | ||
161 | * messages we are sending | ||
162 | */ | ||
163 | |||
164 | /* is_lastmsg() | ||
165 | * | ||
166 | * returns TRUE if the current message is the last in the set | ||
167 | */ | ||
168 | |||
169 | static inline int is_lastmsg(struct nuc900_i2c *i2c) | ||
170 | { | ||
171 | return i2c->msg_idx >= (i2c->msg_num - 1); | ||
172 | } | ||
173 | |||
174 | /* is_msglast | ||
175 | * | ||
176 | * returns TRUE if we this is the last byte in the current message | ||
177 | */ | ||
178 | |||
179 | static inline int is_msglast(struct nuc900_i2c *i2c) | ||
180 | { | ||
181 | return i2c->msg_ptr == i2c->msg->len-1; | ||
182 | } | ||
183 | |||
184 | /* is_msgend | ||
185 | * | ||
186 | * returns TRUE if we reached the end of the current message | ||
187 | */ | ||
188 | |||
189 | static inline int is_msgend(struct nuc900_i2c *i2c) | ||
190 | { | ||
191 | return i2c->msg_ptr >= i2c->msg->len; | ||
192 | } | ||
193 | |||
194 | /* i2c_nuc900_irq_nextbyte | ||
195 | * | ||
196 | * process an interrupt and work out what to do | ||
197 | */ | ||
198 | |||
199 | static void i2c_nuc900_irq_nextbyte(struct nuc900_i2c *i2c, | ||
200 | unsigned long iicstat) | ||
201 | { | ||
202 | unsigned char byte; | ||
203 | |||
204 | switch (i2c->state) { | ||
205 | |||
206 | case STATE_IDLE: | ||
207 | dev_err(i2c->dev, "%s: called in STATE_IDLE\n", __func__); | ||
208 | break; | ||
209 | |||
210 | case STATE_STOP: | ||
211 | dev_err(i2c->dev, "%s: called in STATE_STOP\n", __func__); | ||
212 | nuc900_i2c_disable_irq(i2c); | ||
213 | break; | ||
214 | |||
215 | case STATE_START: | ||
216 | /* last thing we did was send a start condition on the | ||
217 | * bus, or started a new i2c message | ||
218 | */ | ||
219 | |||
220 | if (iicstat & SLAVE_ACK && | ||
221 | !(i2c->msg->flags & I2C_M_IGNORE_NAK)) { | ||
222 | /* ack was not received... */ | ||
223 | |||
224 | dev_dbg(i2c->dev, "ack was not received\n"); | ||
225 | nuc900_i2c_stop(i2c, -ENXIO); | ||
226 | break; | ||
227 | } | ||
228 | |||
229 | if (i2c->msg->flags & I2C_M_RD) | ||
230 | i2c->state = STATE_READ; | ||
231 | else | ||
232 | i2c->state = STATE_WRITE; | ||
233 | |||
234 | /* terminate the transfer if there is nothing to do | ||
235 | * as this is used by the i2c probe to find devices. | ||
236 | */ | ||
237 | |||
238 | if (is_lastmsg(i2c) && i2c->msg->len == 0) { | ||
239 | nuc900_i2c_stop(i2c, 0); | ||
240 | break; | ||
241 | } | ||
242 | |||
243 | if (i2c->state == STATE_READ) | ||
244 | goto prepare_read; | ||
245 | |||
246 | /* fall through to the write state, as we will need to | ||
247 | * send a byte as well | ||
248 | */ | ||
249 | |||
250 | case STATE_WRITE: | ||
251 | /* we are writing data to the device... check for the | ||
252 | * end of the message, and if so, work out what to do | ||
253 | */ | ||
254 | |||
255 | if (!(i2c->msg->flags & I2C_M_IGNORE_NAK)) { | ||
256 | if (iicstat & SLAVE_ACK) { | ||
257 | dev_dbg(i2c->dev, "WRITE: No Ack\n"); | ||
258 | |||
259 | nuc900_i2c_stop(i2c, -ECONNREFUSED); | ||
260 | break; | ||
261 | } | ||
262 | } | ||
263 | |||
264 | retry_write: | ||
265 | |||
266 | if (!is_msgend(i2c)) { | ||
267 | byte = i2c->msg->buf[i2c->msg_ptr++]; | ||
268 | writeb(byte, i2c->regs + TXR); | ||
269 | writel(I2C_CMD_WRITE, i2c->regs + CMDR); | ||
270 | |||
271 | } else if (!is_lastmsg(i2c)) { | ||
272 | /* we need to go to the next i2c message */ | ||
273 | |||
274 | dev_dbg(i2c->dev, "WRITE: Next Message\n"); | ||
275 | |||
276 | i2c->msg_ptr = 0; | ||
277 | i2c->msg_idx++; | ||
278 | i2c->msg++; | ||
279 | |||
280 | /* check to see if we need to do another message */ | ||
281 | if (i2c->msg->flags & I2C_M_NOSTART) { | ||
282 | |||
283 | if (i2c->msg->flags & I2C_M_RD) { | ||
284 | /* cannot do this, the controller | ||
285 | * forces us to send a new START | ||
286 | * when we change direction | ||
287 | */ | ||
288 | |||
289 | nuc900_i2c_stop(i2c, -EINVAL); | ||
290 | } | ||
291 | |||
292 | goto retry_write; | ||
293 | } else { | ||
294 | /* send the new start */ | ||
295 | nuc900_i2c_message_start(i2c, i2c->msg); | ||
296 | i2c->state = STATE_START; | ||
297 | } | ||
298 | |||
299 | } else { | ||
300 | /* send stop */ | ||
301 | |||
302 | nuc900_i2c_stop(i2c, 0); | ||
303 | } | ||
304 | break; | ||
305 | |||
306 | case STATE_READ: | ||
307 | /* we have a byte of data in the data register, do | ||
308 | * something with it, and then work out wether we are | ||
309 | * going to do any more read/write | ||
310 | */ | ||
311 | |||
312 | byte = readb(i2c->regs + RXR); | ||
313 | i2c->msg->buf[i2c->msg_ptr++] = byte; | ||
314 | |||
315 | prepare_read: | ||
316 | if (is_msglast(i2c)) { | ||
317 | /* last byte of buffer */ | ||
318 | |||
319 | if (is_lastmsg(i2c)) | ||
320 | writel(I2C_CMD_READ | I2C_CMD_NACK, | ||
321 | i2c->regs + CMDR); | ||
322 | |||
323 | } else if (is_msgend(i2c)) { | ||
324 | /* ok, we've read the entire buffer, see if there | ||
325 | * is anything else we need to do | ||
326 | */ | ||
327 | |||
328 | if (is_lastmsg(i2c)) { | ||
329 | /* last message, send stop and complete */ | ||
330 | dev_dbg(i2c->dev, "READ: Send Stop\n"); | ||
331 | |||
332 | nuc900_i2c_stop(i2c, 0); | ||
333 | } else { | ||
334 | /* go to the next transfer */ | ||
335 | dev_dbg(i2c->dev, "READ: Next Transfer\n"); | ||
336 | |||
337 | i2c->msg_ptr = 0; | ||
338 | i2c->msg_idx++; | ||
339 | i2c->msg++; | ||
340 | |||
341 | writel(I2C_CMD_READ, i2c->regs + CMDR); | ||
342 | } | ||
343 | |||
344 | } else { | ||
345 | writel(I2C_CMD_READ, i2c->regs + CMDR); | ||
346 | } | ||
347 | |||
348 | break; | ||
349 | } | ||
350 | } | ||
351 | |||
352 | /* nuc900_i2c_irq | ||
353 | * | ||
354 | * top level IRQ servicing routine | ||
355 | */ | ||
356 | |||
357 | static irqreturn_t nuc900_i2c_irq(int irqno, void *dev_id) | ||
358 | { | ||
359 | struct nuc900_i2c *i2c = dev_id; | ||
360 | unsigned long status; | ||
361 | |||
362 | status = readl(i2c->regs + CSR); | ||
363 | writel(status | IRQFLAG, i2c->regs + CSR); | ||
364 | |||
365 | if (status & ARBIT_LOST) { | ||
366 | /* deal with arbitration loss */ | ||
367 | dev_err(i2c->dev, "deal with arbitration loss\n"); | ||
368 | goto out; | ||
369 | } | ||
370 | |||
371 | if (i2c->state == STATE_IDLE) { | ||
372 | dev_dbg(i2c->dev, "IRQ: error i2c->state == IDLE\n"); | ||
373 | goto out; | ||
374 | } | ||
375 | |||
376 | /* pretty much this leaves us with the fact that we've | ||
377 | * transmitted or received whatever byte we last sent | ||
378 | */ | ||
379 | |||
380 | i2c_nuc900_irq_nextbyte(i2c, status); | ||
381 | |||
382 | out: | ||
383 | return IRQ_HANDLED; | ||
384 | } | ||
385 | |||
386 | |||
387 | /* nuc900_i2c_set_master | ||
388 | * | ||
389 | * get the i2c bus for a master transaction | ||
390 | */ | ||
391 | |||
392 | static int nuc900_i2c_set_master(struct nuc900_i2c *i2c) | ||
393 | { | ||
394 | int timeout = 400; | ||
395 | |||
396 | while (timeout-- > 0) { | ||
397 | if (((readl(i2c->regs + SWR) & I2CSTART) == I2CSTART) && | ||
398 | ((readl(i2c->regs + CSR) & I2CBUSY) == 0)) { | ||
399 | return 0; | ||
400 | } | ||
401 | |||
402 | msleep(1); | ||
403 | } | ||
404 | |||
405 | return -ETIMEDOUT; | ||
406 | } | ||
407 | |||
408 | /* nuc900_i2c_doxfer | ||
409 | * | ||
410 | * this starts an i2c transfer | ||
411 | */ | ||
412 | |||
413 | static int nuc900_i2c_doxfer(struct nuc900_i2c *i2c, | ||
414 | struct i2c_msg *msgs, int num) | ||
415 | { | ||
416 | unsigned long iicstat, timeout; | ||
417 | int spins = 20; | ||
418 | int ret; | ||
419 | |||
420 | ret = nuc900_i2c_set_master(i2c); | ||
421 | if (ret != 0) { | ||
422 | dev_err(i2c->dev, "cannot get bus (error %d)\n", ret); | ||
423 | ret = -EAGAIN; | ||
424 | goto out; | ||
425 | } | ||
426 | |||
427 | spin_lock_irq(&i2c->lock); | ||
428 | |||
429 | i2c->msg = msgs; | ||
430 | i2c->msg_num = num; | ||
431 | i2c->msg_ptr = 0; | ||
432 | i2c->msg_idx = 0; | ||
433 | i2c->state = STATE_START; | ||
434 | |||
435 | nuc900_i2c_message_start(i2c, msgs); | ||
436 | spin_unlock_irq(&i2c->lock); | ||
437 | |||
438 | timeout = wait_event_timeout(i2c->wait, i2c->msg_num == 0, HZ * 5); | ||
439 | |||
440 | ret = i2c->msg_idx; | ||
441 | |||
442 | /* having these next two as dev_err() makes life very | ||
443 | * noisy when doing an i2cdetect | ||
444 | */ | ||
445 | |||
446 | if (timeout == 0) | ||
447 | dev_dbg(i2c->dev, "timeout\n"); | ||
448 | else if (ret != num) | ||
449 | dev_dbg(i2c->dev, "incomplete xfer (%d)\n", ret); | ||
450 | |||
451 | /* ensure the stop has been through the bus */ | ||
452 | |||
453 | dev_dbg(i2c->dev, "waiting for bus idle\n"); | ||
454 | |||
455 | /* first, try busy waiting briefly */ | ||
456 | do { | ||
457 | iicstat = readl(i2c->regs + CSR); | ||
458 | } while ((iicstat & I2CBUSY) && --spins); | ||
459 | |||
460 | /* if that timed out sleep */ | ||
461 | if (!spins) { | ||
462 | msleep(1); | ||
463 | iicstat = readl(i2c->regs + CSR); | ||
464 | } | ||
465 | |||
466 | if (iicstat & I2CBUSY) | ||
467 | dev_warn(i2c->dev, "timeout waiting for bus idle\n"); | ||
468 | |||
469 | out: | ||
470 | return ret; | ||
471 | } | ||
472 | |||
473 | /* nuc900_i2c_xfer | ||
474 | * | ||
475 | * first port of call from the i2c bus code when an message needs | ||
476 | * transferring across the i2c bus. | ||
477 | */ | ||
478 | |||
479 | static int nuc900_i2c_xfer(struct i2c_adapter *adap, | ||
480 | struct i2c_msg *msgs, int num) | ||
481 | { | ||
482 | struct nuc900_i2c *i2c = (struct nuc900_i2c *)adap->algo_data; | ||
483 | int retry; | ||
484 | int ret; | ||
485 | |||
486 | nuc900_i2c_enable_irq(i2c); | ||
487 | |||
488 | for (retry = 0; retry < adap->retries; retry++) { | ||
489 | |||
490 | ret = nuc900_i2c_doxfer(i2c, msgs, num); | ||
491 | |||
492 | if (ret != -EAGAIN) | ||
493 | return ret; | ||
494 | |||
495 | dev_dbg(i2c->dev, "Retrying transmission (%d)\n", retry); | ||
496 | |||
497 | udelay(100); | ||
498 | } | ||
499 | |||
500 | return -EREMOTEIO; | ||
501 | } | ||
502 | |||
503 | /* declare our i2c functionality */ | ||
504 | static u32 nuc900_i2c_func(struct i2c_adapter *adap) | ||
505 | { | ||
506 | return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | I2C_FUNC_PROTOCOL_MANGLING; | ||
507 | } | ||
508 | |||
509 | /* i2c bus registration info */ | ||
510 | |||
511 | static const struct i2c_algorithm nuc900_i2c_algorithm = { | ||
512 | .master_xfer = nuc900_i2c_xfer, | ||
513 | .functionality = nuc900_i2c_func, | ||
514 | }; | ||
515 | |||
516 | /* nuc900_i2c_probe | ||
517 | * | ||
518 | * called by the bus driver when a suitable device is found | ||
519 | */ | ||
520 | |||
521 | static int __devinit nuc900_i2c_probe(struct platform_device *pdev) | ||
522 | { | ||
523 | struct nuc900_i2c *i2c; | ||
524 | struct nuc900_platform_i2c *pdata; | ||
525 | struct resource *res; | ||
526 | int ret; | ||
527 | |||
528 | pdata = pdev->dev.platform_data; | ||
529 | if (!pdata) { | ||
530 | dev_err(&pdev->dev, "no platform data\n"); | ||
531 | return -EINVAL; | ||
532 | } | ||
533 | |||
534 | i2c = kzalloc(sizeof(struct nuc900_i2c), GFP_KERNEL); | ||
535 | if (!i2c) { | ||
536 | dev_err(&pdev->dev, "no memory for state\n"); | ||
537 | return -ENOMEM; | ||
538 | } | ||
539 | |||
540 | strlcpy(i2c->adap.name, "nuc900-i2c0", sizeof(i2c->adap.name)); | ||
541 | i2c->adap.owner = THIS_MODULE; | ||
542 | i2c->adap.algo = &nuc900_i2c_algorithm; | ||
543 | i2c->adap.retries = 2; | ||
544 | i2c->adap.class = I2C_CLASS_HWMON | I2C_CLASS_SPD; | ||
545 | |||
546 | spin_lock_init(&i2c->lock); | ||
547 | init_waitqueue_head(&i2c->wait); | ||
548 | |||
549 | /* find the clock and enable it */ | ||
550 | |||
551 | i2c->dev = &pdev->dev; | ||
552 | i2c->clk = clk_get(&pdev->dev, NULL); | ||
553 | if (IS_ERR(i2c->clk)) { | ||
554 | dev_err(&pdev->dev, "cannot get clock\n"); | ||
555 | ret = -ENOENT; | ||
556 | goto err_noclk; | ||
557 | } | ||
558 | |||
559 | dev_dbg(&pdev->dev, "clock source %p\n", i2c->clk); | ||
560 | |||
561 | clk_enable(i2c->clk); | ||
562 | |||
563 | /* map the registers */ | ||
564 | |||
565 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
566 | if (res == NULL) { | ||
567 | dev_err(&pdev->dev, "cannot find IO resource\n"); | ||
568 | ret = -ENOENT; | ||
569 | goto err_clk; | ||
570 | } | ||
571 | |||
572 | i2c->ioarea = request_mem_region(res->start, resource_size(res), | ||
573 | pdev->name); | ||
574 | |||
575 | if (i2c->ioarea == NULL) { | ||
576 | dev_err(&pdev->dev, "cannot request IO\n"); | ||
577 | ret = -ENXIO; | ||
578 | goto err_clk; | ||
579 | } | ||
580 | |||
581 | i2c->regs = ioremap(res->start, resource_size(res)); | ||
582 | |||
583 | if (i2c->regs == NULL) { | ||
584 | dev_err(&pdev->dev, "cannot map IO\n"); | ||
585 | ret = -ENXIO; | ||
586 | goto err_ioarea; | ||
587 | } | ||
588 | |||
589 | dev_dbg(&pdev->dev, "registers %p (%p, %p)\n", | ||
590 | i2c->regs, i2c->ioarea, res); | ||
591 | |||
592 | /* setup info block for the i2c core */ | ||
593 | |||
594 | i2c->adap.algo_data = i2c; | ||
595 | i2c->adap.dev.parent = &pdev->dev; | ||
596 | |||
597 | mfp_set_groupg(&pdev->dev); | ||
598 | |||
599 | clk_get_rate(i2c->clk); | ||
600 | |||
601 | ret = (i2c->clk.apbfreq)/(pdata->bus_freq * 5) - 1; | ||
602 | writel(ret & 0xffff, i2c->regs + DIVIDER); | ||
603 | |||
604 | /* find the IRQ for this unit (note, this relies on the init call to | ||
605 | * ensure no current IRQs pending | ||
606 | */ | ||
607 | |||
608 | i2c->irq = ret = platform_get_irq(pdev, 0); | ||
609 | if (ret <= 0) { | ||
610 | dev_err(&pdev->dev, "cannot find IRQ\n"); | ||
611 | goto err_iomap; | ||
612 | } | ||
613 | |||
614 | ret = request_irq(i2c->irq, nuc900_i2c_irq, IRQF_DISABLED | IRQF_SHARED, | ||
615 | dev_name(&pdev->dev), i2c); | ||
616 | |||
617 | if (ret != 0) { | ||
618 | dev_err(&pdev->dev, "cannot claim IRQ %d\n", i2c->irq); | ||
619 | goto err_iomap; | ||
620 | } | ||
621 | |||
622 | /* Note, previous versions of the driver used i2c_add_adapter() | ||
623 | * to add the bus at any number. We now pass the bus number via | ||
624 | * the platform data, so if unset it will now default to always | ||
625 | * being bus 0. | ||
626 | */ | ||
627 | |||
628 | i2c->adap.nr = pdata->bus_num; | ||
629 | |||
630 | ret = i2c_add_numbered_adapter(&i2c->adap); | ||
631 | if (ret < 0) { | ||
632 | dev_err(&pdev->dev, "failed to add bus to i2c core\n"); | ||
633 | goto err_irq; | ||
634 | } | ||
635 | |||
636 | platform_set_drvdata(pdev, i2c); | ||
637 | |||
638 | dev_info(&pdev->dev, "%s: NUC900 I2C adapter\n", | ||
639 | dev_name(&i2c->adap.dev)); | ||
640 | return 0; | ||
641 | |||
642 | err_irq: | ||
643 | free_irq(i2c->irq, i2c); | ||
644 | |||
645 | err_iomap: | ||
646 | iounmap(i2c->regs); | ||
647 | |||
648 | err_ioarea: | ||
649 | release_resource(i2c->ioarea); | ||
650 | kfree(i2c->ioarea); | ||
651 | |||
652 | err_clk: | ||
653 | clk_disable(i2c->clk); | ||
654 | clk_put(i2c->clk); | ||
655 | |||
656 | err_noclk: | ||
657 | kfree(i2c); | ||
658 | return ret; | ||
659 | } | ||
660 | |||
661 | /* nuc900_i2c_remove | ||
662 | * | ||
663 | * called when device is removed from the bus | ||
664 | */ | ||
665 | |||
666 | static int __devexit nuc900_i2c_remove(struct platform_device *pdev) | ||
667 | { | ||
668 | struct nuc900_i2c *i2c = platform_get_drvdata(pdev); | ||
669 | |||
670 | i2c_del_adapter(&i2c->adap); | ||
671 | free_irq(i2c->irq, i2c); | ||
672 | |||
673 | clk_disable(i2c->clk); | ||
674 | clk_put(i2c->clk); | ||
675 | |||
676 | iounmap(i2c->regs); | ||
677 | |||
678 | release_resource(i2c->ioarea); | ||
679 | kfree(i2c->ioarea); | ||
680 | kfree(i2c); | ||
681 | |||
682 | return 0; | ||
683 | } | ||
684 | |||
685 | static struct platform_driver nuc900_i2c_driver = { | ||
686 | .probe = nuc900_i2c_probe, | ||
687 | .remove = __devexit_p(nuc900_i2c_remove), | ||
688 | .driver = { | ||
689 | .owner = THIS_MODULE, | ||
690 | .name = "nuc900-i2c0", | ||
691 | }, | ||
692 | }; | ||
693 | |||
694 | static int __init i2c_adap_nuc900_init(void) | ||
695 | { | ||
696 | return platform_driver_register(&nuc900_i2c_driver); | ||
697 | } | ||
698 | |||
699 | static void __exit i2c_adap_nuc900_exit(void) | ||
700 | { | ||
701 | platform_driver_unregister(&nuc900_i2c_driver); | ||
702 | } | ||
703 | subsys_initcall(i2c_adap_nuc900_init); | ||
704 | module_exit(i2c_adap_nuc900_exit); | ||
705 | |||
706 | MODULE_DESCRIPTION("NUC900 I2C Bus driver"); | ||
707 | MODULE_AUTHOR("Wan ZongShun, <mcuos.com-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>"); | ||
708 | MODULE_LICENSE("GPL"); | ||
709 | MODULE_ALIAS("platform:nuc900-i2c0"); | ||
diff --git a/drivers/i2c/busses/i2c-pxa.c b/drivers/i2c/busses/i2c-pxa.c index 020ff23d762f..c94e51b2651e 100644 --- a/drivers/i2c/busses/i2c-pxa.c +++ b/drivers/i2c/busses/i2c-pxa.c | |||
@@ -1001,7 +1001,7 @@ static int i2c_pxa_probe(struct platform_device *dev) | |||
1001 | struct pxa_i2c *i2c; | 1001 | struct pxa_i2c *i2c; |
1002 | struct resource *res; | 1002 | struct resource *res; |
1003 | struct i2c_pxa_platform_data *plat = dev->dev.platform_data; | 1003 | struct i2c_pxa_platform_data *plat = dev->dev.platform_data; |
1004 | struct platform_device_id *id = platform_get_device_id(dev); | 1004 | const struct platform_device_id *id = platform_get_device_id(dev); |
1005 | int ret; | 1005 | int ret; |
1006 | int irq; | 1006 | int irq; |
1007 | 1007 | ||