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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /drivers/i2c/chips/w83781d.c
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
Diffstat (limited to 'drivers/i2c/chips/w83781d.c')
-rw-r--r--drivers/i2c/chips/w83781d.c1664
1 files changed, 1664 insertions, 0 deletions
diff --git a/drivers/i2c/chips/w83781d.c b/drivers/i2c/chips/w83781d.c
new file mode 100644
index 000000000000..4954e465c419
--- /dev/null
+++ b/drivers/i2c/chips/w83781d.c
@@ -0,0 +1,1664 @@
1/*
2 w83781d.c - Part of lm_sensors, Linux kernel modules for hardware
3 monitoring
4 Copyright (c) 1998 - 2001 Frodo Looijaard <frodol@dds.nl>,
5 Philip Edelbrock <phil@netroedge.com>,
6 and Mark Studebaker <mdsxyz123@yahoo.com>
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21*/
22
23/*
24 Supports following chips:
25
26 Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
27 as99127f 7 3 0 3 0x31 0x12c3 yes no
28 as99127f rev.2 (type_name = as99127f) 0x31 0x5ca3 yes no
29 w83781d 7 3 0 3 0x10-1 0x5ca3 yes yes
30 w83627hf 9 3 2 3 0x21 0x5ca3 yes yes(LPC)
31 w83627thf 9 3 2 3 0x90 0x5ca3 no yes(LPC)
32 w83782d 9 3 2-4 3 0x30 0x5ca3 yes yes
33 w83783s 5-6 3 2 1-2 0x40 0x5ca3 yes no
34 w83697hf 8 2 2 2 0x60 0x5ca3 no yes(LPC)
35
36*/
37
38#include <linux/config.h>
39#include <linux/module.h>
40#include <linux/init.h>
41#include <linux/slab.h>
42#include <linux/jiffies.h>
43#include <linux/i2c.h>
44#include <linux/i2c-sensor.h>
45#include <linux/i2c-vid.h>
46#include <asm/io.h>
47#include "lm75.h"
48
49/* Addresses to scan */
50static unsigned short normal_i2c[] = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25,
51 0x26, 0x27, 0x28, 0x29, 0x2a, 0x2b,
52 0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END };
53static unsigned int normal_isa[] = { 0x0290, I2C_CLIENT_ISA_END };
54
55/* Insmod parameters */
56SENSORS_INSMOD_6(w83781d, w83782d, w83783s, w83627hf, as99127f, w83697hf);
57I2C_CLIENT_MODULE_PARM(force_subclients, "List of subclient addresses: "
58 "{bus, clientaddr, subclientaddr1, subclientaddr2}");
59
60static int init = 1;
61module_param(init, bool, 0);
62MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
63
64/* Constants specified below */
65
66/* Length of ISA address segment */
67#define W83781D_EXTENT 8
68
69/* Where are the ISA address/data registers relative to the base address */
70#define W83781D_ADDR_REG_OFFSET 5
71#define W83781D_DATA_REG_OFFSET 6
72
73/* The W83781D registers */
74/* The W83782D registers for nr=7,8 are in bank 5 */
75#define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
76 (0x554 + (((nr) - 7) * 2)))
77#define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
78 (0x555 + (((nr) - 7) * 2)))
79#define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
80 (0x550 + (nr) - 7))
81
82#define W83781D_REG_FAN_MIN(nr) (0x3a + (nr))
83#define W83781D_REG_FAN(nr) (0x27 + (nr))
84
85#define W83781D_REG_BANK 0x4E
86#define W83781D_REG_TEMP2_CONFIG 0x152
87#define W83781D_REG_TEMP3_CONFIG 0x252
88#define W83781D_REG_TEMP(nr) ((nr == 3) ? (0x0250) : \
89 ((nr == 2) ? (0x0150) : \
90 (0x27)))
91#define W83781D_REG_TEMP_HYST(nr) ((nr == 3) ? (0x253) : \
92 ((nr == 2) ? (0x153) : \
93 (0x3A)))
94#define W83781D_REG_TEMP_OVER(nr) ((nr == 3) ? (0x255) : \
95 ((nr == 2) ? (0x155) : \
96 (0x39)))
97
98#define W83781D_REG_CONFIG 0x40
99#define W83781D_REG_ALARM1 0x41
100#define W83781D_REG_ALARM2 0x42
101#define W83781D_REG_ALARM3 0x450 /* not on W83781D */
102
103#define W83781D_REG_IRQ 0x4C
104#define W83781D_REG_BEEP_CONFIG 0x4D
105#define W83781D_REG_BEEP_INTS1 0x56
106#define W83781D_REG_BEEP_INTS2 0x57
107#define W83781D_REG_BEEP_INTS3 0x453 /* not on W83781D */
108
109#define W83781D_REG_VID_FANDIV 0x47
110
111#define W83781D_REG_CHIPID 0x49
112#define W83781D_REG_WCHIPID 0x58
113#define W83781D_REG_CHIPMAN 0x4F
114#define W83781D_REG_PIN 0x4B
115
116/* 782D/783S only */
117#define W83781D_REG_VBAT 0x5D
118
119/* PWM 782D (1-4) and 783S (1-2) only */
120#define W83781D_REG_PWM1 0x5B /* 782d and 783s/627hf datasheets disagree */
121 /* on which is which; */
122#define W83781D_REG_PWM2 0x5A /* We follow the 782d convention here, */
123 /* However 782d is probably wrong. */
124#define W83781D_REG_PWM3 0x5E
125#define W83781D_REG_PWM4 0x5F
126#define W83781D_REG_PWMCLK12 0x5C
127#define W83781D_REG_PWMCLK34 0x45C
128static const u8 regpwm[] = { W83781D_REG_PWM1, W83781D_REG_PWM2,
129 W83781D_REG_PWM3, W83781D_REG_PWM4
130};
131
132#define W83781D_REG_PWM(nr) (regpwm[(nr) - 1])
133
134#define W83781D_REG_I2C_ADDR 0x48
135#define W83781D_REG_I2C_SUBADDR 0x4A
136
137/* The following are undocumented in the data sheets however we
138 received the information in an email from Winbond tech support */
139/* Sensor selection - not on 781d */
140#define W83781D_REG_SCFG1 0x5D
141static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
142
143#define W83781D_REG_SCFG2 0x59
144static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
145
146#define W83781D_DEFAULT_BETA 3435
147
148/* RT Table registers */
149#define W83781D_REG_RT_IDX 0x50
150#define W83781D_REG_RT_VAL 0x51
151
152/* Conversions. Rounding and limit checking is only done on the TO_REG
153 variants. Note that you should be a bit careful with which arguments
154 these macros are called: arguments may be evaluated more than once.
155 Fixing this is just not worth it. */
156#define IN_TO_REG(val) (SENSORS_LIMIT((((val) * 10 + 8)/16),0,255))
157#define IN_FROM_REG(val) (((val) * 16) / 10)
158
159static inline u8
160FAN_TO_REG(long rpm, int div)
161{
162 if (rpm == 0)
163 return 255;
164 rpm = SENSORS_LIMIT(rpm, 1, 1000000);
165 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
166}
167
168#define FAN_FROM_REG(val,div) ((val) == 0 ? -1 : \
169 ((val) == 255 ? 0 : \
170 1350000 / ((val) * (div))))
171
172#define TEMP_TO_REG(val) (SENSORS_LIMIT(((val) < 0 ? (val)+0x100*1000 \
173 : (val)) / 1000, 0, 0xff))
174#define TEMP_FROM_REG(val) (((val) & 0x80 ? (val)-0x100 : (val)) * 1000)
175
176#define ALARMS_FROM_REG(val) (val)
177#define PWM_FROM_REG(val) (val)
178#define PWM_TO_REG(val) (SENSORS_LIMIT((val),0,255))
179#define BEEP_MASK_FROM_REG(val,type) ((type) == as99127f ? \
180 (val) ^ 0x7fff : (val))
181#define BEEP_MASK_TO_REG(val,type) ((type) == as99127f ? \
182 (~(val)) & 0x7fff : (val) & 0xffffff)
183
184#define BEEP_ENABLE_TO_REG(val) ((val) ? 1 : 0)
185#define BEEP_ENABLE_FROM_REG(val) ((val) ? 1 : 0)
186
187#define DIV_FROM_REG(val) (1 << (val))
188
189static inline u8
190DIV_TO_REG(long val, enum chips type)
191{
192 int i;
193 val = SENSORS_LIMIT(val, 1,
194 ((type == w83781d
195 || type == as99127f) ? 8 : 128)) >> 1;
196 for (i = 0; i < 6; i++) {
197 if (val == 0)
198 break;
199 val >>= 1;
200 }
201 return ((u8) i);
202}
203
204/* There are some complications in a module like this. First off, W83781D chips
205 may be both present on the SMBus and the ISA bus, and we have to handle
206 those cases separately at some places. Second, there might be several
207 W83781D chips available (well, actually, that is probably never done; but
208 it is a clean illustration of how to handle a case like that). Finally,
209 a specific chip may be attached to *both* ISA and SMBus, and we would
210 not like to detect it double. Fortunately, in the case of the W83781D at
211 least, a register tells us what SMBus address we are on, so that helps
212 a bit - except if there could be more than one SMBus. Groan. No solution
213 for this yet. */
214
215/* This module may seem overly long and complicated. In fact, it is not so
216 bad. Quite a lot of bookkeeping is done. A real driver can often cut
217 some corners. */
218
219/* For each registered W83781D, we need to keep some data in memory. That
220 data is pointed to by w83781d_list[NR]->data. The structure itself is
221 dynamically allocated, at the same time when a new w83781d client is
222 allocated. */
223struct w83781d_data {
224 struct i2c_client client;
225 struct semaphore lock;
226 enum chips type;
227
228 struct semaphore update_lock;
229 char valid; /* !=0 if following fields are valid */
230 unsigned long last_updated; /* In jiffies */
231
232 struct i2c_client *lm75[2]; /* for secondary I2C addresses */
233 /* array of 2 pointers to subclients */
234
235 u8 in[9]; /* Register value - 8 & 9 for 782D only */
236 u8 in_max[9]; /* Register value - 8 & 9 for 782D only */
237 u8 in_min[9]; /* Register value - 8 & 9 for 782D only */
238 u8 fan[3]; /* Register value */
239 u8 fan_min[3]; /* Register value */
240 u8 temp;
241 u8 temp_max; /* Register value */
242 u8 temp_max_hyst; /* Register value */
243 u16 temp_add[2]; /* Register value */
244 u16 temp_max_add[2]; /* Register value */
245 u16 temp_max_hyst_add[2]; /* Register value */
246 u8 fan_div[3]; /* Register encoding, shifted right */
247 u8 vid; /* Register encoding, combined */
248 u32 alarms; /* Register encoding, combined */
249 u32 beep_mask; /* Register encoding, combined */
250 u8 beep_enable; /* Boolean */
251 u8 pwm[4]; /* Register value */
252 u8 pwmenable[4]; /* Boolean */
253 u16 sens[3]; /* 782D/783S only.
254 1 = pentium diode; 2 = 3904 diode;
255 3000-5000 = thermistor beta.
256 Default = 3435.
257 Other Betas unimplemented */
258 u8 vrm;
259};
260
261static int w83781d_attach_adapter(struct i2c_adapter *adapter);
262static int w83781d_detect(struct i2c_adapter *adapter, int address, int kind);
263static int w83781d_detach_client(struct i2c_client *client);
264
265static int w83781d_read_value(struct i2c_client *client, u16 register);
266static int w83781d_write_value(struct i2c_client *client, u16 register,
267 u16 value);
268static struct w83781d_data *w83781d_update_device(struct device *dev);
269static void w83781d_init_client(struct i2c_client *client);
270
271static struct i2c_driver w83781d_driver = {
272 .owner = THIS_MODULE,
273 .name = "w83781d",
274 .id = I2C_DRIVERID_W83781D,
275 .flags = I2C_DF_NOTIFY,
276 .attach_adapter = w83781d_attach_adapter,
277 .detach_client = w83781d_detach_client,
278};
279
280/* following are the sysfs callback functions */
281#define show_in_reg(reg) \
282static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
283{ \
284 struct w83781d_data *data = w83781d_update_device(dev); \
285 return sprintf(buf,"%ld\n", (long)IN_FROM_REG(data->reg[nr] * 10)); \
286}
287show_in_reg(in);
288show_in_reg(in_min);
289show_in_reg(in_max);
290
291#define store_in_reg(REG, reg) \
292static ssize_t store_in_##reg (struct device *dev, const char *buf, size_t count, int nr) \
293{ \
294 struct i2c_client *client = to_i2c_client(dev); \
295 struct w83781d_data *data = i2c_get_clientdata(client); \
296 u32 val; \
297 \
298 val = simple_strtoul(buf, NULL, 10) / 10; \
299 \
300 down(&data->update_lock); \
301 data->in_##reg[nr] = IN_TO_REG(val); \
302 w83781d_write_value(client, W83781D_REG_IN_##REG(nr), data->in_##reg[nr]); \
303 \
304 up(&data->update_lock); \
305 return count; \
306}
307store_in_reg(MIN, min);
308store_in_reg(MAX, max);
309
310#define sysfs_in_offset(offset) \
311static ssize_t \
312show_regs_in_##offset (struct device *dev, char *buf) \
313{ \
314 return show_in(dev, buf, offset); \
315} \
316static DEVICE_ATTR(in##offset##_input, S_IRUGO, show_regs_in_##offset, NULL);
317
318#define sysfs_in_reg_offset(reg, offset) \
319static ssize_t show_regs_in_##reg##offset (struct device *dev, char *buf) \
320{ \
321 return show_in_##reg (dev, buf, offset); \
322} \
323static ssize_t store_regs_in_##reg##offset (struct device *dev, const char *buf, size_t count) \
324{ \
325 return store_in_##reg (dev, buf, count, offset); \
326} \
327static DEVICE_ATTR(in##offset##_##reg, S_IRUGO| S_IWUSR, show_regs_in_##reg##offset, store_regs_in_##reg##offset);
328
329#define sysfs_in_offsets(offset) \
330sysfs_in_offset(offset); \
331sysfs_in_reg_offset(min, offset); \
332sysfs_in_reg_offset(max, offset);
333
334sysfs_in_offsets(0);
335sysfs_in_offsets(1);
336sysfs_in_offsets(2);
337sysfs_in_offsets(3);
338sysfs_in_offsets(4);
339sysfs_in_offsets(5);
340sysfs_in_offsets(6);
341sysfs_in_offsets(7);
342sysfs_in_offsets(8);
343
344#define device_create_file_in(client, offset) \
345do { \
346device_create_file(&client->dev, &dev_attr_in##offset##_input); \
347device_create_file(&client->dev, &dev_attr_in##offset##_min); \
348device_create_file(&client->dev, &dev_attr_in##offset##_max); \
349} while (0)
350
351#define show_fan_reg(reg) \
352static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
353{ \
354 struct w83781d_data *data = w83781d_update_device(dev); \
355 return sprintf(buf,"%ld\n", \
356 FAN_FROM_REG(data->reg[nr-1], (long)DIV_FROM_REG(data->fan_div[nr-1]))); \
357}
358show_fan_reg(fan);
359show_fan_reg(fan_min);
360
361static ssize_t
362store_fan_min(struct device *dev, const char *buf, size_t count, int nr)
363{
364 struct i2c_client *client = to_i2c_client(dev);
365 struct w83781d_data *data = i2c_get_clientdata(client);
366 u32 val;
367
368 val = simple_strtoul(buf, NULL, 10);
369
370 down(&data->update_lock);
371 data->fan_min[nr - 1] =
372 FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr - 1]));
373 w83781d_write_value(client, W83781D_REG_FAN_MIN(nr),
374 data->fan_min[nr - 1]);
375
376 up(&data->update_lock);
377 return count;
378}
379
380#define sysfs_fan_offset(offset) \
381static ssize_t show_regs_fan_##offset (struct device *dev, char *buf) \
382{ \
383 return show_fan(dev, buf, offset); \
384} \
385static DEVICE_ATTR(fan##offset##_input, S_IRUGO, show_regs_fan_##offset, NULL);
386
387#define sysfs_fan_min_offset(offset) \
388static ssize_t show_regs_fan_min##offset (struct device *dev, char *buf) \
389{ \
390 return show_fan_min(dev, buf, offset); \
391} \
392static ssize_t store_regs_fan_min##offset (struct device *dev, const char *buf, size_t count) \
393{ \
394 return store_fan_min(dev, buf, count, offset); \
395} \
396static DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, show_regs_fan_min##offset, store_regs_fan_min##offset);
397
398sysfs_fan_offset(1);
399sysfs_fan_min_offset(1);
400sysfs_fan_offset(2);
401sysfs_fan_min_offset(2);
402sysfs_fan_offset(3);
403sysfs_fan_min_offset(3);
404
405#define device_create_file_fan(client, offset) \
406do { \
407device_create_file(&client->dev, &dev_attr_fan##offset##_input); \
408device_create_file(&client->dev, &dev_attr_fan##offset##_min); \
409} while (0)
410
411#define show_temp_reg(reg) \
412static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
413{ \
414 struct w83781d_data *data = w83781d_update_device(dev); \
415 if (nr >= 2) { /* TEMP2 and TEMP3 */ \
416 return sprintf(buf,"%d\n", \
417 LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \
418 } else { /* TEMP1 */ \
419 return sprintf(buf,"%ld\n", (long)TEMP_FROM_REG(data->reg)); \
420 } \
421}
422show_temp_reg(temp);
423show_temp_reg(temp_max);
424show_temp_reg(temp_max_hyst);
425
426#define store_temp_reg(REG, reg) \
427static ssize_t store_temp_##reg (struct device *dev, const char *buf, size_t count, int nr) \
428{ \
429 struct i2c_client *client = to_i2c_client(dev); \
430 struct w83781d_data *data = i2c_get_clientdata(client); \
431 s32 val; \
432 \
433 val = simple_strtol(buf, NULL, 10); \
434 \
435 down(&data->update_lock); \
436 \
437 if (nr >= 2) { /* TEMP2 and TEMP3 */ \
438 data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \
439 w83781d_write_value(client, W83781D_REG_TEMP_##REG(nr), \
440 data->temp_##reg##_add[nr-2]); \
441 } else { /* TEMP1 */ \
442 data->temp_##reg = TEMP_TO_REG(val); \
443 w83781d_write_value(client, W83781D_REG_TEMP_##REG(nr), \
444 data->temp_##reg); \
445 } \
446 \
447 up(&data->update_lock); \
448 return count; \
449}
450store_temp_reg(OVER, max);
451store_temp_reg(HYST, max_hyst);
452
453#define sysfs_temp_offset(offset) \
454static ssize_t \
455show_regs_temp_##offset (struct device *dev, char *buf) \
456{ \
457 return show_temp(dev, buf, offset); \
458} \
459static DEVICE_ATTR(temp##offset##_input, S_IRUGO, show_regs_temp_##offset, NULL);
460
461#define sysfs_temp_reg_offset(reg, offset) \
462static ssize_t show_regs_temp_##reg##offset (struct device *dev, char *buf) \
463{ \
464 return show_temp_##reg (dev, buf, offset); \
465} \
466static ssize_t store_regs_temp_##reg##offset (struct device *dev, const char *buf, size_t count) \
467{ \
468 return store_temp_##reg (dev, buf, count, offset); \
469} \
470static DEVICE_ATTR(temp##offset##_##reg, S_IRUGO| S_IWUSR, show_regs_temp_##reg##offset, store_regs_temp_##reg##offset);
471
472#define sysfs_temp_offsets(offset) \
473sysfs_temp_offset(offset); \
474sysfs_temp_reg_offset(max, offset); \
475sysfs_temp_reg_offset(max_hyst, offset);
476
477sysfs_temp_offsets(1);
478sysfs_temp_offsets(2);
479sysfs_temp_offsets(3);
480
481#define device_create_file_temp(client, offset) \
482do { \
483device_create_file(&client->dev, &dev_attr_temp##offset##_input); \
484device_create_file(&client->dev, &dev_attr_temp##offset##_max); \
485device_create_file(&client->dev, &dev_attr_temp##offset##_max_hyst); \
486} while (0)
487
488static ssize_t
489show_vid_reg(struct device *dev, char *buf)
490{
491 struct w83781d_data *data = w83781d_update_device(dev);
492 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
493}
494
495static
496DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
497#define device_create_file_vid(client) \
498device_create_file(&client->dev, &dev_attr_cpu0_vid);
499static ssize_t
500show_vrm_reg(struct device *dev, char *buf)
501{
502 struct w83781d_data *data = w83781d_update_device(dev);
503 return sprintf(buf, "%ld\n", (long) data->vrm);
504}
505
506static ssize_t
507store_vrm_reg(struct device *dev, const char *buf, size_t count)
508{
509 struct i2c_client *client = to_i2c_client(dev);
510 struct w83781d_data *data = i2c_get_clientdata(client);
511 u32 val;
512
513 val = simple_strtoul(buf, NULL, 10);
514 data->vrm = val;
515
516 return count;
517}
518
519static
520DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
521#define device_create_file_vrm(client) \
522device_create_file(&client->dev, &dev_attr_vrm);
523static ssize_t
524show_alarms_reg(struct device *dev, char *buf)
525{
526 struct w83781d_data *data = w83781d_update_device(dev);
527 return sprintf(buf, "%ld\n", (long) ALARMS_FROM_REG(data->alarms));
528}
529
530static
531DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
532#define device_create_file_alarms(client) \
533device_create_file(&client->dev, &dev_attr_alarms);
534static ssize_t show_beep_mask (struct device *dev, char *buf)
535{
536 struct w83781d_data *data = w83781d_update_device(dev);
537 return sprintf(buf, "%ld\n",
538 (long)BEEP_MASK_FROM_REG(data->beep_mask, data->type));
539}
540static ssize_t show_beep_enable (struct device *dev, char *buf)
541{
542 struct w83781d_data *data = w83781d_update_device(dev);
543 return sprintf(buf, "%ld\n",
544 (long)BEEP_ENABLE_FROM_REG(data->beep_enable));
545}
546
547#define BEEP_ENABLE 0 /* Store beep_enable */
548#define BEEP_MASK 1 /* Store beep_mask */
549
550static ssize_t
551store_beep_reg(struct device *dev, const char *buf, size_t count,
552 int update_mask)
553{
554 struct i2c_client *client = to_i2c_client(dev);
555 struct w83781d_data *data = i2c_get_clientdata(client);
556 u32 val, val2;
557
558 val = simple_strtoul(buf, NULL, 10);
559
560 down(&data->update_lock);
561
562 if (update_mask == BEEP_MASK) { /* We are storing beep_mask */
563 data->beep_mask = BEEP_MASK_TO_REG(val, data->type);
564 w83781d_write_value(client, W83781D_REG_BEEP_INTS1,
565 data->beep_mask & 0xff);
566
567 if ((data->type != w83781d) && (data->type != as99127f)) {
568 w83781d_write_value(client, W83781D_REG_BEEP_INTS3,
569 ((data->beep_mask) >> 16) & 0xff);
570 }
571
572 val2 = (data->beep_mask >> 8) & 0x7f;
573 } else { /* We are storing beep_enable */
574 val2 = w83781d_read_value(client, W83781D_REG_BEEP_INTS2) & 0x7f;
575 data->beep_enable = BEEP_ENABLE_TO_REG(val);
576 }
577
578 w83781d_write_value(client, W83781D_REG_BEEP_INTS2,
579 val2 | data->beep_enable << 7);
580
581 up(&data->update_lock);
582 return count;
583}
584
585#define sysfs_beep(REG, reg) \
586static ssize_t show_regs_beep_##reg (struct device *dev, char *buf) \
587{ \
588 return show_beep_##reg(dev, buf); \
589} \
590static ssize_t store_regs_beep_##reg (struct device *dev, const char *buf, size_t count) \
591{ \
592 return store_beep_reg(dev, buf, count, BEEP_##REG); \
593} \
594static DEVICE_ATTR(beep_##reg, S_IRUGO | S_IWUSR, show_regs_beep_##reg, store_regs_beep_##reg);
595
596sysfs_beep(ENABLE, enable);
597sysfs_beep(MASK, mask);
598
599#define device_create_file_beep(client) \
600do { \
601device_create_file(&client->dev, &dev_attr_beep_enable); \
602device_create_file(&client->dev, &dev_attr_beep_mask); \
603} while (0)
604
605static ssize_t
606show_fan_div_reg(struct device *dev, char *buf, int nr)
607{
608 struct w83781d_data *data = w83781d_update_device(dev);
609 return sprintf(buf, "%ld\n",
610 (long) DIV_FROM_REG(data->fan_div[nr - 1]));
611}
612
613/* Note: we save and restore the fan minimum here, because its value is
614 determined in part by the fan divisor. This follows the principle of
615 least suprise; the user doesn't expect the fan minimum to change just
616 because the divisor changed. */
617static ssize_t
618store_fan_div_reg(struct device *dev, const char *buf, size_t count, int nr)
619{
620 struct i2c_client *client = to_i2c_client(dev);
621 struct w83781d_data *data = i2c_get_clientdata(client);
622 unsigned long min;
623 u8 reg;
624 unsigned long val = simple_strtoul(buf, NULL, 10);
625
626 down(&data->update_lock);
627
628 /* Save fan_min */
629 min = FAN_FROM_REG(data->fan_min[nr],
630 DIV_FROM_REG(data->fan_div[nr]));
631
632 data->fan_div[nr] = DIV_TO_REG(val, data->type);
633
634 reg = (w83781d_read_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
635 & (nr==0 ? 0xcf : 0x3f))
636 | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6));
637 w83781d_write_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
638
639 /* w83781d and as99127f don't have extended divisor bits */
640 if (data->type != w83781d && data->type != as99127f) {
641 reg = (w83781d_read_value(client, W83781D_REG_VBAT)
642 & ~(1 << (5 + nr)))
643 | ((data->fan_div[nr] & 0x04) << (3 + nr));
644 w83781d_write_value(client, W83781D_REG_VBAT, reg);
645 }
646
647 /* Restore fan_min */
648 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
649 w83781d_write_value(client, W83781D_REG_FAN_MIN(nr+1), data->fan_min[nr]);
650
651 up(&data->update_lock);
652 return count;
653}
654
655#define sysfs_fan_div(offset) \
656static ssize_t show_regs_fan_div_##offset (struct device *dev, char *buf) \
657{ \
658 return show_fan_div_reg(dev, buf, offset); \
659} \
660static ssize_t store_regs_fan_div_##offset (struct device *dev, const char *buf, size_t count) \
661{ \
662 return store_fan_div_reg(dev, buf, count, offset - 1); \
663} \
664static DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, show_regs_fan_div_##offset, store_regs_fan_div_##offset);
665
666sysfs_fan_div(1);
667sysfs_fan_div(2);
668sysfs_fan_div(3);
669
670#define device_create_file_fan_div(client, offset) \
671do { \
672device_create_file(&client->dev, &dev_attr_fan##offset##_div); \
673} while (0)
674
675static ssize_t
676show_pwm_reg(struct device *dev, char *buf, int nr)
677{
678 struct w83781d_data *data = w83781d_update_device(dev);
679 return sprintf(buf, "%ld\n", (long) PWM_FROM_REG(data->pwm[nr - 1]));
680}
681
682static ssize_t
683show_pwmenable_reg(struct device *dev, char *buf, int nr)
684{
685 struct w83781d_data *data = w83781d_update_device(dev);
686 return sprintf(buf, "%ld\n", (long) data->pwmenable[nr - 1]);
687}
688
689static ssize_t
690store_pwm_reg(struct device *dev, const char *buf, size_t count, int nr)
691{
692 struct i2c_client *client = to_i2c_client(dev);
693 struct w83781d_data *data = i2c_get_clientdata(client);
694 u32 val;
695
696 val = simple_strtoul(buf, NULL, 10);
697
698 down(&data->update_lock);
699 data->pwm[nr - 1] = PWM_TO_REG(val);
700 w83781d_write_value(client, W83781D_REG_PWM(nr), data->pwm[nr - 1]);
701 up(&data->update_lock);
702 return count;
703}
704
705static ssize_t
706store_pwmenable_reg(struct device *dev, const char *buf, size_t count, int nr)
707{
708 struct i2c_client *client = to_i2c_client(dev);
709 struct w83781d_data *data = i2c_get_clientdata(client);
710 u32 val, reg;
711
712 val = simple_strtoul(buf, NULL, 10);
713
714 down(&data->update_lock);
715
716 switch (val) {
717 case 0:
718 case 1:
719 reg = w83781d_read_value(client, W83781D_REG_PWMCLK12);
720 w83781d_write_value(client, W83781D_REG_PWMCLK12,
721 (reg & 0xf7) | (val << 3));
722
723 reg = w83781d_read_value(client, W83781D_REG_BEEP_CONFIG);
724 w83781d_write_value(client, W83781D_REG_BEEP_CONFIG,
725 (reg & 0xef) | (!val << 4));
726
727 data->pwmenable[nr - 1] = val;
728 break;
729
730 default:
731 up(&data->update_lock);
732 return -EINVAL;
733 }
734
735 up(&data->update_lock);
736 return count;
737}
738
739#define sysfs_pwm(offset) \
740static ssize_t show_regs_pwm_##offset (struct device *dev, char *buf) \
741{ \
742 return show_pwm_reg(dev, buf, offset); \
743} \
744static ssize_t store_regs_pwm_##offset (struct device *dev, \
745 const char *buf, size_t count) \
746{ \
747 return store_pwm_reg(dev, buf, count, offset); \
748} \
749static DEVICE_ATTR(pwm##offset, S_IRUGO | S_IWUSR, \
750 show_regs_pwm_##offset, store_regs_pwm_##offset);
751
752#define sysfs_pwmenable(offset) \
753static ssize_t show_regs_pwmenable_##offset (struct device *dev, char *buf) \
754{ \
755 return show_pwmenable_reg(dev, buf, offset); \
756} \
757static ssize_t store_regs_pwmenable_##offset (struct device *dev, \
758 const char *buf, size_t count) \
759{ \
760 return store_pwmenable_reg(dev, buf, count, offset); \
761} \
762static DEVICE_ATTR(pwm##offset##_enable, S_IRUGO | S_IWUSR, \
763 show_regs_pwmenable_##offset, store_regs_pwmenable_##offset);
764
765sysfs_pwm(1);
766sysfs_pwm(2);
767sysfs_pwmenable(2); /* only PWM2 can be enabled/disabled */
768sysfs_pwm(3);
769sysfs_pwm(4);
770
771#define device_create_file_pwm(client, offset) \
772do { \
773device_create_file(&client->dev, &dev_attr_pwm##offset); \
774} while (0)
775
776#define device_create_file_pwmenable(client, offset) \
777do { \
778device_create_file(&client->dev, &dev_attr_pwm##offset##_enable); \
779} while (0)
780
781static ssize_t
782show_sensor_reg(struct device *dev, char *buf, int nr)
783{
784 struct w83781d_data *data = w83781d_update_device(dev);
785 return sprintf(buf, "%ld\n", (long) data->sens[nr - 1]);
786}
787
788static ssize_t
789store_sensor_reg(struct device *dev, const char *buf, size_t count, int nr)
790{
791 struct i2c_client *client = to_i2c_client(dev);
792 struct w83781d_data *data = i2c_get_clientdata(client);
793 u32 val, tmp;
794
795 val = simple_strtoul(buf, NULL, 10);
796
797 down(&data->update_lock);
798
799 switch (val) {
800 case 1: /* PII/Celeron diode */
801 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
802 w83781d_write_value(client, W83781D_REG_SCFG1,
803 tmp | BIT_SCFG1[nr - 1]);
804 tmp = w83781d_read_value(client, W83781D_REG_SCFG2);
805 w83781d_write_value(client, W83781D_REG_SCFG2,
806 tmp | BIT_SCFG2[nr - 1]);
807 data->sens[nr - 1] = val;
808 break;
809 case 2: /* 3904 */
810 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
811 w83781d_write_value(client, W83781D_REG_SCFG1,
812 tmp | BIT_SCFG1[nr - 1]);
813 tmp = w83781d_read_value(client, W83781D_REG_SCFG2);
814 w83781d_write_value(client, W83781D_REG_SCFG2,
815 tmp & ~BIT_SCFG2[nr - 1]);
816 data->sens[nr - 1] = val;
817 break;
818 case W83781D_DEFAULT_BETA: /* thermistor */
819 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
820 w83781d_write_value(client, W83781D_REG_SCFG1,
821 tmp & ~BIT_SCFG1[nr - 1]);
822 data->sens[nr - 1] = val;
823 break;
824 default:
825 dev_err(dev, "Invalid sensor type %ld; must be 1, 2, or %d\n",
826 (long) val, W83781D_DEFAULT_BETA);
827 break;
828 }
829
830 up(&data->update_lock);
831 return count;
832}
833
834#define sysfs_sensor(offset) \
835static ssize_t show_regs_sensor_##offset (struct device *dev, char *buf) \
836{ \
837 return show_sensor_reg(dev, buf, offset); \
838} \
839static ssize_t store_regs_sensor_##offset (struct device *dev, const char *buf, size_t count) \
840{ \
841 return store_sensor_reg(dev, buf, count, offset); \
842} \
843static DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, show_regs_sensor_##offset, store_regs_sensor_##offset);
844
845sysfs_sensor(1);
846sysfs_sensor(2);
847sysfs_sensor(3);
848
849#define device_create_file_sensor(client, offset) \
850do { \
851device_create_file(&client->dev, &dev_attr_temp##offset##_type); \
852} while (0)
853
854/* This function is called when:
855 * w83781d_driver is inserted (when this module is loaded), for each
856 available adapter
857 * when a new adapter is inserted (and w83781d_driver is still present) */
858static int
859w83781d_attach_adapter(struct i2c_adapter *adapter)
860{
861 if (!(adapter->class & I2C_CLASS_HWMON))
862 return 0;
863 return i2c_detect(adapter, &addr_data, w83781d_detect);
864}
865
866/* Assumes that adapter is of I2C, not ISA variety.
867 * OTHERWISE DON'T CALL THIS
868 */
869static int
870w83781d_detect_subclients(struct i2c_adapter *adapter, int address, int kind,
871 struct i2c_client *new_client)
872{
873 int i, val1 = 0, id;
874 int err;
875 const char *client_name = "";
876 struct w83781d_data *data = i2c_get_clientdata(new_client);
877
878 data->lm75[0] = kmalloc(sizeof(struct i2c_client), GFP_KERNEL);
879 if (!(data->lm75[0])) {
880 err = -ENOMEM;
881 goto ERROR_SC_0;
882 }
883 memset(data->lm75[0], 0x00, sizeof (struct i2c_client));
884
885 id = i2c_adapter_id(adapter);
886
887 if (force_subclients[0] == id && force_subclients[1] == address) {
888 for (i = 2; i <= 3; i++) {
889 if (force_subclients[i] < 0x48 ||
890 force_subclients[i] > 0x4f) {
891 dev_err(&new_client->dev, "Invalid subclient "
892 "address %d; must be 0x48-0x4f\n",
893 force_subclients[i]);
894 err = -EINVAL;
895 goto ERROR_SC_1;
896 }
897 }
898 w83781d_write_value(new_client, W83781D_REG_I2C_SUBADDR,
899 (force_subclients[2] & 0x07) |
900 ((force_subclients[3] & 0x07) << 4));
901 data->lm75[0]->addr = force_subclients[2];
902 } else {
903 val1 = w83781d_read_value(new_client, W83781D_REG_I2C_SUBADDR);
904 data->lm75[0]->addr = 0x48 + (val1 & 0x07);
905 }
906
907 if (kind != w83783s) {
908
909 data->lm75[1] = kmalloc(sizeof(struct i2c_client), GFP_KERNEL);
910 if (!(data->lm75[1])) {
911 err = -ENOMEM;
912 goto ERROR_SC_1;
913 }
914 memset(data->lm75[1], 0x0, sizeof(struct i2c_client));
915
916 if (force_subclients[0] == id &&
917 force_subclients[1] == address) {
918 data->lm75[1]->addr = force_subclients[3];
919 } else {
920 data->lm75[1]->addr = 0x48 + ((val1 >> 4) & 0x07);
921 }
922 if (data->lm75[0]->addr == data->lm75[1]->addr) {
923 dev_err(&new_client->dev,
924 "Duplicate addresses 0x%x for subclients.\n",
925 data->lm75[0]->addr);
926 err = -EBUSY;
927 goto ERROR_SC_2;
928 }
929 }
930
931 if (kind == w83781d)
932 client_name = "w83781d subclient";
933 else if (kind == w83782d)
934 client_name = "w83782d subclient";
935 else if (kind == w83783s)
936 client_name = "w83783s subclient";
937 else if (kind == w83627hf)
938 client_name = "w83627hf subclient";
939 else if (kind == as99127f)
940 client_name = "as99127f subclient";
941
942 for (i = 0; i <= 1; i++) {
943 /* store all data in w83781d */
944 i2c_set_clientdata(data->lm75[i], NULL);
945 data->lm75[i]->adapter = adapter;
946 data->lm75[i]->driver = &w83781d_driver;
947 data->lm75[i]->flags = 0;
948 strlcpy(data->lm75[i]->name, client_name,
949 I2C_NAME_SIZE);
950 if ((err = i2c_attach_client(data->lm75[i]))) {
951 dev_err(&new_client->dev, "Subclient %d "
952 "registration at address 0x%x "
953 "failed.\n", i, data->lm75[i]->addr);
954 if (i == 1)
955 goto ERROR_SC_3;
956 goto ERROR_SC_2;
957 }
958 if (kind == w83783s)
959 break;
960 }
961
962 return 0;
963
964/* Undo inits in case of errors */
965ERROR_SC_3:
966 i2c_detach_client(data->lm75[0]);
967ERROR_SC_2:
968 if (NULL != data->lm75[1])
969 kfree(data->lm75[1]);
970ERROR_SC_1:
971 if (NULL != data->lm75[0])
972 kfree(data->lm75[0]);
973ERROR_SC_0:
974 return err;
975}
976
977static int
978w83781d_detect(struct i2c_adapter *adapter, int address, int kind)
979{
980 int i = 0, val1 = 0, val2;
981 struct i2c_client *new_client;
982 struct w83781d_data *data;
983 int err;
984 const char *client_name = "";
985 int is_isa = i2c_is_isa_adapter(adapter);
986 enum vendor { winbond, asus } vendid;
987
988 if (!is_isa
989 && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
990 err = -EINVAL;
991 goto ERROR0;
992 }
993
994 /* Prevent users from forcing a kind for a bus it isn't supposed
995 to possibly be on */
996 if (is_isa && (kind == as99127f || kind == w83783s)) {
997 dev_err(&adapter->dev,
998 "Cannot force I2C-only chip for ISA address 0x%02x.\n",
999 address);
1000 err = -EINVAL;
1001 goto ERROR0;
1002 }
1003 if (!is_isa && kind == w83697hf) {
1004 dev_err(&adapter->dev,
1005 "Cannot force ISA-only chip for I2C address 0x%02x.\n",
1006 address);
1007 err = -EINVAL;
1008 goto ERROR0;
1009 }
1010
1011 if (is_isa)
1012 if (!request_region(address, W83781D_EXTENT,
1013 w83781d_driver.name)) {
1014 dev_dbg(&adapter->dev, "Request of region "
1015 "0x%x-0x%x for w83781d failed\n", address,
1016 address + W83781D_EXTENT - 1);
1017 err = -EBUSY;
1018 goto ERROR0;
1019 }
1020
1021 /* Probe whether there is anything available on this address. Already
1022 done for SMBus clients */
1023 if (kind < 0) {
1024 if (is_isa) {
1025
1026#define REALLY_SLOW_IO
1027 /* We need the timeouts for at least some LM78-like
1028 chips. But only if we read 'undefined' registers. */
1029 i = inb_p(address + 1);
1030 if (inb_p(address + 2) != i
1031 || inb_p(address + 3) != i
1032 || inb_p(address + 7) != i) {
1033 dev_dbg(&adapter->dev, "Detection of w83781d "
1034 "chip failed at step 1\n");
1035 err = -ENODEV;
1036 goto ERROR1;
1037 }
1038#undef REALLY_SLOW_IO
1039
1040 /* Let's just hope nothing breaks here */
1041 i = inb_p(address + 5) & 0x7f;
1042 outb_p(~i & 0x7f, address + 5);
1043 val2 = inb_p(address + 5) & 0x7f;
1044 if (val2 != (~i & 0x7f)) {
1045 outb_p(i, address + 5);
1046 dev_dbg(&adapter->dev, "Detection of w83781d "
1047 "chip failed at step 2 (0x%x != "
1048 "0x%x at 0x%x)\n", val2, ~i & 0x7f,
1049 address + 5);
1050 err = -ENODEV;
1051 goto ERROR1;
1052 }
1053 }
1054 }
1055
1056 /* OK. For now, we presume we have a valid client. We now create the
1057 client structure, even though we cannot fill it completely yet.
1058 But it allows us to access w83781d_{read,write}_value. */
1059
1060 if (!(data = kmalloc(sizeof(struct w83781d_data), GFP_KERNEL))) {
1061 err = -ENOMEM;
1062 goto ERROR1;
1063 }
1064 memset(data, 0, sizeof(struct w83781d_data));
1065
1066 new_client = &data->client;
1067 i2c_set_clientdata(new_client, data);
1068 new_client->addr = address;
1069 init_MUTEX(&data->lock);
1070 new_client->adapter = adapter;
1071 new_client->driver = &w83781d_driver;
1072 new_client->flags = 0;
1073
1074 /* Now, we do the remaining detection. */
1075
1076 /* The w8378?d may be stuck in some other bank than bank 0. This may
1077 make reading other information impossible. Specify a force=... or
1078 force_*=... parameter, and the Winbond will be reset to the right
1079 bank. */
1080 if (kind < 0) {
1081 if (w83781d_read_value(new_client, W83781D_REG_CONFIG) & 0x80) {
1082 dev_dbg(&new_client->dev, "Detection failed at step "
1083 "3\n");
1084 err = -ENODEV;
1085 goto ERROR2;
1086 }
1087 val1 = w83781d_read_value(new_client, W83781D_REG_BANK);
1088 val2 = w83781d_read_value(new_client, W83781D_REG_CHIPMAN);
1089 /* Check for Winbond or Asus ID if in bank 0 */
1090 if ((!(val1 & 0x07)) &&
1091 (((!(val1 & 0x80)) && (val2 != 0xa3) && (val2 != 0xc3))
1092 || ((val1 & 0x80) && (val2 != 0x5c) && (val2 != 0x12)))) {
1093 dev_dbg(&new_client->dev, "Detection failed at step "
1094 "4\n");
1095 err = -ENODEV;
1096 goto ERROR2;
1097 }
1098 /* If Winbond SMBus, check address at 0x48.
1099 Asus doesn't support, except for as99127f rev.2 */
1100 if ((!is_isa) && (((!(val1 & 0x80)) && (val2 == 0xa3)) ||
1101 ((val1 & 0x80) && (val2 == 0x5c)))) {
1102 if (w83781d_read_value
1103 (new_client, W83781D_REG_I2C_ADDR) != address) {
1104 dev_dbg(&new_client->dev, "Detection failed "
1105 "at step 5\n");
1106 err = -ENODEV;
1107 goto ERROR2;
1108 }
1109 }
1110 }
1111
1112 /* We have either had a force parameter, or we have already detected the
1113 Winbond. Put it now into bank 0 and Vendor ID High Byte */
1114 w83781d_write_value(new_client, W83781D_REG_BANK,
1115 (w83781d_read_value(new_client,
1116 W83781D_REG_BANK) & 0x78) |
1117 0x80);
1118
1119 /* Determine the chip type. */
1120 if (kind <= 0) {
1121 /* get vendor ID */
1122 val2 = w83781d_read_value(new_client, W83781D_REG_CHIPMAN);
1123 if (val2 == 0x5c)
1124 vendid = winbond;
1125 else if (val2 == 0x12)
1126 vendid = asus;
1127 else {
1128 dev_dbg(&new_client->dev, "Chip was made by neither "
1129 "Winbond nor Asus?\n");
1130 err = -ENODEV;
1131 goto ERROR2;
1132 }
1133
1134 val1 = w83781d_read_value(new_client, W83781D_REG_WCHIPID);
1135 if ((val1 == 0x10 || val1 == 0x11) && vendid == winbond)
1136 kind = w83781d;
1137 else if (val1 == 0x30 && vendid == winbond)
1138 kind = w83782d;
1139 else if (val1 == 0x40 && vendid == winbond && !is_isa
1140 && address == 0x2d)
1141 kind = w83783s;
1142 else if ((val1 == 0x21 || val1 == 0x90) && vendid == winbond)
1143 kind = w83627hf;
1144 else if (val1 == 0x31 && !is_isa && address >= 0x28)
1145 kind = as99127f;
1146 else if (val1 == 0x60 && vendid == winbond && is_isa)
1147 kind = w83697hf;
1148 else {
1149 if (kind == 0)
1150 dev_warn(&new_client->dev, "Ignoring 'force' "
1151 "parameter for unknown chip at "
1152 "adapter %d, address 0x%02x\n",
1153 i2c_adapter_id(adapter), address);
1154 err = -EINVAL;
1155 goto ERROR2;
1156 }
1157 }
1158
1159 if (kind == w83781d) {
1160 client_name = "w83781d";
1161 } else if (kind == w83782d) {
1162 client_name = "w83782d";
1163 } else if (kind == w83783s) {
1164 client_name = "w83783s";
1165 } else if (kind == w83627hf) {
1166 if (val1 == 0x90)
1167 client_name = "w83627thf";
1168 else
1169 client_name = "w83627hf";
1170 } else if (kind == as99127f) {
1171 client_name = "as99127f";
1172 } else if (kind == w83697hf) {
1173 client_name = "w83697hf";
1174 }
1175
1176 /* Fill in the remaining client fields and put into the global list */
1177 strlcpy(new_client->name, client_name, I2C_NAME_SIZE);
1178 data->type = kind;
1179
1180 data->valid = 0;
1181 init_MUTEX(&data->update_lock);
1182
1183 /* Tell the I2C layer a new client has arrived */
1184 if ((err = i2c_attach_client(new_client)))
1185 goto ERROR2;
1186
1187 /* attach secondary i2c lm75-like clients */
1188 if (!is_isa) {
1189 if ((err = w83781d_detect_subclients(adapter, address,
1190 kind, new_client)))
1191 goto ERROR3;
1192 } else {
1193 data->lm75[0] = NULL;
1194 data->lm75[1] = NULL;
1195 }
1196
1197 /* Initialize the chip */
1198 w83781d_init_client(new_client);
1199
1200 /* A few vars need to be filled upon startup */
1201 for (i = 1; i <= 3; i++) {
1202 data->fan_min[i - 1] = w83781d_read_value(new_client,
1203 W83781D_REG_FAN_MIN(i));
1204 }
1205 if (kind != w83781d && kind != as99127f)
1206 for (i = 0; i < 4; i++)
1207 data->pwmenable[i] = 1;
1208
1209 /* Register sysfs hooks */
1210 device_create_file_in(new_client, 0);
1211 if (kind != w83783s && kind != w83697hf)
1212 device_create_file_in(new_client, 1);
1213 device_create_file_in(new_client, 2);
1214 device_create_file_in(new_client, 3);
1215 device_create_file_in(new_client, 4);
1216 device_create_file_in(new_client, 5);
1217 device_create_file_in(new_client, 6);
1218 if (kind != as99127f && kind != w83781d && kind != w83783s) {
1219 device_create_file_in(new_client, 7);
1220 device_create_file_in(new_client, 8);
1221 }
1222
1223 device_create_file_fan(new_client, 1);
1224 device_create_file_fan(new_client, 2);
1225 if (kind != w83697hf)
1226 device_create_file_fan(new_client, 3);
1227
1228 device_create_file_temp(new_client, 1);
1229 device_create_file_temp(new_client, 2);
1230 if (kind != w83783s && kind != w83697hf)
1231 device_create_file_temp(new_client, 3);
1232
1233 if (kind != w83697hf)
1234 device_create_file_vid(new_client);
1235
1236 if (kind != w83697hf)
1237 device_create_file_vrm(new_client);
1238
1239 device_create_file_fan_div(new_client, 1);
1240 device_create_file_fan_div(new_client, 2);
1241 if (kind != w83697hf)
1242 device_create_file_fan_div(new_client, 3);
1243
1244 device_create_file_alarms(new_client);
1245
1246 device_create_file_beep(new_client);
1247
1248 if (kind != w83781d && kind != as99127f) {
1249 device_create_file_pwm(new_client, 1);
1250 device_create_file_pwm(new_client, 2);
1251 device_create_file_pwmenable(new_client, 2);
1252 }
1253 if (kind == w83782d && !is_isa) {
1254 device_create_file_pwm(new_client, 3);
1255 device_create_file_pwm(new_client, 4);
1256 }
1257
1258 if (kind != as99127f && kind != w83781d) {
1259 device_create_file_sensor(new_client, 1);
1260 device_create_file_sensor(new_client, 2);
1261 if (kind != w83783s && kind != w83697hf)
1262 device_create_file_sensor(new_client, 3);
1263 }
1264
1265 return 0;
1266
1267ERROR3:
1268 i2c_detach_client(new_client);
1269ERROR2:
1270 kfree(data);
1271ERROR1:
1272 if (is_isa)
1273 release_region(address, W83781D_EXTENT);
1274ERROR0:
1275 return err;
1276}
1277
1278static int
1279w83781d_detach_client(struct i2c_client *client)
1280{
1281 int err;
1282
1283 if (i2c_is_isa_client(client))
1284 release_region(client->addr, W83781D_EXTENT);
1285
1286 if ((err = i2c_detach_client(client))) {
1287 dev_err(&client->dev,
1288 "Client deregistration failed, client not detached.\n");
1289 return err;
1290 }
1291
1292 if (i2c_get_clientdata(client)==NULL) {
1293 /* subclients */
1294 kfree(client);
1295 } else {
1296 /* main client */
1297 kfree(i2c_get_clientdata(client));
1298 }
1299
1300 return 0;
1301}
1302
1303/* The SMBus locks itself, usually, but nothing may access the Winbond between
1304 bank switches. ISA access must always be locked explicitly!
1305 We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks,
1306 would slow down the W83781D access and should not be necessary.
1307 There are some ugly typecasts here, but the good news is - they should
1308 nowhere else be necessary! */
1309static int
1310w83781d_read_value(struct i2c_client *client, u16 reg)
1311{
1312 struct w83781d_data *data = i2c_get_clientdata(client);
1313 int res, word_sized, bank;
1314 struct i2c_client *cl;
1315
1316 down(&data->lock);
1317 if (i2c_is_isa_client(client)) {
1318 word_sized = (((reg & 0xff00) == 0x100)
1319 || ((reg & 0xff00) == 0x200))
1320 && (((reg & 0x00ff) == 0x50)
1321 || ((reg & 0x00ff) == 0x53)
1322 || ((reg & 0x00ff) == 0x55));
1323 if (reg & 0xff00) {
1324 outb_p(W83781D_REG_BANK,
1325 client->addr + W83781D_ADDR_REG_OFFSET);
1326 outb_p(reg >> 8,
1327 client->addr + W83781D_DATA_REG_OFFSET);
1328 }
1329 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1330 res = inb_p(client->addr + W83781D_DATA_REG_OFFSET);
1331 if (word_sized) {
1332 outb_p((reg & 0xff) + 1,
1333 client->addr + W83781D_ADDR_REG_OFFSET);
1334 res =
1335 (res << 8) + inb_p(client->addr +
1336 W83781D_DATA_REG_OFFSET);
1337 }
1338 if (reg & 0xff00) {
1339 outb_p(W83781D_REG_BANK,
1340 client->addr + W83781D_ADDR_REG_OFFSET);
1341 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1342 }
1343 } else {
1344 bank = (reg >> 8) & 0x0f;
1345 if (bank > 2)
1346 /* switch banks */
1347 i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1348 bank);
1349 if (bank == 0 || bank > 2) {
1350 res = i2c_smbus_read_byte_data(client, reg & 0xff);
1351 } else {
1352 /* switch to subclient */
1353 cl = data->lm75[bank - 1];
1354 /* convert from ISA to LM75 I2C addresses */
1355 switch (reg & 0xff) {
1356 case 0x50: /* TEMP */
1357 res = swab16(i2c_smbus_read_word_data(cl, 0));
1358 break;
1359 case 0x52: /* CONFIG */
1360 res = i2c_smbus_read_byte_data(cl, 1);
1361 break;
1362 case 0x53: /* HYST */
1363 res = swab16(i2c_smbus_read_word_data(cl, 2));
1364 break;
1365 case 0x55: /* OVER */
1366 default:
1367 res = swab16(i2c_smbus_read_word_data(cl, 3));
1368 break;
1369 }
1370 }
1371 if (bank > 2)
1372 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1373 }
1374 up(&data->lock);
1375 return res;
1376}
1377
1378static int
1379w83781d_write_value(struct i2c_client *client, u16 reg, u16 value)
1380{
1381 struct w83781d_data *data = i2c_get_clientdata(client);
1382 int word_sized, bank;
1383 struct i2c_client *cl;
1384
1385 down(&data->lock);
1386 if (i2c_is_isa_client(client)) {
1387 word_sized = (((reg & 0xff00) == 0x100)
1388 || ((reg & 0xff00) == 0x200))
1389 && (((reg & 0x00ff) == 0x53)
1390 || ((reg & 0x00ff) == 0x55));
1391 if (reg & 0xff00) {
1392 outb_p(W83781D_REG_BANK,
1393 client->addr + W83781D_ADDR_REG_OFFSET);
1394 outb_p(reg >> 8,
1395 client->addr + W83781D_DATA_REG_OFFSET);
1396 }
1397 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1398 if (word_sized) {
1399 outb_p(value >> 8,
1400 client->addr + W83781D_DATA_REG_OFFSET);
1401 outb_p((reg & 0xff) + 1,
1402 client->addr + W83781D_ADDR_REG_OFFSET);
1403 }
1404 outb_p(value & 0xff, client->addr + W83781D_DATA_REG_OFFSET);
1405 if (reg & 0xff00) {
1406 outb_p(W83781D_REG_BANK,
1407 client->addr + W83781D_ADDR_REG_OFFSET);
1408 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1409 }
1410 } else {
1411 bank = (reg >> 8) & 0x0f;
1412 if (bank > 2)
1413 /* switch banks */
1414 i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1415 bank);
1416 if (bank == 0 || bank > 2) {
1417 i2c_smbus_write_byte_data(client, reg & 0xff,
1418 value & 0xff);
1419 } else {
1420 /* switch to subclient */
1421 cl = data->lm75[bank - 1];
1422 /* convert from ISA to LM75 I2C addresses */
1423 switch (reg & 0xff) {
1424 case 0x52: /* CONFIG */
1425 i2c_smbus_write_byte_data(cl, 1, value & 0xff);
1426 break;
1427 case 0x53: /* HYST */
1428 i2c_smbus_write_word_data(cl, 2, swab16(value));
1429 break;
1430 case 0x55: /* OVER */
1431 i2c_smbus_write_word_data(cl, 3, swab16(value));
1432 break;
1433 }
1434 }
1435 if (bank > 2)
1436 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1437 }
1438 up(&data->lock);
1439 return 0;
1440}
1441
1442/* Called when we have found a new W83781D. It should set limits, etc. */
1443static void
1444w83781d_init_client(struct i2c_client *client)
1445{
1446 struct w83781d_data *data = i2c_get_clientdata(client);
1447 int i, p;
1448 int type = data->type;
1449 u8 tmp;
1450
1451 if (init && type != as99127f) { /* this resets registers we don't have
1452 documentation for on the as99127f */
1453 /* save these registers */
1454 i = w83781d_read_value(client, W83781D_REG_BEEP_CONFIG);
1455 p = w83781d_read_value(client, W83781D_REG_PWMCLK12);
1456 /* Reset all except Watchdog values and last conversion values
1457 This sets fan-divs to 2, among others */
1458 w83781d_write_value(client, W83781D_REG_CONFIG, 0x80);
1459 /* Restore the registers and disable power-on abnormal beep.
1460 This saves FAN 1/2/3 input/output values set by BIOS. */
1461 w83781d_write_value(client, W83781D_REG_BEEP_CONFIG, i | 0x80);
1462 w83781d_write_value(client, W83781D_REG_PWMCLK12, p);
1463 /* Disable master beep-enable (reset turns it on).
1464 Individual beep_mask should be reset to off but for some reason
1465 disabling this bit helps some people not get beeped */
1466 w83781d_write_value(client, W83781D_REG_BEEP_INTS2, 0);
1467 }
1468
1469 data->vrm = i2c_which_vrm();
1470
1471 if ((type != w83781d) && (type != as99127f)) {
1472 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
1473 for (i = 1; i <= 3; i++) {
1474 if (!(tmp & BIT_SCFG1[i - 1])) {
1475 data->sens[i - 1] = W83781D_DEFAULT_BETA;
1476 } else {
1477 if (w83781d_read_value
1478 (client,
1479 W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
1480 data->sens[i - 1] = 1;
1481 else
1482 data->sens[i - 1] = 2;
1483 }
1484 if ((type == w83783s || type == w83697hf) && (i == 2))
1485 break;
1486 }
1487 }
1488
1489 if (init && type != as99127f) {
1490 /* Enable temp2 */
1491 tmp = w83781d_read_value(client, W83781D_REG_TEMP2_CONFIG);
1492 if (tmp & 0x01) {
1493 dev_warn(&client->dev, "Enabling temp2, readings "
1494 "might not make sense\n");
1495 w83781d_write_value(client, W83781D_REG_TEMP2_CONFIG,
1496 tmp & 0xfe);
1497 }
1498
1499 /* Enable temp3 */
1500 if (type != w83783s && type != w83697hf) {
1501 tmp = w83781d_read_value(client,
1502 W83781D_REG_TEMP3_CONFIG);
1503 if (tmp & 0x01) {
1504 dev_warn(&client->dev, "Enabling temp3, "
1505 "readings might not make sense\n");
1506 w83781d_write_value(client,
1507 W83781D_REG_TEMP3_CONFIG, tmp & 0xfe);
1508 }
1509 }
1510
1511 if (type != w83781d) {
1512 /* enable comparator mode for temp2 and temp3 so
1513 alarm indication will work correctly */
1514 i = w83781d_read_value(client, W83781D_REG_IRQ);
1515 if (!(i & 0x40))
1516 w83781d_write_value(client, W83781D_REG_IRQ,
1517 i | 0x40);
1518 }
1519 }
1520
1521 /* Start monitoring */
1522 w83781d_write_value(client, W83781D_REG_CONFIG,
1523 (w83781d_read_value(client,
1524 W83781D_REG_CONFIG) & 0xf7)
1525 | 0x01);
1526}
1527
1528static struct w83781d_data *w83781d_update_device(struct device *dev)
1529{
1530 struct i2c_client *client = to_i2c_client(dev);
1531 struct w83781d_data *data = i2c_get_clientdata(client);
1532 int i;
1533
1534 down(&data->update_lock);
1535
1536 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1537 || !data->valid) {
1538 dev_dbg(dev, "Starting device update\n");
1539
1540 for (i = 0; i <= 8; i++) {
1541 if ((data->type == w83783s || data->type == w83697hf)
1542 && (i == 1))
1543 continue; /* 783S has no in1 */
1544 data->in[i] =
1545 w83781d_read_value(client, W83781D_REG_IN(i));
1546 data->in_min[i] =
1547 w83781d_read_value(client, W83781D_REG_IN_MIN(i));
1548 data->in_max[i] =
1549 w83781d_read_value(client, W83781D_REG_IN_MAX(i));
1550 if ((data->type != w83782d) && (data->type != w83697hf)
1551 && (data->type != w83627hf) && (i == 6))
1552 break;
1553 }
1554 for (i = 1; i <= 3; i++) {
1555 data->fan[i - 1] =
1556 w83781d_read_value(client, W83781D_REG_FAN(i));
1557 data->fan_min[i - 1] =
1558 w83781d_read_value(client, W83781D_REG_FAN_MIN(i));
1559 }
1560 if (data->type != w83781d && data->type != as99127f) {
1561 for (i = 1; i <= 4; i++) {
1562 data->pwm[i - 1] =
1563 w83781d_read_value(client,
1564 W83781D_REG_PWM(i));
1565 if ((data->type != w83782d
1566 || i2c_is_isa_client(client))
1567 && i == 2)
1568 break;
1569 }
1570 /* Only PWM2 can be disabled */
1571 data->pwmenable[1] = (w83781d_read_value(client,
1572 W83781D_REG_PWMCLK12) & 0x08) >> 3;
1573 }
1574
1575 data->temp = w83781d_read_value(client, W83781D_REG_TEMP(1));
1576 data->temp_max =
1577 w83781d_read_value(client, W83781D_REG_TEMP_OVER(1));
1578 data->temp_max_hyst =
1579 w83781d_read_value(client, W83781D_REG_TEMP_HYST(1));
1580 data->temp_add[0] =
1581 w83781d_read_value(client, W83781D_REG_TEMP(2));
1582 data->temp_max_add[0] =
1583 w83781d_read_value(client, W83781D_REG_TEMP_OVER(2));
1584 data->temp_max_hyst_add[0] =
1585 w83781d_read_value(client, W83781D_REG_TEMP_HYST(2));
1586 if (data->type != w83783s && data->type != w83697hf) {
1587 data->temp_add[1] =
1588 w83781d_read_value(client, W83781D_REG_TEMP(3));
1589 data->temp_max_add[1] =
1590 w83781d_read_value(client,
1591 W83781D_REG_TEMP_OVER(3));
1592 data->temp_max_hyst_add[1] =
1593 w83781d_read_value(client,
1594 W83781D_REG_TEMP_HYST(3));
1595 }
1596 i = w83781d_read_value(client, W83781D_REG_VID_FANDIV);
1597 if (data->type != w83697hf) {
1598 data->vid = i & 0x0f;
1599 data->vid |=
1600 (w83781d_read_value(client, W83781D_REG_CHIPID) &
1601 0x01)
1602 << 4;
1603 }
1604 data->fan_div[0] = (i >> 4) & 0x03;
1605 data->fan_div[1] = (i >> 6) & 0x03;
1606 if (data->type != w83697hf) {
1607 data->fan_div[2] = (w83781d_read_value(client,
1608 W83781D_REG_PIN)
1609 >> 6) & 0x03;
1610 }
1611 if ((data->type != w83781d) && (data->type != as99127f)) {
1612 i = w83781d_read_value(client, W83781D_REG_VBAT);
1613 data->fan_div[0] |= (i >> 3) & 0x04;
1614 data->fan_div[1] |= (i >> 4) & 0x04;
1615 if (data->type != w83697hf)
1616 data->fan_div[2] |= (i >> 5) & 0x04;
1617 }
1618 data->alarms =
1619 w83781d_read_value(client,
1620 W83781D_REG_ALARM1) +
1621 (w83781d_read_value(client, W83781D_REG_ALARM2) << 8);
1622 if ((data->type == w83782d) || (data->type == w83627hf)) {
1623 data->alarms |=
1624 w83781d_read_value(client,
1625 W83781D_REG_ALARM3) << 16;
1626 }
1627 i = w83781d_read_value(client, W83781D_REG_BEEP_INTS2);
1628 data->beep_enable = i >> 7;
1629 data->beep_mask = ((i & 0x7f) << 8) +
1630 w83781d_read_value(client, W83781D_REG_BEEP_INTS1);
1631 if ((data->type != w83781d) && (data->type != as99127f)) {
1632 data->beep_mask |=
1633 w83781d_read_value(client,
1634 W83781D_REG_BEEP_INTS3) << 16;
1635 }
1636 data->last_updated = jiffies;
1637 data->valid = 1;
1638 }
1639
1640 up(&data->update_lock);
1641
1642 return data;
1643}
1644
1645static int __init
1646sensors_w83781d_init(void)
1647{
1648 return i2c_add_driver(&w83781d_driver);
1649}
1650
1651static void __exit
1652sensors_w83781d_exit(void)
1653{
1654 i2c_del_driver(&w83781d_driver);
1655}
1656
1657MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
1658 "Philip Edelbrock <phil@netroedge.com>, "
1659 "and Mark Studebaker <mdsxyz123@yahoo.com>");
1660MODULE_DESCRIPTION("W83781D driver");
1661MODULE_LICENSE("GPL");
1662
1663module_init(sensors_w83781d_init);
1664module_exit(sensors_w83781d_exit);
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-02 00:28:42 -0400