diff options
author | Mika Westerberg <mika.westerberg@linux.intel.com> | 2013-04-09 20:36:40 -0400 |
---|---|---|
committer | Wolfram Sang <wsa@the-dreams.de> | 2013-04-15 12:17:51 -0400 |
commit | 3ca4ed8715a6677ce2cdd7aa471685e653b5114d (patch) | |
tree | 3d9e689ceb242d4ff355262a5ea6ae59a2f967e3 /drivers/i2c/busses | |
parent | efe7d640ef486c4c0c305641dbcacc6918542b76 (diff) |
i2c-designware: enable/disable the controller properly
The correct way to disable or enable the controller is to wait until the
DW_IC_ENABLE_STATUS register bit matches the bit we program into DW_IC_ENABLE
register. This procedure is described in the DesignWare I2C databook.
By doing this we can be sure that the controller is in correct state once
the function returns.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Diffstat (limited to 'drivers/i2c/busses')
-rw-r--r-- | drivers/i2c/busses/i2c-designware-core.c | 34 |
1 files changed, 28 insertions, 6 deletions
diff --git a/drivers/i2c/busses/i2c-designware-core.c b/drivers/i2c/busses/i2c-designware-core.c index 94fd81875409..5cc4ebf29b0a 100644 --- a/drivers/i2c/busses/i2c-designware-core.c +++ b/drivers/i2c/busses/i2c-designware-core.c | |||
@@ -68,6 +68,7 @@ | |||
68 | #define DW_IC_TXFLR 0x74 | 68 | #define DW_IC_TXFLR 0x74 |
69 | #define DW_IC_RXFLR 0x78 | 69 | #define DW_IC_RXFLR 0x78 |
70 | #define DW_IC_TX_ABRT_SOURCE 0x80 | 70 | #define DW_IC_TX_ABRT_SOURCE 0x80 |
71 | #define DW_IC_ENABLE_STATUS 0x9c | ||
71 | #define DW_IC_COMP_PARAM_1 0xf4 | 72 | #define DW_IC_COMP_PARAM_1 0xf4 |
72 | #define DW_IC_COMP_TYPE 0xfc | 73 | #define DW_IC_COMP_TYPE 0xfc |
73 | #define DW_IC_COMP_TYPE_VALUE 0x44570140 | 74 | #define DW_IC_COMP_TYPE_VALUE 0x44570140 |
@@ -248,6 +249,27 @@ static u32 i2c_dw_scl_lcnt(u32 ic_clk, u32 tLOW, u32 tf, int offset) | |||
248 | return ((ic_clk * (tLOW + tf) + 5000) / 10000) - 1 + offset; | 249 | return ((ic_clk * (tLOW + tf) + 5000) / 10000) - 1 + offset; |
249 | } | 250 | } |
250 | 251 | ||
252 | static void __i2c_dw_enable(struct dw_i2c_dev *dev, bool enable) | ||
253 | { | ||
254 | int timeout = 100; | ||
255 | |||
256 | do { | ||
257 | dw_writel(dev, enable, DW_IC_ENABLE); | ||
258 | if ((dw_readl(dev, DW_IC_ENABLE_STATUS) & 1) == enable) | ||
259 | return; | ||
260 | |||
261 | /* | ||
262 | * Wait 10 times the signaling period of the highest I2C | ||
263 | * transfer supported by the driver (for 400KHz this is | ||
264 | * 25us) as described in the DesignWare I2C databook. | ||
265 | */ | ||
266 | usleep_range(25, 250); | ||
267 | } while (timeout--); | ||
268 | |||
269 | dev_warn(dev->dev, "timeout in %sabling adapter\n", | ||
270 | enable ? "en" : "dis"); | ||
271 | } | ||
272 | |||
251 | /** | 273 | /** |
252 | * i2c_dw_init() - initialize the designware i2c master hardware | 274 | * i2c_dw_init() - initialize the designware i2c master hardware |
253 | * @dev: device private data | 275 | * @dev: device private data |
@@ -278,7 +300,7 @@ int i2c_dw_init(struct dw_i2c_dev *dev) | |||
278 | } | 300 | } |
279 | 301 | ||
280 | /* Disable the adapter */ | 302 | /* Disable the adapter */ |
281 | dw_writel(dev, 0, DW_IC_ENABLE); | 303 | __i2c_dw_enable(dev, false); |
282 | 304 | ||
283 | /* set standard and fast speed deviders for high/low periods */ | 305 | /* set standard and fast speed deviders for high/low periods */ |
284 | 306 | ||
@@ -345,7 +367,7 @@ static void i2c_dw_xfer_init(struct dw_i2c_dev *dev) | |||
345 | u32 ic_con; | 367 | u32 ic_con; |
346 | 368 | ||
347 | /* Disable the adapter */ | 369 | /* Disable the adapter */ |
348 | dw_writel(dev, 0, DW_IC_ENABLE); | 370 | __i2c_dw_enable(dev, false); |
349 | 371 | ||
350 | /* set the slave (target) address */ | 372 | /* set the slave (target) address */ |
351 | dw_writel(dev, msgs[dev->msg_write_idx].addr, DW_IC_TAR); | 373 | dw_writel(dev, msgs[dev->msg_write_idx].addr, DW_IC_TAR); |
@@ -359,7 +381,7 @@ static void i2c_dw_xfer_init(struct dw_i2c_dev *dev) | |||
359 | dw_writel(dev, ic_con, DW_IC_CON); | 381 | dw_writel(dev, ic_con, DW_IC_CON); |
360 | 382 | ||
361 | /* Enable the adapter */ | 383 | /* Enable the adapter */ |
362 | dw_writel(dev, 1, DW_IC_ENABLE); | 384 | __i2c_dw_enable(dev, true); |
363 | 385 | ||
364 | /* Enable interrupts */ | 386 | /* Enable interrupts */ |
365 | dw_writel(dev, DW_IC_INTR_DEFAULT_MASK, DW_IC_INTR_MASK); | 387 | dw_writel(dev, DW_IC_INTR_DEFAULT_MASK, DW_IC_INTR_MASK); |
@@ -565,7 +587,7 @@ i2c_dw_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num) | |||
565 | /* no error */ | 587 | /* no error */ |
566 | if (likely(!dev->cmd_err)) { | 588 | if (likely(!dev->cmd_err)) { |
567 | /* Disable the adapter */ | 589 | /* Disable the adapter */ |
568 | dw_writel(dev, 0, DW_IC_ENABLE); | 590 | __i2c_dw_enable(dev, false); |
569 | ret = num; | 591 | ret = num; |
570 | goto done; | 592 | goto done; |
571 | } | 593 | } |
@@ -700,7 +722,7 @@ EXPORT_SYMBOL_GPL(i2c_dw_isr); | |||
700 | void i2c_dw_enable(struct dw_i2c_dev *dev) | 722 | void i2c_dw_enable(struct dw_i2c_dev *dev) |
701 | { | 723 | { |
702 | /* Enable the adapter */ | 724 | /* Enable the adapter */ |
703 | dw_writel(dev, 1, DW_IC_ENABLE); | 725 | __i2c_dw_enable(dev, true); |
704 | } | 726 | } |
705 | EXPORT_SYMBOL_GPL(i2c_dw_enable); | 727 | EXPORT_SYMBOL_GPL(i2c_dw_enable); |
706 | 728 | ||
@@ -713,7 +735,7 @@ EXPORT_SYMBOL_GPL(i2c_dw_is_enabled); | |||
713 | void i2c_dw_disable(struct dw_i2c_dev *dev) | 735 | void i2c_dw_disable(struct dw_i2c_dev *dev) |
714 | { | 736 | { |
715 | /* Disable controller */ | 737 | /* Disable controller */ |
716 | dw_writel(dev, 0, DW_IC_ENABLE); | 738 | __i2c_dw_enable(dev, false); |
717 | 739 | ||
718 | /* Disable all interupts */ | 740 | /* Disable all interupts */ |
719 | dw_writel(dev, 0, DW_IC_INTR_MASK); | 741 | dw_writel(dev, 0, DW_IC_INTR_MASK); |