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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2008-07-15 21:07:59 -0400
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2008-07-15 21:07:59 -0400
commit84c3d4aaec3338201b449034beac41635866bddf (patch)
tree3412951682fb2dd4feb8a5532f8efbaf8b345933 /drivers/i2c/busses
parent43d2548bb2ef7e6d753f91468a746784041e522d (diff)
parentfafa3a3f16723997f039a0193997464d66dafd8f (diff)
Merge commit 'origin/master'
Manual merge of: arch/powerpc/Kconfig arch/powerpc/kernel/stacktrace.c arch/powerpc/mm/slice.c arch/ppc/kernel/smp.c
Diffstat (limited to 'drivers/i2c/busses')
-rw-r--r--drivers/i2c/busses/Kconfig715
-rw-r--r--drivers/i2c/busses/Makefile57
-rw-r--r--drivers/i2c/busses/i2c-ali1535.c38
-rw-r--r--drivers/i2c/busses/i2c-ali1563.c38
-rw-r--r--drivers/i2c/busses/i2c-ali15x3.c32
-rw-r--r--drivers/i2c/busses/i2c-amd756-s4882.c4
-rw-r--r--drivers/i2c/busses/i2c-amd756.c35
-rw-r--r--drivers/i2c/busses/i2c-amd8111.c54
-rw-r--r--drivers/i2c/busses/i2c-au1550.c130
-rw-r--r--drivers/i2c/busses/i2c-cpm.c745
-rw-r--r--drivers/i2c/busses/i2c-davinci.c89
-rw-r--r--drivers/i2c/busses/i2c-elektor.c4
-rw-r--r--drivers/i2c/busses/i2c-gpio.c2
-rw-r--r--drivers/i2c/busses/i2c-hydra.c3
-rw-r--r--drivers/i2c/busses/i2c-i801.c284
-rw-r--r--drivers/i2c/busses/i2c-i810.c260
-rw-r--r--drivers/i2c/busses/i2c-ibm_iic.c206
-rw-r--r--drivers/i2c/busses/i2c-iop3xx.c2
-rw-r--r--drivers/i2c/busses/i2c-isch.c339
-rw-r--r--drivers/i2c/busses/i2c-mpc.c2
-rw-r--r--drivers/i2c/busses/i2c-mv64xxx.c2
-rw-r--r--drivers/i2c/busses/i2c-nforce2-s4985.c257
-rw-r--r--drivers/i2c/busses/i2c-nforce2.c49
-rw-r--r--drivers/i2c/busses/i2c-ocores.c44
-rw-r--r--drivers/i2c/busses/i2c-pasemi.c2
-rw-r--r--drivers/i2c/busses/i2c-pca-platform.c2
-rw-r--r--drivers/i2c/busses/i2c-piix4.c73
-rw-r--r--drivers/i2c/busses/i2c-pmcmsp.c2
-rw-r--r--drivers/i2c/busses/i2c-prosavage.c325
-rw-r--r--drivers/i2c/busses/i2c-pxa.c2
-rw-r--r--drivers/i2c/busses/i2c-s3c2410.c2
-rw-r--r--drivers/i2c/busses/i2c-savage4.c185
-rw-r--r--drivers/i2c/busses/i2c-sibyte.c8
-rw-r--r--drivers/i2c/busses/i2c-sis5595.c29
-rw-r--r--drivers/i2c/busses/i2c-sis630.c59
-rw-r--r--drivers/i2c/busses/i2c-sis96x.c37
-rw-r--r--drivers/i2c/busses/i2c-stub.c6
-rw-r--r--drivers/i2c/busses/i2c-taos-evm.c5
-rw-r--r--drivers/i2c/busses/i2c-via.c5
-rw-r--r--drivers/i2c/busses/i2c-viapro.c31
-rw-r--r--drivers/i2c/busses/i2c-voodoo3.c2
-rw-r--r--drivers/i2c/busses/scx200_acb.c2
42 files changed, 2352 insertions, 1816 deletions
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index 48438cc5d0ca..6ee997b2817c 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -4,6 +4,9 @@
4 4
5menu "I2C Hardware Bus support" 5menu "I2C Hardware Bus support"
6 6
7comment "PC SMBus host controller drivers"
8 depends on PCI
9
7config I2C_ALI1535 10config I2C_ALI1535
8 tristate "ALI 1535" 11 tristate "ALI 1535"
9 depends on PCI 12 depends on PCI
@@ -73,6 +76,186 @@ config I2C_AMD8111
73 This driver can also be built as a module. If so, the module 76 This driver can also be built as a module. If so, the module
74 will be called i2c-amd8111. 77 will be called i2c-amd8111.
75 78
79config I2C_I801
80 tristate "Intel 82801 (ICH)"
81 depends on PCI
82 help
83 If you say yes to this option, support will be included for the Intel
84 801 family of mainboard I2C interfaces. Specifically, the following
85 versions of the chipset are supported:
86 82801AA
87 82801AB
88 82801BA
89 82801CA/CAM
90 82801DB
91 82801EB/ER (ICH5/ICH5R)
92 6300ESB
93 ICH6
94 ICH7
95 ESB2
96 ICH8
97 ICH9
98 Tolapai
99 ICH10
100
101 This driver can also be built as a module. If so, the module
102 will be called i2c-i801.
103
104config I2C_ISCH
105 tristate "Intel SCH SMBus 1.0"
106 depends on PCI
107 help
108 Say Y here if you want to use SMBus controller on the Intel SCH
109 based systems.
110
111 This driver can also be built as a module. If so, the module
112 will be called i2c-isch.
113
114config I2C_PIIX4
115 tristate "Intel PIIX4 and compatible (ATI/Serverworks/Broadcom/SMSC)"
116 depends on PCI
117 help
118 If you say yes to this option, support will be included for the Intel
119 PIIX4 family of mainboard I2C interfaces. Specifically, the following
120 versions of the chipset are supported (note that Serverworks is part
121 of Broadcom):
122 Intel PIIX4
123 Intel 440MX
124 ATI IXP200
125 ATI IXP300
126 ATI IXP400
127 ATI SB600
128 ATI SB700
129 ATI SB800
130 Serverworks OSB4
131 Serverworks CSB5
132 Serverworks CSB6
133 Serverworks HT-1000
134 SMSC Victory66
135
136 This driver can also be built as a module. If so, the module
137 will be called i2c-piix4.
138
139config I2C_NFORCE2
140 tristate "Nvidia nForce2, nForce3 and nForce4"
141 depends on PCI
142 help
143 If you say yes to this option, support will be included for the Nvidia
144 nForce2, nForce3 and nForce4 families of mainboard I2C interfaces.
145
146 This driver can also be built as a module. If so, the module
147 will be called i2c-nforce2.
148
149config I2C_NFORCE2_S4985
150 tristate "SMBus multiplexing on the Tyan S4985"
151 depends on I2C_NFORCE2 && EXPERIMENTAL
152 help
153 Enabling this option will add specific SMBus support for the Tyan
154 S4985 motherboard. On this 4-CPU board, the SMBus is multiplexed
155 over 4 different channels, where the various memory module EEPROMs
156 live. Saying yes here will give you access to these in addition
157 to the trunk.
158
159 This driver can also be built as a module. If so, the module
160 will be called i2c-nforce2-s4985.
161
162config I2C_SIS5595
163 tristate "SiS 5595"
164 depends on PCI
165 help
166 If you say yes to this option, support will be included for the
167 SiS5595 SMBus (a subset of I2C) interface.
168
169 This driver can also be built as a module. If so, the module
170 will be called i2c-sis5595.
171
172config I2C_SIS630
173 tristate "SiS 630/730"
174 depends on PCI
175 help
176 If you say yes to this option, support will be included for the
177 SiS630 and SiS730 SMBus (a subset of I2C) interface.
178
179 This driver can also be built as a module. If so, the module
180 will be called i2c-sis630.
181
182config I2C_SIS96X
183 tristate "SiS 96x"
184 depends on PCI
185 help
186 If you say yes to this option, support will be included for the SiS
187 96x SMBus (a subset of I2C) interfaces. Specifically, the following
188 chipsets are supported:
189 645/961
190 645DX/961
191 645DX/962
192 648/961
193 650/961
194 735
195 745
196
197 This driver can also be built as a module. If so, the module
198 will be called i2c-sis96x.
199
200config I2C_VIA
201 tristate "VIA VT82C586B"
202 depends on PCI && EXPERIMENTAL
203 select I2C_ALGOBIT
204 help
205 If you say yes to this option, support will be included for the VIA
206 82C586B I2C interface
207
208 This driver can also be built as a module. If so, the module
209 will be called i2c-via.
210
211config I2C_VIAPRO
212 tristate "VIA VT82C596/82C686/82xx and CX700"
213 depends on PCI
214 help
215 If you say yes to this option, support will be included for the VIA
216 VT82C596 and later SMBus interface. Specifically, the following
217 chipsets are supported:
218 VT82C596A/B
219 VT82C686A/B
220 VT8231
221 VT8233/A
222 VT8235
223 VT8237R/A/S
224 VT8251
225 CX700
226
227 This driver can also be built as a module. If so, the module
228 will be called i2c-viapro.
229
230comment "Mac SMBus host controller drivers"
231 depends on PPC_CHRP || PPC_PMAC
232
233config I2C_HYDRA
234 tristate "CHRP Apple Hydra Mac I/O I2C interface"
235 depends on PCI && PPC_CHRP && EXPERIMENTAL
236 select I2C_ALGOBIT
237 help
238 This supports the use of the I2C interface in the Apple Hydra Mac
239 I/O chip on some CHRP machines (e.g. the LongTrail). Say Y if you
240 have such a machine.
241
242 This support is also available as a module. If so, the module
243 will be called i2c-hydra.
244
245config I2C_POWERMAC
246 tristate "Powermac I2C interface"
247 depends on PPC_PMAC
248 default y
249 help
250 This exposes the various PowerMac i2c interfaces to the linux i2c
251 layer and to userland. It is used by various drivers on the PowerMac
252 platform, and should generally be enabled.
253
254 This support is also available as a module. If so, the module
255 will be called i2c-powermac.
256
257comment "I2C system bus drivers (mostly embedded / system-on-chip)"
258
76config I2C_AT91 259config I2C_AT91
77 tristate "Atmel AT91 I2C Two-Wire interface (TWI)" 260 tristate "Atmel AT91 I2C Two-Wire interface (TWI)"
78 depends on ARCH_AT91 && EXPERIMENTAL && BROKEN 261 depends on ARCH_AT91 && EXPERIMENTAL && BROKEN
@@ -101,10 +284,9 @@ config I2C_AU1550
101config I2C_BLACKFIN_TWI 284config I2C_BLACKFIN_TWI
102 tristate "Blackfin TWI I2C support" 285 tristate "Blackfin TWI I2C support"
103 depends on BLACKFIN 286 depends on BLACKFIN
287 depends on !BF561 && !BF531 && !BF532 && !BF533
104 help 288 help
105 This is the TWI I2C device driver for Blackfin BF522, BF525, 289 This is the I2C bus driver for Blackfin on-chip TWI interface.
106 BF527, BF534, BF536, BF537 and BF54x. For other Blackfin processors,
107 please don't use this driver.
108 290
109 This driver can also be built as a module. If so, the module 291 This driver can also be built as a module. If so, the module
110 will be called i2c-bfin-twi. 292 will be called i2c-bfin-twi.
@@ -117,6 +299,16 @@ config I2C_BLACKFIN_TWI_CLK_KHZ
117 help 299 help
118 The unit of the TWI clock is kHz. 300 The unit of the TWI clock is kHz.
119 301
302config I2C_CPM
303 tristate "Freescale CPM1 or CPM2 (MPC8xx/826x)"
304 depends on (CPM1 || CPM2) && OF_I2C
305 help
306 This supports the use of the I2C interface on Freescale
307 processors with CPM1 or CPM2.
308
309 This driver can also be built as a module. If so, the module
310 will be called i2c-cpm.
311
120config I2C_DAVINCI 312config I2C_DAVINCI
121 tristate "DaVinci I2C driver" 313 tristate "DaVinci I2C driver"
122 depends on ARCH_DAVINCI 314 depends on ARCH_DAVINCI
@@ -130,17 +322,6 @@ config I2C_DAVINCI
130 devices such as DaVinci NIC. 322 devices such as DaVinci NIC.
131 For details please see http://www.ti.com/davinci 323 For details please see http://www.ti.com/davinci
132 324
133config I2C_ELEKTOR
134 tristate "Elektor ISA card"
135 depends on ISA && BROKEN_ON_SMP
136 select I2C_ALGOPCF
137 help
138 This supports the PCF8584 ISA bus I2C adapter. Say Y if you own
139 such an adapter.
140
141 This support is also available as a module. If so, the module
142 will be called i2c-elektor.
143
144config I2C_GPIO 325config I2C_GPIO
145 tristate "GPIO-based bitbanging I2C" 326 tristate "GPIO-based bitbanging I2C"
146 depends on GENERIC_GPIO 327 depends on GENERIC_GPIO
@@ -149,104 +330,6 @@ config I2C_GPIO
149 This is a very simple bitbanging I2C driver utilizing the 330 This is a very simple bitbanging I2C driver utilizing the
150 arch-neutral GPIO API to control the SCL and SDA lines. 331 arch-neutral GPIO API to control the SCL and SDA lines.
151 332
152config I2C_HYDRA
153 tristate "CHRP Apple Hydra Mac I/O I2C interface"
154 depends on PCI && PPC_CHRP && EXPERIMENTAL
155 select I2C_ALGOBIT
156 help
157 This supports the use of the I2C interface in the Apple Hydra Mac
158 I/O chip on some CHRP machines (e.g. the LongTrail). Say Y if you
159 have such a machine.
160
161 This support is also available as a module. If so, the module
162 will be called i2c-hydra.
163
164config I2C_I801
165 tristate "Intel 82801 (ICH)"
166 depends on PCI
167 help
168 If you say yes to this option, support will be included for the Intel
169 801 family of mainboard I2C interfaces. Specifically, the following
170 versions of the chipset are supported:
171 82801AA
172 82801AB
173 82801BA
174 82801CA/CAM
175 82801DB
176 82801EB/ER (ICH5/ICH5R)
177 6300ESB
178 ICH6
179 ICH7
180 ESB2
181 ICH8
182 ICH9
183 Tolapai
184 ICH10
185
186 This driver can also be built as a module. If so, the module
187 will be called i2c-i801.
188
189config I2C_I810
190 tristate "Intel 810/815 (DEPRECATED)"
191 default n
192 depends on PCI
193 select I2C_ALGOBIT
194 help
195 If you say yes to this option, support will be included for the Intel
196 810/815 family of mainboard I2C interfaces. Specifically, the
197 following versions of the chipset are supported:
198 i810AA
199 i810AB
200 i810E
201 i815
202 i845G
203
204 This driver is deprecated in favor of the i810fb and intelfb drivers.
205
206 This driver can also be built as a module. If so, the module
207 will be called i2c-i810.
208
209config I2C_PXA
210 tristate "Intel PXA2XX I2C adapter (EXPERIMENTAL)"
211 depends on EXPERIMENTAL && ARCH_PXA
212 help
213 If you have devices in the PXA I2C bus, say yes to this option.
214 This driver can also be built as a module. If so, the module
215 will be called i2c-pxa.
216
217config I2C_PXA_SLAVE
218 bool "Intel PXA2XX I2C Slave comms support"
219 depends on I2C_PXA
220 help
221 Support I2C slave mode communications on the PXA I2C bus. This
222 is necessary for systems where the PXA may be a target on the
223 I2C bus.
224
225config I2C_PIIX4
226 tristate "Intel PIIX4 and compatible (ATI/Serverworks/Broadcom/SMSC)"
227 depends on PCI
228 help
229 If you say yes to this option, support will be included for the Intel
230 PIIX4 family of mainboard I2C interfaces. Specifically, the following
231 versions of the chipset are supported (note that Serverworks is part
232 of Broadcom):
233 Intel PIIX4
234 Intel 440MX
235 ATI IXP200
236 ATI IXP300
237 ATI IXP400
238 ATI SB600
239 ATI SB700
240 ATI SB800
241 Serverworks OSB4
242 Serverworks CSB5
243 Serverworks CSB6
244 Serverworks HT-1000
245 SMSC Victory66
246
247 This driver can also be built as a module. If so, the module
248 will be called i2c-piix4.
249
250config I2C_IBM_IIC 333config I2C_IBM_IIC
251 tristate "IBM PPC 4xx on-chip I2C interface" 334 tristate "IBM PPC 4xx on-chip I2C interface"
252 depends on 4xx 335 depends on 4xx
@@ -281,18 +364,6 @@ config I2C_IXP2000
281 This driver is deprecated and will be dropped soon. Use i2c-gpio 364 This driver is deprecated and will be dropped soon. Use i2c-gpio
282 instead. 365 instead.
283 366
284config I2C_POWERMAC
285 tristate "Powermac I2C interface"
286 depends on PPC_PMAC
287 default y
288 help
289 This exposes the various PowerMac i2c interfaces to the linux i2c
290 layer and to userland. It is used by various drivers on the PowerMac
291 platform, and should generally be enabled.
292
293 This support is also available as a module. If so, the module
294 will be called i2c-powermac.
295
296config I2C_MPC 367config I2C_MPC
297 tristate "MPC107/824x/85xx/52xx/86xx" 368 tristate "MPC107/824x/85xx/52xx/86xx"
298 depends on PPC32 369 depends on PPC32
@@ -305,15 +376,15 @@ config I2C_MPC
305 This driver can also be built as a module. If so, the module 376 This driver can also be built as a module. If so, the module
306 will be called i2c-mpc. 377 will be called i2c-mpc.
307 378
308config I2C_NFORCE2 379config I2C_MV64XXX
309 tristate "Nvidia nForce2, nForce3 and nForce4" 380 tristate "Marvell mv64xxx I2C Controller"
310 depends on PCI 381 depends on (MV64X60 || PLAT_ORION) && EXPERIMENTAL
311 help 382 help
312 If you say yes to this option, support will be included for the Nvidia 383 If you say yes to this option, support will be included for the
313 nForce2, nForce3 and nForce4 families of mainboard I2C interfaces. 384 built-in I2C interface on the Marvell 64xxx line of host bridges.
314 385
315 This driver can also be built as a module. If so, the module 386 This driver can also be built as a module. If so, the module
316 will be called i2c-nforce2. 387 will be called i2c-mv64xxx.
317 388
318config I2C_OCORES 389config I2C_OCORES
319 tristate "OpenCores I2C Controller" 390 tristate "OpenCores I2C Controller"
@@ -336,76 +407,37 @@ config I2C_OMAP
336 Like OMAP1510/1610/1710/5912 and OMAP242x. 407 Like OMAP1510/1610/1710/5912 and OMAP242x.
337 For details see http://www.ti.com/omap. 408 For details see http://www.ti.com/omap.
338 409
339config I2C_PARPORT
340 tristate "Parallel port adapter"
341 depends on PARPORT
342 select I2C_ALGOBIT
343 help
344 This supports parallel port I2C adapters such as the ones made by
345 Philips or Velleman, Analog Devices evaluation boards, and more.
346 Basically any adapter using the parallel port as an I2C bus with
347 no extra chipset is supported by this driver, or could be.
348
349 This driver is a replacement for (and was inspired by) an older
350 driver named i2c-philips-par. The new driver supports more devices,
351 and makes it easier to add support for new devices.
352
353 An adapter type parameter is now mandatory. Please read the file
354 Documentation/i2c/busses/i2c-parport for details.
355
356 Another driver exists, named i2c-parport-light, which doesn't depend
357 on the parport driver. This is meant for embedded systems. Don't say
358 Y here if you intend to say Y or M there.
359
360 This support is also available as a module. If so, the module
361 will be called i2c-parport.
362
363config I2C_PARPORT_LIGHT
364 tristate "Parallel port adapter (light)"
365 select I2C_ALGOBIT
366 help
367 This supports parallel port I2C adapters such as the ones made by
368 Philips or Velleman, Analog Devices evaluation boards, and more.
369 Basically any adapter using the parallel port as an I2C bus with
370 no extra chipset is supported by this driver, or could be.
371
372 This driver is a light version of i2c-parport. It doesn't depend
373 on the parport driver, and uses direct I/O access instead. This
374 might be preferred on embedded systems where wasting memory for
375 the clean but heavy parport handling is not an option. The
376 drawback is a reduced portability and the impossibility to
377 daisy-chain other parallel port devices.
378
379 Don't say Y here if you said Y or M to i2c-parport. Saying M to
380 both is possible but both modules should not be loaded at the same
381 time.
382
383 This support is also available as a module. If so, the module
384 will be called i2c-parport-light.
385
386config I2C_PASEMI 410config I2C_PASEMI
387 tristate "PA Semi SMBus interface" 411 tristate "PA Semi SMBus interface"
388 depends on PPC_PASEMI && PCI 412 depends on PPC_PASEMI && PCI
389 help 413 help
390 Supports the PA Semi PWRficient on-chip SMBus interfaces. 414 Supports the PA Semi PWRficient on-chip SMBus interfaces.
391 415
392config I2C_PROSAVAGE 416config I2C_PNX
393 tristate "S3/VIA (Pro)Savage (DEPRECATED)" 417 tristate "I2C bus support for Philips PNX targets"
394 default n 418 depends on ARCH_PNX4008
395 depends on PCI
396 select I2C_ALGOBIT
397 help 419 help
398 If you say yes to this option, support will be included for the 420 This driver supports the Philips IP3204 I2C IP block master and/or
399 I2C bus and DDC bus of the S3VIA embedded Savage4 and ProSavage8 421 slave controller
400 graphics processors.
401 chipsets supported:
402 S3/VIA KM266/VT8375 aka ProSavage8
403 S3/VIA KM133/VT8365 aka Savage4
404 422
405 This driver is deprecated in favor of the savagefb driver. 423 This driver can also be built as a module. If so, the module
424 will be called i2c-pnx.
406 425
407 This support is also available as a module. If so, the module 426config I2C_PXA
408 will be called i2c-prosavage. 427 tristate "Intel PXA2XX I2C adapter (EXPERIMENTAL)"
428 depends on EXPERIMENTAL && ARCH_PXA
429 help
430 If you have devices in the PXA I2C bus, say yes to this option.
431 This driver can also be built as a module. If so, the module
432 will be called i2c-pxa.
433
434config I2C_PXA_SLAVE
435 bool "Intel PXA2XX I2C Slave comms support"
436 depends on I2C_PXA
437 help
438 Support I2C slave mode communications on the PXA I2C bus. This
439 is necessary for systems where the PXA may be a target on the
440 I2C bus.
409 441
410config I2C_S3C2410 442config I2C_S3C2410
411 tristate "S3C2410 I2C Driver" 443 tristate "S3C2410 I2C Driver"
@@ -414,25 +446,24 @@ config I2C_S3C2410
414 Say Y here to include support for I2C controller in the 446 Say Y here to include support for I2C controller in the
415 Samsung S3C2410 based System-on-Chip devices. 447 Samsung S3C2410 based System-on-Chip devices.
416 448
417config I2C_SAVAGE4 449config I2C_SH7760
418 tristate "S3 Savage 4 (DEPRECATED)" 450 tristate "Renesas SH7760 I2C Controller"
419 default n 451 depends on CPU_SUBTYPE_SH7760
420 depends on PCI
421 select I2C_ALGOBIT
422 help 452 help
423 If you say yes to this option, support will be included for the 453 This driver supports the 2 I2C interfaces on the Renesas SH7760.
424 S3 Savage 4 I2C interface.
425
426 This driver is deprecated in favor of the savagefb driver.
427 454
428 This driver can also be built as a module. If so, the module 455 This driver can also be built as a module. If so, the module
429 will be called i2c-savage4. 456 will be called i2c-sh7760.
430 457
431config I2C_SIBYTE 458config I2C_SH_MOBILE
432 tristate "SiByte SMBus interface" 459 tristate "SuperH Mobile I2C Controller"
433 depends on SIBYTE_SB1xxx_SOC 460 depends on SUPERH
434 help 461 help
435 Supports the SiByte SOC on-chip I2C interfaces (2 channels). 462 If you say yes to this option, support will be included for the
463 built-in I2C interface on the Renesas SH-Mobile processor.
464
465 This driver can also be built as a module. If so, the module
466 will be called i2c-sh_mobile.
436 467
437config I2C_SIMTEC 468config I2C_SIMTEC
438 tristate "Simtec Generic I2C interface" 469 tristate "Simtec Generic I2C interface"
@@ -446,86 +477,65 @@ config I2C_SIMTEC
446 This driver can also be built as a module. If so, the module 477 This driver can also be built as a module. If so, the module
447 will be called i2c-simtec. 478 will be called i2c-simtec.
448 479
449config SCx200_I2C 480config I2C_VERSATILE
450 tristate "NatSemi SCx200 I2C using GPIO pins (DEPRECATED)" 481 tristate "ARM Versatile/Realview I2C bus support"
451 depends on SCx200_GPIO 482 depends on ARCH_VERSATILE || ARCH_REALVIEW
452 select I2C_ALGOBIT 483 select I2C_ALGOBIT
453 help 484 help
454 Enable the use of two GPIO pins of a SCx200 processor as an I2C bus. 485 Say yes if you want to support the I2C serial bus on ARMs Versatile
455 486 range of platforms.
456 If you don't know what to do here, say N.
457 487
458 This support is also available as a module. If so, the module 488 This driver can also be built as a module. If so, the module
459 will be called scx200_i2c. 489 will be called i2c-versatile.
460 490
461 This driver is deprecated and will be dropped soon. Use i2c-gpio 491comment "External I2C/SMBus adapter drivers"
462 (or scx200_acb) instead.
463 492
464config SCx200_I2C_SCL 493config I2C_PARPORT
465 int "GPIO pin used for SCL" 494 tristate "Parallel port adapter"
466 depends on SCx200_I2C 495 depends on PARPORT
467 default "12" 496 select I2C_ALGOBIT
468 help 497 help
469 Enter the GPIO pin number used for the SCL signal. This value can 498 This supports parallel port I2C adapters such as the ones made by
470 also be specified with a module parameter. 499 Philips or Velleman, Analog Devices evaluation boards, and more.
500 Basically any adapter using the parallel port as an I2C bus with
501 no extra chipset is supported by this driver, or could be.
471 502
472config SCx200_I2C_SDA 503 This driver is a replacement for (and was inspired by) an older
473 int "GPIO pin used for SDA" 504 driver named i2c-philips-par. The new driver supports more devices,
474 depends on SCx200_I2C 505 and makes it easier to add support for new devices.
475 default "13"
476 help
477 Enter the GPIO pin number used for the SSA signal. This value can
478 also be specified with a module parameter.
479 506
480config SCx200_ACB 507 An adapter type parameter is now mandatory. Please read the file
481 tristate "Geode ACCESS.bus support" 508 Documentation/i2c/busses/i2c-parport for details.
482 depends on X86_32 && PCI
483 help
484 Enable the use of the ACCESS.bus controllers on the Geode SCx200 and
485 SC1100 processors and the CS5535 and CS5536 Geode companion devices.
486 509
487 If you don't know what to do here, say N. 510 Another driver exists, named i2c-parport-light, which doesn't depend
511 on the parport driver. This is meant for embedded systems. Don't say
512 Y here if you intend to say Y or M there.
488 513
489 This support is also available as a module. If so, the module 514 This support is also available as a module. If so, the module
490 will be called scx200_acb. 515 will be called i2c-parport.
491
492config I2C_SIS5595
493 tristate "SiS 5595"
494 depends on PCI
495 help
496 If you say yes to this option, support will be included for the
497 SiS5595 SMBus (a subset of I2C) interface.
498
499 This driver can also be built as a module. If so, the module
500 will be called i2c-sis5595.
501 516
502config I2C_SIS630 517config I2C_PARPORT_LIGHT
503 tristate "SiS 630/730" 518 tristate "Parallel port adapter (light)"
504 depends on PCI 519 select I2C_ALGOBIT
505 help 520 help
506 If you say yes to this option, support will be included for the 521 This supports parallel port I2C adapters such as the ones made by
507 SiS630 and SiS730 SMBus (a subset of I2C) interface. 522 Philips or Velleman, Analog Devices evaluation boards, and more.
523 Basically any adapter using the parallel port as an I2C bus with
524 no extra chipset is supported by this driver, or could be.
508 525
509 This driver can also be built as a module. If so, the module 526 This driver is a light version of i2c-parport. It doesn't depend
510 will be called i2c-sis630. 527 on the parport driver, and uses direct I/O access instead. This
528 might be preferred on embedded systems where wasting memory for
529 the clean but heavy parport handling is not an option. The
530 drawback is a reduced portability and the impossibility to
531 daisy-chain other parallel port devices.
511 532
512config I2C_SIS96X 533 Don't say Y here if you said Y or M to i2c-parport. Saying M to
513 tristate "SiS 96x" 534 both is possible but both modules should not be loaded at the same
514 depends on PCI 535 time.
515 help
516 If you say yes to this option, support will be included for the SiS
517 96x SMBus (a subset of I2C) interfaces. Specifically, the following
518 chipsets are supported:
519 645/961
520 645DX/961
521 645DX/962
522 648/961
523 650/961
524 735
525 745
526 536
527 This driver can also be built as a module. If so, the module 537 This support is also available as a module. If so, the module
528 will be called i2c-sis96x. 538 will be called i2c-parport-light.
529 539
530config I2C_TAOS_EVM 540config I2C_TAOS_EVM
531 tristate "TAOS evaluation module" 541 tristate "TAOS evaluation module"
@@ -543,21 +553,8 @@ config I2C_TAOS_EVM
543 This support is also available as a module. If so, the module 553 This support is also available as a module. If so, the module
544 will be called i2c-taos-evm. 554 will be called i2c-taos-evm.
545 555
546config I2C_STUB
547 tristate "I2C/SMBus Test Stub"
548 depends on EXPERIMENTAL && m
549 default 'n'
550 help
551 This module may be useful to developers of SMBus client drivers,
552 especially for certain kinds of sensor chips.
553
554 If you do build this module, be sure to read the notes and warnings
555 in <file:Documentation/i2c/i2c-stub>.
556
557 If you don't know what to do here, definitely say N.
558
559config I2C_TINY_USB 556config I2C_TINY_USB
560 tristate "I2C-Tiny-USB" 557 tristate "Tiny-USB adapter"
561 depends on USB 558 depends on USB
562 help 559 help
563 If you say yes to this option, support will be included for the 560 If you say yes to this option, support will be included for the
@@ -567,16 +564,21 @@ config I2C_TINY_USB
567 This driver can also be built as a module. If so, the module 564 This driver can also be built as a module. If so, the module
568 will be called i2c-tiny-usb. 565 will be called i2c-tiny-usb.
569 566
570config I2C_VERSATILE 567comment "Graphics adapter I2C/DDC channel drivers"
571 tristate "ARM Versatile/Realview I2C bus support" 568 depends on PCI
572 depends on ARCH_VERSATILE || ARCH_REALVIEW 569
570config I2C_VOODOO3
571 tristate "Voodoo 3"
572 depends on PCI
573 select I2C_ALGOBIT 573 select I2C_ALGOBIT
574 help 574 help
575 Say yes if you want to support the I2C serial bus on ARMs Versatile 575 If you say yes to this option, support will be included for the
576 range of platforms. 576 Voodoo 3 I2C interface.
577 577
578 This driver can also be built as a module. If so, the module 578 This driver can also be built as a module. If so, the module
579 will be called i2c-versatile. 579 will be called i2c-voodoo3.
580
581comment "Other I2C/SMBus bus drivers"
580 582
581config I2C_ACORN 583config I2C_ACORN
582 tristate "Acorn IOC/IOMD I2C bus support" 584 tristate "Acorn IOC/IOMD I2C bus support"
@@ -588,46 +590,16 @@ config I2C_ACORN
588 590
589 If you don't know, say Y. 591 If you don't know, say Y.
590 592
591config I2C_VIA 593config I2C_ELEKTOR
592 tristate "VIA 82C586B" 594 tristate "Elektor ISA card"
593 depends on PCI && EXPERIMENTAL 595 depends on ISA && BROKEN_ON_SMP
594 select I2C_ALGOBIT 596 select I2C_ALGOPCF
595 help
596 If you say yes to this option, support will be included for the VIA
597 82C586B I2C interface
598
599 This driver can also be built as a module. If so, the module
600 will be called i2c-via.
601
602config I2C_VIAPRO
603 tristate "VIA VT82C596/82C686/82xx and CX700"
604 depends on PCI
605 help
606 If you say yes to this option, support will be included for the VIA
607 VT82C596 and later SMBus interface. Specifically, the following
608 chipsets are supported:
609 VT82C596A/B
610 VT82C686A/B
611 VT8231
612 VT8233/A
613 VT8235
614 VT8237R/A/S
615 VT8251
616 CX700
617
618 This driver can also be built as a module. If so, the module
619 will be called i2c-viapro.
620
621config I2C_VOODOO3
622 tristate "Voodoo 3"
623 depends on PCI
624 select I2C_ALGOBIT
625 help 597 help
626 If you say yes to this option, support will be included for the 598 This supports the PCF8584 ISA bus I2C adapter. Say Y if you own
627 Voodoo 3 I2C interface. 599 such an adapter.
628 600
629 This driver can also be built as a module. If so, the module 601 This support is also available as a module. If so, the module
630 will be called i2c-voodoo3. 602 will be called i2c-elektor.
631 603
632config I2C_PCA_ISA 604config I2C_PCA_ISA
633 tristate "PCA9564 on an ISA bus" 605 tristate "PCA9564 on an ISA bus"
@@ -657,26 +629,6 @@ config I2C_PCA_PLATFORM
657 This driver can also be built as a module. If so, the module 629 This driver can also be built as a module. If so, the module
658 will be called i2c-pca-platform. 630 will be called i2c-pca-platform.
659 631
660config I2C_MV64XXX
661 tristate "Marvell mv64xxx I2C Controller"
662 depends on (MV64X60 || PLAT_ORION) && EXPERIMENTAL
663 help
664 If you say yes to this option, support will be included for the
665 built-in I2C interface on the Marvell 64xxx line of host bridges.
666
667 This driver can also be built as a module. If so, the module
668 will be called i2c-mv64xxx.
669
670config I2C_PNX
671 tristate "I2C bus support for Philips PNX targets"
672 depends on ARCH_PNX4008
673 help
674 This driver supports the Philips IP3204 I2C IP block master and/or
675 slave controller
676
677 This driver can also be built as a module. If so, the module
678 will be called i2c-pnx.
679
680config I2C_PMCMSP 632config I2C_PMCMSP
681 tristate "PMC MSP I2C TWI Controller" 633 tristate "PMC MSP I2C TWI Controller"
682 depends on PMC_MSP 634 depends on PMC_MSP
@@ -686,23 +638,66 @@ config I2C_PMCMSP
686 This driver can also be built as module. If so, the module 638 This driver can also be built as module. If so, the module
687 will be called i2c-pmcmsp. 639 will be called i2c-pmcmsp.
688 640
689config I2C_SH7760 641config I2C_SIBYTE
690 tristate "Renesas SH7760 I2C Controller" 642 tristate "SiByte SMBus interface"
691 depends on CPU_SUBTYPE_SH7760 643 depends on SIBYTE_SB1xxx_SOC
692 help 644 help
693 This driver supports the 2 I2C interfaces on the Renesas SH7760. 645 Supports the SiByte SOC on-chip I2C interfaces (2 channels).
694 646
695 This driver can also be built as a module. If so, the module 647config I2C_STUB
696 will be called i2c-sh7760. 648 tristate "I2C/SMBus Test Stub"
649 depends on EXPERIMENTAL && m
650 default 'n'
651 help
652 This module may be useful to developers of SMBus client drivers,
653 especially for certain kinds of sensor chips.
697 654
698config I2C_SH_MOBILE 655 If you do build this module, be sure to read the notes and warnings
699 tristate "SuperH Mobile I2C Controller" 656 in <file:Documentation/i2c/i2c-stub>.
700 depends on SUPERH 657
658 If you don't know what to do here, definitely say N.
659
660config SCx200_I2C
661 tristate "NatSemi SCx200 I2C using GPIO pins (DEPRECATED)"
662 depends on SCx200_GPIO
663 select I2C_ALGOBIT
701 help 664 help
702 If you say yes to this option, support will be included for the 665 Enable the use of two GPIO pins of a SCx200 processor as an I2C bus.
703 built-in I2C interface on the Renesas SH-Mobile processor.
704 666
705 This driver can also be built as a module. If so, the module 667 If you don't know what to do here, say N.
706 will be called i2c-sh_mobile. 668
669 This support is also available as a module. If so, the module
670 will be called scx200_i2c.
671
672 This driver is deprecated and will be dropped soon. Use i2c-gpio
673 (or scx200_acb) instead.
674
675config SCx200_I2C_SCL
676 int "GPIO pin used for SCL"
677 depends on SCx200_I2C
678 default "12"
679 help
680 Enter the GPIO pin number used for the SCL signal. This value can
681 also be specified with a module parameter.
682
683config SCx200_I2C_SDA
684 int "GPIO pin used for SDA"
685 depends on SCx200_I2C
686 default "13"
687 help
688 Enter the GPIO pin number used for the SSA signal. This value can
689 also be specified with a module parameter.
690
691config SCx200_ACB
692 tristate "Geode ACCESS.bus support"
693 depends on X86_32 && PCI
694 help
695 Enable the use of the ACCESS.bus controllers on the Geode SCx200 and
696 SC1100 processors and the CS5535 and CS5536 Geode companion devices.
697
698 If you don't know what to do here, say N.
699
700 This support is also available as a module. If so, the module
701 will be called scx200_acb.
707 702
708endmenu 703endmenu
diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
index e8c882a5ea66..97dbfa2107fe 100644
--- a/drivers/i2c/busses/Makefile
+++ b/drivers/i2c/busses/Makefile
@@ -2,57 +2,68 @@
2# Makefile for the i2c bus drivers. 2# Makefile for the i2c bus drivers.
3# 3#
4 4
5# PC SMBus host controller drivers
5obj-$(CONFIG_I2C_ALI1535) += i2c-ali1535.o 6obj-$(CONFIG_I2C_ALI1535) += i2c-ali1535.o
6obj-$(CONFIG_I2C_ALI1563) += i2c-ali1563.o 7obj-$(CONFIG_I2C_ALI1563) += i2c-ali1563.o
7obj-$(CONFIG_I2C_ALI15X3) += i2c-ali15x3.o 8obj-$(CONFIG_I2C_ALI15X3) += i2c-ali15x3.o
8obj-$(CONFIG_I2C_AMD756) += i2c-amd756.o 9obj-$(CONFIG_I2C_AMD756) += i2c-amd756.o
9obj-$(CONFIG_I2C_AMD756_S4882) += i2c-amd756-s4882.o 10obj-$(CONFIG_I2C_AMD756_S4882) += i2c-amd756-s4882.o
10obj-$(CONFIG_I2C_AMD8111) += i2c-amd8111.o 11obj-$(CONFIG_I2C_AMD8111) += i2c-amd8111.o
12obj-$(CONFIG_I2C_I801) += i2c-i801.o
13obj-$(CONFIG_I2C_ISCH) += i2c-isch.o
14obj-$(CONFIG_I2C_NFORCE2) += i2c-nforce2.o
15obj-$(CONFIG_I2C_NFORCE2_S4985) += i2c-nforce2-s4985.o
16obj-$(CONFIG_I2C_PIIX4) += i2c-piix4.o
17obj-$(CONFIG_I2C_SIS5595) += i2c-sis5595.o
18obj-$(CONFIG_I2C_SIS630) += i2c-sis630.o
19obj-$(CONFIG_I2C_SIS96X) += i2c-sis96x.o
20obj-$(CONFIG_I2C_VIA) += i2c-via.o
21obj-$(CONFIG_I2C_VIAPRO) += i2c-viapro.o
22
23# Mac SMBus host controller drivers
24obj-$(CONFIG_I2C_HYDRA) += i2c-hydra.o
25obj-$(CONFIG_I2C_POWERMAC) += i2c-powermac.o
26
27# Embebbed system I2C/SMBus host controller drivers
11obj-$(CONFIG_I2C_AT91) += i2c-at91.o 28obj-$(CONFIG_I2C_AT91) += i2c-at91.o
12obj-$(CONFIG_I2C_AU1550) += i2c-au1550.o 29obj-$(CONFIG_I2C_AU1550) += i2c-au1550.o
13obj-$(CONFIG_I2C_BLACKFIN_TWI) += i2c-bfin-twi.o 30obj-$(CONFIG_I2C_BLACKFIN_TWI) += i2c-bfin-twi.o
31obj-$(CONFIG_I2C_CPM) += i2c-cpm.o
14obj-$(CONFIG_I2C_DAVINCI) += i2c-davinci.o 32obj-$(CONFIG_I2C_DAVINCI) += i2c-davinci.o
15obj-$(CONFIG_I2C_ELEKTOR) += i2c-elektor.o
16obj-$(CONFIG_I2C_GPIO) += i2c-gpio.o 33obj-$(CONFIG_I2C_GPIO) += i2c-gpio.o
17obj-$(CONFIG_I2C_HYDRA) += i2c-hydra.o
18obj-$(CONFIG_I2C_I801) += i2c-i801.o
19obj-$(CONFIG_I2C_I810) += i2c-i810.o
20obj-$(CONFIG_I2C_IBM_IIC) += i2c-ibm_iic.o 34obj-$(CONFIG_I2C_IBM_IIC) += i2c-ibm_iic.o
21obj-$(CONFIG_I2C_IOP3XX) += i2c-iop3xx.o 35obj-$(CONFIG_I2C_IOP3XX) += i2c-iop3xx.o
22obj-$(CONFIG_I2C_IXP2000) += i2c-ixp2000.o 36obj-$(CONFIG_I2C_IXP2000) += i2c-ixp2000.o
23obj-$(CONFIG_I2C_POWERMAC) += i2c-powermac.o
24obj-$(CONFIG_I2C_MPC) += i2c-mpc.o 37obj-$(CONFIG_I2C_MPC) += i2c-mpc.o
25obj-$(CONFIG_I2C_MV64XXX) += i2c-mv64xxx.o 38obj-$(CONFIG_I2C_MV64XXX) += i2c-mv64xxx.o
26obj-$(CONFIG_I2C_NFORCE2) += i2c-nforce2.o
27obj-$(CONFIG_I2C_OCORES) += i2c-ocores.o 39obj-$(CONFIG_I2C_OCORES) += i2c-ocores.o
28obj-$(CONFIG_I2C_OMAP) += i2c-omap.o 40obj-$(CONFIG_I2C_OMAP) += i2c-omap.o
29obj-$(CONFIG_I2C_PARPORT) += i2c-parport.o
30obj-$(CONFIG_I2C_PARPORT_LIGHT) += i2c-parport-light.o
31obj-$(CONFIG_I2C_PASEMI) += i2c-pasemi.o 41obj-$(CONFIG_I2C_PASEMI) += i2c-pasemi.o
32obj-$(CONFIG_I2C_PCA_ISA) += i2c-pca-isa.o
33obj-$(CONFIG_I2C_PCA_PLATFORM) += i2c-pca-platform.o
34obj-$(CONFIG_I2C_PIIX4) += i2c-piix4.o
35obj-$(CONFIG_I2C_PMCMSP) += i2c-pmcmsp.o
36obj-$(CONFIG_I2C_PNX) += i2c-pnx.o 42obj-$(CONFIG_I2C_PNX) += i2c-pnx.o
37obj-$(CONFIG_I2C_PROSAVAGE) += i2c-prosavage.o
38obj-$(CONFIG_I2C_PXA) += i2c-pxa.o 43obj-$(CONFIG_I2C_PXA) += i2c-pxa.o
39obj-$(CONFIG_I2C_S3C2410) += i2c-s3c2410.o 44obj-$(CONFIG_I2C_S3C2410) += i2c-s3c2410.o
40obj-$(CONFIG_I2C_SAVAGE4) += i2c-savage4.o
41obj-$(CONFIG_I2C_SH7760) += i2c-sh7760.o 45obj-$(CONFIG_I2C_SH7760) += i2c-sh7760.o
42obj-$(CONFIG_I2C_SH_MOBILE) += i2c-sh_mobile.o 46obj-$(CONFIG_I2C_SH_MOBILE) += i2c-sh_mobile.o
43obj-$(CONFIG_I2C_SIBYTE) += i2c-sibyte.o
44obj-$(CONFIG_I2C_SIMTEC) += i2c-simtec.o 47obj-$(CONFIG_I2C_SIMTEC) += i2c-simtec.o
45obj-$(CONFIG_I2C_SIS5595) += i2c-sis5595.o 48obj-$(CONFIG_I2C_VERSATILE) += i2c-versatile.o
46obj-$(CONFIG_I2C_SIS630) += i2c-sis630.o 49
47obj-$(CONFIG_I2C_SIS96X) += i2c-sis96x.o 50# External I2C/SMBus adapter drivers
48obj-$(CONFIG_I2C_STUB) += i2c-stub.o 51obj-$(CONFIG_I2C_PARPORT) += i2c-parport.o
52obj-$(CONFIG_I2C_PARPORT_LIGHT) += i2c-parport-light.o
49obj-$(CONFIG_I2C_TAOS_EVM) += i2c-taos-evm.o 53obj-$(CONFIG_I2C_TAOS_EVM) += i2c-taos-evm.o
50obj-$(CONFIG_I2C_TINY_USB) += i2c-tiny-usb.o 54obj-$(CONFIG_I2C_TINY_USB) += i2c-tiny-usb.o
51obj-$(CONFIG_I2C_VERSATILE) += i2c-versatile.o 55
52obj-$(CONFIG_I2C_ACORN) += i2c-acorn.o 56# Graphics adapter I2C/DDC channel drivers
53obj-$(CONFIG_I2C_VIA) += i2c-via.o
54obj-$(CONFIG_I2C_VIAPRO) += i2c-viapro.o
55obj-$(CONFIG_I2C_VOODOO3) += i2c-voodoo3.o 57obj-$(CONFIG_I2C_VOODOO3) += i2c-voodoo3.o
58
59# Other I2C/SMBus bus drivers
60obj-$(CONFIG_I2C_ACORN) += i2c-acorn.o
61obj-$(CONFIG_I2C_ELEKTOR) += i2c-elektor.o
62obj-$(CONFIG_I2C_PCA_ISA) += i2c-pca-isa.o
63obj-$(CONFIG_I2C_PCA_PLATFORM) += i2c-pca-platform.o
64obj-$(CONFIG_I2C_PMCMSP) += i2c-pmcmsp.o
65obj-$(CONFIG_I2C_SIBYTE) += i2c-sibyte.o
66obj-$(CONFIG_I2C_STUB) += i2c-stub.o
56obj-$(CONFIG_SCx200_ACB) += scx200_acb.o 67obj-$(CONFIG_SCx200_ACB) += scx200_acb.o
57obj-$(CONFIG_SCx200_I2C) += scx200_i2c.o 68obj-$(CONFIG_SCx200_I2C) += scx200_i2c.o
58 69
diff --git a/drivers/i2c/busses/i2c-ali1535.c b/drivers/i2c/busses/i2c-ali1535.c
index f14372ac2fc5..9cead9b9458e 100644
--- a/drivers/i2c/busses/i2c-ali1535.c
+++ b/drivers/i2c/busses/i2c-ali1535.c
@@ -1,6 +1,4 @@
1/* 1/*
2 i2c-ali1535.c - Part of lm_sensors, Linux kernel modules for hardware
3 monitoring
4 Copyright (c) 2000 Frodo Looijaard <frodol@dds.nl>, 2 Copyright (c) 2000 Frodo Looijaard <frodol@dds.nl>,
5 Philip Edelbrock <phil@netroedge.com>, 3 Philip Edelbrock <phil@netroedge.com>,
6 Mark D. Studebaker <mdsxyz123@yahoo.com>, 4 Mark D. Studebaker <mdsxyz123@yahoo.com>,
@@ -61,6 +59,7 @@
61#include <linux/ioport.h> 59#include <linux/ioport.h>
62#include <linux/i2c.h> 60#include <linux/i2c.h>
63#include <linux/init.h> 61#include <linux/init.h>
62#include <linux/acpi.h>
64#include <asm/io.h> 63#include <asm/io.h>
65 64
66 65
@@ -159,6 +158,11 @@ static int ali1535_setup(struct pci_dev *dev)
159 goto exit; 158 goto exit;
160 } 159 }
161 160
161 retval = acpi_check_region(ali1535_smba, ALI1535_SMB_IOSIZE,
162 ali1535_driver.name);
163 if (retval)
164 goto exit;
165
162 if (!request_region(ali1535_smba, ALI1535_SMB_IOSIZE, 166 if (!request_region(ali1535_smba, ALI1535_SMB_IOSIZE,
163 ali1535_driver.name)) { 167 ali1535_driver.name)) {
164 dev_err(&dev->dev, "ALI1535_smb region 0x%x already in use!\n", 168 dev_err(&dev->dev, "ALI1535_smb region 0x%x already in use!\n",
@@ -259,7 +263,7 @@ static int ali1535_transaction(struct i2c_adapter *adap)
259 dev_err(&adap->dev, 263 dev_err(&adap->dev,
260 "SMBus reset failed! (0x%02x) - controller or " 264 "SMBus reset failed! (0x%02x) - controller or "
261 "device on bus is probably hung\n", temp); 265 "device on bus is probably hung\n", temp);
262 return -1; 266 return -EBUSY;
263 } 267 }
264 } else { 268 } else {
265 /* check and clear done bit */ 269 /* check and clear done bit */
@@ -281,12 +285,12 @@ static int ali1535_transaction(struct i2c_adapter *adap)
281 285
282 /* If the SMBus is still busy, we give up */ 286 /* If the SMBus is still busy, we give up */
283 if (timeout >= MAX_TIMEOUT) { 287 if (timeout >= MAX_TIMEOUT) {
284 result = -1; 288 result = -ETIMEDOUT;
285 dev_err(&adap->dev, "SMBus Timeout!\n"); 289 dev_err(&adap->dev, "SMBus Timeout!\n");
286 } 290 }
287 291
288 if (temp & ALI1535_STS_FAIL) { 292 if (temp & ALI1535_STS_FAIL) {
289 result = -1; 293 result = -EIO;
290 dev_dbg(&adap->dev, "Error: Failed bus transaction\n"); 294 dev_dbg(&adap->dev, "Error: Failed bus transaction\n");
291 } 295 }
292 296
@@ -295,7 +299,7 @@ static int ali1535_transaction(struct i2c_adapter *adap)
295 * do a printk. This means that bus collisions go unreported. 299 * do a printk. This means that bus collisions go unreported.
296 */ 300 */
297 if (temp & ALI1535_STS_BUSERR) { 301 if (temp & ALI1535_STS_BUSERR) {
298 result = -1; 302 result = -ENXIO;
299 dev_dbg(&adap->dev, 303 dev_dbg(&adap->dev,
300 "Error: no response or bus collision ADD=%02x\n", 304 "Error: no response or bus collision ADD=%02x\n",
301 inb_p(SMBHSTADD)); 305 inb_p(SMBHSTADD));
@@ -303,13 +307,13 @@ static int ali1535_transaction(struct i2c_adapter *adap)
303 307
304 /* haven't ever seen this */ 308 /* haven't ever seen this */
305 if (temp & ALI1535_STS_DEV) { 309 if (temp & ALI1535_STS_DEV) {
306 result = -1; 310 result = -EIO;
307 dev_err(&adap->dev, "Error: device error\n"); 311 dev_err(&adap->dev, "Error: device error\n");
308 } 312 }
309 313
310 /* check to see if the "command complete" indication is set */ 314 /* check to see if the "command complete" indication is set */
311 if (!(temp & ALI1535_STS_DONE)) { 315 if (!(temp & ALI1535_STS_DONE)) {
312 result = -1; 316 result = -ETIMEDOUT;
313 dev_err(&adap->dev, "Error: command never completed\n"); 317 dev_err(&adap->dev, "Error: command never completed\n");
314 } 318 }
315 319
@@ -332,7 +336,7 @@ static int ali1535_transaction(struct i2c_adapter *adap)
332 return result; 336 return result;
333} 337}
334 338
335/* Return -1 on error. */ 339/* Return negative errno on error. */
336static s32 ali1535_access(struct i2c_adapter *adap, u16 addr, 340static s32 ali1535_access(struct i2c_adapter *adap, u16 addr,
337 unsigned short flags, char read_write, u8 command, 341 unsigned short flags, char read_write, u8 command,
338 int size, union i2c_smbus_data *data) 342 int size, union i2c_smbus_data *data)
@@ -357,10 +361,6 @@ static s32 ali1535_access(struct i2c_adapter *adap, u16 addr,
357 outb_p(0xFF, SMBHSTSTS); 361 outb_p(0xFF, SMBHSTSTS);
358 362
359 switch (size) { 363 switch (size) {
360 case I2C_SMBUS_PROC_CALL:
361 dev_err(&adap->dev, "I2C_SMBUS_PROC_CALL not supported!\n");
362 result = -1;
363 goto EXIT;
364 case I2C_SMBUS_QUICK: 364 case I2C_SMBUS_QUICK:
365 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), 365 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
366 SMBHSTADD); 366 SMBHSTADD);
@@ -418,13 +418,15 @@ static s32 ali1535_access(struct i2c_adapter *adap, u16 addr,
418 outb_p(data->block[i], SMBBLKDAT); 418 outb_p(data->block[i], SMBBLKDAT);
419 } 419 }
420 break; 420 break;
421 default:
422 dev_warn(&adap->dev, "Unsupported transaction %d\n", size);
423 result = -EOPNOTSUPP;
424 goto EXIT;
421 } 425 }
422 426
423 if (ali1535_transaction(adap)) { 427 result = ali1535_transaction(adap);
424 /* Error in transaction */ 428 if (result)
425 result = -1;
426 goto EXIT; 429 goto EXIT;
427 }
428 430
429 if ((read_write == I2C_SMBUS_WRITE) || (size == ALI1535_QUICK)) { 431 if ((read_write == I2C_SMBUS_WRITE) || (size == ALI1535_QUICK)) {
430 result = 0; 432 result = 0;
@@ -475,7 +477,7 @@ static const struct i2c_algorithm smbus_algorithm = {
475static struct i2c_adapter ali1535_adapter = { 477static struct i2c_adapter ali1535_adapter = {
476 .owner = THIS_MODULE, 478 .owner = THIS_MODULE,
477 .id = I2C_HW_SMBUS_ALI1535, 479 .id = I2C_HW_SMBUS_ALI1535,
478 .class = I2C_CLASS_HWMON, 480 .class = I2C_CLASS_HWMON | I2C_CLASS_SPD,
479 .algo = &smbus_algorithm, 481 .algo = &smbus_algorithm,
480}; 482};
481 483
diff --git a/drivers/i2c/busses/i2c-ali1563.c b/drivers/i2c/busses/i2c-ali1563.c
index 6b68074e518a..fc3e5b026423 100644
--- a/drivers/i2c/busses/i2c-ali1563.c
+++ b/drivers/i2c/busses/i2c-ali1563.c
@@ -21,6 +21,7 @@
21#include <linux/i2c.h> 21#include <linux/i2c.h>
22#include <linux/pci.h> 22#include <linux/pci.h>
23#include <linux/init.h> 23#include <linux/init.h>
24#include <linux/acpi.h>
24 25
25#define ALI1563_MAX_TIMEOUT 500 26#define ALI1563_MAX_TIMEOUT 500
26#define ALI1563_SMBBA 0x80 27#define ALI1563_SMBBA 0x80
@@ -67,6 +68,7 @@ static int ali1563_transaction(struct i2c_adapter * a, int size)
67{ 68{
68 u32 data; 69 u32 data;
69 int timeout; 70 int timeout;
71 int status = -EIO;
70 72
71 dev_dbg(&a->dev, "Transaction (pre): STS=%02x, CNTL1=%02x, " 73 dev_dbg(&a->dev, "Transaction (pre): STS=%02x, CNTL1=%02x, "
72 "CNTL2=%02x, CMD=%02x, ADD=%02x, DAT0=%02x, DAT1=%02x\n", 74 "CNTL2=%02x, CMD=%02x, ADD=%02x, DAT0=%02x, DAT1=%02x\n",
@@ -103,13 +105,15 @@ static int ali1563_transaction(struct i2c_adapter * a, int size)
103 /* Issue 'kill' to host controller */ 105 /* Issue 'kill' to host controller */
104 outb_p(HST_CNTL2_KILL,SMB_HST_CNTL2); 106 outb_p(HST_CNTL2_KILL,SMB_HST_CNTL2);
105 data = inb_p(SMB_HST_STS); 107 data = inb_p(SMB_HST_STS);
108 status = -ETIMEDOUT;
106 } 109 }
107 110
108 /* device error - no response, ignore the autodetection case */ 111 /* device error - no response, ignore the autodetection case */
109 if ((data & HST_STS_DEVERR) && (size != HST_CNTL2_QUICK)) { 112 if (data & HST_STS_DEVERR) {
110 dev_err(&a->dev, "Device error!\n"); 113 if (size != HST_CNTL2_QUICK)
114 dev_err(&a->dev, "Device error!\n");
115 status = -ENXIO;
111 } 116 }
112
113 /* bus collision */ 117 /* bus collision */
114 if (data & HST_STS_BUSERR) { 118 if (data & HST_STS_BUSERR) {
115 dev_err(&a->dev, "Bus collision!\n"); 119 dev_err(&a->dev, "Bus collision!\n");
@@ -122,13 +126,14 @@ static int ali1563_transaction(struct i2c_adapter * a, int size)
122 outb_p(0x0,SMB_HST_CNTL2); 126 outb_p(0x0,SMB_HST_CNTL2);
123 } 127 }
124 128
125 return -1; 129 return status;
126} 130}
127 131
128static int ali1563_block_start(struct i2c_adapter * a) 132static int ali1563_block_start(struct i2c_adapter * a)
129{ 133{
130 u32 data; 134 u32 data;
131 int timeout; 135 int timeout;
136 int status = -EIO;
132 137
133 dev_dbg(&a->dev, "Block (pre): STS=%02x, CNTL1=%02x, " 138 dev_dbg(&a->dev, "Block (pre): STS=%02x, CNTL1=%02x, "
134 "CNTL2=%02x, CMD=%02x, ADD=%02x, DAT0=%02x, DAT1=%02x\n", 139 "CNTL2=%02x, CMD=%02x, ADD=%02x, DAT0=%02x, DAT1=%02x\n",
@@ -164,13 +169,20 @@ static int ali1563_block_start(struct i2c_adapter * a)
164 169
165 if (timeout && !(data & HST_STS_BAD)) 170 if (timeout && !(data & HST_STS_BAD))
166 return 0; 171 return 0;
172
173 if (timeout == 0)
174 status = -ETIMEDOUT;
175
176 if (data & HST_STS_DEVERR)
177 status = -ENXIO;
178
167 dev_err(&a->dev, "SMBus Error: %s%s%s%s%s\n", 179 dev_err(&a->dev, "SMBus Error: %s%s%s%s%s\n",
168 timeout ? "Timeout " : "", 180 timeout ? "" : "Timeout ",
169 data & HST_STS_FAIL ? "Transaction Failed " : "", 181 data & HST_STS_FAIL ? "Transaction Failed " : "",
170 data & HST_STS_BUSERR ? "No response or Bus Collision " : "", 182 data & HST_STS_BUSERR ? "No response or Bus Collision " : "",
171 data & HST_STS_DEVERR ? "Device Error " : "", 183 data & HST_STS_DEVERR ? "Device Error " : "",
172 !(data & HST_STS_DONE) ? "Transaction Never Finished " : ""); 184 !(data & HST_STS_DONE) ? "Transaction Never Finished " : "");
173 return -1; 185 return status;
174} 186}
175 187
176static int ali1563_block(struct i2c_adapter * a, union i2c_smbus_data * data, u8 rw) 188static int ali1563_block(struct i2c_adapter * a, union i2c_smbus_data * data, u8 rw)
@@ -235,10 +247,6 @@ static s32 ali1563_access(struct i2c_adapter * a, u16 addr,
235 247
236 /* Map the size to what the chip understands */ 248 /* Map the size to what the chip understands */
237 switch (size) { 249 switch (size) {
238 case I2C_SMBUS_PROC_CALL:
239 dev_err(&a->dev, "I2C_SMBUS_PROC_CALL not supported!\n");
240 error = -EINVAL;
241 break;
242 case I2C_SMBUS_QUICK: 250 case I2C_SMBUS_QUICK:
243 size = HST_CNTL2_QUICK; 251 size = HST_CNTL2_QUICK;
244 break; 252 break;
@@ -254,6 +262,10 @@ static s32 ali1563_access(struct i2c_adapter * a, u16 addr,
254 case I2C_SMBUS_BLOCK_DATA: 262 case I2C_SMBUS_BLOCK_DATA:
255 size = HST_CNTL2_BLOCK; 263 size = HST_CNTL2_BLOCK;
256 break; 264 break;
265 default:
266 dev_warn(&a->dev, "Unsupported transaction %d\n", size);
267 error = -EOPNOTSUPP;
268 goto Done;
257 } 269 }
258 270
259 outb_p(((addr & 0x7f) << 1) | (rw & 0x01), SMB_HST_ADD); 271 outb_p(((addr & 0x7f) << 1) | (rw & 0x01), SMB_HST_ADD);
@@ -345,6 +357,10 @@ static int __devinit ali1563_setup(struct pci_dev * dev)
345 } 357 }
346 } 358 }
347 359
360 if (acpi_check_region(ali1563_smba, ALI1563_SMB_IOSIZE,
361 ali1563_pci_driver.name))
362 goto Err;
363
348 if (!request_region(ali1563_smba, ALI1563_SMB_IOSIZE, 364 if (!request_region(ali1563_smba, ALI1563_SMB_IOSIZE,
349 ali1563_pci_driver.name)) { 365 ali1563_pci_driver.name)) {
350 dev_err(&dev->dev, "Could not allocate I/O space at 0x%04x\n", 366 dev_err(&dev->dev, "Could not allocate I/O space at 0x%04x\n",
@@ -371,7 +387,7 @@ static const struct i2c_algorithm ali1563_algorithm = {
371static struct i2c_adapter ali1563_adapter = { 387static struct i2c_adapter ali1563_adapter = {
372 .owner = THIS_MODULE, 388 .owner = THIS_MODULE,
373 .id = I2C_HW_SMBUS_ALI1563, 389 .id = I2C_HW_SMBUS_ALI1563,
374 .class = I2C_CLASS_HWMON, 390 .class = I2C_CLASS_HWMON | I2C_CLASS_SPD,
375 .algo = &ali1563_algorithm, 391 .algo = &ali1563_algorithm,
376}; 392};
377 393
diff --git a/drivers/i2c/busses/i2c-ali15x3.c b/drivers/i2c/busses/i2c-ali15x3.c
index 93bf87d70961..234fdde7d40e 100644
--- a/drivers/i2c/busses/i2c-ali15x3.c
+++ b/drivers/i2c/busses/i2c-ali15x3.c
@@ -1,6 +1,4 @@
1/* 1/*
2 ali15x3.c - Part of lm_sensors, Linux kernel modules for hardware
3 monitoring
4 Copyright (c) 1999 Frodo Looijaard <frodol@dds.nl> and 2 Copyright (c) 1999 Frodo Looijaard <frodol@dds.nl> and
5 Philip Edelbrock <phil@netroedge.com> and 3 Philip Edelbrock <phil@netroedge.com> and
6 Mark D. Studebaker <mdsxyz123@yahoo.com> 4 Mark D. Studebaker <mdsxyz123@yahoo.com>
@@ -68,6 +66,7 @@
68#include <linux/delay.h> 66#include <linux/delay.h>
69#include <linux/i2c.h> 67#include <linux/i2c.h>
70#include <linux/init.h> 68#include <linux/init.h>
69#include <linux/acpi.h>
71#include <asm/io.h> 70#include <asm/io.h>
72 71
73/* ALI15X3 SMBus address offsets */ 72/* ALI15X3 SMBus address offsets */
@@ -166,6 +165,10 @@ static int ali15x3_setup(struct pci_dev *ALI15X3_dev)
166 if(force_addr) 165 if(force_addr)
167 ali15x3_smba = force_addr & ~(ALI15X3_SMB_IOSIZE - 1); 166 ali15x3_smba = force_addr & ~(ALI15X3_SMB_IOSIZE - 1);
168 167
168 if (acpi_check_region(ali15x3_smba, ALI15X3_SMB_IOSIZE,
169 ali15x3_driver.name))
170 return -EBUSY;
171
169 if (!request_region(ali15x3_smba, ALI15X3_SMB_IOSIZE, 172 if (!request_region(ali15x3_smba, ALI15X3_SMB_IOSIZE,
170 ali15x3_driver.name)) { 173 ali15x3_driver.name)) {
171 dev_err(&ALI15X3_dev->dev, 174 dev_err(&ALI15X3_dev->dev,
@@ -282,7 +285,7 @@ static int ali15x3_transaction(struct i2c_adapter *adap)
282 dev_err(&adap->dev, "SMBus reset failed! (0x%02x) - " 285 dev_err(&adap->dev, "SMBus reset failed! (0x%02x) - "
283 "controller or device on bus is probably hung\n", 286 "controller or device on bus is probably hung\n",
284 temp); 287 temp);
285 return -1; 288 return -EBUSY;
286 } 289 }
287 } else { 290 } else {
288 /* check and clear done bit */ 291 /* check and clear done bit */
@@ -304,12 +307,12 @@ static int ali15x3_transaction(struct i2c_adapter *adap)
304 307
305 /* If the SMBus is still busy, we give up */ 308 /* If the SMBus is still busy, we give up */
306 if (timeout >= MAX_TIMEOUT) { 309 if (timeout >= MAX_TIMEOUT) {
307 result = -1; 310 result = -ETIMEDOUT;
308 dev_err(&adap->dev, "SMBus Timeout!\n"); 311 dev_err(&adap->dev, "SMBus Timeout!\n");
309 } 312 }
310 313
311 if (temp & ALI15X3_STS_TERM) { 314 if (temp & ALI15X3_STS_TERM) {
312 result = -1; 315 result = -EIO;
313 dev_dbg(&adap->dev, "Error: Failed bus transaction\n"); 316 dev_dbg(&adap->dev, "Error: Failed bus transaction\n");
314 } 317 }
315 318
@@ -320,7 +323,7 @@ static int ali15x3_transaction(struct i2c_adapter *adap)
320 This means that bus collisions go unreported. 323 This means that bus collisions go unreported.
321 */ 324 */
322 if (temp & ALI15X3_STS_COLL) { 325 if (temp & ALI15X3_STS_COLL) {
323 result = -1; 326 result = -ENXIO;
324 dev_dbg(&adap->dev, 327 dev_dbg(&adap->dev,
325 "Error: no response or bus collision ADD=%02x\n", 328 "Error: no response or bus collision ADD=%02x\n",
326 inb_p(SMBHSTADD)); 329 inb_p(SMBHSTADD));
@@ -328,7 +331,7 @@ static int ali15x3_transaction(struct i2c_adapter *adap)
328 331
329 /* haven't ever seen this */ 332 /* haven't ever seen this */
330 if (temp & ALI15X3_STS_DEV) { 333 if (temp & ALI15X3_STS_DEV) {
331 result = -1; 334 result = -EIO;
332 dev_err(&adap->dev, "Error: device error\n"); 335 dev_err(&adap->dev, "Error: device error\n");
333 } 336 }
334 dev_dbg(&adap->dev, "Transaction (post): STS=%02x, CNT=%02x, CMD=%02x, " 337 dev_dbg(&adap->dev, "Transaction (post): STS=%02x, CNT=%02x, CMD=%02x, "
@@ -338,7 +341,7 @@ static int ali15x3_transaction(struct i2c_adapter *adap)
338 return result; 341 return result;
339} 342}
340 343
341/* Return -1 on error. */ 344/* Return negative errno on error. */
342static s32 ali15x3_access(struct i2c_adapter * adap, u16 addr, 345static s32 ali15x3_access(struct i2c_adapter * adap, u16 addr,
343 unsigned short flags, char read_write, u8 command, 346 unsigned short flags, char read_write, u8 command,
344 int size, union i2c_smbus_data * data) 347 int size, union i2c_smbus_data * data)
@@ -362,9 +365,6 @@ static s32 ali15x3_access(struct i2c_adapter * adap, u16 addr,
362 } 365 }
363 366
364 switch (size) { 367 switch (size) {
365 case I2C_SMBUS_PROC_CALL:
366 dev_err(&adap->dev, "I2C_SMBUS_PROC_CALL not supported!\n");
367 return -1;
368 case I2C_SMBUS_QUICK: 368 case I2C_SMBUS_QUICK:
369 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), 369 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
370 SMBHSTADD); 370 SMBHSTADD);
@@ -417,12 +417,16 @@ static s32 ali15x3_access(struct i2c_adapter * adap, u16 addr,
417 } 417 }
418 size = ALI15X3_BLOCK_DATA; 418 size = ALI15X3_BLOCK_DATA;
419 break; 419 break;
420 default:
421 dev_warn(&adap->dev, "Unsupported transaction %d\n", size);
422 return -EOPNOTSUPP;
420 } 423 }
421 424
422 outb_p(size, SMBHSTCNT); /* output command */ 425 outb_p(size, SMBHSTCNT); /* output command */
423 426
424 if (ali15x3_transaction(adap)) /* Error in transaction */ 427 temp = ali15x3_transaction(adap);
425 return -1; 428 if (temp)
429 return temp;
426 430
427 if ((read_write == I2C_SMBUS_WRITE) || (size == ALI15X3_QUICK)) 431 if ((read_write == I2C_SMBUS_WRITE) || (size == ALI15X3_QUICK))
428 return 0; 432 return 0;
@@ -470,7 +474,7 @@ static const struct i2c_algorithm smbus_algorithm = {
470static struct i2c_adapter ali15x3_adapter = { 474static struct i2c_adapter ali15x3_adapter = {
471 .owner = THIS_MODULE, 475 .owner = THIS_MODULE,
472 .id = I2C_HW_SMBUS_ALI15X3, 476 .id = I2C_HW_SMBUS_ALI15X3,
473 .class = I2C_CLASS_HWMON, 477 .class = I2C_CLASS_HWMON | I2C_CLASS_SPD,
474 .algo = &smbus_algorithm, 478 .algo = &smbus_algorithm,
475}; 479};
476 480
diff --git a/drivers/i2c/busses/i2c-amd756-s4882.c b/drivers/i2c/busses/i2c-amd756-s4882.c
index c38a0a112208..2f150e33c74c 100644
--- a/drivers/i2c/busses/i2c-amd756-s4882.c
+++ b/drivers/i2c/busses/i2c-amd756-s4882.c
@@ -58,7 +58,7 @@ static s32 amd756_access_virt0(struct i2c_adapter * adap, u16 addr,
58 /* We exclude the multiplexed addresses */ 58 /* We exclude the multiplexed addresses */
59 if (addr == 0x4c || (addr & 0xfc) == 0x50 || (addr & 0xfc) == 0x30 59 if (addr == 0x4c || (addr & 0xfc) == 0x50 || (addr & 0xfc) == 0x30
60 || addr == 0x18) 60 || addr == 0x18)
61 return -1; 61 return -ENXIO;
62 62
63 mutex_lock(&amd756_lock); 63 mutex_lock(&amd756_lock);
64 64
@@ -86,7 +86,7 @@ static inline s32 amd756_access_channel(struct i2c_adapter * adap, u16 addr,
86 86
87 /* We exclude the non-multiplexed addresses */ 87 /* We exclude the non-multiplexed addresses */
88 if (addr != 0x4c && (addr & 0xfc) != 0x50 && (addr & 0xfc) != 0x30) 88 if (addr != 0x4c && (addr & 0xfc) != 0x50 && (addr & 0xfc) != 0x30)
89 return -1; 89 return -ENXIO;
90 90
91 mutex_lock(&amd756_lock); 91 mutex_lock(&amd756_lock);
92 92
diff --git a/drivers/i2c/busses/i2c-amd756.c b/drivers/i2c/busses/i2c-amd756.c
index 43508d61eb7c..1ea39254dac6 100644
--- a/drivers/i2c/busses/i2c-amd756.c
+++ b/drivers/i2c/busses/i2c-amd756.c
@@ -1,7 +1,4 @@
1/* 1/*
2 amd756.c - Part of lm_sensors, Linux kernel modules for hardware
3 monitoring
4
5 Copyright (c) 1999-2002 Merlin Hughes <merlin@merlin.org> 2 Copyright (c) 1999-2002 Merlin Hughes <merlin@merlin.org>
6 3
7 Shamelessly ripped from i2c-piix4.c: 4 Shamelessly ripped from i2c-piix4.c:
@@ -45,6 +42,7 @@
45#include <linux/ioport.h> 42#include <linux/ioport.h>
46#include <linux/i2c.h> 43#include <linux/i2c.h>
47#include <linux/init.h> 44#include <linux/init.h>
45#include <linux/acpi.h>
48#include <asm/io.h> 46#include <asm/io.h>
49 47
50/* AMD756 SMBus address offsets */ 48/* AMD756 SMBus address offsets */
@@ -151,17 +149,17 @@ static int amd756_transaction(struct i2c_adapter *adap)
151 } 149 }
152 150
153 if (temp & GS_PRERR_STS) { 151 if (temp & GS_PRERR_STS) {
154 result = -1; 152 result = -ENXIO;
155 dev_dbg(&adap->dev, "SMBus Protocol error (no response)!\n"); 153 dev_dbg(&adap->dev, "SMBus Protocol error (no response)!\n");
156 } 154 }
157 155
158 if (temp & GS_COL_STS) { 156 if (temp & GS_COL_STS) {
159 result = -1; 157 result = -EIO;
160 dev_warn(&adap->dev, "SMBus collision!\n"); 158 dev_warn(&adap->dev, "SMBus collision!\n");
161 } 159 }
162 160
163 if (temp & GS_TO_STS) { 161 if (temp & GS_TO_STS) {
164 result = -1; 162 result = -ETIMEDOUT;
165 dev_dbg(&adap->dev, "SMBus protocol timeout!\n"); 163 dev_dbg(&adap->dev, "SMBus protocol timeout!\n");
166 } 164 }
167 165
@@ -189,22 +187,18 @@ static int amd756_transaction(struct i2c_adapter *adap)
189 outw_p(inw(SMB_GLOBAL_ENABLE) | GE_ABORT, SMB_GLOBAL_ENABLE); 187 outw_p(inw(SMB_GLOBAL_ENABLE) | GE_ABORT, SMB_GLOBAL_ENABLE);
190 msleep(100); 188 msleep(100);
191 outw_p(GS_CLEAR_STS, SMB_GLOBAL_STATUS); 189 outw_p(GS_CLEAR_STS, SMB_GLOBAL_STATUS);
192 return -1; 190 return -EIO;
193} 191}
194 192
195/* Return -1 on error. */ 193/* Return negative errno on error. */
196static s32 amd756_access(struct i2c_adapter * adap, u16 addr, 194static s32 amd756_access(struct i2c_adapter * adap, u16 addr,
197 unsigned short flags, char read_write, 195 unsigned short flags, char read_write,
198 u8 command, int size, union i2c_smbus_data * data) 196 u8 command, int size, union i2c_smbus_data * data)
199{ 197{
200 int i, len; 198 int i, len;
199 int status;
201 200
202 /** TODO: Should I supporte the 10-bit transfers? */
203 switch (size) { 201 switch (size) {
204 case I2C_SMBUS_PROC_CALL:
205 dev_dbg(&adap->dev, "I2C_SMBUS_PROC_CALL not supported!\n");
206 /* TODO: Well... It is supported, I'm just not sure what to do here... */
207 return -1;
208 case I2C_SMBUS_QUICK: 202 case I2C_SMBUS_QUICK:
209 outw_p(((addr & 0x7f) << 1) | (read_write & 0x01), 203 outw_p(((addr & 0x7f) << 1) | (read_write & 0x01),
210 SMB_HOST_ADDRESS); 204 SMB_HOST_ADDRESS);
@@ -251,13 +245,17 @@ static s32 amd756_access(struct i2c_adapter * adap, u16 addr,
251 } 245 }
252 size = AMD756_BLOCK_DATA; 246 size = AMD756_BLOCK_DATA;
253 break; 247 break;
248 default:
249 dev_warn(&adap->dev, "Unsupported transaction %d\n", size);
250 return -EOPNOTSUPP;
254 } 251 }
255 252
256 /* How about enabling interrupts... */ 253 /* How about enabling interrupts... */
257 outw_p(size & GE_CYC_TYPE_MASK, SMB_GLOBAL_ENABLE); 254 outw_p(size & GE_CYC_TYPE_MASK, SMB_GLOBAL_ENABLE);
258 255
259 if (amd756_transaction(adap)) /* Error in transaction */ 256 status = amd756_transaction(adap);
260 return -1; 257 if (status)
258 return status;
261 259
262 if ((read_write == I2C_SMBUS_WRITE) || (size == AMD756_QUICK)) 260 if ((read_write == I2C_SMBUS_WRITE) || (size == AMD756_QUICK))
263 return 0; 261 return 0;
@@ -301,7 +299,7 @@ static const struct i2c_algorithm smbus_algorithm = {
301struct i2c_adapter amd756_smbus = { 299struct i2c_adapter amd756_smbus = {
302 .owner = THIS_MODULE, 300 .owner = THIS_MODULE,
303 .id = I2C_HW_SMBUS_AMD756, 301 .id = I2C_HW_SMBUS_AMD756,
304 .class = I2C_CLASS_HWMON, 302 .class = I2C_CLASS_HWMON | I2C_CLASS_SPD,
305 .algo = &smbus_algorithm, 303 .algo = &smbus_algorithm,
306}; 304};
307 305
@@ -368,6 +366,11 @@ static int __devinit amd756_probe(struct pci_dev *pdev,
368 amd756_ioport += SMB_ADDR_OFFSET; 366 amd756_ioport += SMB_ADDR_OFFSET;
369 } 367 }
370 368
369 error = acpi_check_region(amd756_ioport, SMB_IOSIZE,
370 amd756_driver.name);
371 if (error)
372 return error;
373
371 if (!request_region(amd756_ioport, SMB_IOSIZE, amd756_driver.name)) { 374 if (!request_region(amd756_ioport, SMB_IOSIZE, amd756_driver.name)) {
372 dev_err(&pdev->dev, "SMB region 0x%x already in use!\n", 375 dev_err(&pdev->dev, "SMB region 0x%x already in use!\n",
373 amd756_ioport); 376 amd756_ioport);
diff --git a/drivers/i2c/busses/i2c-amd8111.c b/drivers/i2c/busses/i2c-amd8111.c
index 5d1a27ef2504..3972208876b3 100644
--- a/drivers/i2c/busses/i2c-amd8111.c
+++ b/drivers/i2c/busses/i2c-amd8111.c
@@ -16,6 +16,7 @@
16#include <linux/init.h> 16#include <linux/init.h>
17#include <linux/i2c.h> 17#include <linux/i2c.h>
18#include <linux/delay.h> 18#include <linux/delay.h>
19#include <linux/acpi.h>
19#include <asm/io.h> 20#include <asm/io.h>
20 21
21MODULE_LICENSE("GPL"); 22MODULE_LICENSE("GPL");
@@ -77,7 +78,7 @@ static unsigned int amd_ec_wait_write(struct amd_smbus *smbus)
77 if (!timeout) { 78 if (!timeout) {
78 dev_warn(&smbus->dev->dev, 79 dev_warn(&smbus->dev->dev,
79 "Timeout while waiting for IBF to clear\n"); 80 "Timeout while waiting for IBF to clear\n");
80 return -1; 81 return -ETIMEDOUT;
81 } 82 }
82 83
83 return 0; 84 return 0;
@@ -93,7 +94,7 @@ static unsigned int amd_ec_wait_read(struct amd_smbus *smbus)
93 if (!timeout) { 94 if (!timeout) {
94 dev_warn(&smbus->dev->dev, 95 dev_warn(&smbus->dev->dev,
95 "Timeout while waiting for OBF to set\n"); 96 "Timeout while waiting for OBF to set\n");
96 return -1; 97 return -ETIMEDOUT;
97 } 98 }
98 99
99 return 0; 100 return 0;
@@ -102,16 +103,21 @@ static unsigned int amd_ec_wait_read(struct amd_smbus *smbus)
102static unsigned int amd_ec_read(struct amd_smbus *smbus, unsigned char address, 103static unsigned int amd_ec_read(struct amd_smbus *smbus, unsigned char address,
103 unsigned char *data) 104 unsigned char *data)
104{ 105{
105 if (amd_ec_wait_write(smbus)) 106 int status;
106 return -1; 107
108 status = amd_ec_wait_write(smbus);
109 if (status)
110 return status;
107 outb(AMD_EC_CMD_RD, smbus->base + AMD_EC_CMD); 111 outb(AMD_EC_CMD_RD, smbus->base + AMD_EC_CMD);
108 112
109 if (amd_ec_wait_write(smbus)) 113 status = amd_ec_wait_write(smbus);
110 return -1; 114 if (status)
115 return status;
111 outb(address, smbus->base + AMD_EC_DATA); 116 outb(address, smbus->base + AMD_EC_DATA);
112 117
113 if (amd_ec_wait_read(smbus)) 118 status = amd_ec_wait_read(smbus);
114 return -1; 119 if (status)
120 return status;
115 *data = inb(smbus->base + AMD_EC_DATA); 121 *data = inb(smbus->base + AMD_EC_DATA);
116 122
117 return 0; 123 return 0;
@@ -120,16 +126,21 @@ static unsigned int amd_ec_read(struct amd_smbus *smbus, unsigned char address,
120static unsigned int amd_ec_write(struct amd_smbus *smbus, unsigned char address, 126static unsigned int amd_ec_write(struct amd_smbus *smbus, unsigned char address,
121 unsigned char data) 127 unsigned char data)
122{ 128{
123 if (amd_ec_wait_write(smbus)) 129 int status;
124 return -1; 130
131 status = amd_ec_wait_write(smbus);
132 if (status)
133 return status;
125 outb(AMD_EC_CMD_WR, smbus->base + AMD_EC_CMD); 134 outb(AMD_EC_CMD_WR, smbus->base + AMD_EC_CMD);
126 135
127 if (amd_ec_wait_write(smbus)) 136 status = amd_ec_wait_write(smbus);
128 return -1; 137 if (status)
138 return status;
129 outb(address, smbus->base + AMD_EC_DATA); 139 outb(address, smbus->base + AMD_EC_DATA);
130 140
131 if (amd_ec_wait_write(smbus)) 141 status = amd_ec_wait_write(smbus);
132 return -1; 142 if (status)
143 return status;
133 outb(data, smbus->base + AMD_EC_DATA); 144 outb(data, smbus->base + AMD_EC_DATA);
134 145
135 return 0; 146 return 0;
@@ -267,12 +278,17 @@ static s32 amd8111_access(struct i2c_adapter * adap, u16 addr,
267 278
268 default: 279 default:
269 dev_warn(&adap->dev, "Unsupported transaction %d\n", size); 280 dev_warn(&adap->dev, "Unsupported transaction %d\n", size);
270 return -1; 281 return -EOPNOTSUPP;
271 } 282 }
272 283
273 amd_ec_write(smbus, AMD_SMB_ADDR, addr << 1); 284 amd_ec_write(smbus, AMD_SMB_ADDR, addr << 1);
274 amd_ec_write(smbus, AMD_SMB_PRTCL, protocol); 285 amd_ec_write(smbus, AMD_SMB_PRTCL, protocol);
275 286
287 /* FIXME this discards status from ec_read(); so temp[0] will
288 * hold stack garbage ... the rest of this routine will act
289 * nonsensically. Ignored ec_write() status might explain
290 * some such failures...
291 */
276 amd_ec_read(smbus, AMD_SMB_STS, temp + 0); 292 amd_ec_read(smbus, AMD_SMB_STS, temp + 0);
277 293
278 if (~temp[0] & AMD_SMB_STS_DONE) { 294 if (~temp[0] & AMD_SMB_STS_DONE) {
@@ -286,7 +302,7 @@ static s32 amd8111_access(struct i2c_adapter * adap, u16 addr,
286 } 302 }
287 303
288 if ((~temp[0] & AMD_SMB_STS_DONE) || (temp[0] & AMD_SMB_STS_STATUS)) 304 if ((~temp[0] & AMD_SMB_STS_DONE) || (temp[0] & AMD_SMB_STS_STATUS))
289 return -1; 305 return -EIO;
290 306
291 if (read_write == I2C_SMBUS_WRITE) 307 if (read_write == I2C_SMBUS_WRITE)
292 return 0; 308 return 0;
@@ -359,6 +375,10 @@ static int __devinit amd8111_probe(struct pci_dev *dev,
359 smbus->base = pci_resource_start(dev, 0); 375 smbus->base = pci_resource_start(dev, 0);
360 smbus->size = pci_resource_len(dev, 0); 376 smbus->size = pci_resource_len(dev, 0);
361 377
378 error = acpi_check_resource_conflict(&dev->resource[0]);
379 if (error)
380 goto out_kfree;
381
362 if (!request_region(smbus->base, smbus->size, amd8111_driver.name)) { 382 if (!request_region(smbus->base, smbus->size, amd8111_driver.name)) {
363 error = -EBUSY; 383 error = -EBUSY;
364 goto out_kfree; 384 goto out_kfree;
@@ -368,7 +388,7 @@ static int __devinit amd8111_probe(struct pci_dev *dev,
368 snprintf(smbus->adapter.name, sizeof(smbus->adapter.name), 388 snprintf(smbus->adapter.name, sizeof(smbus->adapter.name),
369 "SMBus2 AMD8111 adapter at %04x", smbus->base); 389 "SMBus2 AMD8111 adapter at %04x", smbus->base);
370 smbus->adapter.id = I2C_HW_SMBUS_AMD8111; 390 smbus->adapter.id = I2C_HW_SMBUS_AMD8111;
371 smbus->adapter.class = I2C_CLASS_HWMON; 391 smbus->adapter.class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
372 smbus->adapter.algo = &smbus_algorithm; 392 smbus->adapter.algo = &smbus_algorithm;
373 smbus->adapter.algo_data = smbus; 393 smbus->adapter.algo_data = smbus;
374 394
diff --git a/drivers/i2c/busses/i2c-au1550.c b/drivers/i2c/busses/i2c-au1550.c
index cae9dc89d88c..66a04c2c660f 100644
--- a/drivers/i2c/busses/i2c-au1550.c
+++ b/drivers/i2c/busses/i2c-au1550.c
@@ -269,9 +269,13 @@ static int
269au1550_xfer(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs, int num) 269au1550_xfer(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs, int num)
270{ 270{
271 struct i2c_au1550_data *adap = i2c_adap->algo_data; 271 struct i2c_au1550_data *adap = i2c_adap->algo_data;
272 volatile psc_smb_t *sp = (volatile psc_smb_t *)adap->psc_base;
272 struct i2c_msg *p; 273 struct i2c_msg *p;
273 int i, err = 0; 274 int i, err = 0;
274 275
276 sp->psc_ctrl = PSC_CTRL_ENABLE;
277 au_sync();
278
275 for (i = 0; !err && i < num; i++) { 279 for (i = 0; !err && i < num; i++) {
276 p = &msgs[i]; 280 p = &msgs[i];
277 err = do_address(adap, p->addr, p->flags & I2C_M_RD, 281 err = do_address(adap, p->addr, p->flags & I2C_M_RD,
@@ -288,6 +292,10 @@ au1550_xfer(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs, int num)
288 */ 292 */
289 if (err == 0) 293 if (err == 0)
290 err = num; 294 err = num;
295
296 sp->psc_ctrl = PSC_CTRL_SUSPEND;
297 au_sync();
298
291 return err; 299 return err;
292} 300}
293 301
@@ -302,6 +310,61 @@ static const struct i2c_algorithm au1550_algo = {
302 .functionality = au1550_func, 310 .functionality = au1550_func,
303}; 311};
304 312
313static void i2c_au1550_setup(struct i2c_au1550_data *priv)
314{
315 volatile psc_smb_t *sp = (volatile psc_smb_t *)priv->psc_base;
316 u32 stat;
317
318 sp->psc_ctrl = PSC_CTRL_DISABLE;
319 au_sync();
320 sp->psc_sel = PSC_SEL_PS_SMBUSMODE;
321 sp->psc_smbcfg = 0;
322 au_sync();
323 sp->psc_ctrl = PSC_CTRL_ENABLE;
324 au_sync();
325 do {
326 stat = sp->psc_smbstat;
327 au_sync();
328 } while ((stat & PSC_SMBSTAT_SR) == 0);
329
330 sp->psc_smbcfg = (PSC_SMBCFG_RT_FIFO8 | PSC_SMBCFG_TT_FIFO8 |
331 PSC_SMBCFG_DD_DISABLE);
332
333 /* Divide by 8 to get a 6.25 MHz clock. The later protocol
334 * timings are based on this clock.
335 */
336 sp->psc_smbcfg |= PSC_SMBCFG_SET_DIV(PSC_SMBCFG_DIV8);
337 sp->psc_smbmsk = PSC_SMBMSK_ALLMASK;
338 au_sync();
339
340 /* Set the protocol timer values. See Table 71 in the
341 * Au1550 Data Book for standard timing values.
342 */
343 sp->psc_smbtmr = PSC_SMBTMR_SET_TH(0) | PSC_SMBTMR_SET_PS(15) | \
344 PSC_SMBTMR_SET_PU(15) | PSC_SMBTMR_SET_SH(15) | \
345 PSC_SMBTMR_SET_SU(15) | PSC_SMBTMR_SET_CL(15) | \
346 PSC_SMBTMR_SET_CH(15);
347 au_sync();
348
349 sp->psc_smbcfg |= PSC_SMBCFG_DE_ENABLE;
350 do {
351 stat = sp->psc_smbstat;
352 au_sync();
353 } while ((stat & PSC_SMBSTAT_SR) == 0);
354
355 sp->psc_ctrl = PSC_CTRL_SUSPEND;
356 au_sync();
357}
358
359static void i2c_au1550_disable(struct i2c_au1550_data *priv)
360{
361 volatile psc_smb_t *sp = (volatile psc_smb_t *)priv->psc_base;
362
363 sp->psc_smbcfg = 0;
364 sp->psc_ctrl = PSC_CTRL_DISABLE;
365 au_sync();
366}
367
305/* 368/*
306 * registering functions to load algorithms at runtime 369 * registering functions to load algorithms at runtime
307 * Prior to calling us, the 50MHz clock frequency and routing 370 * Prior to calling us, the 50MHz clock frequency and routing
@@ -311,9 +374,7 @@ static int __devinit
311i2c_au1550_probe(struct platform_device *pdev) 374i2c_au1550_probe(struct platform_device *pdev)
312{ 375{
313 struct i2c_au1550_data *priv; 376 struct i2c_au1550_data *priv;
314 volatile psc_smb_t *sp;
315 struct resource *r; 377 struct resource *r;
316 u32 stat;
317 int ret; 378 int ret;
318 379
319 r = platform_get_resource(pdev, IORESOURCE_MEM, 0); 380 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
@@ -348,43 +409,7 @@ i2c_au1550_probe(struct platform_device *pdev)
348 409
349 /* Now, set up the PSC for SMBus PIO mode. 410 /* Now, set up the PSC for SMBus PIO mode.
350 */ 411 */
351 sp = (volatile psc_smb_t *)priv->psc_base; 412 i2c_au1550_setup(priv);
352 sp->psc_ctrl = PSC_CTRL_DISABLE;
353 au_sync();
354 sp->psc_sel = PSC_SEL_PS_SMBUSMODE;
355 sp->psc_smbcfg = 0;
356 au_sync();
357 sp->psc_ctrl = PSC_CTRL_ENABLE;
358 au_sync();
359 do {
360 stat = sp->psc_smbstat;
361 au_sync();
362 } while ((stat & PSC_SMBSTAT_SR) == 0);
363
364 sp->psc_smbcfg = (PSC_SMBCFG_RT_FIFO8 | PSC_SMBCFG_TT_FIFO8 |
365 PSC_SMBCFG_DD_DISABLE);
366
367 /* Divide by 8 to get a 6.25 MHz clock. The later protocol
368 * timings are based on this clock.
369 */
370 sp->psc_smbcfg |= PSC_SMBCFG_SET_DIV(PSC_SMBCFG_DIV8);
371 sp->psc_smbmsk = PSC_SMBMSK_ALLMASK;
372 au_sync();
373
374 /* Set the protocol timer values. See Table 71 in the
375 * Au1550 Data Book for standard timing values.
376 */
377 sp->psc_smbtmr = PSC_SMBTMR_SET_TH(0) | PSC_SMBTMR_SET_PS(15) | \
378 PSC_SMBTMR_SET_PU(15) | PSC_SMBTMR_SET_SH(15) | \
379 PSC_SMBTMR_SET_SU(15) | PSC_SMBTMR_SET_CL(15) | \
380 PSC_SMBTMR_SET_CH(15);
381 au_sync();
382
383 sp->psc_smbcfg |= PSC_SMBCFG_DE_ENABLE;
384 do {
385 stat = sp->psc_smbstat;
386 au_sync();
387 } while ((stat & PSC_SMBSTAT_DR) == 0);
388 413
389 ret = i2c_add_numbered_adapter(&priv->adap); 414 ret = i2c_add_numbered_adapter(&priv->adap);
390 if (ret == 0) { 415 if (ret == 0) {
@@ -392,10 +417,7 @@ i2c_au1550_probe(struct platform_device *pdev)
392 return 0; 417 return 0;
393 } 418 }
394 419
395 /* disable the PSC */ 420 i2c_au1550_disable(priv);
396 sp->psc_smbcfg = 0;
397 sp->psc_ctrl = PSC_CTRL_DISABLE;
398 au_sync();
399 421
400 release_resource(priv->ioarea); 422 release_resource(priv->ioarea);
401 kfree(priv->ioarea); 423 kfree(priv->ioarea);
@@ -409,27 +431,24 @@ static int __devexit
409i2c_au1550_remove(struct platform_device *pdev) 431i2c_au1550_remove(struct platform_device *pdev)
410{ 432{
411 struct i2c_au1550_data *priv = platform_get_drvdata(pdev); 433 struct i2c_au1550_data *priv = platform_get_drvdata(pdev);
412 volatile psc_smb_t *sp = (volatile psc_smb_t *)priv->psc_base;
413 434
414 platform_set_drvdata(pdev, NULL); 435 platform_set_drvdata(pdev, NULL);
415 i2c_del_adapter(&priv->adap); 436 i2c_del_adapter(&priv->adap);
416 sp->psc_smbcfg = 0; 437 i2c_au1550_disable(priv);
417 sp->psc_ctrl = PSC_CTRL_DISABLE;
418 au_sync();
419 release_resource(priv->ioarea); 438 release_resource(priv->ioarea);
420 kfree(priv->ioarea); 439 kfree(priv->ioarea);
421 kfree(priv); 440 kfree(priv);
422 return 0; 441 return 0;
423} 442}
424 443
444#ifdef CONFIG_PM
425static int 445static int
426i2c_au1550_suspend(struct platform_device *pdev, pm_message_t state) 446i2c_au1550_suspend(struct platform_device *pdev, pm_message_t state)
427{ 447{
428 struct i2c_au1550_data *priv = platform_get_drvdata(pdev); 448 struct i2c_au1550_data *priv = platform_get_drvdata(pdev);
429 volatile psc_smb_t *sp = (volatile psc_smb_t *)priv->psc_base;
430 449
431 sp->psc_ctrl = PSC_CTRL_SUSPEND; 450 i2c_au1550_disable(priv);
432 au_sync(); 451
433 return 0; 452 return 0;
434} 453}
435 454
@@ -437,14 +456,15 @@ static int
437i2c_au1550_resume(struct platform_device *pdev) 456i2c_au1550_resume(struct platform_device *pdev)
438{ 457{
439 struct i2c_au1550_data *priv = platform_get_drvdata(pdev); 458 struct i2c_au1550_data *priv = platform_get_drvdata(pdev);
440 volatile psc_smb_t *sp = (volatile psc_smb_t *)priv->psc_base;
441 459
442 sp->psc_ctrl = PSC_CTRL_ENABLE; 460 i2c_au1550_setup(priv);
443 au_sync(); 461
444 while (!(sp->psc_smbstat & PSC_SMBSTAT_SR))
445 au_sync();
446 return 0; 462 return 0;
447} 463}
464#else
465#define i2c_au1550_suspend NULL
466#define i2c_au1550_resume NULL
467#endif
448 468
449static struct platform_driver au1xpsc_smbus_driver = { 469static struct platform_driver au1xpsc_smbus_driver = {
450 .driver = { 470 .driver = {
diff --git a/drivers/i2c/busses/i2c-cpm.c b/drivers/i2c/busses/i2c-cpm.c
new file mode 100644
index 000000000000..8164de1f4d72
--- /dev/null
+++ b/drivers/i2c/busses/i2c-cpm.c
@@ -0,0 +1,745 @@
1/*
2 * Freescale CPM1/CPM2 I2C interface.
3 * Copyright (c) 1999 Dan Malek (dmalek@jlc.net).
4 *
5 * moved into proper i2c interface;
6 * Brad Parker (brad@heeltoe.com)
7 *
8 * Parts from dbox2_i2c.c (cvs.tuxbox.org)
9 * (C) 2000-2001 Felix Domke (tmbinc@gmx.net), Gillem (htoa@gmx.net)
10 *
11 * (C) 2007 Montavista Software, Inc.
12 * Vitaly Bordug <vitb@kernel.crashing.org>
13 *
14 * Converted to of_platform_device. Renamed to i2c-cpm.c.
15 * (C) 2007,2008 Jochen Friedrich <jochen@scram.de>
16 *
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License as published by
19 * the Free Software Foundation; either version 2 of the License, or
20 * (at your option) any later version.
21 *
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
26 *
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
30 */
31
32#include <linux/kernel.h>
33#include <linux/module.h>
34#include <linux/delay.h>
35#include <linux/slab.h>
36#include <linux/init.h>
37#include <linux/interrupt.h>
38#include <linux/errno.h>
39#include <linux/stddef.h>
40#include <linux/i2c.h>
41#include <linux/io.h>
42#include <linux/dma-mapping.h>
43#include <linux/of_device.h>
44#include <linux/of_platform.h>
45#include <linux/of_i2c.h>
46#include <sysdev/fsl_soc.h>
47#include <asm/cpm.h>
48
49/* Try to define this if you have an older CPU (earlier than rev D4) */
50/* However, better use a GPIO based bitbang driver in this case :/ */
51#undef I2C_CHIP_ERRATA
52
53#define CPM_MAX_READ 513
54#define CPM_MAXBD 4
55
56#define I2C_EB (0x10) /* Big endian mode */
57#define I2C_EB_CPM2 (0x30) /* Big endian mode, memory snoop */
58
59#define DPRAM_BASE ((u8 __iomem __force *)cpm_muram_addr(0))
60
61/* I2C parameter RAM. */
62struct i2c_ram {
63 ushort rbase; /* Rx Buffer descriptor base address */
64 ushort tbase; /* Tx Buffer descriptor base address */
65 u_char rfcr; /* Rx function code */
66 u_char tfcr; /* Tx function code */
67 ushort mrblr; /* Max receive buffer length */
68 uint rstate; /* Internal */
69 uint rdp; /* Internal */
70 ushort rbptr; /* Rx Buffer descriptor pointer */
71 ushort rbc; /* Internal */
72 uint rxtmp; /* Internal */
73 uint tstate; /* Internal */
74 uint tdp; /* Internal */
75 ushort tbptr; /* Tx Buffer descriptor pointer */
76 ushort tbc; /* Internal */
77 uint txtmp; /* Internal */
78 char res1[4]; /* Reserved */
79 ushort rpbase; /* Relocation pointer */
80 char res2[2]; /* Reserved */
81};
82
83#define I2COM_START 0x80
84#define I2COM_MASTER 0x01
85#define I2CER_TXE 0x10
86#define I2CER_BUSY 0x04
87#define I2CER_TXB 0x02
88#define I2CER_RXB 0x01
89#define I2MOD_EN 0x01
90
91/* I2C Registers */
92struct i2c_reg {
93 u8 i2mod;
94 u8 res1[3];
95 u8 i2add;
96 u8 res2[3];
97 u8 i2brg;
98 u8 res3[3];
99 u8 i2com;
100 u8 res4[3];
101 u8 i2cer;
102 u8 res5[3];
103 u8 i2cmr;
104};
105
106struct cpm_i2c {
107 char *base;
108 struct of_device *ofdev;
109 struct i2c_adapter adap;
110 uint dp_addr;
111 int version; /* CPM1=1, CPM2=2 */
112 int irq;
113 int cp_command;
114 int freq;
115 struct i2c_reg __iomem *i2c_reg;
116 struct i2c_ram __iomem *i2c_ram;
117 u16 i2c_addr;
118 wait_queue_head_t i2c_wait;
119 cbd_t __iomem *tbase;
120 cbd_t __iomem *rbase;
121 u_char *txbuf[CPM_MAXBD];
122 u_char *rxbuf[CPM_MAXBD];
123 u32 txdma[CPM_MAXBD];
124 u32 rxdma[CPM_MAXBD];
125};
126
127static irqreturn_t cpm_i2c_interrupt(int irq, void *dev_id)
128{
129 struct cpm_i2c *cpm;
130 struct i2c_reg __iomem *i2c_reg;
131 struct i2c_adapter *adap = dev_id;
132 int i;
133
134 cpm = i2c_get_adapdata(dev_id);
135 i2c_reg = cpm->i2c_reg;
136
137 /* Clear interrupt. */
138 i = in_8(&i2c_reg->i2cer);
139 out_8(&i2c_reg->i2cer, i);
140
141 dev_dbg(&adap->dev, "Interrupt: %x\n", i);
142
143 wake_up_interruptible(&cpm->i2c_wait);
144
145 return i ? IRQ_HANDLED : IRQ_NONE;
146}
147
148static void cpm_reset_i2c_params(struct cpm_i2c *cpm)
149{
150 struct i2c_ram __iomem *i2c_ram = cpm->i2c_ram;
151
152 /* Set up the I2C parameters in the parameter ram. */
153 out_be16(&i2c_ram->tbase, (u8 __iomem *)cpm->tbase - DPRAM_BASE);
154 out_be16(&i2c_ram->rbase, (u8 __iomem *)cpm->rbase - DPRAM_BASE);
155
156 if (cpm->version == 1) {
157 out_8(&i2c_ram->tfcr, I2C_EB);
158 out_8(&i2c_ram->rfcr, I2C_EB);
159 } else {
160 out_8(&i2c_ram->tfcr, I2C_EB_CPM2);
161 out_8(&i2c_ram->rfcr, I2C_EB_CPM2);
162 }
163
164 out_be16(&i2c_ram->mrblr, CPM_MAX_READ);
165
166 out_be32(&i2c_ram->rstate, 0);
167 out_be32(&i2c_ram->rdp, 0);
168 out_be16(&i2c_ram->rbptr, 0);
169 out_be16(&i2c_ram->rbc, 0);
170 out_be32(&i2c_ram->rxtmp, 0);
171 out_be32(&i2c_ram->tstate, 0);
172 out_be32(&i2c_ram->tdp, 0);
173 out_be16(&i2c_ram->tbptr, 0);
174 out_be16(&i2c_ram->tbc, 0);
175 out_be32(&i2c_ram->txtmp, 0);
176}
177
178static void cpm_i2c_force_close(struct i2c_adapter *adap)
179{
180 struct cpm_i2c *cpm = i2c_get_adapdata(adap);
181 struct i2c_reg __iomem *i2c_reg = cpm->i2c_reg;
182
183 dev_dbg(&adap->dev, "cpm_i2c_force_close()\n");
184
185 cpm_command(cpm->cp_command, CPM_CR_CLOSE_RX_BD);
186
187 out_8(&i2c_reg->i2cmr, 0x00); /* Disable all interrupts */
188 out_8(&i2c_reg->i2cer, 0xff);
189}
190
191static void cpm_i2c_parse_message(struct i2c_adapter *adap,
192 struct i2c_msg *pmsg, int num, int tx, int rx)
193{
194 cbd_t __iomem *tbdf;
195 cbd_t __iomem *rbdf;
196 u_char addr;
197 u_char *tb;
198 u_char *rb;
199 struct cpm_i2c *cpm = i2c_get_adapdata(adap);
200
201 tbdf = cpm->tbase + tx;
202 rbdf = cpm->rbase + rx;
203
204 addr = pmsg->addr << 1;
205 if (pmsg->flags & I2C_M_RD)
206 addr |= 1;
207
208 tb = cpm->txbuf[tx];
209 rb = cpm->rxbuf[rx];
210
211 /* Align read buffer */
212 rb = (u_char *) (((ulong) rb + 1) & ~1);
213
214 tb[0] = addr; /* Device address byte w/rw flag */
215
216 out_be16(&tbdf->cbd_datlen, pmsg->len + 1);
217 out_be16(&tbdf->cbd_sc, 0);
218
219 if (!(pmsg->flags & I2C_M_NOSTART))
220 setbits16(&tbdf->cbd_sc, BD_I2C_START);
221
222 if (tx + 1 == num)
223 setbits16(&tbdf->cbd_sc, BD_SC_LAST | BD_SC_WRAP);
224
225 if (pmsg->flags & I2C_M_RD) {
226 /*
227 * To read, we need an empty buffer of the proper length.
228 * All that is used is the first byte for address, the remainder
229 * is just used for timing (and doesn't really have to exist).
230 */
231
232 dev_dbg(&adap->dev, "cpm_i2c_read(abyte=0x%x)\n", addr);
233
234 out_be16(&rbdf->cbd_datlen, 0);
235 out_be16(&rbdf->cbd_sc, BD_SC_EMPTY | BD_SC_INTRPT);
236
237 if (rx + 1 == CPM_MAXBD)
238 setbits16(&rbdf->cbd_sc, BD_SC_WRAP);
239
240 eieio();
241 setbits16(&tbdf->cbd_sc, BD_SC_READY);
242 } else {
243 dev_dbg(&adap->dev, "cpm_i2c_write(abyte=0x%x)\n", addr);
244
245 memcpy(tb+1, pmsg->buf, pmsg->len);
246
247 eieio();
248 setbits16(&tbdf->cbd_sc, BD_SC_READY | BD_SC_INTRPT);
249 }
250}
251
252static int cpm_i2c_check_message(struct i2c_adapter *adap,
253 struct i2c_msg *pmsg, int tx, int rx)
254{
255 cbd_t __iomem *tbdf;
256 cbd_t __iomem *rbdf;
257 u_char *tb;
258 u_char *rb;
259 struct cpm_i2c *cpm = i2c_get_adapdata(adap);
260
261 tbdf = cpm->tbase + tx;
262 rbdf = cpm->rbase + rx;
263
264 tb = cpm->txbuf[tx];
265 rb = cpm->rxbuf[rx];
266
267 /* Align read buffer */
268 rb = (u_char *) (((uint) rb + 1) & ~1);
269
270 eieio();
271 if (pmsg->flags & I2C_M_RD) {
272 dev_dbg(&adap->dev, "tx sc 0x%04x, rx sc 0x%04x\n",
273 in_be16(&tbdf->cbd_sc), in_be16(&rbdf->cbd_sc));
274
275 if (in_be16(&tbdf->cbd_sc) & BD_SC_NAK) {
276 dev_dbg(&adap->dev, "I2C read; No ack\n");
277 return -ENXIO;
278 }
279 if (in_be16(&rbdf->cbd_sc) & BD_SC_EMPTY) {
280 dev_err(&adap->dev,
281 "I2C read; complete but rbuf empty\n");
282 return -EREMOTEIO;
283 }
284 if (in_be16(&rbdf->cbd_sc) & BD_SC_OV) {
285 dev_err(&adap->dev, "I2C read; Overrun\n");
286 return -EREMOTEIO;
287 }
288 memcpy(pmsg->buf, rb, pmsg->len);
289 } else {
290 dev_dbg(&adap->dev, "tx sc %d 0x%04x\n", tx,
291 in_be16(&tbdf->cbd_sc));
292
293 if (in_be16(&tbdf->cbd_sc) & BD_SC_NAK) {
294 dev_dbg(&adap->dev, "I2C write; No ack\n");
295 return -ENXIO;
296 }
297 if (in_be16(&tbdf->cbd_sc) & BD_SC_UN) {
298 dev_err(&adap->dev, "I2C write; Underrun\n");
299 return -EIO;
300 }
301 if (in_be16(&tbdf->cbd_sc) & BD_SC_CL) {
302 dev_err(&adap->dev, "I2C write; Collision\n");
303 return -EIO;
304 }
305 }
306 return 0;
307}
308
309static int cpm_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
310{
311 struct cpm_i2c *cpm = i2c_get_adapdata(adap);
312 struct i2c_reg __iomem *i2c_reg = cpm->i2c_reg;
313 struct i2c_ram __iomem *i2c_ram = cpm->i2c_ram;
314 struct i2c_msg *pmsg;
315 int ret, i;
316 int tptr;
317 int rptr;
318 cbd_t __iomem *tbdf;
319 cbd_t __iomem *rbdf;
320
321 if (num > CPM_MAXBD)
322 return -EINVAL;
323
324 /* Check if we have any oversized READ requests */
325 for (i = 0; i < num; i++) {
326 pmsg = &msgs[i];
327 if (pmsg->len >= CPM_MAX_READ)
328 return -EINVAL;
329 }
330
331 /* Reset to use first buffer */
332 out_be16(&i2c_ram->rbptr, in_be16(&i2c_ram->rbase));
333 out_be16(&i2c_ram->tbptr, in_be16(&i2c_ram->tbase));
334
335 tbdf = cpm->tbase;
336 rbdf = cpm->rbase;
337
338 tptr = 0;
339 rptr = 0;
340
341 while (tptr < num) {
342 pmsg = &msgs[tptr];
343 dev_dbg(&adap->dev, "R: %d T: %d\n", rptr, tptr);
344
345 cpm_i2c_parse_message(adap, pmsg, num, tptr, rptr);
346 if (pmsg->flags & I2C_M_RD)
347 rptr++;
348 tptr++;
349 }
350 /* Start transfer now */
351 /* Enable RX/TX/Error interupts */
352 out_8(&i2c_reg->i2cmr, I2CER_TXE | I2CER_TXB | I2CER_RXB);
353 out_8(&i2c_reg->i2cer, 0xff); /* Clear interrupt status */
354 /* Chip bug, set enable here */
355 setbits8(&i2c_reg->i2mod, I2MOD_EN); /* Enable */
356 /* Begin transmission */
357 setbits8(&i2c_reg->i2com, I2COM_START);
358
359 tptr = 0;
360 rptr = 0;
361
362 while (tptr < num) {
363 /* Check for outstanding messages */
364 dev_dbg(&adap->dev, "test ready.\n");
365 pmsg = &msgs[tptr];
366 if (pmsg->flags & I2C_M_RD)
367 ret = wait_event_interruptible_timeout(cpm->i2c_wait,
368 !(in_be16(&rbdf[rptr].cbd_sc) & BD_SC_EMPTY),
369 1 * HZ);
370 else
371 ret = wait_event_interruptible_timeout(cpm->i2c_wait,
372 !(in_be16(&tbdf[tptr].cbd_sc) & BD_SC_READY),
373 1 * HZ);
374 if (ret == 0) {
375 ret = -EREMOTEIO;
376 dev_err(&adap->dev, "I2C transfer: timeout\n");
377 goto out_err;
378 }
379 if (ret > 0) {
380 dev_dbg(&adap->dev, "ready.\n");
381 ret = cpm_i2c_check_message(adap, pmsg, tptr, rptr);
382 tptr++;
383 if (pmsg->flags & I2C_M_RD)
384 rptr++;
385 if (ret)
386 goto out_err;
387 }
388 }
389#ifdef I2C_CHIP_ERRATA
390 /*
391 * Chip errata, clear enable. This is not needed on rev D4 CPUs.
392 * Disabling I2C too early may cause too short stop condition
393 */
394 udelay(4);
395 clrbits8(&i2c_reg->i2mod, I2MOD_EN);
396#endif
397 return (num);
398
399out_err:
400 cpm_i2c_force_close(adap);
401#ifdef I2C_CHIP_ERRATA
402 /*
403 * Chip errata, clear enable. This is not needed on rev D4 CPUs.
404 */
405 clrbits8(&i2c_reg->i2mod, I2MOD_EN);
406#endif
407 return ret;
408}
409
410static u32 cpm_i2c_func(struct i2c_adapter *adap)
411{
412 return I2C_FUNC_I2C | (I2C_FUNC_SMBUS_EMUL & ~I2C_FUNC_SMBUS_QUICK);
413}
414
415/* -----exported algorithm data: ------------------------------------- */
416
417static const struct i2c_algorithm cpm_i2c_algo = {
418 .master_xfer = cpm_i2c_xfer,
419 .functionality = cpm_i2c_func,
420};
421
422static const struct i2c_adapter cpm_ops = {
423 .owner = THIS_MODULE,
424 .name = "i2c-cpm",
425 .algo = &cpm_i2c_algo,
426 .class = I2C_CLASS_HWMON | I2C_CLASS_SPD,
427};
428
429static int __devinit cpm_i2c_setup(struct cpm_i2c *cpm)
430{
431 struct of_device *ofdev = cpm->ofdev;
432 const u32 *data;
433 int len, ret, i;
434 void __iomem *i2c_base;
435 cbd_t __iomem *tbdf;
436 cbd_t __iomem *rbdf;
437 unsigned char brg;
438
439 dev_dbg(&cpm->ofdev->dev, "cpm_i2c_setup()\n");
440
441 init_waitqueue_head(&cpm->i2c_wait);
442
443 cpm->irq = of_irq_to_resource(ofdev->node, 0, NULL);
444 if (cpm->irq == NO_IRQ)
445 return -EINVAL;
446
447 /* Install interrupt handler. */
448 ret = request_irq(cpm->irq, cpm_i2c_interrupt, 0, "cpm_i2c",
449 &cpm->adap);
450 if (ret)
451 return ret;
452
453 /* I2C parameter RAM */
454 i2c_base = of_iomap(ofdev->node, 1);
455 if (i2c_base == NULL) {
456 ret = -EINVAL;
457 goto out_irq;
458 }
459
460 if (of_device_is_compatible(ofdev->node, "fsl,cpm1-i2c")) {
461
462 /* Check for and use a microcode relocation patch. */
463 cpm->i2c_ram = i2c_base;
464 cpm->i2c_addr = in_be16(&cpm->i2c_ram->rpbase);
465
466 /*
467 * Maybe should use cpm_muram_alloc instead of hardcoding
468 * this in micropatch.c
469 */
470 if (cpm->i2c_addr) {
471 cpm->i2c_ram = cpm_muram_addr(cpm->i2c_addr);
472 iounmap(i2c_base);
473 }
474
475 cpm->version = 1;
476
477 } else if (of_device_is_compatible(ofdev->node, "fsl,cpm2-i2c")) {
478 cpm->i2c_addr = cpm_muram_alloc(sizeof(struct i2c_ram), 64);
479 cpm->i2c_ram = cpm_muram_addr(cpm->i2c_addr);
480 out_be16(i2c_base, cpm->i2c_addr);
481 iounmap(i2c_base);
482
483 cpm->version = 2;
484
485 } else {
486 iounmap(i2c_base);
487 ret = -EINVAL;
488 goto out_irq;
489 }
490
491 /* I2C control/status registers */
492 cpm->i2c_reg = of_iomap(ofdev->node, 0);
493 if (cpm->i2c_reg == NULL) {
494 ret = -EINVAL;
495 goto out_ram;
496 }
497
498 data = of_get_property(ofdev->node, "fsl,cpm-command", &len);
499 if (!data || len != 4) {
500 ret = -EINVAL;
501 goto out_reg;
502 }
503 cpm->cp_command = *data;
504
505 data = of_get_property(ofdev->node, "linux,i2c-class", &len);
506 if (data && len == 4)
507 cpm->adap.class = *data;
508
509 data = of_get_property(ofdev->node, "clock-frequency", &len);
510 if (data && len == 4)
511 cpm->freq = *data;
512 else
513 cpm->freq = 60000; /* use 60kHz i2c clock by default */
514
515 /*
516 * Allocate space for CPM_MAXBD transmit and receive buffer
517 * descriptors in the DP ram.
518 */
519 cpm->dp_addr = cpm_muram_alloc(sizeof(cbd_t) * 2 * CPM_MAXBD, 8);
520 if (!cpm->dp_addr) {
521 ret = -ENOMEM;
522 goto out_reg;
523 }
524
525 cpm->tbase = cpm_muram_addr(cpm->dp_addr);
526 cpm->rbase = cpm_muram_addr(cpm->dp_addr + sizeof(cbd_t) * CPM_MAXBD);
527
528 /* Allocate TX and RX buffers */
529
530 tbdf = cpm->tbase;
531 rbdf = cpm->rbase;
532
533 for (i = 0; i < CPM_MAXBD; i++) {
534 cpm->rxbuf[i] = dma_alloc_coherent(
535 NULL, CPM_MAX_READ + 1, &cpm->rxdma[i], GFP_KERNEL);
536 if (!cpm->rxbuf[i]) {
537 ret = -ENOMEM;
538 goto out_muram;
539 }
540 out_be32(&rbdf[i].cbd_bufaddr, ((cpm->rxdma[i] + 1) & ~1));
541
542 cpm->txbuf[i] = (unsigned char *)dma_alloc_coherent(
543 NULL, CPM_MAX_READ + 1, &cpm->txdma[i], GFP_KERNEL);
544 if (!cpm->txbuf[i]) {
545 ret = -ENOMEM;
546 goto out_muram;
547 }
548 out_be32(&tbdf[i].cbd_bufaddr, cpm->txdma[i]);
549 }
550
551 /* Initialize Tx/Rx parameters. */
552
553 cpm_reset_i2c_params(cpm);
554
555 dev_dbg(&cpm->ofdev->dev, "i2c_ram 0x%p, i2c_addr 0x%04x, freq %d\n",
556 cpm->i2c_ram, cpm->i2c_addr, cpm->freq);
557 dev_dbg(&cpm->ofdev->dev, "tbase 0x%04x, rbase 0x%04x\n",
558 (u8 __iomem *)cpm->tbase - DPRAM_BASE,
559 (u8 __iomem *)cpm->rbase - DPRAM_BASE);
560
561 cpm_command(cpm->cp_command, CPM_CR_INIT_TRX);
562
563 /*
564 * Select an invalid address. Just make sure we don't use loopback mode
565 */
566 out_8(&cpm->i2c_reg->i2add, 0x7f << 1);
567
568 /*
569 * PDIV is set to 00 in i2mod, so brgclk/32 is used as input to the
570 * i2c baud rate generator. This is divided by 2 x (DIV + 3) to get
571 * the actual i2c bus frequency.
572 */
573 brg = get_brgfreq() / (32 * 2 * cpm->freq) - 3;
574 out_8(&cpm->i2c_reg->i2brg, brg);
575
576 out_8(&cpm->i2c_reg->i2mod, 0x00);
577 out_8(&cpm->i2c_reg->i2com, I2COM_MASTER); /* Master mode */
578
579 /* Disable interrupts. */
580 out_8(&cpm->i2c_reg->i2cmr, 0);
581 out_8(&cpm->i2c_reg->i2cer, 0xff);
582
583 return 0;
584
585out_muram:
586 for (i = 0; i < CPM_MAXBD; i++) {
587 if (cpm->rxbuf[i])
588 dma_free_coherent(NULL, CPM_MAX_READ + 1,
589 cpm->rxbuf[i], cpm->rxdma[i]);
590 if (cpm->txbuf[i])
591 dma_free_coherent(NULL, CPM_MAX_READ + 1,
592 cpm->txbuf[i], cpm->txdma[i]);
593 }
594 cpm_muram_free(cpm->dp_addr);
595out_reg:
596 iounmap(cpm->i2c_reg);
597out_ram:
598 if ((cpm->version == 1) && (!cpm->i2c_addr))
599 iounmap(cpm->i2c_ram);
600 if (cpm->version == 2)
601 cpm_muram_free(cpm->i2c_addr);
602out_irq:
603 free_irq(cpm->irq, &cpm->adap);
604 return ret;
605}
606
607static void cpm_i2c_shutdown(struct cpm_i2c *cpm)
608{
609 int i;
610
611 /* Shut down I2C. */
612 clrbits8(&cpm->i2c_reg->i2mod, I2MOD_EN);
613
614 /* Disable interrupts */
615 out_8(&cpm->i2c_reg->i2cmr, 0);
616 out_8(&cpm->i2c_reg->i2cer, 0xff);
617
618 free_irq(cpm->irq, &cpm->adap);
619
620 /* Free all memory */
621 for (i = 0; i < CPM_MAXBD; i++) {
622 dma_free_coherent(NULL, CPM_MAX_READ + 1,
623 cpm->rxbuf[i], cpm->rxdma[i]);
624 dma_free_coherent(NULL, CPM_MAX_READ + 1,
625 cpm->txbuf[i], cpm->txdma[i]);
626 }
627
628 cpm_muram_free(cpm->dp_addr);
629 iounmap(cpm->i2c_reg);
630
631 if ((cpm->version == 1) && (!cpm->i2c_addr))
632 iounmap(cpm->i2c_ram);
633 if (cpm->version == 2)
634 cpm_muram_free(cpm->i2c_addr);
635}
636
637static int __devinit cpm_i2c_probe(struct of_device *ofdev,
638 const struct of_device_id *match)
639{
640 int result, len;
641 struct cpm_i2c *cpm;
642 const u32 *data;
643
644 cpm = kzalloc(sizeof(struct cpm_i2c), GFP_KERNEL);
645 if (!cpm)
646 return -ENOMEM;
647
648 cpm->ofdev = ofdev;
649
650 dev_set_drvdata(&ofdev->dev, cpm);
651
652 cpm->adap = cpm_ops;
653 i2c_set_adapdata(&cpm->adap, cpm);
654 cpm->adap.dev.parent = &ofdev->dev;
655
656 result = cpm_i2c_setup(cpm);
657 if (result) {
658 dev_err(&ofdev->dev, "Unable to init hardware\n");
659 goto out_free;
660 }
661
662 /* register new adapter to i2c module... */
663
664 data = of_get_property(ofdev->node, "linux,i2c-index", &len);
665 if (data && len == 4) {
666 cpm->adap.nr = *data;
667 result = i2c_add_numbered_adapter(&cpm->adap);
668 } else
669 result = i2c_add_adapter(&cpm->adap);
670
671 if (result < 0) {
672 dev_err(&ofdev->dev, "Unable to register with I2C\n");
673 goto out_shut;
674 }
675
676 dev_dbg(&ofdev->dev, "hw routines for %s registered.\n",
677 cpm->adap.name);
678
679 /*
680 * register OF I2C devices
681 */
682 of_register_i2c_devices(&cpm->adap, ofdev->node);
683
684 return 0;
685out_shut:
686 cpm_i2c_shutdown(cpm);
687out_free:
688 dev_set_drvdata(&ofdev->dev, NULL);
689 kfree(cpm);
690
691 return result;
692}
693
694static int __devexit cpm_i2c_remove(struct of_device *ofdev)
695{
696 struct cpm_i2c *cpm = dev_get_drvdata(&ofdev->dev);
697
698 i2c_del_adapter(&cpm->adap);
699
700 cpm_i2c_shutdown(cpm);
701
702 dev_set_drvdata(&ofdev->dev, NULL);
703 kfree(cpm);
704
705 return 0;
706}
707
708static const struct of_device_id cpm_i2c_match[] = {
709 {
710 .compatible = "fsl,cpm1-i2c",
711 },
712 {
713 .compatible = "fsl,cpm2-i2c",
714 },
715 {},
716};
717
718MODULE_DEVICE_TABLE(of, cpm_i2c_match);
719
720static struct of_platform_driver cpm_i2c_driver = {
721 .match_table = cpm_i2c_match,
722 .probe = cpm_i2c_probe,
723 .remove = __devexit_p(cpm_i2c_remove),
724 .driver = {
725 .name = "fsl-i2c-cpm",
726 .owner = THIS_MODULE,
727 }
728};
729
730static int __init cpm_i2c_init(void)
731{
732 return of_register_platform_driver(&cpm_i2c_driver);
733}
734
735static void __exit cpm_i2c_exit(void)
736{
737 of_unregister_platform_driver(&cpm_i2c_driver);
738}
739
740module_init(cpm_i2c_init);
741module_exit(cpm_i2c_exit);
742
743MODULE_AUTHOR("Jochen Friedrich <jochen@scram.de>");
744MODULE_DESCRIPTION("I2C-Bus adapter routines for CPM boards");
745MODULE_LICENSE("GPL");
diff --git a/drivers/i2c/busses/i2c-davinci.c b/drivers/i2c/busses/i2c-davinci.c
index 7ecbfc429b19..af3846eda985 100644
--- a/drivers/i2c/busses/i2c-davinci.c
+++ b/drivers/i2c/busses/i2c-davinci.c
@@ -85,6 +85,7 @@
85#define DAVINCI_I2C_MDR_MST (1 << 10) 85#define DAVINCI_I2C_MDR_MST (1 << 10)
86#define DAVINCI_I2C_MDR_TRX (1 << 9) 86#define DAVINCI_I2C_MDR_TRX (1 << 9)
87#define DAVINCI_I2C_MDR_XA (1 << 8) 87#define DAVINCI_I2C_MDR_XA (1 << 8)
88#define DAVINCI_I2C_MDR_RM (1 << 7)
88#define DAVINCI_I2C_MDR_IRS (1 << 5) 89#define DAVINCI_I2C_MDR_IRS (1 << 5)
89 90
90#define DAVINCI_I2C_IMR_AAS (1 << 6) 91#define DAVINCI_I2C_IMR_AAS (1 << 6)
@@ -112,6 +113,7 @@ struct davinci_i2c_dev {
112 u8 *buf; 113 u8 *buf;
113 size_t buf_len; 114 size_t buf_len;
114 int irq; 115 int irq;
116 u8 terminate;
115 struct i2c_adapter adapter; 117 struct i2c_adapter adapter;
116}; 118};
117 119
@@ -142,6 +144,7 @@ static int i2c_davinci_init(struct davinci_i2c_dev *dev)
142 struct davinci_i2c_platform_data *pdata = dev->dev->platform_data; 144 struct davinci_i2c_platform_data *pdata = dev->dev->platform_data;
143 u16 psc; 145 u16 psc;
144 u32 clk; 146 u32 clk;
147 u32 d;
145 u32 clkh; 148 u32 clkh;
146 u32 clkl; 149 u32 clkl;
147 u32 input_clock = clk_get_rate(dev->clk); 150 u32 input_clock = clk_get_rate(dev->clk);
@@ -171,23 +174,29 @@ static int i2c_davinci_init(struct davinci_i2c_dev *dev)
171 * if PSC > 1 , d = 5 174 * if PSC > 1 , d = 5
172 */ 175 */
173 176
174 psc = 26; /* To get 1MHz clock */ 177 /* get minimum of 7 MHz clock, but max of 12 MHz */
178 psc = (input_clock / 7000000) - 1;
179 if ((input_clock / (psc + 1)) > 12000000)
180 psc++; /* better to run under spec than over */
181 d = (psc >= 2) ? 5 : 7 - psc;
175 182
176 clk = ((input_clock / (psc + 1)) / (pdata->bus_freq * 1000)) - 10; 183 clk = ((input_clock / (psc + 1)) / (pdata->bus_freq * 1000)) - (d << 1);
177 clkh = (50 * clk) / 100; 184 clkh = clk >> 1;
178 clkl = clk - clkh; 185 clkl = clk - clkh;
179 186
180 davinci_i2c_write_reg(dev, DAVINCI_I2C_PSC_REG, psc); 187 davinci_i2c_write_reg(dev, DAVINCI_I2C_PSC_REG, psc);
181 davinci_i2c_write_reg(dev, DAVINCI_I2C_CLKH_REG, clkh); 188 davinci_i2c_write_reg(dev, DAVINCI_I2C_CLKH_REG, clkh);
182 davinci_i2c_write_reg(dev, DAVINCI_I2C_CLKL_REG, clkl); 189 davinci_i2c_write_reg(dev, DAVINCI_I2C_CLKL_REG, clkl);
183 190
184 dev_dbg(dev->dev, "CLK = %d\n", clk); 191 dev_dbg(dev->dev, "input_clock = %d, CLK = %d\n", input_clock, clk);
185 dev_dbg(dev->dev, "PSC = %d\n", 192 dev_dbg(dev->dev, "PSC = %d\n",
186 davinci_i2c_read_reg(dev, DAVINCI_I2C_PSC_REG)); 193 davinci_i2c_read_reg(dev, DAVINCI_I2C_PSC_REG));
187 dev_dbg(dev->dev, "CLKL = %d\n", 194 dev_dbg(dev->dev, "CLKL = %d\n",
188 davinci_i2c_read_reg(dev, DAVINCI_I2C_CLKL_REG)); 195 davinci_i2c_read_reg(dev, DAVINCI_I2C_CLKL_REG));
189 dev_dbg(dev->dev, "CLKH = %d\n", 196 dev_dbg(dev->dev, "CLKH = %d\n",
190 davinci_i2c_read_reg(dev, DAVINCI_I2C_CLKH_REG)); 197 davinci_i2c_read_reg(dev, DAVINCI_I2C_CLKH_REG));
198 dev_dbg(dev->dev, "bus_freq = %dkHz, bus_delay = %d\n",
199 pdata->bus_freq, pdata->bus_delay);
191 200
192 /* Take the I2C module out of reset: */ 201 /* Take the I2C module out of reset: */
193 w = davinci_i2c_read_reg(dev, DAVINCI_I2C_MDR_REG); 202 w = davinci_i2c_read_reg(dev, DAVINCI_I2C_MDR_REG);
@@ -233,7 +242,6 @@ i2c_davinci_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg, int stop)
233 struct davinci_i2c_dev *dev = i2c_get_adapdata(adap); 242 struct davinci_i2c_dev *dev = i2c_get_adapdata(adap);
234 struct davinci_i2c_platform_data *pdata = dev->dev->platform_data; 243 struct davinci_i2c_platform_data *pdata = dev->dev->platform_data;
235 u32 flag; 244 u32 flag;
236 u32 stat;
237 u16 w; 245 u16 w;
238 int r; 246 int r;
239 247
@@ -254,12 +262,9 @@ i2c_davinci_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg, int stop)
254 262
255 davinci_i2c_write_reg(dev, DAVINCI_I2C_CNT_REG, dev->buf_len); 263 davinci_i2c_write_reg(dev, DAVINCI_I2C_CNT_REG, dev->buf_len);
256 264
257 init_completion(&dev->cmd_complete); 265 INIT_COMPLETION(dev->cmd_complete);
258 dev->cmd_err = 0; 266 dev->cmd_err = 0;
259 267
260 /* Clear any pending interrupts by reading the IVR */
261 stat = davinci_i2c_read_reg(dev, DAVINCI_I2C_IVR_REG);
262
263 /* Take I2C out of reset, configure it as master and set the 268 /* Take I2C out of reset, configure it as master and set the
264 * start bit */ 269 * start bit */
265 flag = DAVINCI_I2C_MDR_IRS | DAVINCI_I2C_MDR_MST | DAVINCI_I2C_MDR_STT; 270 flag = DAVINCI_I2C_MDR_IRS | DAVINCI_I2C_MDR_MST | DAVINCI_I2C_MDR_STT;
@@ -280,20 +285,34 @@ i2c_davinci_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg, int stop)
280 MOD_REG_BIT(w, DAVINCI_I2C_IMR_XRDY, 1); 285 MOD_REG_BIT(w, DAVINCI_I2C_IMR_XRDY, 1);
281 davinci_i2c_write_reg(dev, DAVINCI_I2C_IMR_REG, w); 286 davinci_i2c_write_reg(dev, DAVINCI_I2C_IMR_REG, w);
282 287
288 dev->terminate = 0;
283 /* write the data into mode register */ 289 /* write the data into mode register */
284 davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, flag); 290 davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, flag);
285 291
286 r = wait_for_completion_interruptible_timeout(&dev->cmd_complete, 292 r = wait_for_completion_interruptible_timeout(&dev->cmd_complete,
287 DAVINCI_I2C_TIMEOUT); 293 DAVINCI_I2C_TIMEOUT);
288 dev->buf_len = 0;
289 if (r < 0)
290 return r;
291
292 if (r == 0) { 294 if (r == 0) {
293 dev_err(dev->dev, "controller timed out\n"); 295 dev_err(dev->dev, "controller timed out\n");
294 i2c_davinci_init(dev); 296 i2c_davinci_init(dev);
297 dev->buf_len = 0;
295 return -ETIMEDOUT; 298 return -ETIMEDOUT;
296 } 299 }
300 if (dev->buf_len) {
301 /* This should be 0 if all bytes were transferred
302 * or dev->cmd_err denotes an error.
303 * A signal may have aborted the transfer.
304 */
305 if (r >= 0) {
306 dev_err(dev->dev, "abnormal termination buf_len=%i\n",
307 dev->buf_len);
308 r = -EREMOTEIO;
309 }
310 dev->terminate = 1;
311 wmb();
312 dev->buf_len = 0;
313 }
314 if (r < 0)
315 return r;
297 316
298 /* no error */ 317 /* no error */
299 if (likely(!dev->cmd_err)) 318 if (likely(!dev->cmd_err))
@@ -338,12 +357,11 @@ i2c_davinci_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
338 357
339 for (i = 0; i < num; i++) { 358 for (i = 0; i < num; i++) {
340 ret = i2c_davinci_xfer_msg(adap, &msgs[i], (i == (num - 1))); 359 ret = i2c_davinci_xfer_msg(adap, &msgs[i], (i == (num - 1)));
360 dev_dbg(dev->dev, "%s [%d/%d] ret: %d\n", __func__, i + 1, num,
361 ret);
341 if (ret < 0) 362 if (ret < 0)
342 return ret; 363 return ret;
343 } 364 }
344
345 dev_dbg(dev->dev, "%s:%d ret: %d\n", __func__, __LINE__, ret);
346
347 return num; 365 return num;
348} 366}
349 367
@@ -352,6 +370,27 @@ static u32 i2c_davinci_func(struct i2c_adapter *adap)
352 return I2C_FUNC_I2C | (I2C_FUNC_SMBUS_EMUL & ~I2C_FUNC_SMBUS_QUICK); 370 return I2C_FUNC_I2C | (I2C_FUNC_SMBUS_EMUL & ~I2C_FUNC_SMBUS_QUICK);
353} 371}
354 372
373static void terminate_read(struct davinci_i2c_dev *dev)
374{
375 u16 w = davinci_i2c_read_reg(dev, DAVINCI_I2C_MDR_REG);
376 w |= DAVINCI_I2C_MDR_NACK;
377 davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, w);
378
379 /* Throw away data */
380 davinci_i2c_read_reg(dev, DAVINCI_I2C_DRR_REG);
381 if (!dev->terminate)
382 dev_err(dev->dev, "RDR IRQ while no data requested\n");
383}
384static void terminate_write(struct davinci_i2c_dev *dev)
385{
386 u16 w = davinci_i2c_read_reg(dev, DAVINCI_I2C_MDR_REG);
387 w |= DAVINCI_I2C_MDR_RM | DAVINCI_I2C_MDR_STP;
388 davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, w);
389
390 if (!dev->terminate)
391 dev_err(dev->dev, "TDR IRQ while no data to send\n");
392}
393
355/* 394/*
356 * Interrupt service routine. This gets called whenever an I2C interrupt 395 * Interrupt service routine. This gets called whenever an I2C interrupt
357 * occurs. 396 * occurs.
@@ -372,12 +411,15 @@ static irqreturn_t i2c_davinci_isr(int this_irq, void *dev_id)
372 411
373 switch (stat) { 412 switch (stat) {
374 case DAVINCI_I2C_IVR_AL: 413 case DAVINCI_I2C_IVR_AL:
414 /* Arbitration lost, must retry */
375 dev->cmd_err |= DAVINCI_I2C_STR_AL; 415 dev->cmd_err |= DAVINCI_I2C_STR_AL;
416 dev->buf_len = 0;
376 complete(&dev->cmd_complete); 417 complete(&dev->cmd_complete);
377 break; 418 break;
378 419
379 case DAVINCI_I2C_IVR_NACK: 420 case DAVINCI_I2C_IVR_NACK:
380 dev->cmd_err |= DAVINCI_I2C_STR_NACK; 421 dev->cmd_err |= DAVINCI_I2C_STR_NACK;
422 dev->buf_len = 0;
381 complete(&dev->cmd_complete); 423 complete(&dev->cmd_complete);
382 break; 424 break;
383 425
@@ -399,9 +441,10 @@ static irqreturn_t i2c_davinci_isr(int this_irq, void *dev_id)
399 davinci_i2c_write_reg(dev, 441 davinci_i2c_write_reg(dev,
400 DAVINCI_I2C_STR_REG, 442 DAVINCI_I2C_STR_REG,
401 DAVINCI_I2C_IMR_RRDY); 443 DAVINCI_I2C_IMR_RRDY);
402 } else 444 } else {
403 dev_err(dev->dev, "RDR IRQ while no " 445 /* signal can terminate transfer */
404 "data requested\n"); 446 terminate_read(dev);
447 }
405 break; 448 break;
406 449
407 case DAVINCI_I2C_IVR_XRDY: 450 case DAVINCI_I2C_IVR_XRDY:
@@ -418,9 +461,10 @@ static irqreturn_t i2c_davinci_isr(int this_irq, void *dev_id)
418 davinci_i2c_write_reg(dev, 461 davinci_i2c_write_reg(dev,
419 DAVINCI_I2C_IMR_REG, 462 DAVINCI_I2C_IMR_REG,
420 w); 463 w);
421 } else 464 } else {
422 dev_err(dev->dev, "TDR IRQ while no data to " 465 /* signal can terminate transfer */
423 "send\n"); 466 terminate_write(dev);
467 }
424 break; 468 break;
425 469
426 case DAVINCI_I2C_IVR_SCD: 470 case DAVINCI_I2C_IVR_SCD:
@@ -475,6 +519,7 @@ static int davinci_i2c_probe(struct platform_device *pdev)
475 goto err_release_region; 519 goto err_release_region;
476 } 520 }
477 521
522 init_completion(&dev->cmd_complete);
478 dev->dev = get_device(&pdev->dev); 523 dev->dev = get_device(&pdev->dev);
479 dev->irq = irq->start; 524 dev->irq = irq->start;
480 platform_set_drvdata(pdev, dev); 525 platform_set_drvdata(pdev, dev);
diff --git a/drivers/i2c/busses/i2c-elektor.c b/drivers/i2c/busses/i2c-elektor.c
index b7a9977b025f..7f38c01fb3a0 100644
--- a/drivers/i2c/busses/i2c-elektor.c
+++ b/drivers/i2c/busses/i2c-elektor.c
@@ -196,13 +196,11 @@ static struct i2c_algo_pcf_data pcf_isa_data = {
196 .getown = pcf_isa_getown, 196 .getown = pcf_isa_getown,
197 .getclock = pcf_isa_getclock, 197 .getclock = pcf_isa_getclock,
198 .waitforpin = pcf_isa_waitforpin, 198 .waitforpin = pcf_isa_waitforpin,
199 .udelay = 10,
200 .timeout = 100,
201}; 199};
202 200
203static struct i2c_adapter pcf_isa_ops = { 201static struct i2c_adapter pcf_isa_ops = {
204 .owner = THIS_MODULE, 202 .owner = THIS_MODULE,
205 .class = I2C_CLASS_HWMON, 203 .class = I2C_CLASS_HWMON | I2C_CLASS_SPD,
206 .id = I2C_HW_P_ELEK, 204 .id = I2C_HW_P_ELEK,
207 .algo_data = &pcf_isa_data, 205 .algo_data = &pcf_isa_data,
208 .name = "i2c-elektor", 206 .name = "i2c-elektor",
diff --git a/drivers/i2c/busses/i2c-gpio.c b/drivers/i2c/busses/i2c-gpio.c
index 7c1b762aa681..79b455a1f090 100644
--- a/drivers/i2c/busses/i2c-gpio.c
+++ b/drivers/i2c/busses/i2c-gpio.c
@@ -140,7 +140,7 @@ static int __init i2c_gpio_probe(struct platform_device *pdev)
140 adap->owner = THIS_MODULE; 140 adap->owner = THIS_MODULE;
141 snprintf(adap->name, sizeof(adap->name), "i2c-gpio%d", pdev->id); 141 snprintf(adap->name, sizeof(adap->name), "i2c-gpio%d", pdev->id);
142 adap->algo_data = bit_data; 142 adap->algo_data = bit_data;
143 adap->class = I2C_CLASS_HWMON; 143 adap->class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
144 adap->dev.parent = &pdev->dev; 144 adap->dev.parent = &pdev->dev;
145 145
146 /* 146 /*
diff --git a/drivers/i2c/busses/i2c-hydra.c b/drivers/i2c/busses/i2c-hydra.c
index f9972f9651e4..1098f21ace13 100644
--- a/drivers/i2c/busses/i2c-hydra.c
+++ b/drivers/i2c/busses/i2c-hydra.c
@@ -1,7 +1,4 @@
1/* 1/*
2 i2c-hydra.c - Part of lm_sensors, Linux kernel modules
3 for hardware monitoring
4
5 i2c Support for the Apple `Hydra' Mac I/O 2 i2c Support for the Apple `Hydra' Mac I/O
6 3
7 Copyright (c) 1999-2004 Geert Uytterhoeven <geert@linux-m68k.org> 4 Copyright (c) 1999-2004 Geert Uytterhoeven <geert@linux-m68k.org>
diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c
index b0f771fe4326..dc7ea32b69a8 100644
--- a/drivers/i2c/busses/i2c-i801.c
+++ b/drivers/i2c/busses/i2c-i801.c
@@ -1,10 +1,8 @@
1/* 1/*
2 i2c-i801.c - Part of lm_sensors, Linux kernel modules for hardware
3 monitoring
4 Copyright (c) 1998 - 2002 Frodo Looijaard <frodol@dds.nl>, 2 Copyright (c) 1998 - 2002 Frodo Looijaard <frodol@dds.nl>,
5 Philip Edelbrock <phil@netroedge.com>, and Mark D. Studebaker 3 Philip Edelbrock <phil@netroedge.com>, and Mark D. Studebaker
6 <mdsxyz123@yahoo.com> 4 <mdsxyz123@yahoo.com>
7 Copyright (C) 2007 Jean Delvare <khali@linux-fr.org> 5 Copyright (C) 2007, 2008 Jean Delvare <khali@linux-fr.org>
8 6
9 This program is free software; you can redistribute it and/or modify 7 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by 8 it under the terms of the GNU General Public License as published by
@@ -64,6 +62,7 @@
64#include <linux/ioport.h> 62#include <linux/ioport.h>
65#include <linux/init.h> 63#include <linux/init.h>
66#include <linux/i2c.h> 64#include <linux/i2c.h>
65#include <linux/acpi.h>
67#include <asm/io.h> 66#include <asm/io.h>
68 67
69/* I801 SMBus address offsets */ 68/* I801 SMBus address offsets */
@@ -121,6 +120,10 @@
121#define SMBHSTSTS_INTR 0x02 120#define SMBHSTSTS_INTR 0x02
122#define SMBHSTSTS_HOST_BUSY 0x01 121#define SMBHSTSTS_HOST_BUSY 0x01
123 122
123#define STATUS_FLAGS (SMBHSTSTS_BYTE_DONE | SMBHSTSTS_FAILED | \
124 SMBHSTSTS_BUS_ERR | SMBHSTSTS_DEV_ERR | \
125 SMBHSTSTS_INTR)
126
124static unsigned long i801_smba; 127static unsigned long i801_smba;
125static unsigned char i801_original_hstcfg; 128static unsigned char i801_original_hstcfg;
126static struct pci_driver i801_driver; 129static struct pci_driver i801_driver;
@@ -132,105 +135,137 @@ static struct pci_dev *I801_dev;
132#define FEATURE_I2C_BLOCK_READ (1 << 3) 135#define FEATURE_I2C_BLOCK_READ (1 << 3)
133static unsigned int i801_features; 136static unsigned int i801_features;
134 137
135static int i801_transaction(int xact) 138/* Make sure the SMBus host is ready to start transmitting.
139 Return 0 if it is, -EBUSY if it is not. */
140static int i801_check_pre(void)
136{ 141{
137 int temp; 142 int status;
138 int result = 0;
139 int timeout = 0;
140 143
141 dev_dbg(&I801_dev->dev, "Transaction (pre): CNT=%02x, CMD=%02x, " 144 status = inb_p(SMBHSTSTS);
142 "ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb_p(SMBHSTCNT), 145 if (status & SMBHSTSTS_HOST_BUSY) {
143 inb_p(SMBHSTCMD), inb_p(SMBHSTADD), inb_p(SMBHSTDAT0), 146 dev_err(&I801_dev->dev, "SMBus is busy, can't use it!\n");
144 inb_p(SMBHSTDAT1)); 147 return -EBUSY;
145 148 }
146 /* Make sure the SMBus host is ready to start transmitting */ 149
147 /* 0x1f = Failed, Bus_Err, Dev_Err, Intr, Host_Busy */ 150 status &= STATUS_FLAGS;
148 if ((temp = (0x1f & inb_p(SMBHSTSTS))) != 0x00) { 151 if (status) {
149 dev_dbg(&I801_dev->dev, "SMBus busy (%02x). Resetting...\n", 152 dev_dbg(&I801_dev->dev, "Clearing status flags (%02x)\n",
150 temp); 153 status);
151 outb_p(temp, SMBHSTSTS); 154 outb_p(status, SMBHSTSTS);
152 if ((temp = (0x1f & inb_p(SMBHSTSTS))) != 0x00) { 155 status = inb_p(SMBHSTSTS) & STATUS_FLAGS;
153 dev_dbg(&I801_dev->dev, "Failed! (%02x)\n", temp); 156 if (status) {
154 return -1; 157 dev_err(&I801_dev->dev,
155 } else { 158 "Failed clearing status flags (%02x)\n",
156 dev_dbg(&I801_dev->dev, "Successful!\n"); 159 status);
160 return -EBUSY;
157 } 161 }
158 } 162 }
159 163
160 /* the current contents of SMBHSTCNT can be overwritten, since PEC, 164 return 0;
161 * INTREN, SMBSCMD are passed in xact */ 165}
162 outb_p(xact | I801_START, SMBHSTCNT);
163 166
164 /* We will always wait for a fraction of a second! */ 167/* Convert the status register to an error code, and clear it. */
165 do { 168static int i801_check_post(int status, int timeout)
166 msleep(1); 169{
167 temp = inb_p(SMBHSTSTS); 170 int result = 0;
168 } while ((temp & SMBHSTSTS_HOST_BUSY) && (timeout++ < MAX_TIMEOUT));
169 171
170 /* If the SMBus is still busy, we give up */ 172 /* If the SMBus is still busy, we give up */
171 if (timeout >= MAX_TIMEOUT) { 173 if (timeout) {
172 dev_dbg(&I801_dev->dev, "SMBus Timeout!\n"); 174 dev_err(&I801_dev->dev, "Transaction timeout\n");
173 result = -1;
174 /* try to stop the current command */ 175 /* try to stop the current command */
175 dev_dbg(&I801_dev->dev, "Terminating the current operation\n"); 176 dev_dbg(&I801_dev->dev, "Terminating the current operation\n");
176 outb_p(inb_p(SMBHSTCNT) | SMBHSTCNT_KILL, SMBHSTCNT); 177 outb_p(inb_p(SMBHSTCNT) | SMBHSTCNT_KILL, SMBHSTCNT);
177 msleep(1); 178 msleep(1);
178 outb_p(inb_p(SMBHSTCNT) & (~SMBHSTCNT_KILL), SMBHSTCNT); 179 outb_p(inb_p(SMBHSTCNT) & (~SMBHSTCNT_KILL), SMBHSTCNT);
179 }
180 180
181 if (temp & SMBHSTSTS_FAILED) { 181 /* Check if it worked */
182 result = -1; 182 status = inb_p(SMBHSTSTS);
183 dev_dbg(&I801_dev->dev, "Error: Failed bus transaction\n"); 183 if ((status & SMBHSTSTS_HOST_BUSY) ||
184 !(status & SMBHSTSTS_FAILED))
185 dev_err(&I801_dev->dev,
186 "Failed terminating the transaction\n");
187 outb_p(STATUS_FLAGS, SMBHSTSTS);
188 return -ETIMEDOUT;
184 } 189 }
185 190
186 if (temp & SMBHSTSTS_BUS_ERR) { 191 if (status & SMBHSTSTS_FAILED) {
187 result = -1; 192 result = -EIO;
188 dev_err(&I801_dev->dev, "Bus collision! SMBus may be locked " 193 dev_err(&I801_dev->dev, "Transaction failed\n");
189 "until next hard reset. (sorry!)\n");
190 /* Clock stops and slave is stuck in mid-transmission */
191 } 194 }
192 195 if (status & SMBHSTSTS_DEV_ERR) {
193 if (temp & SMBHSTSTS_DEV_ERR) { 196 result = -ENXIO;
194 result = -1; 197 dev_dbg(&I801_dev->dev, "No response\n");
195 dev_dbg(&I801_dev->dev, "Error: no response!\n"); 198 }
199 if (status & SMBHSTSTS_BUS_ERR) {
200 result = -EAGAIN;
201 dev_dbg(&I801_dev->dev, "Lost arbitration\n");
196 } 202 }
197 203
198 if ((inb_p(SMBHSTSTS) & 0x1f) != 0x00) 204 if (result) {
199 outb_p(inb(SMBHSTSTS), SMBHSTSTS); 205 /* Clear error flags */
200 206 outb_p(status & STATUS_FLAGS, SMBHSTSTS);
201 if ((temp = (0x1f & inb_p(SMBHSTSTS))) != 0x00) { 207 status = inb_p(SMBHSTSTS) & STATUS_FLAGS;
202 dev_dbg(&I801_dev->dev, "Failed reset at end of transaction " 208 if (status) {
203 "(%02x)\n", temp); 209 dev_warn(&I801_dev->dev, "Failed clearing status "
210 "flags at end of transaction (%02x)\n",
211 status);
212 }
204 } 213 }
205 dev_dbg(&I801_dev->dev, "Transaction (post): CNT=%02x, CMD=%02x, " 214
206 "ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb_p(SMBHSTCNT),
207 inb_p(SMBHSTCMD), inb_p(SMBHSTADD), inb_p(SMBHSTDAT0),
208 inb_p(SMBHSTDAT1));
209 return result; 215 return result;
210} 216}
211 217
218static int i801_transaction(int xact)
219{
220 int status;
221 int result;
222 int timeout = 0;
223
224 result = i801_check_pre();
225 if (result < 0)
226 return result;
227
228 /* the current contents of SMBHSTCNT can be overwritten, since PEC,
229 * INTREN, SMBSCMD are passed in xact */
230 outb_p(xact | I801_START, SMBHSTCNT);
231
232 /* We will always wait for a fraction of a second! */
233 do {
234 msleep(1);
235 status = inb_p(SMBHSTSTS);
236 } while ((status & SMBHSTSTS_HOST_BUSY) && (timeout++ < MAX_TIMEOUT));
237
238 result = i801_check_post(status, timeout >= MAX_TIMEOUT);
239 if (result < 0)
240 return result;
241
242 outb_p(SMBHSTSTS_INTR, SMBHSTSTS);
243 return 0;
244}
245
212/* wait for INTR bit as advised by Intel */ 246/* wait for INTR bit as advised by Intel */
213static void i801_wait_hwpec(void) 247static void i801_wait_hwpec(void)
214{ 248{
215 int timeout = 0; 249 int timeout = 0;
216 int temp; 250 int status;
217 251
218 do { 252 do {
219 msleep(1); 253 msleep(1);
220 temp = inb_p(SMBHSTSTS); 254 status = inb_p(SMBHSTSTS);
221 } while ((!(temp & SMBHSTSTS_INTR)) 255 } while ((!(status & SMBHSTSTS_INTR))
222 && (timeout++ < MAX_TIMEOUT)); 256 && (timeout++ < MAX_TIMEOUT));
223 257
224 if (timeout >= MAX_TIMEOUT) { 258 if (timeout >= MAX_TIMEOUT) {
225 dev_dbg(&I801_dev->dev, "PEC Timeout!\n"); 259 dev_dbg(&I801_dev->dev, "PEC Timeout!\n");
226 } 260 }
227 outb_p(temp, SMBHSTSTS); 261 outb_p(status, SMBHSTSTS);
228} 262}
229 263
230static int i801_block_transaction_by_block(union i2c_smbus_data *data, 264static int i801_block_transaction_by_block(union i2c_smbus_data *data,
231 char read_write, int hwpec) 265 char read_write, int hwpec)
232{ 266{
233 int i, len; 267 int i, len;
268 int status;
234 269
235 inb_p(SMBHSTCNT); /* reset the data buffer index */ 270 inb_p(SMBHSTCNT); /* reset the data buffer index */
236 271
@@ -242,14 +277,15 @@ static int i801_block_transaction_by_block(union i2c_smbus_data *data,
242 outb_p(data->block[i+1], SMBBLKDAT); 277 outb_p(data->block[i+1], SMBBLKDAT);
243 } 278 }
244 279
245 if (i801_transaction(I801_BLOCK_DATA | ENABLE_INT9 | 280 status = i801_transaction(I801_BLOCK_DATA | ENABLE_INT9 |
246 I801_PEC_EN * hwpec)) 281 I801_PEC_EN * hwpec);
247 return -1; 282 if (status)
283 return status;
248 284
249 if (read_write == I2C_SMBUS_READ) { 285 if (read_write == I2C_SMBUS_READ) {
250 len = inb_p(SMBHSTDAT0); 286 len = inb_p(SMBHSTDAT0);
251 if (len < 1 || len > I2C_SMBUS_BLOCK_MAX) 287 if (len < 1 || len > I2C_SMBUS_BLOCK_MAX)
252 return -1; 288 return -EPROTO;
253 289
254 data->block[0] = len; 290 data->block[0] = len;
255 for (i = 0; i < len; i++) 291 for (i = 0; i < len; i++)
@@ -264,10 +300,13 @@ static int i801_block_transaction_byte_by_byte(union i2c_smbus_data *data,
264{ 300{
265 int i, len; 301 int i, len;
266 int smbcmd; 302 int smbcmd;
267 int temp; 303 int status;
268 int result = 0; 304 int result;
269 int timeout; 305 int timeout;
270 unsigned char errmask; 306
307 result = i801_check_pre();
308 if (result < 0)
309 return result;
271 310
272 len = data->block[0]; 311 len = data->block[0];
273 312
@@ -291,36 +330,6 @@ static int i801_block_transaction_byte_by_byte(union i2c_smbus_data *data,
291 } 330 }
292 outb_p(smbcmd | ENABLE_INT9, SMBHSTCNT); 331 outb_p(smbcmd | ENABLE_INT9, SMBHSTCNT);
293 332
294 dev_dbg(&I801_dev->dev, "Block (pre %d): CNT=%02x, CMD=%02x, "
295 "ADD=%02x, DAT0=%02x, DAT1=%02x, BLKDAT=%02x\n", i,
296 inb_p(SMBHSTCNT), inb_p(SMBHSTCMD), inb_p(SMBHSTADD),
297 inb_p(SMBHSTDAT0), inb_p(SMBHSTDAT1), inb_p(SMBBLKDAT));
298
299 /* Make sure the SMBus host is ready to start transmitting */
300 temp = inb_p(SMBHSTSTS);
301 if (i == 1) {
302 /* Erroneous conditions before transaction:
303 * Byte_Done, Failed, Bus_Err, Dev_Err, Intr, Host_Busy */
304 errmask = 0x9f;
305 } else {
306 /* Erroneous conditions during transaction:
307 * Failed, Bus_Err, Dev_Err, Intr */
308 errmask = 0x1e;
309 }
310 if (temp & errmask) {
311 dev_dbg(&I801_dev->dev, "SMBus busy (%02x). "
312 "Resetting...\n", temp);
313 outb_p(temp, SMBHSTSTS);
314 if (((temp = inb_p(SMBHSTSTS)) & errmask) != 0x00) {
315 dev_err(&I801_dev->dev,
316 "Reset failed! (%02x)\n", temp);
317 return -1;
318 }
319 if (i != 1)
320 /* if die in middle of block transaction, fail */
321 return -1;
322 }
323
324 if (i == 1) 333 if (i == 1)
325 outb_p(inb(SMBHSTCNT) | I801_START, SMBHSTCNT); 334 outb_p(inb(SMBHSTCNT) | I801_START, SMBHSTCNT);
326 335
@@ -328,41 +337,28 @@ static int i801_block_transaction_byte_by_byte(union i2c_smbus_data *data,
328 timeout = 0; 337 timeout = 0;
329 do { 338 do {
330 msleep(1); 339 msleep(1);
331 temp = inb_p(SMBHSTSTS); 340 status = inb_p(SMBHSTSTS);
332 } 341 }
333 while ((!(temp & SMBHSTSTS_BYTE_DONE)) 342 while ((!(status & SMBHSTSTS_BYTE_DONE))
334 && (timeout++ < MAX_TIMEOUT)); 343 && (timeout++ < MAX_TIMEOUT));
335 344
336 /* If the SMBus is still busy, we give up */ 345 result = i801_check_post(status, timeout >= MAX_TIMEOUT);
337 if (timeout >= MAX_TIMEOUT) { 346 if (result < 0)
338 /* try to stop the current command */ 347 return result;
339 dev_dbg(&I801_dev->dev, "Terminating the current "
340 "operation\n");
341 outb_p(inb_p(SMBHSTCNT) | SMBHSTCNT_KILL, SMBHSTCNT);
342 msleep(1);
343 outb_p(inb_p(SMBHSTCNT) & (~SMBHSTCNT_KILL),
344 SMBHSTCNT);
345 result = -1;
346 dev_dbg(&I801_dev->dev, "SMBus Timeout!\n");
347 }
348
349 if (temp & SMBHSTSTS_FAILED) {
350 result = -1;
351 dev_dbg(&I801_dev->dev,
352 "Error: Failed bus transaction\n");
353 } else if (temp & SMBHSTSTS_BUS_ERR) {
354 result = -1;
355 dev_err(&I801_dev->dev, "Bus collision!\n");
356 } else if (temp & SMBHSTSTS_DEV_ERR) {
357 result = -1;
358 dev_dbg(&I801_dev->dev, "Error: no response!\n");
359 }
360 348
361 if (i == 1 && read_write == I2C_SMBUS_READ 349 if (i == 1 && read_write == I2C_SMBUS_READ
362 && command != I2C_SMBUS_I2C_BLOCK_DATA) { 350 && command != I2C_SMBUS_I2C_BLOCK_DATA) {
363 len = inb_p(SMBHSTDAT0); 351 len = inb_p(SMBHSTDAT0);
364 if (len < 1 || len > I2C_SMBUS_BLOCK_MAX) 352 if (len < 1 || len > I2C_SMBUS_BLOCK_MAX) {
365 return -1; 353 dev_err(&I801_dev->dev,
354 "Illegal SMBus block read size %d\n",
355 len);
356 /* Recover */
357 while (inb_p(SMBHSTSTS) & SMBHSTSTS_HOST_BUSY)
358 outb_p(SMBHSTSTS_BYTE_DONE, SMBHSTSTS);
359 outb_p(SMBHSTSTS_INTR, SMBHSTSTS);
360 return -EPROTO;
361 }
366 data->block[0] = len; 362 data->block[0] = len;
367 } 363 }
368 364
@@ -371,30 +367,19 @@ static int i801_block_transaction_byte_by_byte(union i2c_smbus_data *data,
371 data->block[i] = inb_p(SMBBLKDAT); 367 data->block[i] = inb_p(SMBBLKDAT);
372 if (read_write == I2C_SMBUS_WRITE && i+1 <= len) 368 if (read_write == I2C_SMBUS_WRITE && i+1 <= len)
373 outb_p(data->block[i+1], SMBBLKDAT); 369 outb_p(data->block[i+1], SMBBLKDAT);
374 if ((temp & 0x9e) != 0x00)
375 outb_p(temp, SMBHSTSTS); /* signals SMBBLKDAT ready */
376
377 if ((temp = (0x1e & inb_p(SMBHSTSTS))) != 0x00) {
378 dev_dbg(&I801_dev->dev,
379 "Bad status (%02x) at end of transaction\n",
380 temp);
381 }
382 dev_dbg(&I801_dev->dev, "Block (post %d): CNT=%02x, CMD=%02x, "
383 "ADD=%02x, DAT0=%02x, DAT1=%02x, BLKDAT=%02x\n", i,
384 inb_p(SMBHSTCNT), inb_p(SMBHSTCMD), inb_p(SMBHSTADD),
385 inb_p(SMBHSTDAT0), inb_p(SMBHSTDAT1), inb_p(SMBBLKDAT));
386 370
387 if (result < 0) 371 /* signals SMBBLKDAT ready */
388 return result; 372 outb_p(SMBHSTSTS_BYTE_DONE | SMBHSTSTS_INTR, SMBHSTSTS);
389 } 373 }
390 return result; 374
375 return 0;
391} 376}
392 377
393static int i801_set_block_buffer_mode(void) 378static int i801_set_block_buffer_mode(void)
394{ 379{
395 outb_p(inb_p(SMBAUXCTL) | SMBAUXCTL_E32B, SMBAUXCTL); 380 outb_p(inb_p(SMBAUXCTL) | SMBAUXCTL_E32B, SMBAUXCTL);
396 if ((inb_p(SMBAUXCTL) & SMBAUXCTL_E32B) == 0) 381 if ((inb_p(SMBAUXCTL) & SMBAUXCTL_E32B) == 0)
397 return -1; 382 return -EIO;
398 return 0; 383 return 0;
399} 384}
400 385
@@ -414,7 +399,7 @@ static int i801_block_transaction(union i2c_smbus_data *data, char read_write,
414 } else if (!(i801_features & FEATURE_I2C_BLOCK_READ)) { 399 } else if (!(i801_features & FEATURE_I2C_BLOCK_READ)) {
415 dev_err(&I801_dev->dev, 400 dev_err(&I801_dev->dev,
416 "I2C block read is unsupported!\n"); 401 "I2C block read is unsupported!\n");
417 return -1; 402 return -EOPNOTSUPP;
418 } 403 }
419 } 404 }
420 405
@@ -449,7 +434,7 @@ static int i801_block_transaction(union i2c_smbus_data *data, char read_write,
449 return result; 434 return result;
450} 435}
451 436
452/* Return -1 on error. */ 437/* Return negative errno on error. */
453static s32 i801_access(struct i2c_adapter * adap, u16 addr, 438static s32 i801_access(struct i2c_adapter * adap, u16 addr,
454 unsigned short flags, char read_write, u8 command, 439 unsigned short flags, char read_write, u8 command,
455 int size, union i2c_smbus_data * data) 440 int size, union i2c_smbus_data * data)
@@ -511,10 +496,9 @@ static s32 i801_access(struct i2c_adapter * adap, u16 addr,
511 outb_p(command, SMBHSTCMD); 496 outb_p(command, SMBHSTCMD);
512 block = 1; 497 block = 1;
513 break; 498 break;
514 case I2C_SMBUS_PROC_CALL:
515 default: 499 default:
516 dev_err(&I801_dev->dev, "Unsupported transaction %d\n", size); 500 dev_err(&I801_dev->dev, "Unsupported transaction %d\n", size);
517 return -1; 501 return -EOPNOTSUPP;
518 } 502 }
519 503
520 if (hwpec) /* enable/disable hardware PEC */ 504 if (hwpec) /* enable/disable hardware PEC */
@@ -537,7 +521,7 @@ static s32 i801_access(struct i2c_adapter * adap, u16 addr,
537 if(block) 521 if(block)
538 return ret; 522 return ret;
539 if(ret) 523 if(ret)
540 return -1; 524 return ret;
541 if ((read_write == I2C_SMBUS_WRITE) || (xact == I801_QUICK)) 525 if ((read_write == I2C_SMBUS_WRITE) || (xact == I801_QUICK))
542 return 0; 526 return 0;
543 527
@@ -572,7 +556,7 @@ static const struct i2c_algorithm smbus_algorithm = {
572static struct i2c_adapter i801_adapter = { 556static struct i2c_adapter i801_adapter = {
573 .owner = THIS_MODULE, 557 .owner = THIS_MODULE,
574 .id = I2C_HW_SMBUS_I801, 558 .id = I2C_HW_SMBUS_I801,
575 .class = I2C_CLASS_HWMON, 559 .class = I2C_CLASS_HWMON | I2C_CLASS_SPD,
576 .algo = &smbus_algorithm, 560 .algo = &smbus_algorithm,
577}; 561};
578 562
@@ -639,6 +623,10 @@ static int __devinit i801_probe(struct pci_dev *dev, const struct pci_device_id
639 goto exit; 623 goto exit;
640 } 624 }
641 625
626 err = acpi_check_resource_conflict(&dev->resource[SMBBAR]);
627 if (err)
628 goto exit;
629
642 err = pci_request_region(dev, SMBBAR, i801_driver.name); 630 err = pci_request_region(dev, SMBBAR, i801_driver.name);
643 if (err) { 631 if (err) {
644 dev_err(&dev->dev, "Failed to request SMBus region " 632 dev_err(&dev->dev, "Failed to request SMBus region "
diff --git a/drivers/i2c/busses/i2c-i810.c b/drivers/i2c/busses/i2c-i810.c
deleted file mode 100644
index 42e8d94c276f..000000000000
--- a/drivers/i2c/busses/i2c-i810.c
+++ /dev/null
@@ -1,260 +0,0 @@
1/*
2 i2c-i810.c - Part of lm_sensors, Linux kernel modules for hardware
3 monitoring
4 Copyright (c) 1998, 1999, 2000 Frodo Looijaard <frodol@dds.nl>,
5 Philip Edelbrock <phil@netroedge.com>,
6 Ralph Metzler <rjkm@thp.uni-koeln.de>, and
7 Mark D. Studebaker <mdsxyz123@yahoo.com>
8
9 Based on code written by Ralph Metzler <rjkm@thp.uni-koeln.de> and
10 Simon Vogl
11
12 This program is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2 of the License, or
15 (at your option) any later version.
16
17 This program is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
21
22 You should have received a copy of the GNU General Public License
23 along with this program; if not, write to the Free Software
24 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25*/
26/*
27 This interfaces to the I810/I815 to provide access to
28 the DDC Bus and the I2C Bus.
29
30 SUPPORTED DEVICES PCI ID
31 i810AA 7121
32 i810AB 7123
33 i810E 7125
34 i815 1132
35 i845G 2562
36*/
37
38#include <linux/kernel.h>
39#include <linux/module.h>
40#include <linux/init.h>
41#include <linux/pci.h>
42#include <linux/i2c.h>
43#include <linux/i2c-algo-bit.h>
44#include <asm/io.h>
45
46/* GPIO register locations */
47#define I810_IOCONTROL_OFFSET 0x5000
48#define I810_HVSYNC 0x00 /* not used */
49#define I810_GPIOA 0x10
50#define I810_GPIOB 0x14
51
52/* bit locations in the registers */
53#define SCL_DIR_MASK 0x0001
54#define SCL_DIR 0x0002
55#define SCL_VAL_MASK 0x0004
56#define SCL_VAL_OUT 0x0008
57#define SCL_VAL_IN 0x0010
58#define SDA_DIR_MASK 0x0100
59#define SDA_DIR 0x0200
60#define SDA_VAL_MASK 0x0400
61#define SDA_VAL_OUT 0x0800
62#define SDA_VAL_IN 0x1000
63
64/* initialization states */
65#define INIT1 0x1
66#define INIT2 0x2
67#define INIT3 0x4
68
69/* delays */
70#define CYCLE_DELAY 10
71#define TIMEOUT (HZ / 2)
72
73static void __iomem *ioaddr;
74
75/* The i810 GPIO registers have individual masks for each bit
76 so we never have to read before writing. Nice. */
77
78static void bit_i810i2c_setscl(void *data, int val)
79{
80 writel((val ? SCL_VAL_OUT : 0) | SCL_DIR | SCL_DIR_MASK | SCL_VAL_MASK,
81 ioaddr + I810_GPIOB);
82 readl(ioaddr + I810_GPIOB); /* flush posted write */
83}
84
85static void bit_i810i2c_setsda(void *data, int val)
86{
87 writel((val ? SDA_VAL_OUT : 0) | SDA_DIR | SDA_DIR_MASK | SDA_VAL_MASK,
88 ioaddr + I810_GPIOB);
89 readl(ioaddr + I810_GPIOB); /* flush posted write */
90}
91
92/* The GPIO pins are open drain, so the pins could always remain outputs.
93 However, some chip versions don't latch the inputs unless they
94 are set as inputs.
95 We rely on the i2c-algo-bit routines to set the pins high before
96 reading the input from other chips. Following guidance in the 815
97 prog. ref. guide, we do a "dummy write" of 0 to the register before
98 reading which forces the input value to be latched. We presume this
99 applies to the 810 as well; shouldn't hurt anyway. This is necessary to get
100 i2c_algo_bit bit_test=1 to pass. */
101
102static int bit_i810i2c_getscl(void *data)
103{
104 writel(SCL_DIR_MASK, ioaddr + I810_GPIOB);
105 writel(0, ioaddr + I810_GPIOB);
106 return (0 != (readl(ioaddr + I810_GPIOB) & SCL_VAL_IN));
107}
108
109static int bit_i810i2c_getsda(void *data)
110{
111 writel(SDA_DIR_MASK, ioaddr + I810_GPIOB);
112 writel(0, ioaddr + I810_GPIOB);
113 return (0 != (readl(ioaddr + I810_GPIOB) & SDA_VAL_IN));
114}
115
116static void bit_i810ddc_setscl(void *data, int val)
117{
118 writel((val ? SCL_VAL_OUT : 0) | SCL_DIR | SCL_DIR_MASK | SCL_VAL_MASK,
119 ioaddr + I810_GPIOA);
120 readl(ioaddr + I810_GPIOA); /* flush posted write */
121}
122
123static void bit_i810ddc_setsda(void *data, int val)
124{
125 writel((val ? SDA_VAL_OUT : 0) | SDA_DIR | SDA_DIR_MASK | SDA_VAL_MASK,
126 ioaddr + I810_GPIOA);
127 readl(ioaddr + I810_GPIOA); /* flush posted write */
128}
129
130static int bit_i810ddc_getscl(void *data)
131{
132 writel(SCL_DIR_MASK, ioaddr + I810_GPIOA);
133 writel(0, ioaddr + I810_GPIOA);
134 return (0 != (readl(ioaddr + I810_GPIOA) & SCL_VAL_IN));
135}
136
137static int bit_i810ddc_getsda(void *data)
138{
139 writel(SDA_DIR_MASK, ioaddr + I810_GPIOA);
140 writel(0, ioaddr + I810_GPIOA);
141 return (0 != (readl(ioaddr + I810_GPIOA) & SDA_VAL_IN));
142}
143
144static int config_i810(struct pci_dev *dev)
145{
146 unsigned long cadr;
147
148 /* map I810 memory */
149 cadr = dev->resource[1].start;
150 cadr += I810_IOCONTROL_OFFSET;
151 cadr &= PCI_BASE_ADDRESS_MEM_MASK;
152 ioaddr = ioremap_nocache(cadr, 0x1000);
153 if (ioaddr) {
154 bit_i810i2c_setscl(NULL, 1);
155 bit_i810i2c_setsda(NULL, 1);
156 bit_i810ddc_setscl(NULL, 1);
157 bit_i810ddc_setsda(NULL, 1);
158 return 0;
159 }
160 return -ENODEV;
161}
162
163static struct i2c_algo_bit_data i810_i2c_bit_data = {
164 .setsda = bit_i810i2c_setsda,
165 .setscl = bit_i810i2c_setscl,
166 .getsda = bit_i810i2c_getsda,
167 .getscl = bit_i810i2c_getscl,
168 .udelay = CYCLE_DELAY,
169 .timeout = TIMEOUT,
170};
171
172static struct i2c_adapter i810_i2c_adapter = {
173 .owner = THIS_MODULE,
174 .id = I2C_HW_B_I810,
175 .name = "I810/I815 I2C Adapter",
176 .algo_data = &i810_i2c_bit_data,
177};
178
179static struct i2c_algo_bit_data i810_ddc_bit_data = {
180 .setsda = bit_i810ddc_setsda,
181 .setscl = bit_i810ddc_setscl,
182 .getsda = bit_i810ddc_getsda,
183 .getscl = bit_i810ddc_getscl,
184 .udelay = CYCLE_DELAY,
185 .timeout = TIMEOUT,
186};
187
188static struct i2c_adapter i810_ddc_adapter = {
189 .owner = THIS_MODULE,
190 .id = I2C_HW_B_I810,
191 .name = "I810/I815 DDC Adapter",
192 .algo_data = &i810_ddc_bit_data,
193};
194
195static struct pci_device_id i810_ids[] __devinitdata = {
196 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82810_IG1) },
197 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82810_IG3) },
198 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82810E_IG) },
199 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82815_CGC) },
200 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82845G_IG) },
201 { 0, },
202};
203
204MODULE_DEVICE_TABLE (pci, i810_ids);
205
206static int __devinit i810_probe(struct pci_dev *dev, const struct pci_device_id *id)
207{
208 int retval;
209
210 retval = config_i810(dev);
211 if (retval)
212 return retval;
213 dev_info(&dev->dev, "i810/i815 i2c device found.\n");
214
215 /* set up the sysfs linkage to our parent device */
216 i810_i2c_adapter.dev.parent = &dev->dev;
217 i810_ddc_adapter.dev.parent = &dev->dev;
218
219 retval = i2c_bit_add_bus(&i810_i2c_adapter);
220 if (retval)
221 return retval;
222 retval = i2c_bit_add_bus(&i810_ddc_adapter);
223 if (retval)
224 i2c_del_adapter(&i810_i2c_adapter);
225 return retval;
226}
227
228static void __devexit i810_remove(struct pci_dev *dev)
229{
230 i2c_del_adapter(&i810_ddc_adapter);
231 i2c_del_adapter(&i810_i2c_adapter);
232 iounmap(ioaddr);
233}
234
235static struct pci_driver i810_driver = {
236 .name = "i810_smbus",
237 .id_table = i810_ids,
238 .probe = i810_probe,
239 .remove = __devexit_p(i810_remove),
240};
241
242static int __init i2c_i810_init(void)
243{
244 return pci_register_driver(&i810_driver);
245}
246
247static void __exit i2c_i810_exit(void)
248{
249 pci_unregister_driver(&i810_driver);
250}
251
252MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
253 "Philip Edelbrock <phil@netroedge.com>, "
254 "Ralph Metzler <rjkm@thp.uni-koeln.de>, "
255 "and Mark D. Studebaker <mdsxyz123@yahoo.com>");
256MODULE_DESCRIPTION("I810/I815 I2C/DDC driver");
257MODULE_LICENSE("GPL");
258
259module_init(i2c_i810_init);
260module_exit(i2c_i810_exit);
diff --git a/drivers/i2c/busses/i2c-ibm_iic.c b/drivers/i2c/busses/i2c-ibm_iic.c
index 85dbf34382e1..651f2f1ae5b7 100644
--- a/drivers/i2c/busses/i2c-ibm_iic.c
+++ b/drivers/i2c/busses/i2c-ibm_iic.c
@@ -42,13 +42,8 @@
42#include <asm/io.h> 42#include <asm/io.h>
43#include <linux/i2c.h> 43#include <linux/i2c.h>
44#include <linux/i2c-id.h> 44#include <linux/i2c-id.h>
45
46#ifdef CONFIG_IBM_OCP
47#include <asm/ocp.h>
48#include <asm/ibm4xx.h>
49#else
50#include <linux/of_platform.h> 45#include <linux/of_platform.h>
51#endif 46#include <linux/of_i2c.h>
52 47
53#include "i2c-ibm_iic.h" 48#include "i2c-ibm_iic.h"
54 49
@@ -665,180 +660,6 @@ static inline u8 iic_clckdiv(unsigned int opb)
665 return (u8)((opb + 9) / 10 - 1); 660 return (u8)((opb + 9) / 10 - 1);
666} 661}
667 662
668#ifdef CONFIG_IBM_OCP
669/*
670 * Register single IIC interface
671 */
672static int __devinit iic_probe(struct ocp_device *ocp){
673
674 struct ibm_iic_private* dev;
675 struct i2c_adapter* adap;
676 struct ocp_func_iic_data* iic_data = ocp->def->additions;
677 int ret;
678
679 if (!iic_data)
680 printk(KERN_WARNING"ibm-iic%d: missing additional data!\n",
681 ocp->def->index);
682
683 if (!(dev = kzalloc(sizeof(*dev), GFP_KERNEL))) {
684 printk(KERN_ERR "ibm-iic%d: failed to allocate device data\n",
685 ocp->def->index);
686 return -ENOMEM;
687 }
688
689 dev->idx = ocp->def->index;
690 ocp_set_drvdata(ocp, dev);
691
692 if (!request_mem_region(ocp->def->paddr, sizeof(struct iic_regs),
693 "ibm_iic")) {
694 ret = -EBUSY;
695 goto fail1;
696 }
697
698 if (!(dev->vaddr = ioremap(ocp->def->paddr, sizeof(struct iic_regs)))){
699 printk(KERN_ERR "ibm-iic%d: failed to ioremap device registers\n",
700 dev->idx);
701 ret = -ENXIO;
702 goto fail2;
703 }
704
705 init_waitqueue_head(&dev->wq);
706
707 dev->irq = iic_force_poll ? -1 : ocp->def->irq;
708 if (dev->irq >= 0){
709 /* Disable interrupts until we finish initialization,
710 assumes level-sensitive IRQ setup...
711 */
712 iic_interrupt_mode(dev, 0);
713 if (request_irq(dev->irq, iic_handler, 0, "IBM IIC", dev)){
714 printk(KERN_ERR "ibm-iic%d: request_irq %d failed\n",
715 dev->idx, dev->irq);
716 /* Fallback to the polling mode */
717 dev->irq = -1;
718 }
719 }
720
721 if (dev->irq < 0)
722 printk(KERN_WARNING "ibm-iic%d: using polling mode\n",
723 dev->idx);
724
725 /* Board specific settings */
726 dev->fast_mode = iic_force_fast ? 1 : (iic_data ? iic_data->fast_mode : 0);
727
728 /* clckdiv is the same for *all* IIC interfaces,
729 * but I'd rather make a copy than introduce another global. --ebs
730 */
731 dev->clckdiv = iic_clckdiv(ocp_sys_info.opb_bus_freq);
732 DBG("%d: clckdiv = %d\n", dev->idx, dev->clckdiv);
733
734 /* Initialize IIC interface */
735 iic_dev_init(dev);
736
737 /* Register it with i2c layer */
738 adap = &dev->adap;
739 adap->dev.parent = &ocp->dev;
740 strcpy(adap->name, "IBM IIC");
741 i2c_set_adapdata(adap, dev);
742 adap->id = I2C_HW_OCP;
743 adap->class = I2C_CLASS_HWMON;
744 adap->algo = &iic_algo;
745 adap->client_register = NULL;
746 adap->client_unregister = NULL;
747 adap->timeout = 1;
748
749 /*
750 * If "dev->idx" is negative we consider it as zero.
751 * The reason to do so is to avoid sysfs names that only make
752 * sense when there are multiple adapters.
753 */
754 adap->nr = dev->idx >= 0 ? dev->idx : 0;
755
756 if ((ret = i2c_add_numbered_adapter(adap)) < 0) {
757 printk(KERN_ERR "ibm-iic%d: failed to register i2c adapter\n",
758 dev->idx);
759 goto fail;
760 }
761
762 printk(KERN_INFO "ibm-iic%d: using %s mode\n", dev->idx,
763 dev->fast_mode ? "fast (400 kHz)" : "standard (100 kHz)");
764
765 return 0;
766
767fail:
768 if (dev->irq >= 0){
769 iic_interrupt_mode(dev, 0);
770 free_irq(dev->irq, dev);
771 }
772
773 iounmap(dev->vaddr);
774fail2:
775 release_mem_region(ocp->def->paddr, sizeof(struct iic_regs));
776fail1:
777 ocp_set_drvdata(ocp, NULL);
778 kfree(dev);
779 return ret;
780}
781
782/*
783 * Cleanup initialized IIC interface
784 */
785static void __devexit iic_remove(struct ocp_device *ocp)
786{
787 struct ibm_iic_private* dev = (struct ibm_iic_private*)ocp_get_drvdata(ocp);
788 BUG_ON(dev == NULL);
789 if (i2c_del_adapter(&dev->adap)){
790 printk(KERN_ERR "ibm-iic%d: failed to delete i2c adapter :(\n",
791 dev->idx);
792 /* That's *very* bad, just shutdown IRQ ... */
793 if (dev->irq >= 0){
794 iic_interrupt_mode(dev, 0);
795 free_irq(dev->irq, dev);
796 dev->irq = -1;
797 }
798 } else {
799 if (dev->irq >= 0){
800 iic_interrupt_mode(dev, 0);
801 free_irq(dev->irq, dev);
802 }
803 iounmap(dev->vaddr);
804 release_mem_region(ocp->def->paddr, sizeof(struct iic_regs));
805 kfree(dev);
806 }
807}
808
809static struct ocp_device_id ibm_iic_ids[] __devinitdata =
810{
811 { .vendor = OCP_VENDOR_IBM, .function = OCP_FUNC_IIC },
812 { .vendor = OCP_VENDOR_INVALID }
813};
814
815MODULE_DEVICE_TABLE(ocp, ibm_iic_ids);
816
817static struct ocp_driver ibm_iic_driver =
818{
819 .name = "iic",
820 .id_table = ibm_iic_ids,
821 .probe = iic_probe,
822 .remove = __devexit_p(iic_remove),
823#if defined(CONFIG_PM)
824 .suspend = NULL,
825 .resume = NULL,
826#endif
827};
828
829static int __init iic_init(void)
830{
831 printk(KERN_INFO "IBM IIC driver v" DRIVER_VERSION "\n");
832 return ocp_register_driver(&ibm_iic_driver);
833}
834
835static void __exit iic_exit(void)
836{
837 ocp_unregister_driver(&ibm_iic_driver);
838}
839
840#else /* !CONFIG_IBM_OCP */
841
842static int __devinit iic_request_irq(struct of_device *ofdev, 663static int __devinit iic_request_irq(struct of_device *ofdev,
843 struct ibm_iic_private *dev) 664 struct ibm_iic_private *dev)
844{ 665{
@@ -876,7 +697,7 @@ static int __devinit iic_probe(struct of_device *ofdev,
876 struct device_node *np = ofdev->node; 697 struct device_node *np = ofdev->node;
877 struct ibm_iic_private *dev; 698 struct ibm_iic_private *dev;
878 struct i2c_adapter *adap; 699 struct i2c_adapter *adap;
879 const u32 *indexp, *freq; 700 const u32 *freq;
880 int ret; 701 int ret;
881 702
882 dev = kzalloc(sizeof(*dev), GFP_KERNEL); 703 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
@@ -887,14 +708,6 @@ static int __devinit iic_probe(struct of_device *ofdev,
887 708
888 dev_set_drvdata(&ofdev->dev, dev); 709 dev_set_drvdata(&ofdev->dev, dev);
889 710
890 indexp = of_get_property(np, "index", NULL);
891 if (!indexp) {
892 dev_err(&ofdev->dev, "no index specified\n");
893 ret = -EINVAL;
894 goto error_cleanup;
895 }
896 dev->idx = *indexp;
897
898 dev->vaddr = of_iomap(np, 0); 711 dev->vaddr = of_iomap(np, 0);
899 if (dev->vaddr == NULL) { 712 if (dev->vaddr == NULL) {
900 dev_err(&ofdev->dev, "failed to iomap device\n"); 713 dev_err(&ofdev->dev, "failed to iomap device\n");
@@ -934,17 +747,19 @@ static int __devinit iic_probe(struct of_device *ofdev,
934 strlcpy(adap->name, "IBM IIC", sizeof(adap->name)); 747 strlcpy(adap->name, "IBM IIC", sizeof(adap->name));
935 i2c_set_adapdata(adap, dev); 748 i2c_set_adapdata(adap, dev);
936 adap->id = I2C_HW_OCP; 749 adap->id = I2C_HW_OCP;
937 adap->class = I2C_CLASS_HWMON; 750 adap->class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
938 adap->algo = &iic_algo; 751 adap->algo = &iic_algo;
939 adap->timeout = 1; 752 adap->timeout = 1;
940 adap->nr = dev->idx;
941 753
942 ret = i2c_add_numbered_adapter(adap); 754 ret = i2c_add_adapter(adap);
943 if (ret < 0) { 755 if (ret < 0) {
944 dev_err(&ofdev->dev, "failed to register i2c adapter\n"); 756 dev_err(&ofdev->dev, "failed to register i2c adapter\n");
945 goto error_cleanup; 757 goto error_cleanup;
946 } 758 }
947 759
760 /* Now register all the child nodes */
761 of_register_i2c_devices(adap, np);
762
948 dev_info(&ofdev->dev, "using %s mode\n", 763 dev_info(&ofdev->dev, "using %s mode\n",
949 dev->fast_mode ? "fast (400 kHz)" : "standard (100 kHz)"); 764 dev->fast_mode ? "fast (400 kHz)" : "standard (100 kHz)");
950 765
@@ -987,11 +802,7 @@ static int __devexit iic_remove(struct of_device *ofdev)
987} 802}
988 803
989static const struct of_device_id ibm_iic_match[] = { 804static const struct of_device_id ibm_iic_match[] = {
990 { .compatible = "ibm,iic-405ex", }, 805 { .compatible = "ibm,iic", },
991 { .compatible = "ibm,iic-405gp", },
992 { .compatible = "ibm,iic-440gp", },
993 { .compatible = "ibm,iic-440gpx", },
994 { .compatible = "ibm,iic-440grx", },
995 {} 806 {}
996}; 807};
997 808
@@ -1011,7 +822,6 @@ static void __exit iic_exit(void)
1011{ 822{
1012 of_unregister_platform_driver(&ibm_iic_driver); 823 of_unregister_platform_driver(&ibm_iic_driver);
1013} 824}
1014#endif /* CONFIG_IBM_OCP */
1015 825
1016module_init(iic_init); 826module_init(iic_init);
1017module_exit(iic_exit); 827module_exit(iic_exit);
diff --git a/drivers/i2c/busses/i2c-iop3xx.c b/drivers/i2c/busses/i2c-iop3xx.c
index 39884e797594..fc2714ac0c0f 100644
--- a/drivers/i2c/busses/i2c-iop3xx.c
+++ b/drivers/i2c/busses/i2c-iop3xx.c
@@ -482,7 +482,7 @@ iop3xx_i2c_probe(struct platform_device *pdev)
482 memcpy(new_adapter->name, pdev->name, strlen(pdev->name)); 482 memcpy(new_adapter->name, pdev->name, strlen(pdev->name));
483 new_adapter->id = I2C_HW_IOP3XX; 483 new_adapter->id = I2C_HW_IOP3XX;
484 new_adapter->owner = THIS_MODULE; 484 new_adapter->owner = THIS_MODULE;
485 new_adapter->class = I2C_CLASS_HWMON; 485 new_adapter->class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
486 new_adapter->dev.parent = &pdev->dev; 486 new_adapter->dev.parent = &pdev->dev;
487 new_adapter->nr = pdev->id; 487 new_adapter->nr = pdev->id;
488 488
diff --git a/drivers/i2c/busses/i2c-isch.c b/drivers/i2c/busses/i2c-isch.c
new file mode 100644
index 000000000000..b9c01aa90036
--- /dev/null
+++ b/drivers/i2c/busses/i2c-isch.c
@@ -0,0 +1,339 @@
1/*
2 i2c-isch.c - Linux kernel driver for Intel SCH chipset SMBus
3 - Based on i2c-piix4.c
4 Copyright (c) 1998 - 2002 Frodo Looijaard <frodol@dds.nl> and
5 Philip Edelbrock <phil@netroedge.com>
6 - Intel SCH support
7 Copyright (c) 2007 - 2008 Jacob Jun Pan <jacob.jun.pan@intel.com>
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License version 2 as
11 published by the Free Software Foundation.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21*/
22
23/*
24 Supports:
25 Intel SCH chipsets (AF82US15W, AF82US15L, AF82UL11L)
26 Note: we assume there can only be one device, with one SMBus interface.
27*/
28
29#include <linux/module.h>
30#include <linux/pci.h>
31#include <linux/kernel.h>
32#include <linux/delay.h>
33#include <linux/stddef.h>
34#include <linux/ioport.h>
35#include <linux/i2c.h>
36#include <linux/init.h>
37#include <linux/io.h>
38#include <linux/acpi.h>
39
40/* SCH SMBus address offsets */
41#define SMBHSTCNT (0 + sch_smba)
42#define SMBHSTSTS (1 + sch_smba)
43#define SMBHSTADD (4 + sch_smba) /* TSA */
44#define SMBHSTCMD (5 + sch_smba)
45#define SMBHSTDAT0 (6 + sch_smba)
46#define SMBHSTDAT1 (7 + sch_smba)
47#define SMBBLKDAT (0x20 + sch_smba)
48
49/* count for request_region */
50#define SMBIOSIZE 64
51
52/* PCI Address Constants */
53#define SMBBA_SCH 0x40
54
55/* Other settings */
56#define MAX_TIMEOUT 500
57
58/* I2C constants */
59#define SCH_QUICK 0x00
60#define SCH_BYTE 0x01
61#define SCH_BYTE_DATA 0x02
62#define SCH_WORD_DATA 0x03
63#define SCH_BLOCK_DATA 0x05
64
65static unsigned short sch_smba;
66static struct pci_driver sch_driver;
67static struct i2c_adapter sch_adapter;
68
69/*
70 * Start the i2c transaction -- the i2c_access will prepare the transaction
71 * and this function will execute it.
72 * return 0 for success and others for failure.
73 */
74static int sch_transaction(void)
75{
76 int temp;
77 int result = 0;
78 int timeout = 0;
79
80 dev_dbg(&sch_adapter.dev, "Transaction (pre): CNT=%02x, CMD=%02x, "
81 "ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb(SMBHSTCNT),
82 inb(SMBHSTCMD), inb(SMBHSTADD), inb(SMBHSTDAT0),
83 inb(SMBHSTDAT1));
84
85 /* Make sure the SMBus host is ready to start transmitting */
86 temp = inb(SMBHSTSTS) & 0x0f;
87 if (temp) {
88 /* Can not be busy since we checked it in sch_access */
89 if (temp & 0x01) {
90 dev_dbg(&sch_adapter.dev, "Completion (%02x). "
91 "Clear...\n", temp);
92 }
93 if (temp & 0x06) {
94 dev_dbg(&sch_adapter.dev, "SMBus error (%02x). "
95 "Resetting...\n", temp);
96 }
97 outb(temp, SMBHSTSTS);
98 temp = inb(SMBHSTSTS) & 0x0f;
99 if (temp) {
100 dev_err(&sch_adapter.dev,
101 "SMBus is not ready: (%02x)\n", temp);
102 return -EAGAIN;
103 }
104 }
105
106 /* start the transaction by setting bit 4 */
107 outb(inb(SMBHSTCNT) | 0x10, SMBHSTCNT);
108
109 do {
110 msleep(1);
111 temp = inb(SMBHSTSTS) & 0x0f;
112 } while ((temp & 0x08) && (timeout++ < MAX_TIMEOUT));
113
114 /* If the SMBus is still busy, we give up */
115 if (timeout >= MAX_TIMEOUT) {
116 dev_err(&sch_adapter.dev, "SMBus Timeout!\n");
117 result = -ETIMEDOUT;
118 }
119 if (temp & 0x04) {
120 result = -EIO;
121 dev_dbg(&sch_adapter.dev, "Bus collision! SMBus may be "
122 "locked until next hard reset. (sorry!)\n");
123 /* Clock stops and slave is stuck in mid-transmission */
124 } else if (temp & 0x02) {
125 result = -EIO;
126 dev_err(&sch_adapter.dev, "Error: no response!\n");
127 } else if (temp & 0x01) {
128 dev_dbg(&sch_adapter.dev, "Post complete!\n");
129 outb(temp, SMBHSTSTS);
130 temp = inb(SMBHSTSTS) & 0x07;
131 if (temp & 0x06) {
132 /* Completion clear failed */
133 dev_dbg(&sch_adapter.dev, "Failed reset at end of "
134 "transaction (%02x), Bus error!\n", temp);
135 }
136 } else {
137 result = -ENXIO;
138 dev_dbg(&sch_adapter.dev, "No such address.\n");
139 }
140 dev_dbg(&sch_adapter.dev, "Transaction (post): CNT=%02x, CMD=%02x, "
141 "ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb(SMBHSTCNT),
142 inb(SMBHSTCMD), inb(SMBHSTADD), inb(SMBHSTDAT0),
143 inb(SMBHSTDAT1));
144 return result;
145}
146
147/*
148 * This is the main access entry for i2c-sch access
149 * adap is i2c_adapter pointer, addr is the i2c device bus address, read_write
150 * (0 for read and 1 for write), size is i2c transaction type and data is the
151 * union of transaction for data to be transfered or data read from bus.
152 * return 0 for success and others for failure.
153 */
154static s32 sch_access(struct i2c_adapter *adap, u16 addr,
155 unsigned short flags, char read_write,
156 u8 command, int size, union i2c_smbus_data *data)
157{
158 int i, len, temp, rc;
159
160 /* Make sure the SMBus host is not busy */
161 temp = inb(SMBHSTSTS) & 0x0f;
162 if (temp & 0x08) {
163 dev_dbg(&sch_adapter.dev, "SMBus busy (%02x)\n", temp);
164 return -EAGAIN;
165 }
166 dev_dbg(&sch_adapter.dev, "access size: %d %s\n", size,
167 (read_write)?"READ":"WRITE");
168 switch (size) {
169 case I2C_SMBUS_QUICK:
170 outb((addr << 1) | read_write, SMBHSTADD);
171 size = SCH_QUICK;
172 break;
173 case I2C_SMBUS_BYTE:
174 outb((addr << 1) | read_write, SMBHSTADD);
175 if (read_write == I2C_SMBUS_WRITE)
176 outb(command, SMBHSTCMD);
177 size = SCH_BYTE;
178 break;
179 case I2C_SMBUS_BYTE_DATA:
180 outb((addr << 1) | read_write, SMBHSTADD);
181 outb(command, SMBHSTCMD);
182 if (read_write == I2C_SMBUS_WRITE)
183 outb(data->byte, SMBHSTDAT0);
184 size = SCH_BYTE_DATA;
185 break;
186 case I2C_SMBUS_WORD_DATA:
187 outb((addr << 1) | read_write, SMBHSTADD);
188 outb(command, SMBHSTCMD);
189 if (read_write == I2C_SMBUS_WRITE) {
190 outb(data->word & 0xff, SMBHSTDAT0);
191 outb((data->word & 0xff00) >> 8, SMBHSTDAT1);
192 }
193 size = SCH_WORD_DATA;
194 break;
195 case I2C_SMBUS_BLOCK_DATA:
196 outb((addr << 1) | read_write, SMBHSTADD);
197 outb(command, SMBHSTCMD);
198 if (read_write == I2C_SMBUS_WRITE) {
199 len = data->block[0];
200 if (len == 0 || len > I2C_SMBUS_BLOCK_MAX)
201 return -EINVAL;
202 outb(len, SMBHSTDAT0);
203 for (i = 1; i <= len; i++)
204 outb(data->block[i], SMBBLKDAT+i-1);
205 }
206 size = SCH_BLOCK_DATA;
207 break;
208 default:
209 dev_warn(&adap->dev, "Unsupported transaction %d\n", size);
210 return -EOPNOTSUPP;
211 }
212 dev_dbg(&sch_adapter.dev, "write size %d to 0x%04x\n", size, SMBHSTCNT);
213 outb((inb(SMBHSTCNT) & 0xb0) | (size & 0x7), SMBHSTCNT);
214
215 rc = sch_transaction();
216 if (rc) /* Error in transaction */
217 return rc;
218
219 if ((read_write == I2C_SMBUS_WRITE) || (size == SCH_QUICK))
220 return 0;
221
222 switch (size) {
223 case SCH_BYTE:
224 case SCH_BYTE_DATA:
225 data->byte = inb(SMBHSTDAT0);
226 break;
227 case SCH_WORD_DATA:
228 data->word = inb(SMBHSTDAT0) + (inb(SMBHSTDAT1) << 8);
229 break;
230 case SCH_BLOCK_DATA:
231 data->block[0] = inb(SMBHSTDAT0);
232 if (data->block[0] == 0 || data->block[0] > I2C_SMBUS_BLOCK_MAX)
233 return -EPROTO;
234 for (i = 1; i <= data->block[0]; i++)
235 data->block[i] = inb(SMBBLKDAT+i-1);
236 break;
237 }
238 return 0;
239}
240
241static u32 sch_func(struct i2c_adapter *adapter)
242{
243 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
244 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
245 I2C_FUNC_SMBUS_BLOCK_DATA;
246}
247
248static const struct i2c_algorithm smbus_algorithm = {
249 .smbus_xfer = sch_access,
250 .functionality = sch_func,
251};
252
253static struct i2c_adapter sch_adapter = {
254 .owner = THIS_MODULE,
255 .class = I2C_CLASS_HWMON | I2C_CLASS_SPD,
256 .algo = &smbus_algorithm,
257};
258
259static struct pci_device_id sch_ids[] = {
260 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SCH_LPC) },
261 { 0, }
262};
263
264MODULE_DEVICE_TABLE(pci, sch_ids);
265
266static int __devinit sch_probe(struct pci_dev *dev,
267 const struct pci_device_id *id)
268{
269 int retval;
270 unsigned int smba;
271
272 pci_read_config_dword(dev, SMBBA_SCH, &smba);
273 if (!(smba & (1 << 31))) {
274 dev_err(&dev->dev, "SMBus I/O space disabled!\n");
275 return -ENODEV;
276 }
277
278 sch_smba = (unsigned short)smba;
279 if (sch_smba == 0) {
280 dev_err(&dev->dev, "SMBus base address uninitialized!\n");
281 return -ENODEV;
282 }
283 if (acpi_check_region(sch_smba, SMBIOSIZE, sch_driver.name))
284 return -EBUSY;
285 if (!request_region(sch_smba, SMBIOSIZE, sch_driver.name)) {
286 dev_err(&dev->dev, "SMBus region 0x%x already in use!\n",
287 sch_smba);
288 return -EBUSY;
289 }
290 dev_dbg(&dev->dev, "SMBA = 0x%X\n", sch_smba);
291
292 /* set up the sysfs linkage to our parent device */
293 sch_adapter.dev.parent = &dev->dev;
294
295 snprintf(sch_adapter.name, sizeof(sch_adapter.name),
296 "SMBus SCH adapter at %04x", sch_smba);
297
298 retval = i2c_add_adapter(&sch_adapter);
299 if (retval) {
300 dev_err(&dev->dev, "Couldn't register adapter!\n");
301 release_region(sch_smba, SMBIOSIZE);
302 sch_smba = 0;
303 }
304
305 return retval;
306}
307
308static void __devexit sch_remove(struct pci_dev *dev)
309{
310 if (sch_smba) {
311 i2c_del_adapter(&sch_adapter);
312 release_region(sch_smba, SMBIOSIZE);
313 sch_smba = 0;
314 }
315}
316
317static struct pci_driver sch_driver = {
318 .name = "isch_smbus",
319 .id_table = sch_ids,
320 .probe = sch_probe,
321 .remove = __devexit_p(sch_remove),
322};
323
324static int __init i2c_sch_init(void)
325{
326 return pci_register_driver(&sch_driver);
327}
328
329static void __exit i2c_sch_exit(void)
330{
331 pci_unregister_driver(&sch_driver);
332}
333
334MODULE_AUTHOR("Jacob Pan <jacob.jun.pan@intel.com>");
335MODULE_DESCRIPTION("Intel SCH SMBus driver");
336MODULE_LICENSE("GPL");
337
338module_init(i2c_sch_init);
339module_exit(i2c_sch_exit);
diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c
index 4fdfb62d6f38..27443f073bc9 100644
--- a/drivers/i2c/busses/i2c-mpc.c
+++ b/drivers/i2c/busses/i2c-mpc.c
@@ -312,7 +312,7 @@ static struct i2c_adapter mpc_ops = {
312 .name = "MPC adapter", 312 .name = "MPC adapter",
313 .id = I2C_HW_MPC107, 313 .id = I2C_HW_MPC107,
314 .algo = &mpc_algo, 314 .algo = &mpc_algo,
315 .class = I2C_CLASS_HWMON, 315 .class = I2C_CLASS_HWMON | I2C_CLASS_SPD,
316 .timeout = 1, 316 .timeout = 1,
317}; 317};
318 318
diff --git a/drivers/i2c/busses/i2c-mv64xxx.c b/drivers/i2c/busses/i2c-mv64xxx.c
index 036e6a883e67..9e8118d2fe64 100644
--- a/drivers/i2c/busses/i2c-mv64xxx.c
+++ b/drivers/i2c/busses/i2c-mv64xxx.c
@@ -530,7 +530,7 @@ mv64xxx_i2c_probe(struct platform_device *pd)
530 drv_data->adapter.id = I2C_HW_MV64XXX; 530 drv_data->adapter.id = I2C_HW_MV64XXX;
531 drv_data->adapter.algo = &mv64xxx_i2c_algo; 531 drv_data->adapter.algo = &mv64xxx_i2c_algo;
532 drv_data->adapter.owner = THIS_MODULE; 532 drv_data->adapter.owner = THIS_MODULE;
533 drv_data->adapter.class = I2C_CLASS_HWMON; 533 drv_data->adapter.class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
534 drv_data->adapter.timeout = pdata->timeout; 534 drv_data->adapter.timeout = pdata->timeout;
535 drv_data->adapter.nr = pd->id; 535 drv_data->adapter.nr = pd->id;
536 platform_set_drvdata(pd, drv_data); 536 platform_set_drvdata(pd, drv_data);
diff --git a/drivers/i2c/busses/i2c-nforce2-s4985.c b/drivers/i2c/busses/i2c-nforce2-s4985.c
new file mode 100644
index 000000000000..6a8995dfd0bb
--- /dev/null
+++ b/drivers/i2c/busses/i2c-nforce2-s4985.c
@@ -0,0 +1,257 @@
1/*
2 * i2c-nforce2-s4985.c - i2c-nforce2 extras for the Tyan S4985 motherboard
3 *
4 * Copyright (C) 2008 Jean Delvare <khali@linux-fr.org>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20
21/*
22 * We select the channels by sending commands to the Philips
23 * PCA9556 chip at I2C address 0x18. The main adapter is used for
24 * the non-multiplexed part of the bus, and 4 virtual adapters
25 * are defined for the multiplexed addresses: 0x50-0x53 (memory
26 * module EEPROM) located on channels 1-4. We define one virtual
27 * adapter per CPU, which corresponds to one multiplexed channel:
28 * CPU0: virtual adapter 1, channel 1
29 * CPU1: virtual adapter 2, channel 2
30 * CPU2: virtual adapter 3, channel 3
31 * CPU3: virtual adapter 4, channel 4
32 */
33
34#include <linux/module.h>
35#include <linux/kernel.h>
36#include <linux/slab.h>
37#include <linux/init.h>
38#include <linux/i2c.h>
39#include <linux/mutex.h>
40
41extern struct i2c_adapter *nforce2_smbus;
42
43static struct i2c_adapter *s4985_adapter;
44static struct i2c_algorithm *s4985_algo;
45
46/* Wrapper access functions for multiplexed SMBus */
47static DEFINE_MUTEX(nforce2_lock);
48
49static s32 nforce2_access_virt0(struct i2c_adapter *adap, u16 addr,
50 unsigned short flags, char read_write,
51 u8 command, int size,
52 union i2c_smbus_data *data)
53{
54 int error;
55
56 /* We exclude the multiplexed addresses */
57 if ((addr & 0xfc) == 0x50 || (addr & 0xfc) == 0x30
58 || addr == 0x18)
59 return -ENXIO;
60
61 mutex_lock(&nforce2_lock);
62 error = nforce2_smbus->algo->smbus_xfer(adap, addr, flags, read_write,
63 command, size, data);
64 mutex_unlock(&nforce2_lock);
65
66 return error;
67}
68
69/* We remember the last used channels combination so as to only switch
70 channels when it is really needed. This greatly reduces the SMBus
71 overhead, but also assumes that nobody will be writing to the PCA9556
72 in our back. */
73static u8 last_channels;
74
75static inline s32 nforce2_access_channel(struct i2c_adapter *adap, u16 addr,
76 unsigned short flags, char read_write,
77 u8 command, int size,
78 union i2c_smbus_data *data,
79 u8 channels)
80{
81 int error;
82
83 /* We exclude the non-multiplexed addresses */
84 if ((addr & 0xfc) != 0x50 && (addr & 0xfc) != 0x30)
85 return -ENXIO;
86
87 mutex_lock(&nforce2_lock);
88 if (last_channels != channels) {
89 union i2c_smbus_data mplxdata;
90 mplxdata.byte = channels;
91
92 error = nforce2_smbus->algo->smbus_xfer(adap, 0x18, 0,
93 I2C_SMBUS_WRITE, 0x01,
94 I2C_SMBUS_BYTE_DATA,
95 &mplxdata);
96 if (error)
97 goto UNLOCK;
98 last_channels = channels;
99 }
100 error = nforce2_smbus->algo->smbus_xfer(adap, addr, flags, read_write,
101 command, size, data);
102
103UNLOCK:
104 mutex_unlock(&nforce2_lock);
105 return error;
106}
107
108static s32 nforce2_access_virt1(struct i2c_adapter *adap, u16 addr,
109 unsigned short flags, char read_write,
110 u8 command, int size,
111 union i2c_smbus_data *data)
112{
113 /* CPU0: channel 1 enabled */
114 return nforce2_access_channel(adap, addr, flags, read_write, command,
115 size, data, 0x02);
116}
117
118static s32 nforce2_access_virt2(struct i2c_adapter *adap, u16 addr,
119 unsigned short flags, char read_write,
120 u8 command, int size,
121 union i2c_smbus_data *data)
122{
123 /* CPU1: channel 2 enabled */
124 return nforce2_access_channel(adap, addr, flags, read_write, command,
125 size, data, 0x04);
126}
127
128static s32 nforce2_access_virt3(struct i2c_adapter *adap, u16 addr,
129 unsigned short flags, char read_write,
130 u8 command, int size,
131 union i2c_smbus_data *data)
132{
133 /* CPU2: channel 3 enabled */
134 return nforce2_access_channel(adap, addr, flags, read_write, command,
135 size, data, 0x08);
136}
137
138static s32 nforce2_access_virt4(struct i2c_adapter *adap, u16 addr,
139 unsigned short flags, char read_write,
140 u8 command, int size,
141 union i2c_smbus_data *data)
142{
143 /* CPU3: channel 4 enabled */
144 return nforce2_access_channel(adap, addr, flags, read_write, command,
145 size, data, 0x10);
146}
147
148static int __init nforce2_s4985_init(void)
149{
150 int i, error;
151 union i2c_smbus_data ioconfig;
152
153 /* Unregister physical bus */
154 if (!nforce2_smbus)
155 return -ENODEV;
156 error = i2c_del_adapter(nforce2_smbus);
157 if (error) {
158 dev_err(&nforce2_smbus->dev, "Physical bus removal failed\n");
159 goto ERROR0;
160 }
161
162 printk(KERN_INFO "Enabling SMBus multiplexing for Tyan S4985\n");
163 /* Define the 5 virtual adapters and algorithms structures */
164 s4985_adapter = kzalloc(5 * sizeof(struct i2c_adapter), GFP_KERNEL);
165 if (!s4985_adapter) {
166 error = -ENOMEM;
167 goto ERROR1;
168 }
169 s4985_algo = kzalloc(5 * sizeof(struct i2c_algorithm), GFP_KERNEL);
170 if (!s4985_algo) {
171 error = -ENOMEM;
172 goto ERROR2;
173 }
174
175 /* Fill in the new structures */
176 s4985_algo[0] = *(nforce2_smbus->algo);
177 s4985_algo[0].smbus_xfer = nforce2_access_virt0;
178 s4985_adapter[0] = *nforce2_smbus;
179 s4985_adapter[0].algo = s4985_algo;
180 s4985_adapter[0].dev.parent = nforce2_smbus->dev.parent;
181 for (i = 1; i < 5; i++) {
182 s4985_algo[i] = *(nforce2_smbus->algo);
183 s4985_adapter[i] = *nforce2_smbus;
184 snprintf(s4985_adapter[i].name, sizeof(s4985_adapter[i].name),
185 "SMBus nForce2 adapter (CPU%d)", i - 1);
186 s4985_adapter[i].algo = s4985_algo + i;
187 s4985_adapter[i].dev.parent = nforce2_smbus->dev.parent;
188 }
189 s4985_algo[1].smbus_xfer = nforce2_access_virt1;
190 s4985_algo[2].smbus_xfer = nforce2_access_virt2;
191 s4985_algo[3].smbus_xfer = nforce2_access_virt3;
192 s4985_algo[4].smbus_xfer = nforce2_access_virt4;
193
194 /* Configure the PCA9556 multiplexer */
195 ioconfig.byte = 0x00; /* All I/O to output mode */
196 error = nforce2_smbus->algo->smbus_xfer(nforce2_smbus, 0x18, 0,
197 I2C_SMBUS_WRITE, 0x03,
198 I2C_SMBUS_BYTE_DATA, &ioconfig);
199 if (error) {
200 dev_err(&nforce2_smbus->dev, "PCA9556 configuration failed\n");
201 error = -EIO;
202 goto ERROR3;
203 }
204
205 /* Register virtual adapters */
206 for (i = 0; i < 5; i++) {
207 error = i2c_add_adapter(s4985_adapter + i);
208 if (error) {
209 dev_err(&nforce2_smbus->dev,
210 "Virtual adapter %d registration "
211 "failed, module not inserted\n", i);
212 for (i--; i >= 0; i--)
213 i2c_del_adapter(s4985_adapter + i);
214 goto ERROR3;
215 }
216 }
217
218 return 0;
219
220ERROR3:
221 kfree(s4985_algo);
222 s4985_algo = NULL;
223ERROR2:
224 kfree(s4985_adapter);
225 s4985_adapter = NULL;
226ERROR1:
227 /* Restore physical bus */
228 i2c_add_adapter(nforce2_smbus);
229ERROR0:
230 return error;
231}
232
233static void __exit nforce2_s4985_exit(void)
234{
235 if (s4985_adapter) {
236 int i;
237
238 for (i = 0; i < 5; i++)
239 i2c_del_adapter(s4985_adapter+i);
240 kfree(s4985_adapter);
241 s4985_adapter = NULL;
242 }
243 kfree(s4985_algo);
244 s4985_algo = NULL;
245
246 /* Restore physical bus */
247 if (i2c_add_adapter(nforce2_smbus))
248 dev_err(&nforce2_smbus->dev, "Physical bus restoration "
249 "failed\n");
250}
251
252MODULE_AUTHOR("Jean Delvare <khali@linux-fr.org>");
253MODULE_DESCRIPTION("S4985 SMBus multiplexing");
254MODULE_LICENSE("GPL");
255
256module_init(nforce2_s4985_init);
257module_exit(nforce2_s4985_exit);
diff --git a/drivers/i2c/busses/i2c-nforce2.c b/drivers/i2c/busses/i2c-nforce2.c
index 43c9f8df9509..3b19bc41a60b 100644
--- a/drivers/i2c/busses/i2c-nforce2.c
+++ b/drivers/i2c/busses/i2c-nforce2.c
@@ -51,6 +51,7 @@
51#include <linux/i2c.h> 51#include <linux/i2c.h>
52#include <linux/delay.h> 52#include <linux/delay.h>
53#include <linux/dmi.h> 53#include <linux/dmi.h>
54#include <linux/acpi.h>
54#include <asm/io.h> 55#include <asm/io.h>
55 56
56MODULE_LICENSE("GPL"); 57MODULE_LICENSE("GPL");
@@ -124,6 +125,20 @@ static struct dmi_system_id __devinitdata nforce2_dmi_blacklist2[] = {
124 125
125static struct pci_driver nforce2_driver; 126static struct pci_driver nforce2_driver;
126 127
128/* For multiplexing support, we need a global reference to the 1st
129 SMBus channel */
130#if defined CONFIG_I2C_NFORCE2_S4985 || defined CONFIG_I2C_NFORCE2_S4985_MODULE
131struct i2c_adapter *nforce2_smbus;
132EXPORT_SYMBOL_GPL(nforce2_smbus);
133
134static void nforce2_set_reference(struct i2c_adapter *adap)
135{
136 nforce2_smbus = adap;
137}
138#else
139static inline void nforce2_set_reference(struct i2c_adapter *adap) { }
140#endif
141
127static void nforce2_abort(struct i2c_adapter *adap) 142static void nforce2_abort(struct i2c_adapter *adap)
128{ 143{
129 struct nforce2_smbus *smbus = adap->algo_data; 144 struct nforce2_smbus *smbus = adap->algo_data;
@@ -158,16 +173,16 @@ static int nforce2_check_status(struct i2c_adapter *adap)
158 dev_dbg(&adap->dev, "SMBus Timeout!\n"); 173 dev_dbg(&adap->dev, "SMBus Timeout!\n");
159 if (smbus->can_abort) 174 if (smbus->can_abort)
160 nforce2_abort(adap); 175 nforce2_abort(adap);
161 return -1; 176 return -ETIMEDOUT;
162 } 177 }
163 if (!(temp & NVIDIA_SMB_STS_DONE) || (temp & NVIDIA_SMB_STS_STATUS)) { 178 if (!(temp & NVIDIA_SMB_STS_DONE) || (temp & NVIDIA_SMB_STS_STATUS)) {
164 dev_dbg(&adap->dev, "Transaction failed (0x%02x)!\n", temp); 179 dev_dbg(&adap->dev, "Transaction failed (0x%02x)!\n", temp);
165 return -1; 180 return -EIO;
166 } 181 }
167 return 0; 182 return 0;
168} 183}
169 184
170/* Return -1 on error */ 185/* Return negative errno on error */
171static s32 nforce2_access(struct i2c_adapter * adap, u16 addr, 186static s32 nforce2_access(struct i2c_adapter * adap, u16 addr,
172 unsigned short flags, char read_write, 187 unsigned short flags, char read_write,
173 u8 command, int size, union i2c_smbus_data * data) 188 u8 command, int size, union i2c_smbus_data * data)
@@ -175,7 +190,7 @@ static s32 nforce2_access(struct i2c_adapter * adap, u16 addr,
175 struct nforce2_smbus *smbus = adap->algo_data; 190 struct nforce2_smbus *smbus = adap->algo_data;
176 unsigned char protocol, pec; 191 unsigned char protocol, pec;
177 u8 len; 192 u8 len;
178 int i; 193 int i, status;
179 194
180 protocol = (read_write == I2C_SMBUS_READ) ? NVIDIA_SMB_PRTCL_READ : 195 protocol = (read_write == I2C_SMBUS_READ) ? NVIDIA_SMB_PRTCL_READ :
181 NVIDIA_SMB_PRTCL_WRITE; 196 NVIDIA_SMB_PRTCL_WRITE;
@@ -219,7 +234,7 @@ static s32 nforce2_access(struct i2c_adapter * adap, u16 addr,
219 "Transaction failed " 234 "Transaction failed "
220 "(requested block size: %d)\n", 235 "(requested block size: %d)\n",
221 len); 236 len);
222 return -1; 237 return -EINVAL;
223 } 238 }
224 outb_p(len, NVIDIA_SMB_BCNT); 239 outb_p(len, NVIDIA_SMB_BCNT);
225 for (i = 0; i < I2C_SMBUS_BLOCK_MAX; i++) 240 for (i = 0; i < I2C_SMBUS_BLOCK_MAX; i++)
@@ -231,14 +246,15 @@ static s32 nforce2_access(struct i2c_adapter * adap, u16 addr,
231 246
232 default: 247 default:
233 dev_err(&adap->dev, "Unsupported transaction %d\n", size); 248 dev_err(&adap->dev, "Unsupported transaction %d\n", size);
234 return -1; 249 return -EOPNOTSUPP;
235 } 250 }
236 251
237 outb_p((addr & 0x7f) << 1, NVIDIA_SMB_ADDR); 252 outb_p((addr & 0x7f) << 1, NVIDIA_SMB_ADDR);
238 outb_p(protocol, NVIDIA_SMB_PRTCL); 253 outb_p(protocol, NVIDIA_SMB_PRTCL);
239 254
240 if (nforce2_check_status(adap)) 255 status = nforce2_check_status(adap);
241 return -1; 256 if (status)
257 return status;
242 258
243 if (read_write == I2C_SMBUS_WRITE) 259 if (read_write == I2C_SMBUS_WRITE)
244 return 0; 260 return 0;
@@ -260,7 +276,7 @@ static s32 nforce2_access(struct i2c_adapter * adap, u16 addr,
260 dev_err(&adap->dev, "Transaction failed " 276 dev_err(&adap->dev, "Transaction failed "
261 "(received block size: 0x%02x)\n", 277 "(received block size: 0x%02x)\n",
262 len); 278 len);
263 return -1; 279 return -EPROTO;
264 } 280 }
265 for (i = 0; i < len; i++) 281 for (i = 0; i < len; i++)
266 data->block[i+1] = inb_p(NVIDIA_SMB_DATA + i); 282 data->block[i+1] = inb_p(NVIDIA_SMB_DATA + i);
@@ -321,21 +337,26 @@ static int __devinit nforce2_probe_smb (struct pci_dev *dev, int bar,
321 != PCIBIOS_SUCCESSFUL) { 337 != PCIBIOS_SUCCESSFUL) {
322 dev_err(&dev->dev, "Error reading PCI config for %s\n", 338 dev_err(&dev->dev, "Error reading PCI config for %s\n",
323 name); 339 name);
324 return -1; 340 return -EIO;
325 } 341 }
326 342
327 smbus->base = iobase & PCI_BASE_ADDRESS_IO_MASK; 343 smbus->base = iobase & PCI_BASE_ADDRESS_IO_MASK;
328 smbus->size = 64; 344 smbus->size = 64;
329 } 345 }
330 346
347 error = acpi_check_region(smbus->base, smbus->size,
348 nforce2_driver.name);
349 if (error)
350 return -1;
351
331 if (!request_region(smbus->base, smbus->size, nforce2_driver.name)) { 352 if (!request_region(smbus->base, smbus->size, nforce2_driver.name)) {
332 dev_err(&smbus->adapter.dev, "Error requesting region %02x .. %02X for %s\n", 353 dev_err(&smbus->adapter.dev, "Error requesting region %02x .. %02X for %s\n",
333 smbus->base, smbus->base+smbus->size-1, name); 354 smbus->base, smbus->base+smbus->size-1, name);
334 return -1; 355 return -EBUSY;
335 } 356 }
336 smbus->adapter.owner = THIS_MODULE; 357 smbus->adapter.owner = THIS_MODULE;
337 smbus->adapter.id = I2C_HW_SMBUS_NFORCE2; 358 smbus->adapter.id = I2C_HW_SMBUS_NFORCE2;
338 smbus->adapter.class = I2C_CLASS_HWMON; 359 smbus->adapter.class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
339 smbus->adapter.algo = &smbus_algorithm; 360 smbus->adapter.algo = &smbus_algorithm;
340 smbus->adapter.algo_data = smbus; 361 smbus->adapter.algo_data = smbus;
341 smbus->adapter.dev.parent = &dev->dev; 362 smbus->adapter.dev.parent = &dev->dev;
@@ -346,7 +367,7 @@ static int __devinit nforce2_probe_smb (struct pci_dev *dev, int bar,
346 if (error) { 367 if (error) {
347 dev_err(&smbus->adapter.dev, "Failed to register adapter.\n"); 368 dev_err(&smbus->adapter.dev, "Failed to register adapter.\n");
348 release_region(smbus->base, smbus->size); 369 release_region(smbus->base, smbus->size);
349 return -1; 370 return error;
350 } 371 }
351 dev_info(&smbus->adapter.dev, "nForce2 SMBus adapter at %#x\n", smbus->base); 372 dev_info(&smbus->adapter.dev, "nForce2 SMBus adapter at %#x\n", smbus->base);
352 return 0; 373 return 0;
@@ -398,6 +419,7 @@ static int __devinit nforce2_probe(struct pci_dev *dev, const struct pci_device_
398 return -ENODEV; 419 return -ENODEV;
399 } 420 }
400 421
422 nforce2_set_reference(&smbuses[0].adapter);
401 return 0; 423 return 0;
402} 424}
403 425
@@ -406,6 +428,7 @@ static void __devexit nforce2_remove(struct pci_dev *dev)
406{ 428{
407 struct nforce2_smbus *smbuses = (void*) pci_get_drvdata(dev); 429 struct nforce2_smbus *smbuses = (void*) pci_get_drvdata(dev);
408 430
431 nforce2_set_reference(NULL);
409 if (smbuses[0].base) { 432 if (smbuses[0].base) {
410 i2c_del_adapter(&smbuses[0].adapter); 433 i2c_del_adapter(&smbuses[0].adapter);
411 release_region(smbuses[0].base, smbuses[0].size); 434 release_region(smbuses[0].base, smbuses[0].size);
diff --git a/drivers/i2c/busses/i2c-ocores.c b/drivers/i2c/busses/i2c-ocores.c
index f145692cbb76..e5193bf75483 100644
--- a/drivers/i2c/busses/i2c-ocores.c
+++ b/drivers/i2c/busses/i2c-ocores.c
@@ -29,6 +29,7 @@ struct ocores_i2c {
29 int pos; 29 int pos;
30 int nmsgs; 30 int nmsgs;
31 int state; /* see STATE_ */ 31 int state; /* see STATE_ */
32 int clock_khz;
32}; 33};
33 34
34/* registers */ 35/* registers */
@@ -173,8 +174,7 @@ static int ocores_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
173 return -ETIMEDOUT; 174 return -ETIMEDOUT;
174} 175}
175 176
176static void ocores_init(struct ocores_i2c *i2c, 177static void ocores_init(struct ocores_i2c *i2c)
177 struct ocores_i2c_platform_data *pdata)
178{ 178{
179 int prescale; 179 int prescale;
180 u8 ctrl = oc_getreg(i2c, OCI2C_CONTROL); 180 u8 ctrl = oc_getreg(i2c, OCI2C_CONTROL);
@@ -182,7 +182,7 @@ static void ocores_init(struct ocores_i2c *i2c,
182 /* make sure the device is disabled */ 182 /* make sure the device is disabled */
183 oc_setreg(i2c, OCI2C_CONTROL, ctrl & ~(OCI2C_CTRL_EN|OCI2C_CTRL_IEN)); 183 oc_setreg(i2c, OCI2C_CONTROL, ctrl & ~(OCI2C_CTRL_EN|OCI2C_CTRL_IEN));
184 184
185 prescale = (pdata->clock_khz / (5*100)) - 1; 185 prescale = (i2c->clock_khz / (5*100)) - 1;
186 oc_setreg(i2c, OCI2C_PRELOW, prescale & 0xff); 186 oc_setreg(i2c, OCI2C_PRELOW, prescale & 0xff);
187 oc_setreg(i2c, OCI2C_PREHIGH, prescale >> 8); 187 oc_setreg(i2c, OCI2C_PREHIGH, prescale >> 8);
188 188
@@ -205,7 +205,7 @@ static const struct i2c_algorithm ocores_algorithm = {
205static struct i2c_adapter ocores_adapter = { 205static struct i2c_adapter ocores_adapter = {
206 .owner = THIS_MODULE, 206 .owner = THIS_MODULE,
207 .name = "i2c-ocores", 207 .name = "i2c-ocores",
208 .class = I2C_CLASS_HWMON, 208 .class = I2C_CLASS_HWMON | I2C_CLASS_SPD,
209 .algo = &ocores_algorithm, 209 .algo = &ocores_algorithm,
210}; 210};
211 211
@@ -248,7 +248,8 @@ static int __devinit ocores_i2c_probe(struct platform_device *pdev)
248 } 248 }
249 249
250 i2c->regstep = pdata->regstep; 250 i2c->regstep = pdata->regstep;
251 ocores_init(i2c, pdata); 251 i2c->clock_khz = pdata->clock_khz;
252 ocores_init(i2c);
252 253
253 init_waitqueue_head(&i2c->wait); 254 init_waitqueue_head(&i2c->wait);
254 ret = request_irq(res2->start, ocores_isr, 0, pdev->name, i2c); 255 ret = request_irq(res2->start, ocores_isr, 0, pdev->name, i2c);
@@ -312,13 +313,40 @@ static int __devexit ocores_i2c_remove(struct platform_device* pdev)
312 return 0; 313 return 0;
313} 314}
314 315
316#ifdef CONFIG_PM
317static int ocores_i2c_suspend(struct platform_device *pdev, pm_message_t state)
318{
319 struct ocores_i2c *i2c = platform_get_drvdata(pdev);
320 u8 ctrl = oc_getreg(i2c, OCI2C_CONTROL);
321
322 /* make sure the device is disabled */
323 oc_setreg(i2c, OCI2C_CONTROL, ctrl & ~(OCI2C_CTRL_EN|OCI2C_CTRL_IEN));
324
325 return 0;
326}
327
328static int ocores_i2c_resume(struct platform_device *pdev)
329{
330 struct ocores_i2c *i2c = platform_get_drvdata(pdev);
331
332 ocores_init(i2c);
333
334 return 0;
335}
336#else
337#define ocores_i2c_suspend NULL
338#define ocores_i2c_resume NULL
339#endif
340
315/* work with hotplug and coldplug */ 341/* work with hotplug and coldplug */
316MODULE_ALIAS("platform:ocores-i2c"); 342MODULE_ALIAS("platform:ocores-i2c");
317 343
318static struct platform_driver ocores_i2c_driver = { 344static struct platform_driver ocores_i2c_driver = {
319 .probe = ocores_i2c_probe, 345 .probe = ocores_i2c_probe,
320 .remove = __devexit_p(ocores_i2c_remove), 346 .remove = __devexit_p(ocores_i2c_remove),
321 .driver = { 347 .suspend = ocores_i2c_suspend,
348 .resume = ocores_i2c_resume,
349 .driver = {
322 .owner = THIS_MODULE, 350 .owner = THIS_MODULE,
323 .name = "ocores-i2c", 351 .name = "ocores-i2c",
324 }, 352 },
diff --git a/drivers/i2c/busses/i2c-pasemi.c b/drivers/i2c/busses/i2c-pasemi.c
index 1603c81e39d4..adf0fbb902f0 100644
--- a/drivers/i2c/busses/i2c-pasemi.c
+++ b/drivers/i2c/busses/i2c-pasemi.c
@@ -365,7 +365,7 @@ static int __devinit pasemi_smb_probe(struct pci_dev *dev,
365 smbus->adapter.owner = THIS_MODULE; 365 smbus->adapter.owner = THIS_MODULE;
366 snprintf(smbus->adapter.name, sizeof(smbus->adapter.name), 366 snprintf(smbus->adapter.name, sizeof(smbus->adapter.name),
367 "PA Semi SMBus adapter at 0x%lx", smbus->base); 367 "PA Semi SMBus adapter at 0x%lx", smbus->base);
368 smbus->adapter.class = I2C_CLASS_HWMON; 368 smbus->adapter.class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
369 smbus->adapter.algo = &smbus_algorithm; 369 smbus->adapter.algo = &smbus_algorithm;
370 smbus->adapter.algo_data = smbus; 370 smbus->adapter.algo_data = smbus;
371 smbus->adapter.nr = PCI_FUNC(dev->devfn); 371 smbus->adapter.nr = PCI_FUNC(dev->devfn);
diff --git a/drivers/i2c/busses/i2c-pca-platform.c b/drivers/i2c/busses/i2c-pca-platform.c
index 9d75f51e8f0e..6bb15ad0a6b6 100644
--- a/drivers/i2c/busses/i2c-pca-platform.c
+++ b/drivers/i2c/busses/i2c-pca-platform.c
@@ -163,7 +163,7 @@ static int __devinit i2c_pca_pf_probe(struct platform_device *pdev)
163 163
164 i2c->reg_base = ioremap(res->start, res_len(res)); 164 i2c->reg_base = ioremap(res->start, res_len(res));
165 if (!i2c->reg_base) { 165 if (!i2c->reg_base) {
166 ret = -EIO; 166 ret = -ENOMEM;
167 goto e_remap; 167 goto e_remap;
168 } 168 }
169 i2c->io_base = res->start; 169 i2c->io_base = res->start;
diff --git a/drivers/i2c/busses/i2c-piix4.c b/drivers/i2c/busses/i2c-piix4.c
index ac9165968587..eaa9b387543e 100644
--- a/drivers/i2c/busses/i2c-piix4.c
+++ b/drivers/i2c/busses/i2c-piix4.c
@@ -1,6 +1,4 @@
1/* 1/*
2 piix4.c - Part of lm_sensors, Linux kernel modules for hardware
3 monitoring
4 Copyright (c) 1998 - 2002 Frodo Looijaard <frodol@dds.nl> and 2 Copyright (c) 1998 - 2002 Frodo Looijaard <frodol@dds.nl> and
5 Philip Edelbrock <phil@netroedge.com> 3 Philip Edelbrock <phil@netroedge.com>
6 4
@@ -39,16 +37,10 @@
39#include <linux/i2c.h> 37#include <linux/i2c.h>
40#include <linux/init.h> 38#include <linux/init.h>
41#include <linux/dmi.h> 39#include <linux/dmi.h>
40#include <linux/acpi.h>
42#include <asm/io.h> 41#include <asm/io.h>
43 42
44 43
45struct sd {
46 const unsigned short mfr;
47 const unsigned short dev;
48 const unsigned char fn;
49 const char *name;
50};
51
52/* PIIX4 SMBus address offsets */ 44/* PIIX4 SMBus address offsets */
53#define SMBHSTSTS (0 + piix4_smba) 45#define SMBHSTSTS (0 + piix4_smba)
54#define SMBHSLVSTS (1 + piix4_smba) 46#define SMBHSLVSTS (1 + piix4_smba)
@@ -101,8 +93,6 @@ MODULE_PARM_DESC(force_addr,
101 "Forcibly enable the PIIX4 at the given address. " 93 "Forcibly enable the PIIX4 at the given address. "
102 "EXTREMELY DANGEROUS!"); 94 "EXTREMELY DANGEROUS!");
103 95
104static int piix4_transaction(void);
105
106static unsigned short piix4_smba; 96static unsigned short piix4_smba;
107static int srvrworks_csb5_delay; 97static int srvrworks_csb5_delay;
108static struct pci_driver piix4_driver; 98static struct pci_driver piix4_driver;
@@ -141,8 +131,6 @@ static int __devinit piix4_setup(struct pci_dev *PIIX4_dev,
141{ 131{
142 unsigned char temp; 132 unsigned char temp;
143 133
144 dev_info(&PIIX4_dev->dev, "Found %s device\n", pci_name(PIIX4_dev));
145
146 if ((PIIX4_dev->vendor == PCI_VENDOR_ID_SERVERWORKS) && 134 if ((PIIX4_dev->vendor == PCI_VENDOR_ID_SERVERWORKS) &&
147 (PIIX4_dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB5)) 135 (PIIX4_dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB5))
148 srvrworks_csb5_delay = 1; 136 srvrworks_csb5_delay = 1;
@@ -172,17 +160,20 @@ static int __devinit piix4_setup(struct pci_dev *PIIX4_dev,
172 pci_read_config_word(PIIX4_dev, SMBBA, &piix4_smba); 160 pci_read_config_word(PIIX4_dev, SMBBA, &piix4_smba);
173 piix4_smba &= 0xfff0; 161 piix4_smba &= 0xfff0;
174 if(piix4_smba == 0) { 162 if(piix4_smba == 0) {
175 dev_err(&PIIX4_dev->dev, "SMB base address " 163 dev_err(&PIIX4_dev->dev, "SMBus base address "
176 "uninitialized - upgrade BIOS or use " 164 "uninitialized - upgrade BIOS or use "
177 "force_addr=0xaddr\n"); 165 "force_addr=0xaddr\n");
178 return -ENODEV; 166 return -ENODEV;
179 } 167 }
180 } 168 }
181 169
170 if (acpi_check_region(piix4_smba, SMBIOSIZE, piix4_driver.name))
171 return -EBUSY;
172
182 if (!request_region(piix4_smba, SMBIOSIZE, piix4_driver.name)) { 173 if (!request_region(piix4_smba, SMBIOSIZE, piix4_driver.name)) {
183 dev_err(&PIIX4_dev->dev, "SMB region 0x%x already in use!\n", 174 dev_err(&PIIX4_dev->dev, "SMBus region 0x%x already in use!\n",
184 piix4_smba); 175 piix4_smba);
185 return -ENODEV; 176 return -EBUSY;
186 } 177 }
187 178
188 pci_read_config_byte(PIIX4_dev, SMBHSTCFG, &temp); 179 pci_read_config_byte(PIIX4_dev, SMBHSTCFG, &temp);
@@ -228,13 +219,13 @@ static int __devinit piix4_setup(struct pci_dev *PIIX4_dev,
228 "(or code out of date)!\n"); 219 "(or code out of date)!\n");
229 220
230 pci_read_config_byte(PIIX4_dev, SMBREV, &temp); 221 pci_read_config_byte(PIIX4_dev, SMBREV, &temp);
231 dev_dbg(&PIIX4_dev->dev, "SMBREV = 0x%X\n", temp); 222 dev_info(&PIIX4_dev->dev,
232 dev_dbg(&PIIX4_dev->dev, "SMBA = 0x%X\n", piix4_smba); 223 "SMBus Host Controller at 0x%x, revision %d\n",
224 piix4_smba, temp);
233 225
234 return 0; 226 return 0;
235} 227}
236 228
237/* Another internally used function */
238static int piix4_transaction(void) 229static int piix4_transaction(void)
239{ 230{
240 int temp; 231 int temp;
@@ -253,7 +244,7 @@ static int piix4_transaction(void)
253 outb_p(temp, SMBHSTSTS); 244 outb_p(temp, SMBHSTSTS);
254 if ((temp = inb_p(SMBHSTSTS)) != 0x00) { 245 if ((temp = inb_p(SMBHSTSTS)) != 0x00) {
255 dev_err(&piix4_adapter.dev, "Failed! (%02x)\n", temp); 246 dev_err(&piix4_adapter.dev, "Failed! (%02x)\n", temp);
256 return -1; 247 return -EBUSY;
257 } else { 248 } else {
258 dev_dbg(&piix4_adapter.dev, "Successful!\n"); 249 dev_dbg(&piix4_adapter.dev, "Successful!\n");
259 } 250 }
@@ -275,23 +266,23 @@ static int piix4_transaction(void)
275 /* If the SMBus is still busy, we give up */ 266 /* If the SMBus is still busy, we give up */
276 if (timeout >= MAX_TIMEOUT) { 267 if (timeout >= MAX_TIMEOUT) {
277 dev_err(&piix4_adapter.dev, "SMBus Timeout!\n"); 268 dev_err(&piix4_adapter.dev, "SMBus Timeout!\n");
278 result = -1; 269 result = -ETIMEDOUT;
279 } 270 }
280 271
281 if (temp & 0x10) { 272 if (temp & 0x10) {
282 result = -1; 273 result = -EIO;
283 dev_err(&piix4_adapter.dev, "Error: Failed bus transaction\n"); 274 dev_err(&piix4_adapter.dev, "Error: Failed bus transaction\n");
284 } 275 }
285 276
286 if (temp & 0x08) { 277 if (temp & 0x08) {
287 result = -1; 278 result = -EIO;
288 dev_dbg(&piix4_adapter.dev, "Bus collision! SMBus may be " 279 dev_dbg(&piix4_adapter.dev, "Bus collision! SMBus may be "
289 "locked until next hard reset. (sorry!)\n"); 280 "locked until next hard reset. (sorry!)\n");
290 /* Clock stops and slave is stuck in mid-transmission */ 281 /* Clock stops and slave is stuck in mid-transmission */
291 } 282 }
292 283
293 if (temp & 0x04) { 284 if (temp & 0x04) {
294 result = -1; 285 result = -ENXIO;
295 dev_dbg(&piix4_adapter.dev, "Error: no response!\n"); 286 dev_dbg(&piix4_adapter.dev, "Error: no response!\n");
296 } 287 }
297 288
@@ -309,31 +300,29 @@ static int piix4_transaction(void)
309 return result; 300 return result;
310} 301}
311 302
312/* Return -1 on error. */ 303/* Return negative errno on error. */
313static s32 piix4_access(struct i2c_adapter * adap, u16 addr, 304static s32 piix4_access(struct i2c_adapter * adap, u16 addr,
314 unsigned short flags, char read_write, 305 unsigned short flags, char read_write,
315 u8 command, int size, union i2c_smbus_data * data) 306 u8 command, int size, union i2c_smbus_data * data)
316{ 307{
317 int i, len; 308 int i, len;
309 int status;
318 310
319 switch (size) { 311 switch (size) {
320 case I2C_SMBUS_PROC_CALL:
321 dev_err(&adap->dev, "I2C_SMBUS_PROC_CALL not supported!\n");
322 return -1;
323 case I2C_SMBUS_QUICK: 312 case I2C_SMBUS_QUICK:
324 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), 313 outb_p((addr << 1) | read_write,
325 SMBHSTADD); 314 SMBHSTADD);
326 size = PIIX4_QUICK; 315 size = PIIX4_QUICK;
327 break; 316 break;
328 case I2C_SMBUS_BYTE: 317 case I2C_SMBUS_BYTE:
329 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), 318 outb_p((addr << 1) | read_write,
330 SMBHSTADD); 319 SMBHSTADD);
331 if (read_write == I2C_SMBUS_WRITE) 320 if (read_write == I2C_SMBUS_WRITE)
332 outb_p(command, SMBHSTCMD); 321 outb_p(command, SMBHSTCMD);
333 size = PIIX4_BYTE; 322 size = PIIX4_BYTE;
334 break; 323 break;
335 case I2C_SMBUS_BYTE_DATA: 324 case I2C_SMBUS_BYTE_DATA:
336 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), 325 outb_p((addr << 1) | read_write,
337 SMBHSTADD); 326 SMBHSTADD);
338 outb_p(command, SMBHSTCMD); 327 outb_p(command, SMBHSTCMD);
339 if (read_write == I2C_SMBUS_WRITE) 328 if (read_write == I2C_SMBUS_WRITE)
@@ -341,7 +330,7 @@ static s32 piix4_access(struct i2c_adapter * adap, u16 addr,
341 size = PIIX4_BYTE_DATA; 330 size = PIIX4_BYTE_DATA;
342 break; 331 break;
343 case I2C_SMBUS_WORD_DATA: 332 case I2C_SMBUS_WORD_DATA:
344 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), 333 outb_p((addr << 1) | read_write,
345 SMBHSTADD); 334 SMBHSTADD);
346 outb_p(command, SMBHSTCMD); 335 outb_p(command, SMBHSTCMD);
347 if (read_write == I2C_SMBUS_WRITE) { 336 if (read_write == I2C_SMBUS_WRITE) {
@@ -351,15 +340,13 @@ static s32 piix4_access(struct i2c_adapter * adap, u16 addr,
351 size = PIIX4_WORD_DATA; 340 size = PIIX4_WORD_DATA;
352 break; 341 break;
353 case I2C_SMBUS_BLOCK_DATA: 342 case I2C_SMBUS_BLOCK_DATA:
354 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), 343 outb_p((addr << 1) | read_write,
355 SMBHSTADD); 344 SMBHSTADD);
356 outb_p(command, SMBHSTCMD); 345 outb_p(command, SMBHSTCMD);
357 if (read_write == I2C_SMBUS_WRITE) { 346 if (read_write == I2C_SMBUS_WRITE) {
358 len = data->block[0]; 347 len = data->block[0];
359 if (len < 0) 348 if (len == 0 || len > I2C_SMBUS_BLOCK_MAX)
360 len = 0; 349 return -EINVAL;
361 if (len > 32)
362 len = 32;
363 outb_p(len, SMBHSTDAT0); 350 outb_p(len, SMBHSTDAT0);
364 i = inb_p(SMBHSTCNT); /* Reset SMBBLKDAT */ 351 i = inb_p(SMBHSTCNT); /* Reset SMBBLKDAT */
365 for (i = 1; i <= len; i++) 352 for (i = 1; i <= len; i++)
@@ -367,12 +354,16 @@ static s32 piix4_access(struct i2c_adapter * adap, u16 addr,
367 } 354 }
368 size = PIIX4_BLOCK_DATA; 355 size = PIIX4_BLOCK_DATA;
369 break; 356 break;
357 default:
358 dev_warn(&adap->dev, "Unsupported transaction %d\n", size);
359 return -EOPNOTSUPP;
370 } 360 }
371 361
372 outb_p((size & 0x1C) + (ENABLE_INT9 & 1), SMBHSTCNT); 362 outb_p((size & 0x1C) + (ENABLE_INT9 & 1), SMBHSTCNT);
373 363
374 if (piix4_transaction()) /* Error in transaction */ 364 status = piix4_transaction();
375 return -1; 365 if (status)
366 return status;
376 367
377 if ((read_write == I2C_SMBUS_WRITE) || (size == PIIX4_QUICK)) 368 if ((read_write == I2C_SMBUS_WRITE) || (size == PIIX4_QUICK))
378 return 0; 369 return 0;
@@ -388,6 +379,8 @@ static s32 piix4_access(struct i2c_adapter * adap, u16 addr,
388 break; 379 break;
389 case PIIX4_BLOCK_DATA: 380 case PIIX4_BLOCK_DATA:
390 data->block[0] = inb_p(SMBHSTDAT0); 381 data->block[0] = inb_p(SMBHSTDAT0);
382 if (data->block[0] == 0 || data->block[0] > I2C_SMBUS_BLOCK_MAX)
383 return -EPROTO;
391 i = inb_p(SMBHSTCNT); /* Reset SMBBLKDAT */ 384 i = inb_p(SMBHSTCNT); /* Reset SMBBLKDAT */
392 for (i = 1; i <= data->block[0]; i++) 385 for (i = 1; i <= data->block[0]; i++)
393 data->block[i] = inb_p(SMBBLKDAT); 386 data->block[i] = inb_p(SMBBLKDAT);
@@ -411,7 +404,7 @@ static const struct i2c_algorithm smbus_algorithm = {
411static struct i2c_adapter piix4_adapter = { 404static struct i2c_adapter piix4_adapter = {
412 .owner = THIS_MODULE, 405 .owner = THIS_MODULE,
413 .id = I2C_HW_SMBUS_PIIX4, 406 .id = I2C_HW_SMBUS_PIIX4,
414 .class = I2C_CLASS_HWMON, 407 .class = I2C_CLASS_HWMON | I2C_CLASS_SPD,
415 .algo = &smbus_algorithm, 408 .algo = &smbus_algorithm,
416}; 409};
417 410
diff --git a/drivers/i2c/busses/i2c-pmcmsp.c b/drivers/i2c/busses/i2c-pmcmsp.c
index 63b3e2c11cff..dcf2045b5222 100644
--- a/drivers/i2c/busses/i2c-pmcmsp.c
+++ b/drivers/i2c/busses/i2c-pmcmsp.c
@@ -622,7 +622,7 @@ static struct i2c_algorithm pmcmsptwi_algo = {
622 622
623static struct i2c_adapter pmcmsptwi_adapter = { 623static struct i2c_adapter pmcmsptwi_adapter = {
624 .owner = THIS_MODULE, 624 .owner = THIS_MODULE,
625 .class = I2C_CLASS_HWMON, 625 .class = I2C_CLASS_HWMON | I2C_CLASS_SPD,
626 .algo = &pmcmsptwi_algo, 626 .algo = &pmcmsptwi_algo,
627 .name = DRV_NAME, 627 .name = DRV_NAME,
628}; 628};
diff --git a/drivers/i2c/busses/i2c-prosavage.c b/drivers/i2c/busses/i2c-prosavage.c
deleted file mode 100644
index 07c1f1e27df1..000000000000
--- a/drivers/i2c/busses/i2c-prosavage.c
+++ /dev/null
@@ -1,325 +0,0 @@
1/*
2 * kernel/busses/i2c-prosavage.c
3 *
4 * i2c bus driver for S3/VIA 8365/8375 graphics processor.
5 * Copyright (c) 2003 Henk Vergonet <henk@god.dyndns.org>
6 * Based on code written by:
7 * Frodo Looijaard <frodol@dds.nl>,
8 * Philip Edelbrock <phil@netroedge.com>,
9 * Ralph Metzler <rjkm@thp.uni-koeln.de>, and
10 * Mark D. Studebaker <mdsxyz123@yahoo.com>
11 * Simon Vogl
12 * and others
13 *
14 * Please read the lm_sensors documentation for details on use.
15 *
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License as published by
18 * the Free Software Foundation; either version 2 of the License, or
19 * (at your option) any later version.
20 *
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
25 *
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
29 *
30 */
31/* 18-05-2003 HVE - created
32 * 14-06-2003 HVE - adapted for lm_sensors2
33 * 17-06-2003 HVE - linux 2.5.xx compatible
34 * 18-06-2003 HVE - codingstyle
35 * 21-06-2003 HVE - compatibility lm_sensors2 and linux 2.5.xx
36 * codingstyle, mmio enabled
37 *
38 * This driver interfaces to the I2C bus of the VIA north bridge embedded
39 * ProSavage4/8 devices. Usefull for gaining access to the TV Encoder chips.
40 *
41 * Graphics cores:
42 * S3/VIA KM266/VT8375 aka ProSavage8
43 * S3/VIA KM133/VT8365 aka Savage4
44 *
45 * Two serial busses are implemented:
46 * SERIAL1 - I2C serial communications interface
47 * SERIAL2 - DDC2 monitor communications interface
48 *
49 * Tested on a FX41 mainboard, see http://www.shuttle.com
50 *
51 *
52 * TODO:
53 * - integration with prosavage framebuffer device
54 * (Additional documentation needed :(
55 */
56
57#include <linux/module.h>
58#include <linux/init.h>
59#include <linux/pci.h>
60#include <linux/i2c.h>
61#include <linux/i2c-algo-bit.h>
62#include <asm/io.h>
63
64/*
65 * driver configuration
66 */
67#define MAX_BUSSES 2
68
69struct s_i2c_bus {
70 void __iomem *mmvga;
71 int i2c_reg;
72 int adap_ok;
73 struct i2c_adapter adap;
74 struct i2c_algo_bit_data algo;
75};
76
77struct s_i2c_chip {
78 void __iomem *mmio;
79 struct s_i2c_bus i2c_bus[MAX_BUSSES];
80};
81
82
83/*
84 * i2c configuration
85 */
86#define CYCLE_DELAY 10
87#define TIMEOUT (HZ / 2)
88
89
90/*
91 * S3/VIA 8365/8375 registers
92 */
93#define VGA_CR_IX 0x3d4
94#define VGA_CR_DATA 0x3d5
95
96#define CR_SERIAL1 0xa0 /* I2C serial communications interface */
97#define MM_SERIAL1 0xff20
98#define CR_SERIAL2 0xb1 /* DDC2 monitor communications interface */
99
100/* based on vt8365 documentation */
101#define I2C_ENAB 0x10
102#define I2C_SCL_OUT 0x01
103#define I2C_SDA_OUT 0x02
104#define I2C_SCL_IN 0x04
105#define I2C_SDA_IN 0x08
106
107#define SET_CR_IX(p, val) writeb((val), (p)->mmvga + VGA_CR_IX)
108#define SET_CR_DATA(p, val) writeb((val), (p)->mmvga + VGA_CR_DATA)
109#define GET_CR_DATA(p) readb((p)->mmvga + VGA_CR_DATA)
110
111
112/*
113 * Serial bus line handling
114 *
115 * serial communications register as parameter in private data
116 *
117 * TODO: locks with other code sections accessing video registers?
118 */
119static void bit_s3via_setscl(void *bus, int val)
120{
121 struct s_i2c_bus *p = (struct s_i2c_bus *)bus;
122 unsigned int r;
123
124 SET_CR_IX(p, p->i2c_reg);
125 r = GET_CR_DATA(p);
126 r |= I2C_ENAB;
127 if (val) {
128 r |= I2C_SCL_OUT;
129 } else {
130 r &= ~I2C_SCL_OUT;
131 }
132 SET_CR_DATA(p, r);
133}
134
135static void bit_s3via_setsda(void *bus, int val)
136{
137 struct s_i2c_bus *p = (struct s_i2c_bus *)bus;
138 unsigned int r;
139
140 SET_CR_IX(p, p->i2c_reg);
141 r = GET_CR_DATA(p);
142 r |= I2C_ENAB;
143 if (val) {
144 r |= I2C_SDA_OUT;
145 } else {
146 r &= ~I2C_SDA_OUT;
147 }
148 SET_CR_DATA(p, r);
149}
150
151static int bit_s3via_getscl(void *bus)
152{
153 struct s_i2c_bus *p = (struct s_i2c_bus *)bus;
154
155 SET_CR_IX(p, p->i2c_reg);
156 return (0 != (GET_CR_DATA(p) & I2C_SCL_IN));
157}
158
159static int bit_s3via_getsda(void *bus)
160{
161 struct s_i2c_bus *p = (struct s_i2c_bus *)bus;
162
163 SET_CR_IX(p, p->i2c_reg);
164 return (0 != (GET_CR_DATA(p) & I2C_SDA_IN));
165}
166
167
168/*
169 * adapter initialisation
170 */
171static int i2c_register_bus(struct pci_dev *dev, struct s_i2c_bus *p, void __iomem *mmvga, u32 i2c_reg)
172{
173 int ret;
174 p->adap.owner = THIS_MODULE;
175 p->adap.id = I2C_HW_B_S3VIA;
176 p->adap.algo_data = &p->algo;
177 p->adap.dev.parent = &dev->dev;
178 p->algo.setsda = bit_s3via_setsda;
179 p->algo.setscl = bit_s3via_setscl;
180 p->algo.getsda = bit_s3via_getsda;
181 p->algo.getscl = bit_s3via_getscl;
182 p->algo.udelay = CYCLE_DELAY;
183 p->algo.timeout = TIMEOUT;
184 p->algo.data = p;
185 p->mmvga = mmvga;
186 p->i2c_reg = i2c_reg;
187
188 ret = i2c_bit_add_bus(&p->adap);
189 if (ret) {
190 return ret;
191 }
192
193 p->adap_ok = 1;
194 return 0;
195}
196
197
198/*
199 * Cleanup stuff
200 */
201static void prosavage_remove(struct pci_dev *dev)
202{
203 struct s_i2c_chip *chip;
204 int i, ret;
205
206 chip = (struct s_i2c_chip *)pci_get_drvdata(dev);
207
208 if (!chip) {
209 return;
210 }
211 for (i = MAX_BUSSES - 1; i >= 0; i--) {
212 if (chip->i2c_bus[i].adap_ok == 0)
213 continue;
214
215 ret = i2c_del_adapter(&chip->i2c_bus[i].adap);
216 if (ret) {
217 dev_err(&dev->dev, "%s not removed\n",
218 chip->i2c_bus[i].adap.name);
219 }
220 }
221 if (chip->mmio) {
222 iounmap(chip->mmio);
223 }
224 kfree(chip);
225}
226
227
228/*
229 * Detect chip and initialize it
230 */
231static int __devinit prosavage_probe(struct pci_dev *dev, const struct pci_device_id *id)
232{
233 int ret;
234 unsigned long base, len;
235 struct s_i2c_chip *chip;
236 struct s_i2c_bus *bus;
237
238 pci_set_drvdata(dev, kzalloc(sizeof(struct s_i2c_chip), GFP_KERNEL));
239 chip = (struct s_i2c_chip *)pci_get_drvdata(dev);
240 if (chip == NULL) {
241 return -ENOMEM;
242 }
243
244 base = dev->resource[0].start & PCI_BASE_ADDRESS_MEM_MASK;
245 len = dev->resource[0].end - base + 1;
246 chip->mmio = ioremap_nocache(base, len);
247
248 if (chip->mmio == NULL) {
249 dev_err(&dev->dev, "ioremap failed\n");
250 prosavage_remove(dev);
251 return -ENODEV;
252 }
253
254
255 /*
256 * Chip initialisation
257 */
258 /* Unlock Extended IO Space ??? */
259
260
261 /*
262 * i2c bus registration
263 */
264 bus = &chip->i2c_bus[0];
265 snprintf(bus->adap.name, sizeof(bus->adap.name),
266 "ProSavage I2C bus at %02x:%02x.%x",
267 dev->bus->number, PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
268 ret = i2c_register_bus(dev, bus, chip->mmio + 0x8000, CR_SERIAL1);
269 if (ret) {
270 goto err_adap;
271 }
272 /*
273 * ddc bus registration
274 */
275 bus = &chip->i2c_bus[1];
276 snprintf(bus->adap.name, sizeof(bus->adap.name),
277 "ProSavage DDC bus at %02x:%02x.%x",
278 dev->bus->number, PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
279 ret = i2c_register_bus(dev, bus, chip->mmio + 0x8000, CR_SERIAL2);
280 if (ret) {
281 goto err_adap;
282 }
283 return 0;
284err_adap:
285 dev_err(&dev->dev, "%s failed\n", bus->adap.name);
286 prosavage_remove(dev);
287 return ret;
288}
289
290
291/*
292 * Data for PCI driver interface
293 */
294static struct pci_device_id prosavage_pci_tbl[] = {
295 { PCI_DEVICE(PCI_VENDOR_ID_S3, PCI_DEVICE_ID_S3_SAVAGE4) },
296 { PCI_DEVICE(PCI_VENDOR_ID_S3, PCI_DEVICE_ID_S3_PROSAVAGE8) },
297 { 0, },
298};
299
300MODULE_DEVICE_TABLE (pci, prosavage_pci_tbl);
301
302static struct pci_driver prosavage_driver = {
303 .name = "prosavage_smbus",
304 .id_table = prosavage_pci_tbl,
305 .probe = prosavage_probe,
306 .remove = prosavage_remove,
307};
308
309static int __init i2c_prosavage_init(void)
310{
311 return pci_register_driver(&prosavage_driver);
312}
313
314static void __exit i2c_prosavage_exit(void)
315{
316 pci_unregister_driver(&prosavage_driver);
317}
318
319MODULE_DEVICE_TABLE(pci, prosavage_pci_tbl);
320MODULE_AUTHOR("Henk Vergonet");
321MODULE_DESCRIPTION("ProSavage VIA 8365/8375 smbus driver");
322MODULE_LICENSE("GPL");
323
324module_init (i2c_prosavage_init);
325module_exit (i2c_prosavage_exit);
diff --git a/drivers/i2c/busses/i2c-pxa.c b/drivers/i2c/busses/i2c-pxa.c
index dde6ce963a19..af9e6034d7fb 100644
--- a/drivers/i2c/busses/i2c-pxa.c
+++ b/drivers/i2c/busses/i2c-pxa.c
@@ -1104,5 +1104,5 @@ static void __exit i2c_adap_pxa_exit(void)
1104MODULE_LICENSE("GPL"); 1104MODULE_LICENSE("GPL");
1105MODULE_ALIAS("platform:pxa2xx-i2c"); 1105MODULE_ALIAS("platform:pxa2xx-i2c");
1106 1106
1107module_init(i2c_adap_pxa_init); 1107subsys_initcall(i2c_adap_pxa_init);
1108module_exit(i2c_adap_pxa_exit); 1108module_exit(i2c_adap_pxa_exit);
diff --git a/drivers/i2c/busses/i2c-s3c2410.c b/drivers/i2c/busses/i2c-s3c2410.c
index 9e8c875437be..007390ad9810 100644
--- a/drivers/i2c/busses/i2c-s3c2410.c
+++ b/drivers/i2c/busses/i2c-s3c2410.c
@@ -590,7 +590,7 @@ static struct s3c24xx_i2c s3c24xx_i2c = {
590 .owner = THIS_MODULE, 590 .owner = THIS_MODULE,
591 .algo = &s3c24xx_i2c_algorithm, 591 .algo = &s3c24xx_i2c_algorithm,
592 .retries = 2, 592 .retries = 2,
593 .class = I2C_CLASS_HWMON, 593 .class = I2C_CLASS_HWMON | I2C_CLASS_SPD,
594 }, 594 },
595}; 595};
596 596
diff --git a/drivers/i2c/busses/i2c-savage4.c b/drivers/i2c/busses/i2c-savage4.c
deleted file mode 100644
index 8adf4abaa035..000000000000
--- a/drivers/i2c/busses/i2c-savage4.c
+++ /dev/null
@@ -1,185 +0,0 @@
1/*
2 i2c-savage4.c - Part of lm_sensors, Linux kernel modules for hardware
3 monitoring
4 Copyright (C) 1998-2003 The LM Sensors Team
5 Alexander Wold <awold@bigfoot.com>
6 Mark D. Studebaker <mdsxyz123@yahoo.com>
7
8 Based on i2c-voodoo3.c.
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23*/
24
25/* This interfaces to the I2C bus of the Savage4 to gain access to
26 the BT869 and possibly other I2C devices. The DDC bus is not
27 yet supported because its register is not memory-mapped.
28*/
29
30#include <linux/kernel.h>
31#include <linux/module.h>
32#include <linux/init.h>
33#include <linux/pci.h>
34#include <linux/i2c.h>
35#include <linux/i2c-algo-bit.h>
36#include <asm/io.h>
37
38/* device IDs */
39#define PCI_CHIP_SAVAGE4 0x8A22
40#define PCI_CHIP_SAVAGE2000 0x9102
41
42#define REG 0xff20 /* Serial Port 1 Register */
43
44/* bit locations in the register */
45#define I2C_ENAB 0x00000020
46#define I2C_SCL_OUT 0x00000001
47#define I2C_SDA_OUT 0x00000002
48#define I2C_SCL_IN 0x00000008
49#define I2C_SDA_IN 0x00000010
50
51/* delays */
52#define CYCLE_DELAY 10
53#define TIMEOUT (HZ / 2)
54
55
56static void __iomem *ioaddr;
57
58/* The sav GPIO registers don't have individual masks for each bit
59 so we always have to read before writing. */
60
61static void bit_savi2c_setscl(void *data, int val)
62{
63 unsigned int r;
64 r = readl(ioaddr + REG);
65 if(val)
66 r |= I2C_SCL_OUT;
67 else
68 r &= ~I2C_SCL_OUT;
69 writel(r, ioaddr + REG);
70 readl(ioaddr + REG); /* flush posted write */
71}
72
73static void bit_savi2c_setsda(void *data, int val)
74{
75 unsigned int r;
76 r = readl(ioaddr + REG);
77 if(val)
78 r |= I2C_SDA_OUT;
79 else
80 r &= ~I2C_SDA_OUT;
81 writel(r, ioaddr + REG);
82 readl(ioaddr + REG); /* flush posted write */
83}
84
85/* The GPIO pins are open drain, so the pins always remain outputs.
86 We rely on the i2c-algo-bit routines to set the pins high before
87 reading the input from other chips. */
88
89static int bit_savi2c_getscl(void *data)
90{
91 return (0 != (readl(ioaddr + REG) & I2C_SCL_IN));
92}
93
94static int bit_savi2c_getsda(void *data)
95{
96 return (0 != (readl(ioaddr + REG) & I2C_SDA_IN));
97}
98
99/* Configures the chip */
100
101static int config_s4(struct pci_dev *dev)
102{
103 unsigned long cadr;
104
105 /* map memory */
106 cadr = dev->resource[0].start;
107 cadr &= PCI_BASE_ADDRESS_MEM_MASK;
108 ioaddr = ioremap_nocache(cadr, 0x0080000);
109 if (ioaddr) {
110 /* writel(0x8160, ioaddr + REG2); */
111 writel(0x00000020, ioaddr + REG);
112 dev_info(&dev->dev, "Using Savage4 at %p\n", ioaddr);
113 return 0;
114 }
115 return -ENODEV;
116}
117
118static struct i2c_algo_bit_data sav_i2c_bit_data = {
119 .setsda = bit_savi2c_setsda,
120 .setscl = bit_savi2c_setscl,
121 .getsda = bit_savi2c_getsda,
122 .getscl = bit_savi2c_getscl,
123 .udelay = CYCLE_DELAY,
124 .timeout = TIMEOUT
125};
126
127static struct i2c_adapter savage4_i2c_adapter = {
128 .owner = THIS_MODULE,
129 .id = I2C_HW_B_SAVAGE,
130 .name = "I2C Savage4 adapter",
131 .algo_data = &sav_i2c_bit_data,
132};
133
134static struct pci_device_id savage4_ids[] __devinitdata = {
135 { PCI_DEVICE(PCI_VENDOR_ID_S3, PCI_CHIP_SAVAGE4) },
136 { PCI_DEVICE(PCI_VENDOR_ID_S3, PCI_CHIP_SAVAGE2000) },
137 { 0, }
138};
139
140MODULE_DEVICE_TABLE (pci, savage4_ids);
141
142static int __devinit savage4_probe(struct pci_dev *dev, const struct pci_device_id *id)
143{
144 int retval;
145
146 retval = config_s4(dev);
147 if (retval)
148 return retval;
149
150 /* set up the sysfs linkage to our parent device */
151 savage4_i2c_adapter.dev.parent = &dev->dev;
152
153 return i2c_bit_add_bus(&savage4_i2c_adapter);
154}
155
156static void __devexit savage4_remove(struct pci_dev *dev)
157{
158 i2c_del_adapter(&savage4_i2c_adapter);
159 iounmap(ioaddr);
160}
161
162static struct pci_driver savage4_driver = {
163 .name = "savage4_smbus",
164 .id_table = savage4_ids,
165 .probe = savage4_probe,
166 .remove = __devexit_p(savage4_remove),
167};
168
169static int __init i2c_savage4_init(void)
170{
171 return pci_register_driver(&savage4_driver);
172}
173
174static void __exit i2c_savage4_exit(void)
175{
176 pci_unregister_driver(&savage4_driver);
177}
178
179MODULE_AUTHOR("Alexander Wold <awold@bigfoot.com> "
180 "and Mark D. Studebaker <mdsxyz123@yahoo.com>");
181MODULE_DESCRIPTION("Savage4 I2C/SMBus driver");
182MODULE_LICENSE("GPL");
183
184module_init(i2c_savage4_init);
185module_exit(i2c_savage4_exit);
diff --git a/drivers/i2c/busses/i2c-sibyte.c b/drivers/i2c/busses/i2c-sibyte.c
index 114634da6c6e..4ddefbf238e9 100644
--- a/drivers/i2c/busses/i2c-sibyte.c
+++ b/drivers/i2c/busses/i2c-sibyte.c
@@ -143,7 +143,7 @@ static int __init i2c_sibyte_add_bus(struct i2c_adapter *i2c_adap, int speed)
143 csr_out32(speed, SMB_CSR(adap,R_SMB_FREQ)); 143 csr_out32(speed, SMB_CSR(adap,R_SMB_FREQ));
144 csr_out32(0, SMB_CSR(adap,R_SMB_CONTROL)); 144 csr_out32(0, SMB_CSR(adap,R_SMB_CONTROL));
145 145
146 return i2c_add_adapter(i2c_adap); 146 return i2c_add_numbered_adapter(i2c_adap);
147} 147}
148 148
149 149
@@ -156,17 +156,19 @@ static struct i2c_adapter sibyte_board_adapter[2] = {
156 { 156 {
157 .owner = THIS_MODULE, 157 .owner = THIS_MODULE,
158 .id = I2C_HW_SIBYTE, 158 .id = I2C_HW_SIBYTE,
159 .class = I2C_CLASS_HWMON, 159 .class = I2C_CLASS_HWMON | I2C_CLASS_SPD,
160 .algo = NULL, 160 .algo = NULL,
161 .algo_data = &sibyte_board_data[0], 161 .algo_data = &sibyte_board_data[0],
162 .nr = 0,
162 .name = "SiByte SMBus 0", 163 .name = "SiByte SMBus 0",
163 }, 164 },
164 { 165 {
165 .owner = THIS_MODULE, 166 .owner = THIS_MODULE,
166 .id = I2C_HW_SIBYTE, 167 .id = I2C_HW_SIBYTE,
167 .class = I2C_CLASS_HWMON, 168 .class = I2C_CLASS_HWMON | I2C_CLASS_SPD,
168 .algo = NULL, 169 .algo = NULL,
169 .algo_data = &sibyte_board_data[1], 170 .algo_data = &sibyte_board_data[1],
171 .nr = 1,
170 .name = "SiByte SMBus 1", 172 .name = "SiByte SMBus 1",
171 }, 173 },
172}; 174};
diff --git a/drivers/i2c/busses/i2c-sis5595.c b/drivers/i2c/busses/i2c-sis5595.c
index 9ca8f9155f95..dfc2d5eb6a68 100644
--- a/drivers/i2c/busses/i2c-sis5595.c
+++ b/drivers/i2c/busses/i2c-sis5595.c
@@ -1,6 +1,4 @@
1/* 1/*
2 sis5595.c - Part of lm_sensors, Linux kernel modules for hardware
3 monitoring
4 Copyright (c) 1998, 1999 Frodo Looijaard <frodol@dds.nl> and 2 Copyright (c) 1998, 1999 Frodo Looijaard <frodol@dds.nl> and
5 Philip Edelbrock <phil@netroedge.com> 3 Philip Edelbrock <phil@netroedge.com>
6 4
@@ -62,6 +60,7 @@
62#include <linux/ioport.h> 60#include <linux/ioport.h>
63#include <linux/init.h> 61#include <linux/init.h>
64#include <linux/i2c.h> 62#include <linux/i2c.h>
63#include <linux/acpi.h>
65#include <asm/io.h> 64#include <asm/io.h>
66 65
67static int blacklist[] = { 66static int blacklist[] = {
@@ -174,6 +173,11 @@ static int sis5595_setup(struct pci_dev *SIS5595_dev)
174 173
175 /* NB: We grab just the two SMBus registers here, but this may still 174 /* NB: We grab just the two SMBus registers here, but this may still
176 * interfere with ACPI :-( */ 175 * interfere with ACPI :-( */
176 retval = acpi_check_region(sis5595_base + SMB_INDEX, 2,
177 sis5595_driver.name);
178 if (retval)
179 return retval;
180
177 if (!request_region(sis5595_base + SMB_INDEX, 2, 181 if (!request_region(sis5595_base + SMB_INDEX, 2,
178 sis5595_driver.name)) { 182 sis5595_driver.name)) {
179 dev_err(&SIS5595_dev->dev, "SMBus registers 0x%04x-0x%04x already in use!\n", 183 dev_err(&SIS5595_dev->dev, "SMBus registers 0x%04x-0x%04x already in use!\n",
@@ -236,7 +240,7 @@ static int sis5595_transaction(struct i2c_adapter *adap)
236 sis5595_write(SMB_STS_HI, temp >> 8); 240 sis5595_write(SMB_STS_HI, temp >> 8);
237 if ((temp = sis5595_read(SMB_STS_LO) + (sis5595_read(SMB_STS_HI) << 8)) != 0x00) { 241 if ((temp = sis5595_read(SMB_STS_LO) + (sis5595_read(SMB_STS_HI) << 8)) != 0x00) {
238 dev_dbg(&adap->dev, "Failed! (%02x)\n", temp); 242 dev_dbg(&adap->dev, "Failed! (%02x)\n", temp);
239 return -1; 243 return -EBUSY;
240 } else { 244 } else {
241 dev_dbg(&adap->dev, "Successful!\n"); 245 dev_dbg(&adap->dev, "Successful!\n");
242 } 246 }
@@ -254,19 +258,19 @@ static int sis5595_transaction(struct i2c_adapter *adap)
254 /* If the SMBus is still busy, we give up */ 258 /* If the SMBus is still busy, we give up */
255 if (timeout >= MAX_TIMEOUT) { 259 if (timeout >= MAX_TIMEOUT) {
256 dev_dbg(&adap->dev, "SMBus Timeout!\n"); 260 dev_dbg(&adap->dev, "SMBus Timeout!\n");
257 result = -1; 261 result = -ETIMEDOUT;
258 } 262 }
259 263
260 if (temp & 0x10) { 264 if (temp & 0x10) {
261 dev_dbg(&adap->dev, "Error: Failed bus transaction\n"); 265 dev_dbg(&adap->dev, "Error: Failed bus transaction\n");
262 result = -1; 266 result = -ENXIO;
263 } 267 }
264 268
265 if (temp & 0x20) { 269 if (temp & 0x20) {
266 dev_err(&adap->dev, "Bus collision! SMBus may be locked until " 270 dev_err(&adap->dev, "Bus collision! SMBus may be locked until "
267 "next hard reset (or not...)\n"); 271 "next hard reset (or not...)\n");
268 /* Clock stops and slave is stuck in mid-transmission */ 272 /* Clock stops and slave is stuck in mid-transmission */
269 result = -1; 273 result = -EIO;
270 } 274 }
271 275
272 temp = sis5595_read(SMB_STS_LO) + (sis5595_read(SMB_STS_HI) << 8); 276 temp = sis5595_read(SMB_STS_LO) + (sis5595_read(SMB_STS_HI) << 8);
@@ -282,11 +286,13 @@ static int sis5595_transaction(struct i2c_adapter *adap)
282 return result; 286 return result;
283} 287}
284 288
285/* Return -1 on error. */ 289/* Return negative errno on error. */
286static s32 sis5595_access(struct i2c_adapter *adap, u16 addr, 290static s32 sis5595_access(struct i2c_adapter *adap, u16 addr,
287 unsigned short flags, char read_write, 291 unsigned short flags, char read_write,
288 u8 command, int size, union i2c_smbus_data *data) 292 u8 command, int size, union i2c_smbus_data *data)
289{ 293{
294 int status;
295
290 switch (size) { 296 switch (size) {
291 case I2C_SMBUS_QUICK: 297 case I2C_SMBUS_QUICK:
292 sis5595_write(SMB_ADDR, ((addr & 0x7f) << 1) | (read_write & 0x01)); 298 sis5595_write(SMB_ADDR, ((addr & 0x7f) << 1) | (read_write & 0x01));
@@ -318,13 +324,14 @@ static s32 sis5595_access(struct i2c_adapter *adap, u16 addr,
318 break; 324 break;
319 default: 325 default:
320 dev_warn(&adap->dev, "Unsupported transaction %d\n", size); 326 dev_warn(&adap->dev, "Unsupported transaction %d\n", size);
321 return -1; 327 return -EOPNOTSUPP;
322 } 328 }
323 329
324 sis5595_write(SMB_CTL_LO, ((size & 0x0E))); 330 sis5595_write(SMB_CTL_LO, ((size & 0x0E)));
325 331
326 if (sis5595_transaction(adap)) 332 status = sis5595_transaction(adap);
327 return -1; 333 if (status)
334 return status;
328 335
329 if ((size != SIS5595_PROC_CALL) && 336 if ((size != SIS5595_PROC_CALL) &&
330 ((read_write == I2C_SMBUS_WRITE) || (size == SIS5595_QUICK))) 337 ((read_write == I2C_SMBUS_WRITE) || (size == SIS5595_QUICK)))
@@ -359,7 +366,7 @@ static const struct i2c_algorithm smbus_algorithm = {
359static struct i2c_adapter sis5595_adapter = { 366static struct i2c_adapter sis5595_adapter = {
360 .owner = THIS_MODULE, 367 .owner = THIS_MODULE,
361 .id = I2C_HW_SMBUS_SIS5595, 368 .id = I2C_HW_SMBUS_SIS5595,
362 .class = I2C_CLASS_HWMON, 369 .class = I2C_CLASS_HWMON | I2C_CLASS_SPD,
363 .algo = &smbus_algorithm, 370 .algo = &smbus_algorithm,
364}; 371};
365 372
diff --git a/drivers/i2c/busses/i2c-sis630.c b/drivers/i2c/busses/i2c-sis630.c
index 3765dd7f450f..e7c4b790da54 100644
--- a/drivers/i2c/busses/i2c-sis630.c
+++ b/drivers/i2c/busses/i2c-sis630.c
@@ -1,7 +1,4 @@
1/* 1/*
2 i2c-sis630.c - Part of lm_sensors, Linux kernel modules for hardware
3 monitoring
4
5 Copyright (c) 2002,2003 Alexander Malysh <amalysh@web.de> 2 Copyright (c) 2002,2003 Alexander Malysh <amalysh@web.de>
6 3
7 This program is free software; you can redistribute it and/or modify 4 This program is free software; you can redistribute it and/or modify
@@ -55,6 +52,7 @@
55#include <linux/ioport.h> 52#include <linux/ioport.h>
56#include <linux/init.h> 53#include <linux/init.h>
57#include <linux/i2c.h> 54#include <linux/i2c.h>
55#include <linux/acpi.h>
58#include <asm/io.h> 56#include <asm/io.h>
59 57
60/* SIS630 SMBus registers */ 58/* SIS630 SMBus registers */
@@ -134,7 +132,7 @@ static int sis630_transaction_start(struct i2c_adapter *adap, int size, u8 *oldc
134 132
135 if ((temp = sis630_read(SMB_CNT) & 0x03) != 0x00) { 133 if ((temp = sis630_read(SMB_CNT) & 0x03) != 0x00) {
136 dev_dbg(&adap->dev, "Failed! (%02x)\n", temp); 134 dev_dbg(&adap->dev, "Failed! (%02x)\n", temp);
137 return -1; 135 return -EBUSY;
138 } else { 136 } else {
139 dev_dbg(&adap->dev, "Successful!\n"); 137 dev_dbg(&adap->dev, "Successful!\n");
140 } 138 }
@@ -177,17 +175,17 @@ static int sis630_transaction_wait(struct i2c_adapter *adap, int size)
177 /* If the SMBus is still busy, we give up */ 175 /* If the SMBus is still busy, we give up */
178 if (timeout >= MAX_TIMEOUT) { 176 if (timeout >= MAX_TIMEOUT) {
179 dev_dbg(&adap->dev, "SMBus Timeout!\n"); 177 dev_dbg(&adap->dev, "SMBus Timeout!\n");
180 result = -1; 178 result = -ETIMEDOUT;
181 } 179 }
182 180
183 if (temp & 0x02) { 181 if (temp & 0x02) {
184 dev_dbg(&adap->dev, "Error: Failed bus transaction\n"); 182 dev_dbg(&adap->dev, "Error: Failed bus transaction\n");
185 result = -1; 183 result = -ENXIO;
186 } 184 }
187 185
188 if (temp & 0x04) { 186 if (temp & 0x04) {
189 dev_err(&adap->dev, "Bus collision!\n"); 187 dev_err(&adap->dev, "Bus collision!\n");
190 result = -1; 188 result = -EIO;
191 /* 189 /*
192 TBD: Datasheet say: 190 TBD: Datasheet say:
193 the software should clear this bit and restart SMBUS operation. 191 the software should clear this bit and restart SMBUS operation.
@@ -250,8 +248,10 @@ static int sis630_block_data(struct i2c_adapter *adap, union i2c_smbus_data *dat
250 if (i==8 || (len<8 && i==len)) { 248 if (i==8 || (len<8 && i==len)) {
251 dev_dbg(&adap->dev, "start trans len=%d i=%d\n",len ,i); 249 dev_dbg(&adap->dev, "start trans len=%d i=%d\n",len ,i);
252 /* first transaction */ 250 /* first transaction */
253 if (sis630_transaction_start(adap, SIS630_BLOCK_DATA, &oldclock)) 251 rc = sis630_transaction_start(adap,
254 return -1; 252 SIS630_BLOCK_DATA, &oldclock);
253 if (rc)
254 return rc;
255 } 255 }
256 else if ((i-1)%8 == 7 || i==len) { 256 else if ((i-1)%8 == 7 || i==len) {
257 dev_dbg(&adap->dev, "trans_wait len=%d i=%d\n",len,i); 257 dev_dbg(&adap->dev, "trans_wait len=%d i=%d\n",len,i);
@@ -264,9 +264,10 @@ static int sis630_block_data(struct i2c_adapter *adap, union i2c_smbus_data *dat
264 */ 264 */
265 sis630_write(SMB_STS,0x10); 265 sis630_write(SMB_STS,0x10);
266 } 266 }
267 if (sis630_transaction_wait(adap, SIS630_BLOCK_DATA)) { 267 rc = sis630_transaction_wait(adap,
268 SIS630_BLOCK_DATA);
269 if (rc) {
268 dev_dbg(&adap->dev, "trans_wait failed\n"); 270 dev_dbg(&adap->dev, "trans_wait failed\n");
269 rc = -1;
270 break; 271 break;
271 } 272 }
272 } 273 }
@@ -275,13 +276,14 @@ static int sis630_block_data(struct i2c_adapter *adap, union i2c_smbus_data *dat
275 else { 276 else {
276 /* read request */ 277 /* read request */
277 data->block[0] = len = 0; 278 data->block[0] = len = 0;
278 if (sis630_transaction_start(adap, SIS630_BLOCK_DATA, &oldclock)) { 279 rc = sis630_transaction_start(adap,
279 return -1; 280 SIS630_BLOCK_DATA, &oldclock);
280 } 281 if (rc)
282 return rc;
281 do { 283 do {
282 if (sis630_transaction_wait(adap, SIS630_BLOCK_DATA)) { 284 rc = sis630_transaction_wait(adap, SIS630_BLOCK_DATA);
285 if (rc) {
283 dev_dbg(&adap->dev, "trans_wait failed\n"); 286 dev_dbg(&adap->dev, "trans_wait failed\n");
284 rc = -1;
285 break; 287 break;
286 } 288 }
287 /* if this first transaction then read byte count */ 289 /* if this first transaction then read byte count */
@@ -311,11 +313,13 @@ static int sis630_block_data(struct i2c_adapter *adap, union i2c_smbus_data *dat
311 return rc; 313 return rc;
312} 314}
313 315
314/* Return -1 on error. */ 316/* Return negative errno on error. */
315static s32 sis630_access(struct i2c_adapter *adap, u16 addr, 317static s32 sis630_access(struct i2c_adapter *adap, u16 addr,
316 unsigned short flags, char read_write, 318 unsigned short flags, char read_write,
317 u8 command, int size, union i2c_smbus_data *data) 319 u8 command, int size, union i2c_smbus_data *data)
318{ 320{
321 int status;
322
319 switch (size) { 323 switch (size) {
320 case I2C_SMBUS_QUICK: 324 case I2C_SMBUS_QUICK:
321 sis630_write(SMB_ADDR, ((addr & 0x7f) << 1) | (read_write & 0x01)); 325 sis630_write(SMB_ADDR, ((addr & 0x7f) << 1) | (read_write & 0x01));
@@ -350,13 +354,14 @@ static s32 sis630_access(struct i2c_adapter *adap, u16 addr,
350 size = SIS630_BLOCK_DATA; 354 size = SIS630_BLOCK_DATA;
351 return sis630_block_data(adap, data, read_write); 355 return sis630_block_data(adap, data, read_write);
352 default: 356 default:
353 printk("Unsupported I2C size\n"); 357 dev_warn(&adap->dev, "Unsupported transaction %d\n",
354 return -1; 358 size);
355 break; 359 return -EOPNOTSUPP;
356 } 360 }
357 361
358 if (sis630_transaction(adap, size)) 362 status = sis630_transaction(adap, size);
359 return -1; 363 if (status)
364 return status;
360 365
361 if ((size != SIS630_PCALL) && 366 if ((size != SIS630_PCALL) &&
362 ((read_write == I2C_SMBUS_WRITE) || (size == SIS630_QUICK))) { 367 ((read_write == I2C_SMBUS_WRITE) || (size == SIS630_QUICK))) {
@@ -372,9 +377,6 @@ static s32 sis630_access(struct i2c_adapter *adap, u16 addr,
372 case SIS630_WORD_DATA: 377 case SIS630_WORD_DATA:
373 data->word = sis630_read(SMB_BYTE) + (sis630_read(SMB_BYTE + 1) << 8); 378 data->word = sis630_read(SMB_BYTE) + (sis630_read(SMB_BYTE + 1) << 8);
374 break; 379 break;
375 default:
376 return -1;
377 break;
378 } 380 }
379 381
380 return 0; 382 return 0;
@@ -433,6 +435,11 @@ static int sis630_setup(struct pci_dev *sis630_dev)
433 435
434 dev_dbg(&sis630_dev->dev, "ACPI base at 0x%04x\n", acpi_base); 436 dev_dbg(&sis630_dev->dev, "ACPI base at 0x%04x\n", acpi_base);
435 437
438 retval = acpi_check_region(acpi_base + SMB_STS, SIS630_SMB_IOREGION,
439 sis630_driver.name);
440 if (retval)
441 goto exit;
442
436 /* Everything is happy, let's grab the memory and set things up. */ 443 /* Everything is happy, let's grab the memory and set things up. */
437 if (!request_region(acpi_base + SMB_STS, SIS630_SMB_IOREGION, 444 if (!request_region(acpi_base + SMB_STS, SIS630_SMB_IOREGION,
438 sis630_driver.name)) { 445 sis630_driver.name)) {
@@ -458,7 +465,7 @@ static const struct i2c_algorithm smbus_algorithm = {
458static struct i2c_adapter sis630_adapter = { 465static struct i2c_adapter sis630_adapter = {
459 .owner = THIS_MODULE, 466 .owner = THIS_MODULE,
460 .id = I2C_HW_SMBUS_SIS630, 467 .id = I2C_HW_SMBUS_SIS630,
461 .class = I2C_CLASS_HWMON, 468 .class = I2C_CLASS_HWMON | I2C_CLASS_SPD,
462 .algo = &smbus_algorithm, 469 .algo = &smbus_algorithm,
463}; 470};
464 471
diff --git a/drivers/i2c/busses/i2c-sis96x.c b/drivers/i2c/busses/i2c-sis96x.c
index dc235bb8e24d..f1bba6396641 100644
--- a/drivers/i2c/busses/i2c-sis96x.c
+++ b/drivers/i2c/busses/i2c-sis96x.c
@@ -1,7 +1,4 @@
1/* 1/*
2 sis96x.c - Part of lm_sensors, Linux kernel modules for hardware
3 monitoring
4
5 Copyright (c) 2003 Mark M. Hoffman <mhoffman@lightlink.com> 2 Copyright (c) 2003 Mark M. Hoffman <mhoffman@lightlink.com>
6 3
7 This program is free software; you can redistribute it and/or modify 4 This program is free software; you can redistribute it and/or modify
@@ -40,6 +37,7 @@
40#include <linux/ioport.h> 37#include <linux/ioport.h>
41#include <linux/i2c.h> 38#include <linux/i2c.h>
42#include <linux/init.h> 39#include <linux/init.h>
40#include <linux/acpi.h>
43#include <asm/io.h> 41#include <asm/io.h>
44 42
45/* base address register in PCI config space */ 43/* base address register in PCI config space */
@@ -111,7 +109,7 @@ static int sis96x_transaction(int size)
111 /* check it again */ 109 /* check it again */
112 if (((temp = sis96x_read(SMB_CNT)) & 0x03) != 0x00) { 110 if (((temp = sis96x_read(SMB_CNT)) & 0x03) != 0x00) {
113 dev_dbg(&sis96x_adapter.dev, "Failed (0x%02x)\n", temp); 111 dev_dbg(&sis96x_adapter.dev, "Failed (0x%02x)\n", temp);
114 return -1; 112 return -EBUSY;
115 } else { 113 } else {
116 dev_dbg(&sis96x_adapter.dev, "Successful\n"); 114 dev_dbg(&sis96x_adapter.dev, "Successful\n");
117 } 115 }
@@ -136,19 +134,19 @@ static int sis96x_transaction(int size)
136 /* If the SMBus is still busy, we give up */ 134 /* If the SMBus is still busy, we give up */
137 if (timeout >= MAX_TIMEOUT) { 135 if (timeout >= MAX_TIMEOUT) {
138 dev_dbg(&sis96x_adapter.dev, "SMBus Timeout! (0x%02x)\n", temp); 136 dev_dbg(&sis96x_adapter.dev, "SMBus Timeout! (0x%02x)\n", temp);
139 result = -1; 137 result = -ETIMEDOUT;
140 } 138 }
141 139
142 /* device error - probably missing ACK */ 140 /* device error - probably missing ACK */
143 if (temp & 0x02) { 141 if (temp & 0x02) {
144 dev_dbg(&sis96x_adapter.dev, "Failed bus transaction!\n"); 142 dev_dbg(&sis96x_adapter.dev, "Failed bus transaction!\n");
145 result = -1; 143 result = -ENXIO;
146 } 144 }
147 145
148 /* bus collision */ 146 /* bus collision */
149 if (temp & 0x04) { 147 if (temp & 0x04) {
150 dev_dbg(&sis96x_adapter.dev, "Bus collision!\n"); 148 dev_dbg(&sis96x_adapter.dev, "Bus collision!\n");
151 result = -1; 149 result = -EIO;
152 } 150 }
153 151
154 /* Finish up by resetting the bus */ 152 /* Finish up by resetting the bus */
@@ -161,11 +159,12 @@ static int sis96x_transaction(int size)
161 return result; 159 return result;
162} 160}
163 161
164/* Return -1 on error. */ 162/* Return negative errno on error. */
165static s32 sis96x_access(struct i2c_adapter * adap, u16 addr, 163static s32 sis96x_access(struct i2c_adapter * adap, u16 addr,
166 unsigned short flags, char read_write, 164 unsigned short flags, char read_write,
167 u8 command, int size, union i2c_smbus_data * data) 165 u8 command, int size, union i2c_smbus_data * data)
168{ 166{
167 int status;
169 168
170 switch (size) { 169 switch (size) {
171 case I2C_SMBUS_QUICK: 170 case I2C_SMBUS_QUICK:
@@ -200,20 +199,14 @@ static s32 sis96x_access(struct i2c_adapter * adap, u16 addr,
200 SIS96x_PROC_CALL : SIS96x_WORD_DATA); 199 SIS96x_PROC_CALL : SIS96x_WORD_DATA);
201 break; 200 break;
202 201
203 case I2C_SMBUS_BLOCK_DATA:
204 /* TO DO: */
205 dev_info(&adap->dev, "SMBus block not implemented!\n");
206 return -1;
207 break;
208
209 default: 202 default:
210 dev_info(&adap->dev, "Unsupported I2C size\n"); 203 dev_warn(&adap->dev, "Unsupported transaction %d\n", size);
211 return -1; 204 return -EOPNOTSUPP;
212 break;
213 } 205 }
214 206
215 if (sis96x_transaction(size)) 207 status = sis96x_transaction(size);
216 return -1; 208 if (status)
209 return status;
217 210
218 if ((size != SIS96x_PROC_CALL) && 211 if ((size != SIS96x_PROC_CALL) &&
219 ((read_write == I2C_SMBUS_WRITE) || (size == SIS96x_QUICK))) 212 ((read_write == I2C_SMBUS_WRITE) || (size == SIS96x_QUICK)))
@@ -249,7 +242,7 @@ static const struct i2c_algorithm smbus_algorithm = {
249static struct i2c_adapter sis96x_adapter = { 242static struct i2c_adapter sis96x_adapter = {
250 .owner = THIS_MODULE, 243 .owner = THIS_MODULE,
251 .id = I2C_HW_SMBUS_SIS96X, 244 .id = I2C_HW_SMBUS_SIS96X,
252 .class = I2C_CLASS_HWMON, 245 .class = I2C_CLASS_HWMON | I2C_CLASS_SPD,
253 .algo = &smbus_algorithm, 246 .algo = &smbus_algorithm,
254}; 247};
255 248
@@ -286,6 +279,10 @@ static int __devinit sis96x_probe(struct pci_dev *dev,
286 dev_info(&dev->dev, "SiS96x SMBus base address: 0x%04x\n", 279 dev_info(&dev->dev, "SiS96x SMBus base address: 0x%04x\n",
287 sis96x_smbus_base); 280 sis96x_smbus_base);
288 281
282 retval = acpi_check_resource_conflict(&dev->resource[SIS96x_BAR]);
283 if (retval)
284 return retval;
285
289 /* Everything is happy, let's grab the memory and set things up. */ 286 /* Everything is happy, let's grab the memory and set things up. */
290 if (!request_region(sis96x_smbus_base, SMB_IOSIZE, 287 if (!request_region(sis96x_smbus_base, SMB_IOSIZE,
291 sis96x_driver.name)) { 288 sis96x_driver.name)) {
diff --git a/drivers/i2c/busses/i2c-stub.c b/drivers/i2c/busses/i2c-stub.c
index d08eeec53913..1b7b2af94036 100644
--- a/drivers/i2c/busses/i2c-stub.c
+++ b/drivers/i2c/busses/i2c-stub.c
@@ -43,7 +43,7 @@ struct stub_chip {
43 43
44static struct stub_chip *stub_chips; 44static struct stub_chip *stub_chips;
45 45
46/* Return -1 on error. */ 46/* Return negative errno on error. */
47static s32 stub_xfer(struct i2c_adapter * adap, u16 addr, unsigned short flags, 47static s32 stub_xfer(struct i2c_adapter * adap, u16 addr, unsigned short flags,
48 char read_write, u8 command, int size, union i2c_smbus_data * data) 48 char read_write, u8 command, int size, union i2c_smbus_data * data)
49{ 49{
@@ -120,7 +120,7 @@ static s32 stub_xfer(struct i2c_adapter * adap, u16 addr, unsigned short flags,
120 120
121 default: 121 default:
122 dev_dbg(&adap->dev, "Unsupported I2C/SMBus command\n"); 122 dev_dbg(&adap->dev, "Unsupported I2C/SMBus command\n");
123 ret = -1; 123 ret = -EOPNOTSUPP;
124 break; 124 break;
125 } /* switch (size) */ 125 } /* switch (size) */
126 126
@@ -140,7 +140,7 @@ static const struct i2c_algorithm smbus_algorithm = {
140 140
141static struct i2c_adapter stub_adapter = { 141static struct i2c_adapter stub_adapter = {
142 .owner = THIS_MODULE, 142 .owner = THIS_MODULE,
143 .class = I2C_CLASS_HWMON, 143 .class = I2C_CLASS_HWMON | I2C_CLASS_SPD,
144 .algo = &smbus_algorithm, 144 .algo = &smbus_algorithm,
145 .name = "SMBus stub driver", 145 .name = "SMBus stub driver",
146}; 146};
diff --git a/drivers/i2c/busses/i2c-taos-evm.c b/drivers/i2c/busses/i2c-taos-evm.c
index de9db49e54d9..224aa12ee7c8 100644
--- a/drivers/i2c/busses/i2c-taos-evm.c
+++ b/drivers/i2c/busses/i2c-taos-evm.c
@@ -96,9 +96,8 @@ static int taos_smbus_xfer(struct i2c_adapter *adapter, u16 addr,
96 sprintf(p, "$%02X", command); 96 sprintf(p, "$%02X", command);
97 break; 97 break;
98 default: 98 default:
99 dev_dbg(&adapter->dev, "Unsupported transaction size %d\n", 99 dev_warn(&adapter->dev, "Unsupported transaction %d\n", size);
100 size); 100 return -EOPNOTSUPP;
101 return -EINVAL;
102 } 101 }
103 102
104 /* Send the transaction to the TAOS EVM */ 103 /* Send the transaction to the TAOS EVM */
diff --git a/drivers/i2c/busses/i2c-via.c b/drivers/i2c/busses/i2c-via.c
index 61716f6b14dc..29cef0433f34 100644
--- a/drivers/i2c/busses/i2c-via.c
+++ b/drivers/i2c/busses/i2c-via.c
@@ -1,7 +1,4 @@
1/* 1/*
2 i2c-via.c - Part of lm_sensors, Linux kernel modules
3 for hardware monitoring
4
5 i2c Support for Via Technologies 82C586B South Bridge 2 i2c Support for Via Technologies 82C586B South Bridge
6 3
7 Copyright (c) 1998, 1999 Kyösti Mälkki <kmalkki@cc.hut.fi> 4 Copyright (c) 1998, 1999 Kyösti Mälkki <kmalkki@cc.hut.fi>
@@ -87,7 +84,7 @@ static struct i2c_algo_bit_data bit_data = {
87static struct i2c_adapter vt586b_adapter = { 84static struct i2c_adapter vt586b_adapter = {
88 .owner = THIS_MODULE, 85 .owner = THIS_MODULE,
89 .id = I2C_HW_B_VIA, 86 .id = I2C_HW_B_VIA,
90 .class = I2C_CLASS_HWMON, 87 .class = I2C_CLASS_HWMON | I2C_CLASS_SPD,
91 .name = "VIA i2c", 88 .name = "VIA i2c",
92 .algo_data = &bit_data, 89 .algo_data = &bit_data,
93}; 90};
diff --git a/drivers/i2c/busses/i2c-viapro.c b/drivers/i2c/busses/i2c-viapro.c
index 77b13d027f86..862eb352a2d9 100644
--- a/drivers/i2c/busses/i2c-viapro.c
+++ b/drivers/i2c/busses/i2c-viapro.c
@@ -1,6 +1,4 @@
1/* 1/*
2 i2c-viapro.c - Part of lm_sensors, Linux kernel modules for hardware
3 monitoring
4 Copyright (c) 1998 - 2002 Frodo Looijaard <frodol@dds.nl>, 2 Copyright (c) 1998 - 2002 Frodo Looijaard <frodol@dds.nl>,
5 Philip Edelbrock <phil@netroedge.com>, Kyösti Mälkki <kmalkki@cc.hut.fi>, 3 Philip Edelbrock <phil@netroedge.com>, Kyösti Mälkki <kmalkki@cc.hut.fi>,
6 Mark D. Studebaker <mdsxyz123@yahoo.com> 4 Mark D. Studebaker <mdsxyz123@yahoo.com>
@@ -50,6 +48,7 @@
50#include <linux/ioport.h> 48#include <linux/ioport.h>
51#include <linux/i2c.h> 49#include <linux/i2c.h>
52#include <linux/init.h> 50#include <linux/init.h>
51#include <linux/acpi.h>
53#include <asm/io.h> 52#include <asm/io.h>
54 53
55static struct pci_dev *vt596_pdev; 54static struct pci_dev *vt596_pdev;
@@ -152,7 +151,7 @@ static int vt596_transaction(u8 size)
152 if ((temp = inb_p(SMBHSTSTS)) & 0x1F) { 151 if ((temp = inb_p(SMBHSTSTS)) & 0x1F) {
153 dev_err(&vt596_adapter.dev, "SMBus reset failed! " 152 dev_err(&vt596_adapter.dev, "SMBus reset failed! "
154 "(0x%02x)\n", temp); 153 "(0x%02x)\n", temp);
155 return -1; 154 return -EBUSY;
156 } 155 }
157 } 156 }
158 157
@@ -167,24 +166,24 @@ static int vt596_transaction(u8 size)
167 166
168 /* If the SMBus is still busy, we give up */ 167 /* If the SMBus is still busy, we give up */
169 if (timeout >= MAX_TIMEOUT) { 168 if (timeout >= MAX_TIMEOUT) {
170 result = -1; 169 result = -ETIMEDOUT;
171 dev_err(&vt596_adapter.dev, "SMBus timeout!\n"); 170 dev_err(&vt596_adapter.dev, "SMBus timeout!\n");
172 } 171 }
173 172
174 if (temp & 0x10) { 173 if (temp & 0x10) {
175 result = -1; 174 result = -EIO;
176 dev_err(&vt596_adapter.dev, "Transaction failed (0x%02x)\n", 175 dev_err(&vt596_adapter.dev, "Transaction failed (0x%02x)\n",
177 size); 176 size);
178 } 177 }
179 178
180 if (temp & 0x08) { 179 if (temp & 0x08) {
181 result = -1; 180 result = -EIO;
182 dev_err(&vt596_adapter.dev, "SMBus collision!\n"); 181 dev_err(&vt596_adapter.dev, "SMBus collision!\n");
183 } 182 }
184 183
185 if (temp & 0x04) { 184 if (temp & 0x04) {
186 int read = inb_p(SMBHSTADD) & 0x01; 185 int read = inb_p(SMBHSTADD) & 0x01;
187 result = -1; 186 result = -ENXIO;
188 /* The quick and receive byte commands are used to probe 187 /* The quick and receive byte commands are used to probe
189 for chips, so errors are expected, and we don't want 188 for chips, so errors are expected, and we don't want
190 to frighten the user. */ 189 to frighten the user. */
@@ -202,12 +201,13 @@ static int vt596_transaction(u8 size)
202 return result; 201 return result;
203} 202}
204 203
205/* Return -1 on error, 0 on success */ 204/* Return negative errno on error, 0 on success */
206static s32 vt596_access(struct i2c_adapter *adap, u16 addr, 205static s32 vt596_access(struct i2c_adapter *adap, u16 addr,
207 unsigned short flags, char read_write, u8 command, 206 unsigned short flags, char read_write, u8 command,
208 int size, union i2c_smbus_data *data) 207 int size, union i2c_smbus_data *data)
209{ 208{
210 int i; 209 int i;
210 int status;
211 211
212 switch (size) { 212 switch (size) {
213 case I2C_SMBUS_QUICK: 213 case I2C_SMBUS_QUICK:
@@ -258,8 +258,9 @@ static s32 vt596_access(struct i2c_adapter *adap, u16 addr,
258 258
259 outb_p(((addr & 0x7f) << 1) | read_write, SMBHSTADD); 259 outb_p(((addr & 0x7f) << 1) | read_write, SMBHSTADD);
260 260
261 if (vt596_transaction(size)) /* Error in transaction */ 261 status = vt596_transaction(size);
262 return -1; 262 if (status)
263 return status;
263 264
264 if ((read_write == I2C_SMBUS_WRITE) || (size == VT596_QUICK)) 265 if ((read_write == I2C_SMBUS_WRITE) || (size == VT596_QUICK))
265 return 0; 266 return 0;
@@ -285,9 +286,9 @@ static s32 vt596_access(struct i2c_adapter *adap, u16 addr,
285 return 0; 286 return 0;
286 287
287exit_unsupported: 288exit_unsupported:
288 dev_warn(&vt596_adapter.dev, "Unsupported command invoked! (0x%02x)\n", 289 dev_warn(&vt596_adapter.dev, "Unsupported transaction %d\n",
289 size); 290 size);
290 return -1; 291 return -EOPNOTSUPP;
291} 292}
292 293
293static u32 vt596_func(struct i2c_adapter *adapter) 294static u32 vt596_func(struct i2c_adapter *adapter)
@@ -309,7 +310,7 @@ static const struct i2c_algorithm smbus_algorithm = {
309static struct i2c_adapter vt596_adapter = { 310static struct i2c_adapter vt596_adapter = {
310 .owner = THIS_MODULE, 311 .owner = THIS_MODULE,
311 .id = I2C_HW_SMBUS_VIA2, 312 .id = I2C_HW_SMBUS_VIA2,
312 .class = I2C_CLASS_HWMON, 313 .class = I2C_CLASS_HWMON | I2C_CLASS_SPD,
313 .algo = &smbus_algorithm, 314 .algo = &smbus_algorithm,
314}; 315};
315 316
@@ -354,6 +355,10 @@ static int __devinit vt596_probe(struct pci_dev *pdev,
354 } 355 }
355 356
356found: 357found:
358 error = acpi_check_region(vt596_smba, 8, vt596_driver.name);
359 if (error)
360 return error;
361
357 if (!request_region(vt596_smba, 8, vt596_driver.name)) { 362 if (!request_region(vt596_smba, 8, vt596_driver.name)) {
358 dev_err(&pdev->dev, "SMBus region 0x%x already in use!\n", 363 dev_err(&pdev->dev, "SMBus region 0x%x already in use!\n",
359 vt596_smba); 364 vt596_smba);
diff --git a/drivers/i2c/busses/i2c-voodoo3.c b/drivers/i2c/busses/i2c-voodoo3.c
index 88a3447e11e1..1d4ae26ba73d 100644
--- a/drivers/i2c/busses/i2c-voodoo3.c
+++ b/drivers/i2c/busses/i2c-voodoo3.c
@@ -1,6 +1,4 @@
1/* 1/*
2 voodoo3.c - Part of lm_sensors, Linux kernel modules for hardware
3 monitoring
4 Copyright (c) 1998, 1999 Frodo Looijaard <frodol@dds.nl>, 2 Copyright (c) 1998, 1999 Frodo Looijaard <frodol@dds.nl>,
5 Philip Edelbrock <phil@netroedge.com>, 3 Philip Edelbrock <phil@netroedge.com>,
6 Ralph Metzler <rjkm@thp.uni-koeln.de>, and 4 Ralph Metzler <rjkm@thp.uni-koeln.de>, and
diff --git a/drivers/i2c/busses/scx200_acb.c b/drivers/i2c/busses/scx200_acb.c
index 61abe0f33255..ed794b145a11 100644
--- a/drivers/i2c/busses/scx200_acb.c
+++ b/drivers/i2c/busses/scx200_acb.c
@@ -442,7 +442,7 @@ static __init struct scx200_acb_iface *scx200_create_iface(const char *text,
442 adapter->owner = THIS_MODULE; 442 adapter->owner = THIS_MODULE;
443 adapter->id = I2C_HW_SMBUS_SCX200; 443 adapter->id = I2C_HW_SMBUS_SCX200;
444 adapter->algo = &scx200_acb_algorithm; 444 adapter->algo = &scx200_acb_algorithm;
445 adapter->class = I2C_CLASS_HWMON; 445 adapter->class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
446 adapter->dev.parent = dev; 446 adapter->dev.parent = dev;
447 447
448 mutex_init(&iface->mutex); 448 mutex_init(&iface->mutex);