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authorLinus Torvalds <torvalds@linux-foundation.org>2013-02-26 12:41:53 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2013-02-26 12:41:53 -0500
commit52caa59ed335616c5254adff7911465a57ed9f14 (patch)
treede0a1e91850c9e439e82f83f228d89fee3b90b09 /drivers/i2c/busses
parent4c8c225abf972ce422c241579ce1d4d27eaeb166 (diff)
parent55827f4aa6442ddd1d6a4e1e32f2f457eb113c22 (diff)
Merge branch 'i2c/for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux
Pull i2c updates from Wolfram Sang: "Highlights: - new drivers for Intel ismt & Broadcom bcm2835 - a number of drivers got support for more variants and mostly got cleaned up on the way (sis630, i801, at91, tegra, designware) - i2c got rid of all *_set_drvdata(..., NULL) on remove/probe failure - removed the i2c_smbus_process_call from the core since there are no users - mxs can now switch between PIO and DMA depending on the message size and the bus speed can now be arbitrary In addition, there is the usual bunch of fixes, cleanups, devm_* conversions, etc" Fixed conflict (and buggy devm_* conversion) in i2c-s3c2410.c * 'i2c/for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: (39 commits) i2c: Remove unneeded xxx_set_drvdata(..., NULL) calls i2c: pxa: remove incorrect __exit annotations i2c: ocores: Fix pointer to integer cast warning i2c: tegra: remove warning dump if timeout happen in transfer i2c: fix i2c-ismt.c printk format warning i2c: i801: Add Device IDs for Intel Wellsburg PCH i2c: add bcm2835 driver i2c: ismt: Add Seth and Myself as maintainers i2c: sis630: checkpatch cleanup i2c: sis630: display unsigned hex i2c: sis630: use hex to constants for SMBus commands i2c: sis630: fix behavior after collision i2c: sis630: clear sticky bits i2c: sis630: Add SIS964 support i2c: isch: Add module parameter for backbone clock rate if divider is unset i2c: at91: fix unsed variable warning when building with !CONFIG_OF i2c: Adding support for Intel iSMT SMBus 2.0 host controller i2c: sh_mobile: don't send a stop condition by default inside transfers i2c: sh_mobile: eliminate an open-coded "goto" loop i2c: sh_mobile: fix timeout error handling ...
Diffstat (limited to 'drivers/i2c/busses')
-rw-r--r--drivers/i2c/busses/Kconfig28
-rw-r--r--drivers/i2c/busses/Makefile2
-rw-r--r--drivers/i2c/busses/i2c-at91.c17
-rw-r--r--drivers/i2c/busses/i2c-au1550.c1
-rw-r--r--drivers/i2c/busses/i2c-bcm2835.c342
-rw-r--r--drivers/i2c/busses/i2c-bfin-twi.c2
-rw-r--r--drivers/i2c/busses/i2c-cpm.c2
-rw-r--r--drivers/i2c/busses/i2c-davinci.c2
-rw-r--r--drivers/i2c/busses/i2c-designware-core.c16
-rw-r--r--drivers/i2c/busses/i2c-designware-pcidrv.c2
-rw-r--r--drivers/i2c/busses/i2c-designware-platdrv.c61
-rw-r--r--drivers/i2c/busses/i2c-eg20t.c2
-rw-r--r--drivers/i2c/busses/i2c-highlander.c4
-rw-r--r--drivers/i2c/busses/i2c-i801.c19
-rw-r--r--drivers/i2c/busses/i2c-ibm_iic.c3
-rw-r--r--drivers/i2c/busses/i2c-imx.c1
-rw-r--r--drivers/i2c/busses/i2c-intel-mid.c2
-rw-r--r--drivers/i2c/busses/i2c-iop3xx.c2
-rw-r--r--drivers/i2c/busses/i2c-isch.c17
-rw-r--r--drivers/i2c/busses/i2c-ismt.c963
-rw-r--r--drivers/i2c/busses/i2c-mpc.c2
-rw-r--r--drivers/i2c/busses/i2c-mxs.c272
-rw-r--r--drivers/i2c/busses/i2c-nforce2.c152
-rw-r--r--drivers/i2c/busses/i2c-nomadik.c100
-rw-r--r--drivers/i2c/busses/i2c-ocores.c3
-rw-r--r--drivers/i2c/busses/i2c-octeon.c5
-rw-r--r--drivers/i2c/busses/i2c-omap.c3
-rw-r--r--drivers/i2c/busses/i2c-pca-platform.c1
-rw-r--r--drivers/i2c/busses/i2c-pmcmsp.c2
-rw-r--r--drivers/i2c/busses/i2c-pnx.c2
-rw-r--r--drivers/i2c/busses/i2c-powermac.c1
-rw-r--r--drivers/i2c/busses/i2c-puv3.c2
-rw-r--r--drivers/i2c/busses/i2c-pxa-pci.c2
-rw-r--r--drivers/i2c/busses/i2c-pxa.c6
-rw-r--r--drivers/i2c/busses/i2c-s3c2410.c62
-rw-r--r--drivers/i2c/busses/i2c-s6000.c1
-rw-r--r--drivers/i2c/busses/i2c-sh7760.c1
-rw-r--r--drivers/i2c/busses/i2c-sh_mobile.c152
-rw-r--r--drivers/i2c/busses/i2c-sis630.c360
-rw-r--r--drivers/i2c/busses/i2c-stu300.c1
-rw-r--r--drivers/i2c/busses/i2c-taos-evm.c2
-rw-r--r--drivers/i2c/busses/i2c-tegra.c79
-rw-r--r--drivers/i2c/busses/i2c-versatile.c2
-rw-r--r--drivers/i2c/busses/i2c-xiic.c2
-rw-r--r--drivers/i2c/busses/i2c-xlr.c1
-rw-r--r--drivers/i2c/busses/scx200_acb.c1
46 files changed, 2224 insertions, 481 deletions
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index 8bb810e1900b..a3725de92384 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -106,6 +106,8 @@ config I2C_I801
106 Panther Point (PCH) 106 Panther Point (PCH)
107 Lynx Point (PCH) 107 Lynx Point (PCH)
108 Lynx Point-LP (PCH) 108 Lynx Point-LP (PCH)
109 Avoton (SOC)
110 Wellsburg (PCH)
109 111
110 This driver can also be built as a module. If so, the module 112 This driver can also be built as a module. If so, the module
111 will be called i2c-i801. 113 will be called i2c-i801.
@@ -121,6 +123,16 @@ config I2C_ISCH
121 This driver can also be built as a module. If so, the module 123 This driver can also be built as a module. If so, the module
122 will be called i2c-isch. 124 will be called i2c-isch.
123 125
126config I2C_ISMT
127 tristate "Intel iSMT SMBus Controller"
128 depends on PCI && X86
129 help
130 If you say yes to this option, support will be included for the Intel
131 iSMT SMBus host controller interface.
132
133 This driver can also be built as a module. If so, the module will be
134 called i2c-ismt.
135
124config I2C_PIIX4 136config I2C_PIIX4
125 tristate "Intel PIIX4 and compatible (ATI/AMD/Serverworks/Broadcom/SMSC)" 137 tristate "Intel PIIX4 and compatible (ATI/AMD/Serverworks/Broadcom/SMSC)"
126 depends on PCI 138 depends on PCI
@@ -186,11 +198,11 @@ config I2C_SIS5595
186 will be called i2c-sis5595. 198 will be called i2c-sis5595.
187 199
188config I2C_SIS630 200config I2C_SIS630
189 tristate "SiS 630/730" 201 tristate "SiS 630/730/964"
190 depends on PCI 202 depends on PCI
191 help 203 help
192 If you say yes to this option, support will be included for the 204 If you say yes to this option, support will be included for the
193 SiS630 and SiS730 SMBus (a subset of I2C) interface. 205 SiS630, SiS730 and SiS964 SMBus (a subset of I2C) interface.
194 206
195 This driver can also be built as a module. If so, the module 207 This driver can also be built as a module. If so, the module
196 will be called i2c-sis630. 208 will be called i2c-sis630.
@@ -319,6 +331,18 @@ config I2C_AU1550
319 This driver can also be built as a module. If so, the module 331 This driver can also be built as a module. If so, the module
320 will be called i2c-au1550. 332 will be called i2c-au1550.
321 333
334config I2C_BCM2835
335 tristate "Broadcom BCM2835 I2C controller"
336 depends on ARCH_BCM2835
337 help
338 If you say yes to this option, support will be included for the
339 BCM2835 I2C controller.
340
341 If you don't know what to do here, say N.
342
343 This support is also available as a module. If so, the module
344 will be called i2c-bcm2835.
345
322config I2C_BLACKFIN_TWI 346config I2C_BLACKFIN_TWI
323 tristate "Blackfin TWI I2C support" 347 tristate "Blackfin TWI I2C support"
324 depends on BLACKFIN 348 depends on BLACKFIN
diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
index 6181f3ff263f..8f4fc23b85b1 100644
--- a/drivers/i2c/busses/Makefile
+++ b/drivers/i2c/busses/Makefile
@@ -14,6 +14,7 @@ obj-$(CONFIG_I2C_AMD756_S4882) += i2c-amd756-s4882.o
14obj-$(CONFIG_I2C_AMD8111) += i2c-amd8111.o 14obj-$(CONFIG_I2C_AMD8111) += i2c-amd8111.o
15obj-$(CONFIG_I2C_I801) += i2c-i801.o 15obj-$(CONFIG_I2C_I801) += i2c-i801.o
16obj-$(CONFIG_I2C_ISCH) += i2c-isch.o 16obj-$(CONFIG_I2C_ISCH) += i2c-isch.o
17obj-$(CONFIG_I2C_ISMT) += i2c-ismt.o
17obj-$(CONFIG_I2C_NFORCE2) += i2c-nforce2.o 18obj-$(CONFIG_I2C_NFORCE2) += i2c-nforce2.o
18obj-$(CONFIG_I2C_NFORCE2_S4985) += i2c-nforce2-s4985.o 19obj-$(CONFIG_I2C_NFORCE2_S4985) += i2c-nforce2-s4985.o
19obj-$(CONFIG_I2C_PIIX4) += i2c-piix4.o 20obj-$(CONFIG_I2C_PIIX4) += i2c-piix4.o
@@ -30,6 +31,7 @@ obj-$(CONFIG_I2C_POWERMAC) += i2c-powermac.o
30# Embedded system I2C/SMBus host controller drivers 31# Embedded system I2C/SMBus host controller drivers
31obj-$(CONFIG_I2C_AT91) += i2c-at91.o 32obj-$(CONFIG_I2C_AT91) += i2c-at91.o
32obj-$(CONFIG_I2C_AU1550) += i2c-au1550.o 33obj-$(CONFIG_I2C_AU1550) += i2c-au1550.o
34obj-$(CONFIG_I2C_BCM2835) += i2c-bcm2835.o
33obj-$(CONFIG_I2C_BLACKFIN_TWI) += i2c-bfin-twi.o 35obj-$(CONFIG_I2C_BLACKFIN_TWI) += i2c-bfin-twi.o
34obj-$(CONFIG_I2C_CBUS_GPIO) += i2c-cbus-gpio.o 36obj-$(CONFIG_I2C_CBUS_GPIO) += i2c-cbus-gpio.o
35obj-$(CONFIG_I2C_CPM) += i2c-cpm.o 37obj-$(CONFIG_I2C_CPM) += i2c-cpm.o
diff --git a/drivers/i2c/busses/i2c-at91.c b/drivers/i2c/busses/i2c-at91.c
index ebc224154695..75195e3f5ddb 100644
--- a/drivers/i2c/busses/i2c-at91.c
+++ b/drivers/i2c/busses/i2c-at91.c
@@ -553,13 +553,6 @@ static struct at91_twi_pdata at91sam9g10_config = {
553 .has_dma_support = false, 553 .has_dma_support = false,
554}; 554};
555 555
556static struct at91_twi_pdata at91sam9x5_config = {
557 .clk_max_div = 7,
558 .clk_offset = 4,
559 .has_unre_flag = false,
560 .has_dma_support = true,
561};
562
563static const struct platform_device_id at91_twi_devtypes[] = { 556static const struct platform_device_id at91_twi_devtypes[] = {
564 { 557 {
565 .name = "i2c-at91rm9200", 558 .name = "i2c-at91rm9200",
@@ -582,8 +575,18 @@ static const struct platform_device_id at91_twi_devtypes[] = {
582}; 575};
583 576
584#if defined(CONFIG_OF) 577#if defined(CONFIG_OF)
578static struct at91_twi_pdata at91sam9x5_config = {
579 .clk_max_div = 7,
580 .clk_offset = 4,
581 .has_unre_flag = false,
582 .has_dma_support = true,
583};
584
585static const struct of_device_id atmel_twi_dt_ids[] = { 585static const struct of_device_id atmel_twi_dt_ids[] = {
586 { 586 {
587 .compatible = "atmel,at91rm9200-i2c",
588 .data = &at91rm9200_config,
589 } , {
587 .compatible = "atmel,at91sam9260-i2c", 590 .compatible = "atmel,at91sam9260-i2c",
588 .data = &at91sam9260_config, 591 .data = &at91sam9260_config,
589 } , { 592 } , {
diff --git a/drivers/i2c/busses/i2c-au1550.c b/drivers/i2c/busses/i2c-au1550.c
index b278298787d7..b5b89239d622 100644
--- a/drivers/i2c/busses/i2c-au1550.c
+++ b/drivers/i2c/busses/i2c-au1550.c
@@ -376,7 +376,6 @@ static int i2c_au1550_remove(struct platform_device *pdev)
376{ 376{
377 struct i2c_au1550_data *priv = platform_get_drvdata(pdev); 377 struct i2c_au1550_data *priv = platform_get_drvdata(pdev);
378 378
379 platform_set_drvdata(pdev, NULL);
380 i2c_del_adapter(&priv->adap); 379 i2c_del_adapter(&priv->adap);
381 i2c_au1550_disable(priv); 380 i2c_au1550_disable(priv);
382 iounmap(priv->psc_base); 381 iounmap(priv->psc_base);
diff --git a/drivers/i2c/busses/i2c-bcm2835.c b/drivers/i2c/busses/i2c-bcm2835.c
new file mode 100644
index 000000000000..ea4b08fc3353
--- /dev/null
+++ b/drivers/i2c/busses/i2c-bcm2835.c
@@ -0,0 +1,342 @@
1/*
2 * BCM2835 master mode driver
3 *
4 * This software is licensed under the terms of the GNU General Public
5 * License version 2, as published by the Free Software Foundation, and
6 * may be copied, distributed, and modified under those terms.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#include <linux/clk.h>
15#include <linux/completion.h>
16#include <linux/err.h>
17#include <linux/i2c.h>
18#include <linux/interrupt.h>
19#include <linux/io.h>
20#include <linux/module.h>
21#include <linux/platform_device.h>
22#include <linux/slab.h>
23
24#define BCM2835_I2C_C 0x0
25#define BCM2835_I2C_S 0x4
26#define BCM2835_I2C_DLEN 0x8
27#define BCM2835_I2C_A 0xc
28#define BCM2835_I2C_FIFO 0x10
29#define BCM2835_I2C_DIV 0x14
30#define BCM2835_I2C_DEL 0x18
31#define BCM2835_I2C_CLKT 0x1c
32
33#define BCM2835_I2C_C_READ BIT(0)
34#define BCM2835_I2C_C_CLEAR BIT(4) /* bits 4 and 5 both clear */
35#define BCM2835_I2C_C_ST BIT(7)
36#define BCM2835_I2C_C_INTD BIT(8)
37#define BCM2835_I2C_C_INTT BIT(9)
38#define BCM2835_I2C_C_INTR BIT(10)
39#define BCM2835_I2C_C_I2CEN BIT(15)
40
41#define BCM2835_I2C_S_TA BIT(0)
42#define BCM2835_I2C_S_DONE BIT(1)
43#define BCM2835_I2C_S_TXW BIT(2)
44#define BCM2835_I2C_S_RXR BIT(3)
45#define BCM2835_I2C_S_TXD BIT(4)
46#define BCM2835_I2C_S_RXD BIT(5)
47#define BCM2835_I2C_S_TXE BIT(6)
48#define BCM2835_I2C_S_RXF BIT(7)
49#define BCM2835_I2C_S_ERR BIT(8)
50#define BCM2835_I2C_S_CLKT BIT(9)
51#define BCM2835_I2C_S_LEN BIT(10) /* Fake bit for SW error reporting */
52
53#define BCM2835_I2C_TIMEOUT (msecs_to_jiffies(1000))
54
55struct bcm2835_i2c_dev {
56 struct device *dev;
57 void __iomem *regs;
58 struct clk *clk;
59 int irq;
60 struct i2c_adapter adapter;
61 struct completion completion;
62 u32 msg_err;
63 u8 *msg_buf;
64 size_t msg_buf_remaining;
65};
66
67static inline void bcm2835_i2c_writel(struct bcm2835_i2c_dev *i2c_dev,
68 u32 reg, u32 val)
69{
70 writel(val, i2c_dev->regs + reg);
71}
72
73static inline u32 bcm2835_i2c_readl(struct bcm2835_i2c_dev *i2c_dev, u32 reg)
74{
75 return readl(i2c_dev->regs + reg);
76}
77
78static void bcm2835_fill_txfifo(struct bcm2835_i2c_dev *i2c_dev)
79{
80 u32 val;
81
82 while (i2c_dev->msg_buf_remaining) {
83 val = bcm2835_i2c_readl(i2c_dev, BCM2835_I2C_S);
84 if (!(val & BCM2835_I2C_S_TXD))
85 break;
86 bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_FIFO,
87 *i2c_dev->msg_buf);
88 i2c_dev->msg_buf++;
89 i2c_dev->msg_buf_remaining--;
90 }
91}
92
93static void bcm2835_drain_rxfifo(struct bcm2835_i2c_dev *i2c_dev)
94{
95 u32 val;
96
97 while (i2c_dev->msg_buf_remaining) {
98 val = bcm2835_i2c_readl(i2c_dev, BCM2835_I2C_S);
99 if (!(val & BCM2835_I2C_S_RXD))
100 break;
101 *i2c_dev->msg_buf = bcm2835_i2c_readl(i2c_dev,
102 BCM2835_I2C_FIFO);
103 i2c_dev->msg_buf++;
104 i2c_dev->msg_buf_remaining--;
105 }
106}
107
108static irqreturn_t bcm2835_i2c_isr(int this_irq, void *data)
109{
110 struct bcm2835_i2c_dev *i2c_dev = data;
111 u32 val, err;
112
113 val = bcm2835_i2c_readl(i2c_dev, BCM2835_I2C_S);
114 bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_S, val);
115
116 err = val & (BCM2835_I2C_S_CLKT | BCM2835_I2C_S_ERR);
117 if (err) {
118 i2c_dev->msg_err = err;
119 complete(&i2c_dev->completion);
120 return IRQ_HANDLED;
121 }
122
123 if (val & BCM2835_I2C_S_RXD) {
124 bcm2835_drain_rxfifo(i2c_dev);
125 if (!(val & BCM2835_I2C_S_DONE))
126 return IRQ_HANDLED;
127 }
128
129 if (val & BCM2835_I2C_S_DONE) {
130 if (i2c_dev->msg_buf_remaining)
131 i2c_dev->msg_err = BCM2835_I2C_S_LEN;
132 else
133 i2c_dev->msg_err = 0;
134 complete(&i2c_dev->completion);
135 return IRQ_HANDLED;
136 }
137
138 if (val & BCM2835_I2C_S_TXD) {
139 bcm2835_fill_txfifo(i2c_dev);
140 return IRQ_HANDLED;
141 }
142
143 return IRQ_NONE;
144}
145
146static int bcm2835_i2c_xfer_msg(struct bcm2835_i2c_dev *i2c_dev,
147 struct i2c_msg *msg)
148{
149 u32 c;
150 int time_left;
151
152 i2c_dev->msg_buf = msg->buf;
153 i2c_dev->msg_buf_remaining = msg->len;
154 INIT_COMPLETION(i2c_dev->completion);
155
156 bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_C, BCM2835_I2C_C_CLEAR);
157
158 if (msg->flags & I2C_M_RD) {
159 c = BCM2835_I2C_C_READ | BCM2835_I2C_C_INTR;
160 } else {
161 c = BCM2835_I2C_C_INTT;
162 bcm2835_fill_txfifo(i2c_dev);
163 }
164 c |= BCM2835_I2C_C_ST | BCM2835_I2C_C_INTD | BCM2835_I2C_C_I2CEN;
165
166 bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_A, msg->addr);
167 bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_DLEN, msg->len);
168 bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_C, c);
169
170 time_left = wait_for_completion_timeout(&i2c_dev->completion,
171 BCM2835_I2C_TIMEOUT);
172 bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_C, BCM2835_I2C_C_CLEAR);
173 if (!time_left) {
174 dev_err(i2c_dev->dev, "i2c transfer timed out\n");
175 return -ETIMEDOUT;
176 }
177
178 if (likely(!i2c_dev->msg_err))
179 return 0;
180
181 if ((i2c_dev->msg_err & BCM2835_I2C_S_ERR) &&
182 (msg->flags & I2C_M_IGNORE_NAK))
183 return 0;
184
185 dev_err(i2c_dev->dev, "i2c transfer failed: %x\n", i2c_dev->msg_err);
186
187 if (i2c_dev->msg_err & BCM2835_I2C_S_ERR)
188 return -EREMOTEIO;
189 else
190 return -EIO;
191}
192
193static int bcm2835_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[],
194 int num)
195{
196 struct bcm2835_i2c_dev *i2c_dev = i2c_get_adapdata(adap);
197 int i;
198 int ret = 0;
199
200 for (i = 0; i < num; i++) {
201 ret = bcm2835_i2c_xfer_msg(i2c_dev, &msgs[i]);
202 if (ret)
203 break;
204 }
205
206 return ret ?: i;
207}
208
209static u32 bcm2835_i2c_func(struct i2c_adapter *adap)
210{
211 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
212}
213
214static const struct i2c_algorithm bcm2835_i2c_algo = {
215 .master_xfer = bcm2835_i2c_xfer,
216 .functionality = bcm2835_i2c_func,
217};
218
219static int bcm2835_i2c_probe(struct platform_device *pdev)
220{
221 struct bcm2835_i2c_dev *i2c_dev;
222 struct resource *mem, *requested, *irq;
223 u32 bus_clk_rate, divider;
224 int ret;
225 struct i2c_adapter *adap;
226
227 i2c_dev = devm_kzalloc(&pdev->dev, sizeof(*i2c_dev), GFP_KERNEL);
228 if (!i2c_dev) {
229 dev_err(&pdev->dev, "Cannot allocate i2c_dev\n");
230 return -ENOMEM;
231 }
232 platform_set_drvdata(pdev, i2c_dev);
233 i2c_dev->dev = &pdev->dev;
234 init_completion(&i2c_dev->completion);
235
236 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
237 if (!mem) {
238 dev_err(&pdev->dev, "No mem resource\n");
239 return -ENODEV;
240 }
241
242 requested = devm_request_mem_region(&pdev->dev, mem->start,
243 resource_size(mem),
244 dev_name(&pdev->dev));
245 if (!requested) {
246 dev_err(&pdev->dev, "Could not claim register region\n");
247 return -EBUSY;
248 }
249
250 i2c_dev->regs = devm_ioremap(&pdev->dev, mem->start,
251 resource_size(mem));
252 if (!i2c_dev->regs) {
253 dev_err(&pdev->dev, "Could not map registers\n");
254 return -ENOMEM;
255 }
256
257 i2c_dev->clk = devm_clk_get(&pdev->dev, NULL);
258 if (IS_ERR(i2c_dev->clk)) {
259 dev_err(&pdev->dev, "Could not get clock\n");
260 return PTR_ERR(i2c_dev->clk);
261 }
262
263 ret = of_property_read_u32(pdev->dev.of_node, "clock-frequency",
264 &bus_clk_rate);
265 if (ret < 0) {
266 dev_warn(&pdev->dev,
267 "Could not read clock-frequency property\n");
268 bus_clk_rate = 100000;
269 }
270
271 divider = DIV_ROUND_UP(clk_get_rate(i2c_dev->clk), bus_clk_rate);
272 /*
273 * Per the datasheet, the register is always interpreted as an even
274 * number, by rounding down. In other words, the LSB is ignored. So,
275 * if the LSB is set, increment the divider to avoid any issue.
276 */
277 if (divider & 1)
278 divider++;
279 bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_DIV, divider);
280
281 irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
282 if (!irq) {
283 dev_err(&pdev->dev, "No IRQ resource\n");
284 return -ENODEV;
285 }
286 i2c_dev->irq = irq->start;
287
288 ret = request_irq(i2c_dev->irq, bcm2835_i2c_isr, IRQF_SHARED,
289 dev_name(&pdev->dev), i2c_dev);
290 if (ret) {
291 dev_err(&pdev->dev, "Could not request IRQ\n");
292 return -ENODEV;
293 }
294
295 adap = &i2c_dev->adapter;
296 i2c_set_adapdata(adap, i2c_dev);
297 adap->owner = THIS_MODULE;
298 adap->class = I2C_CLASS_HWMON;
299 strlcpy(adap->name, "bcm2835 I2C adapter", sizeof(adap->name));
300 adap->algo = &bcm2835_i2c_algo;
301 adap->dev.parent = &pdev->dev;
302
303 bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_C, 0);
304
305 ret = i2c_add_adapter(adap);
306 if (ret)
307 free_irq(i2c_dev->irq, i2c_dev);
308
309 return ret;
310}
311
312static int bcm2835_i2c_remove(struct platform_device *pdev)
313{
314 struct bcm2835_i2c_dev *i2c_dev = platform_get_drvdata(pdev);
315
316 free_irq(i2c_dev->irq, i2c_dev);
317 i2c_del_adapter(&i2c_dev->adapter);
318
319 return 0;
320}
321
322static const struct of_device_id bcm2835_i2c_of_match[] = {
323 { .compatible = "brcm,bcm2835-i2c" },
324 {},
325};
326MODULE_DEVICE_TABLE(of, bcm2835_i2c_of_match);
327
328static struct platform_driver bcm2835_i2c_driver = {
329 .probe = bcm2835_i2c_probe,
330 .remove = bcm2835_i2c_remove,
331 .driver = {
332 .name = "i2c-bcm2835",
333 .owner = THIS_MODULE,
334 .of_match_table = bcm2835_i2c_of_match,
335 },
336};
337module_platform_driver(bcm2835_i2c_driver);
338
339MODULE_AUTHOR("Stephen Warren <swarren@wwwdotorg.org>");
340MODULE_DESCRIPTION("BCM2835 I2C bus adapter");
341MODULE_LICENSE("GPL v2");
342MODULE_ALIAS("platform:i2c-bcm2835");
diff --git a/drivers/i2c/busses/i2c-bfin-twi.c b/drivers/i2c/busses/i2c-bfin-twi.c
index 0cf780fd6ef1..05080c449c6b 100644
--- a/drivers/i2c/busses/i2c-bfin-twi.c
+++ b/drivers/i2c/busses/i2c-bfin-twi.c
@@ -724,8 +724,6 @@ static int i2c_bfin_twi_remove(struct platform_device *pdev)
724{ 724{
725 struct bfin_twi_iface *iface = platform_get_drvdata(pdev); 725 struct bfin_twi_iface *iface = platform_get_drvdata(pdev);
726 726
727 platform_set_drvdata(pdev, NULL);
728
729 i2c_del_adapter(&(iface->adap)); 727 i2c_del_adapter(&(iface->adap));
730 free_irq(iface->irq, iface); 728 free_irq(iface->irq, iface);
731 peripheral_free_list((unsigned short *)pdev->dev.platform_data); 729 peripheral_free_list((unsigned short *)pdev->dev.platform_data);
diff --git a/drivers/i2c/busses/i2c-cpm.c b/drivers/i2c/busses/i2c-cpm.c
index 2e79c1024191..3823623baa48 100644
--- a/drivers/i2c/busses/i2c-cpm.c
+++ b/drivers/i2c/busses/i2c-cpm.c
@@ -682,7 +682,6 @@ static int cpm_i2c_probe(struct platform_device *ofdev)
682out_shut: 682out_shut:
683 cpm_i2c_shutdown(cpm); 683 cpm_i2c_shutdown(cpm);
684out_free: 684out_free:
685 dev_set_drvdata(&ofdev->dev, NULL);
686 kfree(cpm); 685 kfree(cpm);
687 686
688 return result; 687 return result;
@@ -696,7 +695,6 @@ static int cpm_i2c_remove(struct platform_device *ofdev)
696 695
697 cpm_i2c_shutdown(cpm); 696 cpm_i2c_shutdown(cpm);
698 697
699 dev_set_drvdata(&ofdev->dev, NULL);
700 kfree(cpm); 698 kfree(cpm);
701 699
702 return 0; 700 return 0;
diff --git a/drivers/i2c/busses/i2c-davinci.c b/drivers/i2c/busses/i2c-davinci.c
index 6a0a55319449..7d1e590a7bb6 100644
--- a/drivers/i2c/busses/i2c-davinci.c
+++ b/drivers/i2c/busses/i2c-davinci.c
@@ -755,7 +755,6 @@ err_mem_ioremap:
755 clk_put(dev->clk); 755 clk_put(dev->clk);
756 dev->clk = NULL; 756 dev->clk = NULL;
757err_free_mem: 757err_free_mem:
758 platform_set_drvdata(pdev, NULL);
759 put_device(&pdev->dev); 758 put_device(&pdev->dev);
760 kfree(dev); 759 kfree(dev);
761err_release_region: 760err_release_region:
@@ -771,7 +770,6 @@ static int davinci_i2c_remove(struct platform_device *pdev)
771 770
772 i2c_davinci_cpufreq_deregister(dev); 771 i2c_davinci_cpufreq_deregister(dev);
773 772
774 platform_set_drvdata(pdev, NULL);
775 i2c_del_adapter(&dev->adapter); 773 i2c_del_adapter(&dev->adapter);
776 put_device(&pdev->dev); 774 put_device(&pdev->dev);
777 775
diff --git a/drivers/i2c/busses/i2c-designware-core.c b/drivers/i2c/busses/i2c-designware-core.c
index f5258c205de5..94fd81875409 100644
--- a/drivers/i2c/busses/i2c-designware-core.c
+++ b/drivers/i2c/busses/i2c-designware-core.c
@@ -413,11 +413,23 @@ i2c_dw_xfer_msg(struct dw_i2c_dev *dev)
413 rx_limit = dev->rx_fifo_depth - dw_readl(dev, DW_IC_RXFLR); 413 rx_limit = dev->rx_fifo_depth - dw_readl(dev, DW_IC_RXFLR);
414 414
415 while (buf_len > 0 && tx_limit > 0 && rx_limit > 0) { 415 while (buf_len > 0 && tx_limit > 0 && rx_limit > 0) {
416 u32 cmd = 0;
417
418 /*
419 * If IC_EMPTYFIFO_HOLD_MASTER_EN is set we must
420 * manually set the stop bit. However, it cannot be
421 * detected from the registers so we set it always
422 * when writing/reading the last byte.
423 */
424 if (dev->msg_write_idx == dev->msgs_num - 1 &&
425 buf_len == 1)
426 cmd |= BIT(9);
427
416 if (msgs[dev->msg_write_idx].flags & I2C_M_RD) { 428 if (msgs[dev->msg_write_idx].flags & I2C_M_RD) {
417 dw_writel(dev, 0x100, DW_IC_DATA_CMD); 429 dw_writel(dev, cmd | 0x100, DW_IC_DATA_CMD);
418 rx_limit--; 430 rx_limit--;
419 } else 431 } else
420 dw_writel(dev, *buf++, DW_IC_DATA_CMD); 432 dw_writel(dev, cmd | *buf++, DW_IC_DATA_CMD);
421 tx_limit--; buf_len--; 433 tx_limit--; buf_len--;
422 } 434 }
423 435
diff --git a/drivers/i2c/busses/i2c-designware-pcidrv.c b/drivers/i2c/busses/i2c-designware-pcidrv.c
index 6add851e9dee..7c5e383c350d 100644
--- a/drivers/i2c/busses/i2c-designware-pcidrv.c
+++ b/drivers/i2c/busses/i2c-designware-pcidrv.c
@@ -319,7 +319,6 @@ err_free_irq:
319 free_irq(pdev->irq, dev); 319 free_irq(pdev->irq, dev);
320err_iounmap: 320err_iounmap:
321 iounmap(dev->base); 321 iounmap(dev->base);
322 pci_set_drvdata(pdev, NULL);
323 put_device(&pdev->dev); 322 put_device(&pdev->dev);
324 kfree(dev); 323 kfree(dev);
325err_release_region: 324err_release_region:
@@ -336,7 +335,6 @@ static void i2c_dw_pci_remove(struct pci_dev *pdev)
336 pm_runtime_forbid(&pdev->dev); 335 pm_runtime_forbid(&pdev->dev);
337 pm_runtime_get_noresume(&pdev->dev); 336 pm_runtime_get_noresume(&pdev->dev);
338 337
339 pci_set_drvdata(pdev, NULL);
340 i2c_del_adapter(&dev->adapter); 338 i2c_del_adapter(&dev->adapter);
341 put_device(&pdev->dev); 339 put_device(&pdev->dev);
342 340
diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c b/drivers/i2c/busses/i2c-designware-platdrv.c
index 343357a2b5b4..0ceb6e1b0f65 100644
--- a/drivers/i2c/busses/i2c-designware-platdrv.c
+++ b/drivers/i2c/busses/i2c-designware-platdrv.c
@@ -37,8 +37,10 @@
37#include <linux/of_i2c.h> 37#include <linux/of_i2c.h>
38#include <linux/platform_device.h> 38#include <linux/platform_device.h>
39#include <linux/pm.h> 39#include <linux/pm.h>
40#include <linux/pm_runtime.h>
40#include <linux/io.h> 41#include <linux/io.h>
41#include <linux/slab.h> 42#include <linux/slab.h>
43#include <linux/acpi.h>
42#include "i2c-designware-core.h" 44#include "i2c-designware-core.h"
43 45
44static struct i2c_algorithm i2c_dw_algo = { 46static struct i2c_algorithm i2c_dw_algo = {
@@ -50,6 +52,42 @@ static u32 i2c_dw_get_clk_rate_khz(struct dw_i2c_dev *dev)
50 return clk_get_rate(dev->clk)/1000; 52 return clk_get_rate(dev->clk)/1000;
51} 53}
52 54
55#ifdef CONFIG_ACPI
56static int dw_i2c_acpi_configure(struct platform_device *pdev)
57{
58 struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
59 struct acpi_device *adev;
60 int busno, ret;
61
62 if (!ACPI_HANDLE(&pdev->dev))
63 return -ENODEV;
64
65 ret = acpi_bus_get_device(ACPI_HANDLE(&pdev->dev), &adev);
66 if (ret)
67 return -ENODEV;
68
69 dev->adapter.nr = -1;
70 if (adev->pnp.unique_id && !kstrtoint(adev->pnp.unique_id, 0, &busno))
71 dev->adapter.nr = busno;
72
73 dev->tx_fifo_depth = 32;
74 dev->rx_fifo_depth = 32;
75 return 0;
76}
77
78static const struct acpi_device_id dw_i2c_acpi_match[] = {
79 { "INT33C2", 0 },
80 { "INT33C3", 0 },
81 { }
82};
83MODULE_DEVICE_TABLE(acpi, dw_i2c_acpi_match);
84#else
85static inline int dw_i2c_acpi_configure(struct platform_device *pdev)
86{
87 return -ENODEV;
88}
89#endif
90
53static int dw_i2c_probe(struct platform_device *pdev) 91static int dw_i2c_probe(struct platform_device *pdev)
54{ 92{
55 struct dw_i2c_dev *dev; 93 struct dw_i2c_dev *dev;
@@ -114,18 +152,22 @@ static int dw_i2c_probe(struct platform_device *pdev)
114 r = -EBUSY; 152 r = -EBUSY;
115 goto err_unuse_clocks; 153 goto err_unuse_clocks;
116 } 154 }
117 { 155
156 /* Try first if we can configure the device from ACPI */
157 r = dw_i2c_acpi_configure(pdev);
158 if (r) {
118 u32 param1 = i2c_dw_read_comp_param(dev); 159 u32 param1 = i2c_dw_read_comp_param(dev);
119 160
120 dev->tx_fifo_depth = ((param1 >> 16) & 0xff) + 1; 161 dev->tx_fifo_depth = ((param1 >> 16) & 0xff) + 1;
121 dev->rx_fifo_depth = ((param1 >> 8) & 0xff) + 1; 162 dev->rx_fifo_depth = ((param1 >> 8) & 0xff) + 1;
163 dev->adapter.nr = pdev->id;
122 } 164 }
123 r = i2c_dw_init(dev); 165 r = i2c_dw_init(dev);
124 if (r) 166 if (r)
125 goto err_iounmap; 167 goto err_iounmap;
126 168
127 i2c_dw_disable_int(dev); 169 i2c_dw_disable_int(dev);
128 r = request_irq(dev->irq, i2c_dw_isr, IRQF_DISABLED, pdev->name, dev); 170 r = request_irq(dev->irq, i2c_dw_isr, IRQF_SHARED, pdev->name, dev);
129 if (r) { 171 if (r) {
130 dev_err(&pdev->dev, "failure requesting irq %i\n", dev->irq); 172 dev_err(&pdev->dev, "failure requesting irq %i\n", dev->irq);
131 goto err_iounmap; 173 goto err_iounmap;
@@ -140,14 +182,19 @@ static int dw_i2c_probe(struct platform_device *pdev)
140 adap->algo = &i2c_dw_algo; 182 adap->algo = &i2c_dw_algo;
141 adap->dev.parent = &pdev->dev; 183 adap->dev.parent = &pdev->dev;
142 adap->dev.of_node = pdev->dev.of_node; 184 adap->dev.of_node = pdev->dev.of_node;
185 ACPI_HANDLE_SET(&adap->dev, ACPI_HANDLE(&pdev->dev));
143 186
144 adap->nr = pdev->id;
145 r = i2c_add_numbered_adapter(adap); 187 r = i2c_add_numbered_adapter(adap);
146 if (r) { 188 if (r) {
147 dev_err(&pdev->dev, "failure adding adapter\n"); 189 dev_err(&pdev->dev, "failure adding adapter\n");
148 goto err_free_irq; 190 goto err_free_irq;
149 } 191 }
150 of_i2c_register_devices(adap); 192 of_i2c_register_devices(adap);
193 acpi_i2c_register_devices(adap);
194
195 pm_runtime_set_active(&pdev->dev);
196 pm_runtime_enable(&pdev->dev);
197 pm_runtime_put(&pdev->dev);
151 198
152 return 0; 199 return 0;
153 200
@@ -160,7 +207,6 @@ err_unuse_clocks:
160 clk_put(dev->clk); 207 clk_put(dev->clk);
161 dev->clk = NULL; 208 dev->clk = NULL;
162err_free_mem: 209err_free_mem:
163 platform_set_drvdata(pdev, NULL);
164 put_device(&pdev->dev); 210 put_device(&pdev->dev);
165 kfree(dev); 211 kfree(dev);
166err_release_region: 212err_release_region:
@@ -174,7 +220,8 @@ static int dw_i2c_remove(struct platform_device *pdev)
174 struct dw_i2c_dev *dev = platform_get_drvdata(pdev); 220 struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
175 struct resource *mem; 221 struct resource *mem;
176 222
177 platform_set_drvdata(pdev, NULL); 223 pm_runtime_get_sync(&pdev->dev);
224
178 i2c_del_adapter(&dev->adapter); 225 i2c_del_adapter(&dev->adapter);
179 put_device(&pdev->dev); 226 put_device(&pdev->dev);
180 227
@@ -186,6 +233,9 @@ static int dw_i2c_remove(struct platform_device *pdev)
186 free_irq(dev->irq, dev); 233 free_irq(dev->irq, dev);
187 kfree(dev); 234 kfree(dev);
188 235
236 pm_runtime_put(&pdev->dev);
237 pm_runtime_disable(&pdev->dev);
238
189 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 239 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
190 release_mem_region(mem->start, resource_size(mem)); 240 release_mem_region(mem->start, resource_size(mem));
191 return 0; 241 return 0;
@@ -233,6 +283,7 @@ static struct platform_driver dw_i2c_driver = {
233 .name = "i2c_designware", 283 .name = "i2c_designware",
234 .owner = THIS_MODULE, 284 .owner = THIS_MODULE,
235 .of_match_table = of_match_ptr(dw_i2c_of_match), 285 .of_match_table = of_match_ptr(dw_i2c_of_match),
286 .acpi_match_table = ACPI_PTR(dw_i2c_acpi_match),
236 .pm = &dw_i2c_dev_pm_ops, 287 .pm = &dw_i2c_dev_pm_ops,
237 }, 288 },
238}; 289};
diff --git a/drivers/i2c/busses/i2c-eg20t.c b/drivers/i2c/busses/i2c-eg20t.c
index 5e7886e7136e..0f3752967c4b 100644
--- a/drivers/i2c/busses/i2c-eg20t.c
+++ b/drivers/i2c/busses/i2c-eg20t.c
@@ -869,8 +869,6 @@ static void pch_i2c_remove(struct pci_dev *pdev)
869 for (i = 0; i < adap_info->ch_num; i++) 869 for (i = 0; i < adap_info->ch_num; i++)
870 adap_info->pch_data[i].pch_base_address = NULL; 870 adap_info->pch_data[i].pch_base_address = NULL;
871 871
872 pci_set_drvdata(pdev, NULL);
873
874 pci_release_regions(pdev); 872 pci_release_regions(pdev);
875 873
876 pci_disable_device(pdev); 874 pci_disable_device(pdev);
diff --git a/drivers/i2c/busses/i2c-highlander.c b/drivers/i2c/busses/i2c-highlander.c
index 3351cc7ed11f..436b0f254916 100644
--- a/drivers/i2c/busses/i2c-highlander.c
+++ b/drivers/i2c/busses/i2c-highlander.c
@@ -436,8 +436,6 @@ err_unmap:
436err: 436err:
437 kfree(dev); 437 kfree(dev);
438 438
439 platform_set_drvdata(pdev, NULL);
440
441 return ret; 439 return ret;
442} 440}
443 441
@@ -453,8 +451,6 @@ static int highlander_i2c_remove(struct platform_device *pdev)
453 iounmap(dev->base); 451 iounmap(dev->base);
454 kfree(dev); 452 kfree(dev);
455 453
456 platform_set_drvdata(pdev, NULL);
457
458 return 0; 454 return 0;
459} 455}
460 456
diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c
index 3092387f6ef4..e1cf2e0e1f23 100644
--- a/drivers/i2c/busses/i2c-i801.c
+++ b/drivers/i2c/busses/i2c-i801.c
@@ -53,6 +53,11 @@
53 Panther Point (PCH) 0x1e22 32 hard yes yes yes 53 Panther Point (PCH) 0x1e22 32 hard yes yes yes
54 Lynx Point (PCH) 0x8c22 32 hard yes yes yes 54 Lynx Point (PCH) 0x8c22 32 hard yes yes yes
55 Lynx Point-LP (PCH) 0x9c22 32 hard yes yes yes 55 Lynx Point-LP (PCH) 0x9c22 32 hard yes yes yes
56 Avoton (SOC) 0x1f3c 32 hard yes yes yes
57 Wellsburg (PCH) 0x8d22 32 hard yes yes yes
58 Wellsburg (PCH) MS 0x8d7d 32 hard yes yes yes
59 Wellsburg (PCH) MS 0x8d7e 32 hard yes yes yes
60 Wellsburg (PCH) MS 0x8d7f 32 hard yes yes yes
56 61
57 Features supported by this driver: 62 Features supported by this driver:
58 Software PEC no 63 Software PEC no
@@ -162,9 +167,14 @@
162#define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF1 0x1d71 167#define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF1 0x1d71
163#define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF2 0x1d72 168#define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF2 0x1d72
164#define PCI_DEVICE_ID_INTEL_PANTHERPOINT_SMBUS 0x1e22 169#define PCI_DEVICE_ID_INTEL_PANTHERPOINT_SMBUS 0x1e22
170#define PCI_DEVICE_ID_INTEL_AVOTON_SMBUS 0x1f3c
165#define PCI_DEVICE_ID_INTEL_DH89XXCC_SMBUS 0x2330 171#define PCI_DEVICE_ID_INTEL_DH89XXCC_SMBUS 0x2330
166#define PCI_DEVICE_ID_INTEL_5_3400_SERIES_SMBUS 0x3b30 172#define PCI_DEVICE_ID_INTEL_5_3400_SERIES_SMBUS 0x3b30
167#define PCI_DEVICE_ID_INTEL_LYNXPOINT_SMBUS 0x8c22 173#define PCI_DEVICE_ID_INTEL_LYNXPOINT_SMBUS 0x8c22
174#define PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS 0x8d22
175#define PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS0 0x8d7d
176#define PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS1 0x8d7e
177#define PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS2 0x8d7f
168#define PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_SMBUS 0x9c22 178#define PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_SMBUS 0x9c22
169 179
170struct i801_mux_config { 180struct i801_mux_config {
@@ -798,6 +808,11 @@ static DEFINE_PCI_DEVICE_TABLE(i801_ids) = {
798 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PANTHERPOINT_SMBUS) }, 808 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PANTHERPOINT_SMBUS) },
799 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LYNXPOINT_SMBUS) }, 809 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LYNXPOINT_SMBUS) },
800 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_SMBUS) }, 810 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_SMBUS) },
811 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_AVOTON_SMBUS) },
812 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS) },
813 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS0) },
814 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS1) },
815 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS2) },
801 { 0, } 816 { 0, }
802}; 817};
803 818
@@ -1103,6 +1118,9 @@ static int i801_probe(struct pci_dev *dev, const struct pci_device_id *id)
1103 case PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF0: 1118 case PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF0:
1104 case PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF1: 1119 case PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF1:
1105 case PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF2: 1120 case PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF2:
1121 case PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS0:
1122 case PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS1:
1123 case PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS2:
1106 priv->features |= FEATURE_IDF; 1124 priv->features |= FEATURE_IDF;
1107 /* fall through */ 1125 /* fall through */
1108 default: 1126 default:
@@ -1236,7 +1254,6 @@ static void i801_remove(struct pci_dev *dev)
1236 free_irq(dev->irq, priv); 1254 free_irq(dev->irq, priv);
1237 pci_release_region(dev, SMBBAR); 1255 pci_release_region(dev, SMBBAR);
1238 1256
1239 pci_set_drvdata(dev, NULL);
1240 kfree(priv); 1257 kfree(priv);
1241 /* 1258 /*
1242 * do not call pci_disable_device(dev) since it can cause hard hangs on 1259 * do not call pci_disable_device(dev) since it can cause hard hangs on
diff --git a/drivers/i2c/busses/i2c-ibm_iic.c b/drivers/i2c/busses/i2c-ibm_iic.c
index 33a2abb6c063..405a2e240454 100644
--- a/drivers/i2c/busses/i2c-ibm_iic.c
+++ b/drivers/i2c/busses/i2c-ibm_iic.c
@@ -773,7 +773,6 @@ error_cleanup:
773 if (dev->vaddr) 773 if (dev->vaddr)
774 iounmap(dev->vaddr); 774 iounmap(dev->vaddr);
775 775
776 dev_set_drvdata(&ofdev->dev, NULL);
777 kfree(dev); 776 kfree(dev);
778 return ret; 777 return ret;
779} 778}
@@ -785,8 +784,6 @@ static int iic_remove(struct platform_device *ofdev)
785{ 784{
786 struct ibm_iic_private *dev = dev_get_drvdata(&ofdev->dev); 785 struct ibm_iic_private *dev = dev_get_drvdata(&ofdev->dev);
787 786
788 dev_set_drvdata(&ofdev->dev, NULL);
789
790 i2c_del_adapter(&dev->adap); 787 i2c_del_adapter(&dev->adap);
791 788
792 if (dev->irq) { 789 if (dev->irq) {
diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c
index a71ece63e917..82f20c60bb7b 100644
--- a/drivers/i2c/busses/i2c-imx.c
+++ b/drivers/i2c/busses/i2c-imx.c
@@ -605,7 +605,6 @@ static int __exit i2c_imx_remove(struct platform_device *pdev)
605 /* remove adapter */ 605 /* remove adapter */
606 dev_dbg(&i2c_imx->adapter.dev, "adapter removed\n"); 606 dev_dbg(&i2c_imx->adapter.dev, "adapter removed\n");
607 i2c_del_adapter(&i2c_imx->adapter); 607 i2c_del_adapter(&i2c_imx->adapter);
608 platform_set_drvdata(pdev, NULL);
609 608
610 /* setup chip registers to defaults */ 609 /* setup chip registers to defaults */
611 writeb(0, i2c_imx->base + IMX_I2C_IADR); 610 writeb(0, i2c_imx->base + IMX_I2C_IADR);
diff --git a/drivers/i2c/busses/i2c-intel-mid.c b/drivers/i2c/busses/i2c-intel-mid.c
index de3736bf6465..323fa018ffd5 100644
--- a/drivers/i2c/busses/i2c-intel-mid.c
+++ b/drivers/i2c/busses/i2c-intel-mid.c
@@ -1069,7 +1069,6 @@ static int intel_mid_i2c_probe(struct pci_dev *dev,
1069fail3: 1069fail3:
1070 free_irq(dev->irq, mrst); 1070 free_irq(dev->irq, mrst);
1071fail2: 1071fail2:
1072 pci_set_drvdata(dev, NULL);
1073 kfree(mrst); 1072 kfree(mrst);
1074fail1: 1073fail1:
1075 iounmap(base); 1074 iounmap(base);
@@ -1087,7 +1086,6 @@ static void intel_mid_i2c_remove(struct pci_dev *dev)
1087 dev_err(&dev->dev, "Failed to delete i2c adapter"); 1086 dev_err(&dev->dev, "Failed to delete i2c adapter");
1088 1087
1089 free_irq(dev->irq, mrst); 1088 free_irq(dev->irq, mrst);
1090 pci_set_drvdata(dev, NULL);
1091 iounmap(mrst->base); 1089 iounmap(mrst->base);
1092 kfree(mrst); 1090 kfree(mrst);
1093 pci_release_region(dev, 0); 1091 pci_release_region(dev, 0);
diff --git a/drivers/i2c/busses/i2c-iop3xx.c b/drivers/i2c/busses/i2c-iop3xx.c
index 2f99613fd677..bc993331c695 100644
--- a/drivers/i2c/busses/i2c-iop3xx.c
+++ b/drivers/i2c/busses/i2c-iop3xx.c
@@ -415,8 +415,6 @@ iop3xx_i2c_remove(struct platform_device *pdev)
415 kfree(adapter_data); 415 kfree(adapter_data);
416 kfree(padapter); 416 kfree(padapter);
417 417
418 platform_set_drvdata(pdev, NULL);
419
420 return 0; 418 return 0;
421} 419}
422 420
diff --git a/drivers/i2c/busses/i2c-isch.c b/drivers/i2c/busses/i2c-isch.c
index 4099f79c2280..8c38aaa7417c 100644
--- a/drivers/i2c/busses/i2c-isch.c
+++ b/drivers/i2c/busses/i2c-isch.c
@@ -40,6 +40,7 @@
40/* SCH SMBus address offsets */ 40/* SCH SMBus address offsets */
41#define SMBHSTCNT (0 + sch_smba) 41#define SMBHSTCNT (0 + sch_smba)
42#define SMBHSTSTS (1 + sch_smba) 42#define SMBHSTSTS (1 + sch_smba)
43#define SMBHSTCLK (2 + sch_smba)
43#define SMBHSTADD (4 + sch_smba) /* TSA */ 44#define SMBHSTADD (4 + sch_smba) /* TSA */
44#define SMBHSTCMD (5 + sch_smba) 45#define SMBHSTCMD (5 + sch_smba)
45#define SMBHSTDAT0 (6 + sch_smba) 46#define SMBHSTDAT0 (6 + sch_smba)
@@ -58,6 +59,9 @@
58 59
59static unsigned short sch_smba; 60static unsigned short sch_smba;
60static struct i2c_adapter sch_adapter; 61static struct i2c_adapter sch_adapter;
62static int backbone_speed = 33000; /* backbone speed in kHz */
63module_param(backbone_speed, int, S_IRUSR | S_IWUSR);
64MODULE_PARM_DESC(backbone_speed, "Backbone speed in kHz, (default = 33000)");
61 65
62/* 66/*
63 * Start the i2c transaction -- the i2c_access will prepare the transaction 67 * Start the i2c transaction -- the i2c_access will prepare the transaction
@@ -156,6 +160,19 @@ static s32 sch_access(struct i2c_adapter *adap, u16 addr,
156 dev_dbg(&sch_adapter.dev, "SMBus busy (%02x)\n", temp); 160 dev_dbg(&sch_adapter.dev, "SMBus busy (%02x)\n", temp);
157 return -EAGAIN; 161 return -EAGAIN;
158 } 162 }
163 temp = inw(SMBHSTCLK);
164 if (!temp) {
165 /*
166 * We can't determine if we have 33 or 25 MHz clock for
167 * SMBus, so expect 33 MHz and calculate a bus clock of
168 * 100 kHz. If we actually run at 25 MHz the bus will be
169 * run ~75 kHz instead which should do no harm.
170 */
171 dev_notice(&sch_adapter.dev,
172 "Clock divider unitialized. Setting defaults\n");
173 outw(backbone_speed / (4 * 100), SMBHSTCLK);
174 }
175
159 dev_dbg(&sch_adapter.dev, "access size: %d %s\n", size, 176 dev_dbg(&sch_adapter.dev, "access size: %d %s\n", size,
160 (read_write)?"READ":"WRITE"); 177 (read_write)?"READ":"WRITE");
161 switch (size) { 178 switch (size) {
diff --git a/drivers/i2c/busses/i2c-ismt.c b/drivers/i2c/busses/i2c-ismt.c
new file mode 100644
index 000000000000..e9205ee8cf94
--- /dev/null
+++ b/drivers/i2c/busses/i2c-ismt.c
@@ -0,0 +1,963 @@
1/*
2 * This file is provided under a dual BSD/GPLv2 license. When using or
3 * redistributing this file, you may do so under either license.
4 *
5 * Copyright(c) 2012 Intel Corporation. All rights reserved.
6 *
7 * GPL LICENSE SUMMARY
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * BSD LICENSE
25 *
26 * Redistribution and use in source and binary forms, with or without
27 * modification, are permitted provided that the following conditions
28 * are met:
29 *
30 * * Redistributions of source code must retain the above copyright
31 * notice, this list of conditions and the following disclaimer.
32 * * Redistributions in binary form must reproduce the above copyright
33 * notice, this list of conditions and the following disclaimer in
34 * the documentation and/or other materials provided with the
35 * distribution.
36 * * Neither the name of Intel Corporation nor the names of its
37 * contributors may be used to endorse or promote products derived
38 * from this software without specific prior written permission.
39 *
40 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
41 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
42 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
43 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
44 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
45 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
46 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
47 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
48 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
49 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
50 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
51 */
52
53/*
54 * Supports the SMBus Message Transport (SMT) in the Intel Atom Processor
55 * S12xx Product Family.
56 *
57 * Features supported by this driver:
58 * Hardware PEC yes
59 * Block buffer yes
60 * Block process call transaction no
61 * Slave mode no
62 */
63
64#include <linux/module.h>
65#include <linux/init.h>
66#include <linux/pci.h>
67#include <linux/kernel.h>
68#include <linux/stddef.h>
69#include <linux/completion.h>
70#include <linux/dma-mapping.h>
71#include <linux/i2c.h>
72#include <linux/acpi.h>
73#include <linux/interrupt.h>
74
75#include <asm-generic/io-64-nonatomic-lo-hi.h>
76
77/* PCI Address Constants */
78#define SMBBAR 0
79
80/* PCI DIDs for the Intel SMBus Message Transport (SMT) Devices */
81#define PCI_DEVICE_ID_INTEL_S1200_SMT0 0x0c59
82#define PCI_DEVICE_ID_INTEL_S1200_SMT1 0x0c5a
83
84#define ISMT_DESC_ENTRIES 32 /* number of descriptor entries */
85#define ISMT_MAX_RETRIES 3 /* number of SMBus retries to attempt */
86
87/* Hardware Descriptor Constants - Control Field */
88#define ISMT_DESC_CWRL 0x01 /* Command/Write Length */
89#define ISMT_DESC_BLK 0X04 /* Perform Block Transaction */
90#define ISMT_DESC_FAIR 0x08 /* Set fairness flag upon successful arbit. */
91#define ISMT_DESC_PEC 0x10 /* Packet Error Code */
92#define ISMT_DESC_I2C 0x20 /* I2C Enable */
93#define ISMT_DESC_INT 0x40 /* Interrupt */
94#define ISMT_DESC_SOE 0x80 /* Stop On Error */
95
96/* Hardware Descriptor Constants - Status Field */
97#define ISMT_DESC_SCS 0x01 /* Success */
98#define ISMT_DESC_DLTO 0x04 /* Data Low Time Out */
99#define ISMT_DESC_NAK 0x08 /* NAK Received */
100#define ISMT_DESC_CRC 0x10 /* CRC Error */
101#define ISMT_DESC_CLTO 0x20 /* Clock Low Time Out */
102#define ISMT_DESC_COL 0x40 /* Collisions */
103#define ISMT_DESC_LPR 0x80 /* Large Packet Received */
104
105/* Macros */
106#define ISMT_DESC_ADDR_RW(addr, rw) (((addr) << 1) | (rw))
107
108/* iSMT General Register address offsets (SMBBAR + <addr>) */
109#define ISMT_GR_GCTRL 0x000 /* General Control */
110#define ISMT_GR_SMTICL 0x008 /* SMT Interrupt Cause Location */
111#define ISMT_GR_ERRINTMSK 0x010 /* Error Interrupt Mask */
112#define ISMT_GR_ERRAERMSK 0x014 /* Error AER Mask */
113#define ISMT_GR_ERRSTS 0x018 /* Error Status */
114#define ISMT_GR_ERRINFO 0x01c /* Error Information */
115
116/* iSMT Master Registers */
117#define ISMT_MSTR_MDBA 0x100 /* Master Descriptor Base Address */
118#define ISMT_MSTR_MCTRL 0x108 /* Master Control */
119#define ISMT_MSTR_MSTS 0x10c /* Master Status */
120#define ISMT_MSTR_MDS 0x110 /* Master Descriptor Size */
121#define ISMT_MSTR_RPOLICY 0x114 /* Retry Policy */
122
123/* iSMT Miscellaneous Registers */
124#define ISMT_SPGT 0x300 /* SMBus PHY Global Timing */
125
126/* General Control Register (GCTRL) bit definitions */
127#define ISMT_GCTRL_TRST 0x04 /* Target Reset */
128#define ISMT_GCTRL_KILL 0x08 /* Kill */
129#define ISMT_GCTRL_SRST 0x40 /* Soft Reset */
130
131/* Master Control Register (MCTRL) bit definitions */
132#define ISMT_MCTRL_SS 0x01 /* Start/Stop */
133#define ISMT_MCTRL_MEIE 0x10 /* Master Error Interrupt Enable */
134#define ISMT_MCTRL_FMHP 0x00ff0000 /* Firmware Master Head Ptr (FMHP) */
135
136/* Master Status Register (MSTS) bit definitions */
137#define ISMT_MSTS_HMTP 0xff0000 /* HW Master Tail Pointer (HMTP) */
138#define ISMT_MSTS_MIS 0x20 /* Master Interrupt Status (MIS) */
139#define ISMT_MSTS_MEIS 0x10 /* Master Error Int Status (MEIS) */
140#define ISMT_MSTS_IP 0x01 /* In Progress */
141
142/* Master Descriptor Size (MDS) bit definitions */
143#define ISMT_MDS_MASK 0xff /* Master Descriptor Size mask (MDS) */
144
145/* SMBus PHY Global Timing Register (SPGT) bit definitions */
146#define ISMT_SPGT_SPD_MASK 0xc0000000 /* SMBus Speed mask */
147#define ISMT_SPGT_SPD_80K 0x00 /* 80 kHz */
148#define ISMT_SPGT_SPD_100K (0x1 << 30) /* 100 kHz */
149#define ISMT_SPGT_SPD_400K (0x2 << 30) /* 400 kHz */
150#define ISMT_SPGT_SPD_1M (0x3 << 30) /* 1 MHz */
151
152
153/* MSI Control Register (MSICTL) bit definitions */
154#define ISMT_MSICTL_MSIE 0x01 /* MSI Enable */
155
156/* iSMT Hardware Descriptor */
157struct ismt_desc {
158 u8 tgtaddr_rw; /* target address & r/w bit */
159 u8 wr_len_cmd; /* write length in bytes or a command */
160 u8 rd_len; /* read length */
161 u8 control; /* control bits */
162 u8 status; /* status bits */
163 u8 retry; /* collision retry and retry count */
164 u8 rxbytes; /* received bytes */
165 u8 txbytes; /* transmitted bytes */
166 u32 dptr_low; /* lower 32 bit of the data pointer */
167 u32 dptr_high; /* upper 32 bit of the data pointer */
168} __packed;
169
170struct ismt_priv {
171 struct i2c_adapter adapter;
172 void *smba; /* PCI BAR */
173 struct pci_dev *pci_dev;
174 struct ismt_desc *hw; /* descriptor virt base addr */
175 dma_addr_t io_rng_dma; /* descriptor HW base addr */
176 u8 head; /* ring buffer head pointer */
177 struct completion cmp; /* interrupt completion */
178 u8 dma_buffer[I2C_SMBUS_BLOCK_MAX + 1]; /* temp R/W data buffer */
179 bool using_msi; /* type of interrupt flag */
180};
181
182/**
183 * ismt_ids - PCI device IDs supported by this driver
184 */
185static const DEFINE_PCI_DEVICE_TABLE(ismt_ids) = {
186 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_S1200_SMT0) },
187 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_S1200_SMT1) },
188 { 0, }
189};
190
191MODULE_DEVICE_TABLE(pci, ismt_ids);
192
193/* Bus speed control bits for slow debuggers - refer to the docs for usage */
194static unsigned int bus_speed;
195module_param(bus_speed, uint, S_IRUGO);
196MODULE_PARM_DESC(bus_speed, "Bus Speed in kHz (0 = BIOS default)");
197
198/**
199 * __ismt_desc_dump() - dump the contents of a specific descriptor
200 */
201static void __ismt_desc_dump(struct device *dev, const struct ismt_desc *desc)
202{
203
204 dev_dbg(dev, "Descriptor struct: %p\n", desc);
205 dev_dbg(dev, "\ttgtaddr_rw=0x%02X\n", desc->tgtaddr_rw);
206 dev_dbg(dev, "\twr_len_cmd=0x%02X\n", desc->wr_len_cmd);
207 dev_dbg(dev, "\trd_len= 0x%02X\n", desc->rd_len);
208 dev_dbg(dev, "\tcontrol= 0x%02X\n", desc->control);
209 dev_dbg(dev, "\tstatus= 0x%02X\n", desc->status);
210 dev_dbg(dev, "\tretry= 0x%02X\n", desc->retry);
211 dev_dbg(dev, "\trxbytes= 0x%02X\n", desc->rxbytes);
212 dev_dbg(dev, "\ttxbytes= 0x%02X\n", desc->txbytes);
213 dev_dbg(dev, "\tdptr_low= 0x%08X\n", desc->dptr_low);
214 dev_dbg(dev, "\tdptr_high= 0x%08X\n", desc->dptr_high);
215}
216/**
217 * ismt_desc_dump() - dump the contents of a descriptor for debug purposes
218 * @priv: iSMT private data
219 */
220static void ismt_desc_dump(struct ismt_priv *priv)
221{
222 struct device *dev = &priv->pci_dev->dev;
223 struct ismt_desc *desc = &priv->hw[priv->head];
224
225 dev_dbg(dev, "Dump of the descriptor struct: 0x%X\n", priv->head);
226 __ismt_desc_dump(dev, desc);
227}
228
229/**
230 * ismt_gen_reg_dump() - dump the iSMT General Registers
231 * @priv: iSMT private data
232 */
233static void ismt_gen_reg_dump(struct ismt_priv *priv)
234{
235 struct device *dev = &priv->pci_dev->dev;
236
237 dev_dbg(dev, "Dump of the iSMT General Registers\n");
238 dev_dbg(dev, " GCTRL.... : (0x%p)=0x%X\n",
239 priv->smba + ISMT_GR_GCTRL,
240 readl(priv->smba + ISMT_GR_GCTRL));
241 dev_dbg(dev, " SMTICL... : (0x%p)=0x%016llX\n",
242 priv->smba + ISMT_GR_SMTICL,
243 (long long unsigned int)readq(priv->smba + ISMT_GR_SMTICL));
244 dev_dbg(dev, " ERRINTMSK : (0x%p)=0x%X\n",
245 priv->smba + ISMT_GR_ERRINTMSK,
246 readl(priv->smba + ISMT_GR_ERRINTMSK));
247 dev_dbg(dev, " ERRAERMSK : (0x%p)=0x%X\n",
248 priv->smba + ISMT_GR_ERRAERMSK,
249 readl(priv->smba + ISMT_GR_ERRAERMSK));
250 dev_dbg(dev, " ERRSTS... : (0x%p)=0x%X\n",
251 priv->smba + ISMT_GR_ERRSTS,
252 readl(priv->smba + ISMT_GR_ERRSTS));
253 dev_dbg(dev, " ERRINFO.. : (0x%p)=0x%X\n",
254 priv->smba + ISMT_GR_ERRINFO,
255 readl(priv->smba + ISMT_GR_ERRINFO));
256}
257
258/**
259 * ismt_mstr_reg_dump() - dump the iSMT Master Registers
260 * @priv: iSMT private data
261 */
262static void ismt_mstr_reg_dump(struct ismt_priv *priv)
263{
264 struct device *dev = &priv->pci_dev->dev;
265
266 dev_dbg(dev, "Dump of the iSMT Master Registers\n");
267 dev_dbg(dev, " MDBA..... : (0x%p)=0x%016llX\n",
268 priv->smba + ISMT_MSTR_MDBA,
269 (long long unsigned int)readq(priv->smba + ISMT_MSTR_MDBA));
270 dev_dbg(dev, " MCTRL.... : (0x%p)=0x%X\n",
271 priv->smba + ISMT_MSTR_MCTRL,
272 readl(priv->smba + ISMT_MSTR_MCTRL));
273 dev_dbg(dev, " MSTS..... : (0x%p)=0x%X\n",
274 priv->smba + ISMT_MSTR_MSTS,
275 readl(priv->smba + ISMT_MSTR_MSTS));
276 dev_dbg(dev, " MDS...... : (0x%p)=0x%X\n",
277 priv->smba + ISMT_MSTR_MDS,
278 readl(priv->smba + ISMT_MSTR_MDS));
279 dev_dbg(dev, " RPOLICY.. : (0x%p)=0x%X\n",
280 priv->smba + ISMT_MSTR_RPOLICY,
281 readl(priv->smba + ISMT_MSTR_RPOLICY));
282 dev_dbg(dev, " SPGT..... : (0x%p)=0x%X\n",
283 priv->smba + ISMT_SPGT,
284 readl(priv->smba + ISMT_SPGT));
285}
286
287/**
288 * ismt_submit_desc() - add a descriptor to the ring
289 * @priv: iSMT private data
290 */
291static void ismt_submit_desc(struct ismt_priv *priv)
292{
293 uint fmhp;
294 uint val;
295
296 ismt_desc_dump(priv);
297 ismt_gen_reg_dump(priv);
298 ismt_mstr_reg_dump(priv);
299
300 /* Set the FMHP (Firmware Master Head Pointer)*/
301 fmhp = ((priv->head + 1) % ISMT_DESC_ENTRIES) << 16;
302 val = readl(priv->smba + ISMT_MSTR_MCTRL);
303 writel((val & ~ISMT_MCTRL_FMHP) | fmhp,
304 priv->smba + ISMT_MSTR_MCTRL);
305
306 /* Set the start bit */
307 val = readl(priv->smba + ISMT_MSTR_MCTRL);
308 writel(val | ISMT_MCTRL_SS,
309 priv->smba + ISMT_MSTR_MCTRL);
310}
311
312/**
313 * ismt_process_desc() - handle the completion of the descriptor
314 * @desc: the iSMT hardware descriptor
315 * @data: data buffer from the upper layer
316 * @priv: ismt_priv struct holding our dma buffer
317 * @size: SMBus transaction type
318 * @read_write: flag to indicate if this is a read or write
319 */
320static int ismt_process_desc(const struct ismt_desc *desc,
321 union i2c_smbus_data *data,
322 struct ismt_priv *priv, int size,
323 char read_write)
324{
325 u8 *dma_buffer = priv->dma_buffer;
326
327 dev_dbg(&priv->pci_dev->dev, "Processing completed descriptor\n");
328 __ismt_desc_dump(&priv->pci_dev->dev, desc);
329
330 if (desc->status & ISMT_DESC_SCS) {
331 if (read_write == I2C_SMBUS_WRITE &&
332 size != I2C_SMBUS_PROC_CALL)
333 return 0;
334
335 switch (size) {
336 case I2C_SMBUS_BYTE:
337 case I2C_SMBUS_BYTE_DATA:
338 data->byte = dma_buffer[0];
339 break;
340 case I2C_SMBUS_WORD_DATA:
341 case I2C_SMBUS_PROC_CALL:
342 data->word = dma_buffer[0] | (dma_buffer[1] << 8);
343 break;
344 case I2C_SMBUS_BLOCK_DATA:
345 memcpy(&data->block[1], dma_buffer, desc->rxbytes);
346 data->block[0] = desc->rxbytes;
347 break;
348 }
349 return 0;
350 }
351
352 if (likely(desc->status & ISMT_DESC_NAK))
353 return -ENXIO;
354
355 if (desc->status & ISMT_DESC_CRC)
356 return -EBADMSG;
357
358 if (desc->status & ISMT_DESC_COL)
359 return -EAGAIN;
360
361 if (desc->status & ISMT_DESC_LPR)
362 return -EPROTO;
363
364 if (desc->status & (ISMT_DESC_DLTO | ISMT_DESC_CLTO))
365 return -ETIMEDOUT;
366
367 return -EIO;
368}
369
370/**
371 * ismt_access() - process an SMBus command
372 * @adap: the i2c host adapter
373 * @addr: address of the i2c/SMBus target
374 * @flags: command options
375 * @read_write: read from or write to device
376 * @command: the i2c/SMBus command to issue
377 * @size: SMBus transaction type
378 * @data: read/write data buffer
379 */
380static int ismt_access(struct i2c_adapter *adap, u16 addr,
381 unsigned short flags, char read_write, u8 command,
382 int size, union i2c_smbus_data *data)
383{
384 int ret;
385 dma_addr_t dma_addr = 0; /* address of the data buffer */
386 u8 dma_size = 0;
387 enum dma_data_direction dma_direction = 0;
388 struct ismt_desc *desc;
389 struct ismt_priv *priv = i2c_get_adapdata(adap);
390 struct device *dev = &priv->pci_dev->dev;
391
392 desc = &priv->hw[priv->head];
393
394 /* Initialize the descriptor */
395 memset(desc, 0, sizeof(struct ismt_desc));
396 desc->tgtaddr_rw = ISMT_DESC_ADDR_RW(addr, read_write);
397
398 /* Initialize common control bits */
399 if (likely(priv->using_msi))
400 desc->control = ISMT_DESC_INT | ISMT_DESC_FAIR;
401 else
402 desc->control = ISMT_DESC_FAIR;
403
404 if ((flags & I2C_CLIENT_PEC) && (size != I2C_SMBUS_QUICK)
405 && (size != I2C_SMBUS_I2C_BLOCK_DATA))
406 desc->control |= ISMT_DESC_PEC;
407
408 switch (size) {
409 case I2C_SMBUS_QUICK:
410 dev_dbg(dev, "I2C_SMBUS_QUICK\n");
411 break;
412
413 case I2C_SMBUS_BYTE:
414 if (read_write == I2C_SMBUS_WRITE) {
415 /*
416 * Send Byte
417 * The command field contains the write data
418 */
419 dev_dbg(dev, "I2C_SMBUS_BYTE: WRITE\n");
420 desc->control |= ISMT_DESC_CWRL;
421 desc->wr_len_cmd = command;
422 } else {
423 /* Receive Byte */
424 dev_dbg(dev, "I2C_SMBUS_BYTE: READ\n");
425 dma_size = 1;
426 dma_direction = DMA_FROM_DEVICE;
427 desc->rd_len = 1;
428 }
429 break;
430
431 case I2C_SMBUS_BYTE_DATA:
432 if (read_write == I2C_SMBUS_WRITE) {
433 /*
434 * Write Byte
435 * Command plus 1 data byte
436 */
437 dev_dbg(dev, "I2C_SMBUS_BYTE_DATA: WRITE\n");
438 desc->wr_len_cmd = 2;
439 dma_size = 2;
440 dma_direction = DMA_TO_DEVICE;
441 priv->dma_buffer[0] = command;
442 priv->dma_buffer[1] = data->byte;
443 } else {
444 /* Read Byte */
445 dev_dbg(dev, "I2C_SMBUS_BYTE_DATA: READ\n");
446 desc->control |= ISMT_DESC_CWRL;
447 desc->wr_len_cmd = command;
448 desc->rd_len = 1;
449 dma_size = 1;
450 dma_direction = DMA_FROM_DEVICE;
451 }
452 break;
453
454 case I2C_SMBUS_WORD_DATA:
455 if (read_write == I2C_SMBUS_WRITE) {
456 /* Write Word */
457 dev_dbg(dev, "I2C_SMBUS_WORD_DATA: WRITE\n");
458 desc->wr_len_cmd = 3;
459 dma_size = 3;
460 dma_direction = DMA_TO_DEVICE;
461 priv->dma_buffer[0] = command;
462 priv->dma_buffer[1] = data->word & 0xff;
463 priv->dma_buffer[2] = data->word >> 8;
464 } else {
465 /* Read Word */
466 dev_dbg(dev, "I2C_SMBUS_WORD_DATA: READ\n");
467 desc->wr_len_cmd = command;
468 desc->control |= ISMT_DESC_CWRL;
469 desc->rd_len = 2;
470 dma_size = 2;
471 dma_direction = DMA_FROM_DEVICE;
472 }
473 break;
474
475 case I2C_SMBUS_PROC_CALL:
476 dev_dbg(dev, "I2C_SMBUS_PROC_CALL\n");
477 desc->wr_len_cmd = 3;
478 desc->rd_len = 2;
479 dma_size = 3;
480 dma_direction = DMA_BIDIRECTIONAL;
481 priv->dma_buffer[0] = command;
482 priv->dma_buffer[1] = data->word & 0xff;
483 priv->dma_buffer[2] = data->word >> 8;
484 break;
485
486 case I2C_SMBUS_BLOCK_DATA:
487 if (read_write == I2C_SMBUS_WRITE) {
488 /* Block Write */
489 dev_dbg(dev, "I2C_SMBUS_BLOCK_DATA: WRITE\n");
490 dma_size = data->block[0] + 1;
491 dma_direction = DMA_TO_DEVICE;
492 desc->wr_len_cmd = dma_size;
493 desc->control |= ISMT_DESC_BLK;
494 priv->dma_buffer[0] = command;
495 memcpy(&priv->dma_buffer[1], &data->block[1], dma_size);
496 } else {
497 /* Block Read */
498 dev_dbg(dev, "I2C_SMBUS_BLOCK_DATA: READ\n");
499 dma_size = I2C_SMBUS_BLOCK_MAX;
500 dma_direction = DMA_FROM_DEVICE;
501 desc->rd_len = dma_size;
502 desc->wr_len_cmd = command;
503 desc->control |= (ISMT_DESC_BLK | ISMT_DESC_CWRL);
504 }
505 break;
506
507 default:
508 dev_err(dev, "Unsupported transaction %d\n",
509 size);
510 return -EOPNOTSUPP;
511 }
512
513 /* map the data buffer */
514 if (dma_size != 0) {
515 dev_dbg(dev, " dev=%p\n", dev);
516 dev_dbg(dev, " data=%p\n", data);
517 dev_dbg(dev, " dma_buffer=%p\n", priv->dma_buffer);
518 dev_dbg(dev, " dma_size=%d\n", dma_size);
519 dev_dbg(dev, " dma_direction=%d\n", dma_direction);
520
521 dma_addr = dma_map_single(dev,
522 priv->dma_buffer,
523 dma_size,
524 dma_direction);
525
526 if (dma_mapping_error(dev, dma_addr)) {
527 dev_err(dev, "Error in mapping dma buffer %p\n",
528 priv->dma_buffer);
529 return -EIO;
530 }
531
532 dev_dbg(dev, " dma_addr = 0x%016llX\n",
533 (unsigned long long)dma_addr);
534
535 desc->dptr_low = lower_32_bits(dma_addr);
536 desc->dptr_high = upper_32_bits(dma_addr);
537 }
538
539 INIT_COMPLETION(priv->cmp);
540
541 /* Add the descriptor */
542 ismt_submit_desc(priv);
543
544 /* Now we wait for interrupt completion, 1s */
545 ret = wait_for_completion_timeout(&priv->cmp, HZ*1);
546
547 /* unmap the data buffer */
548 if (dma_size != 0)
549 dma_unmap_single(&adap->dev, dma_addr, dma_size, dma_direction);
550
551 if (unlikely(!ret)) {
552 dev_err(dev, "completion wait timed out\n");
553 ret = -ETIMEDOUT;
554 goto out;
555 }
556
557 /* do any post processing of the descriptor here */
558 ret = ismt_process_desc(desc, data, priv, size, read_write);
559
560out:
561 /* Update the ring pointer */
562 priv->head++;
563 priv->head %= ISMT_DESC_ENTRIES;
564
565 return ret;
566}
567
568/**
569 * ismt_func() - report which i2c commands are supported by this adapter
570 * @adap: the i2c host adapter
571 */
572static u32 ismt_func(struct i2c_adapter *adap)
573{
574 return I2C_FUNC_SMBUS_QUICK |
575 I2C_FUNC_SMBUS_BYTE |
576 I2C_FUNC_SMBUS_BYTE_DATA |
577 I2C_FUNC_SMBUS_WORD_DATA |
578 I2C_FUNC_SMBUS_PROC_CALL |
579 I2C_FUNC_SMBUS_BLOCK_DATA |
580 I2C_FUNC_SMBUS_PEC;
581}
582
583/**
584 * smbus_algorithm - the adapter algorithm and supported functionality
585 * @smbus_xfer: the adapter algorithm
586 * @functionality: functionality supported by the adapter
587 */
588static const struct i2c_algorithm smbus_algorithm = {
589 .smbus_xfer = ismt_access,
590 .functionality = ismt_func,
591};
592
593/**
594 * ismt_handle_isr() - interrupt handler bottom half
595 * @priv: iSMT private data
596 */
597static irqreturn_t ismt_handle_isr(struct ismt_priv *priv)
598{
599 complete(&priv->cmp);
600
601 return IRQ_HANDLED;
602}
603
604
605/**
606 * ismt_do_interrupt() - IRQ interrupt handler
607 * @vec: interrupt vector
608 * @data: iSMT private data
609 */
610static irqreturn_t ismt_do_interrupt(int vec, void *data)
611{
612 u32 val;
613 struct ismt_priv *priv = data;
614
615 /*
616 * check to see it's our interrupt, return IRQ_NONE if not ours
617 * since we are sharing interrupt
618 */
619 val = readl(priv->smba + ISMT_MSTR_MSTS);
620
621 if (!(val & (ISMT_MSTS_MIS | ISMT_MSTS_MEIS)))
622 return IRQ_NONE;
623 else
624 writel(val | ISMT_MSTS_MIS | ISMT_MSTS_MEIS,
625 priv->smba + ISMT_MSTR_MSTS);
626
627 return ismt_handle_isr(priv);
628}
629
630/**
631 * ismt_do_msi_interrupt() - MSI interrupt handler
632 * @vec: interrupt vector
633 * @data: iSMT private data
634 */
635static irqreturn_t ismt_do_msi_interrupt(int vec, void *data)
636{
637 return ismt_handle_isr(data);
638}
639
640/**
641 * ismt_hw_init() - initialize the iSMT hardware
642 * @priv: iSMT private data
643 */
644static void ismt_hw_init(struct ismt_priv *priv)
645{
646 u32 val;
647 struct device *dev = &priv->pci_dev->dev;
648
649 /* initialize the Master Descriptor Base Address (MDBA) */
650 writeq(priv->io_rng_dma, priv->smba + ISMT_MSTR_MDBA);
651
652 /* initialize the Master Control Register (MCTRL) */
653 writel(ISMT_MCTRL_MEIE, priv->smba + ISMT_MSTR_MCTRL);
654
655 /* initialize the Master Status Register (MSTS) */
656 writel(0, priv->smba + ISMT_MSTR_MSTS);
657
658 /* initialize the Master Descriptor Size (MDS) */
659 val = readl(priv->smba + ISMT_MSTR_MDS);
660 writel((val & ~ISMT_MDS_MASK) | (ISMT_DESC_ENTRIES - 1),
661 priv->smba + ISMT_MSTR_MDS);
662
663 /*
664 * Set the SMBus speed (could use this for slow HW debuggers)
665 */
666
667 val = readl(priv->smba + ISMT_SPGT);
668
669 switch (bus_speed) {
670 case 0:
671 break;
672
673 case 80:
674 dev_dbg(dev, "Setting SMBus clock to 80 kHz\n");
675 writel(((val & ~ISMT_SPGT_SPD_MASK) | ISMT_SPGT_SPD_80K),
676 priv->smba + ISMT_SPGT);
677 break;
678
679 case 100:
680 dev_dbg(dev, "Setting SMBus clock to 100 kHz\n");
681 writel(((val & ~ISMT_SPGT_SPD_MASK) | ISMT_SPGT_SPD_100K),
682 priv->smba + ISMT_SPGT);
683 break;
684
685 case 400:
686 dev_dbg(dev, "Setting SMBus clock to 400 kHz\n");
687 writel(((val & ~ISMT_SPGT_SPD_MASK) | ISMT_SPGT_SPD_400K),
688 priv->smba + ISMT_SPGT);
689 break;
690
691 case 1000:
692 dev_dbg(dev, "Setting SMBus clock to 1000 kHz\n");
693 writel(((val & ~ISMT_SPGT_SPD_MASK) | ISMT_SPGT_SPD_1M),
694 priv->smba + ISMT_SPGT);
695 break;
696
697 default:
698 dev_warn(dev, "Invalid SMBus clock speed, only 0, 80, 100, 400, and 1000 are valid\n");
699 break;
700 }
701
702 val = readl(priv->smba + ISMT_SPGT);
703
704 switch (val & ISMT_SPGT_SPD_MASK) {
705 case ISMT_SPGT_SPD_80K:
706 bus_speed = 80;
707 break;
708 case ISMT_SPGT_SPD_100K:
709 bus_speed = 100;
710 break;
711 case ISMT_SPGT_SPD_400K:
712 bus_speed = 400;
713 break;
714 case ISMT_SPGT_SPD_1M:
715 bus_speed = 1000;
716 break;
717 }
718 dev_dbg(dev, "SMBus clock is running at %d kHz\n", bus_speed);
719}
720
721/**
722 * ismt_dev_init() - initialize the iSMT data structures
723 * @priv: iSMT private data
724 */
725static int ismt_dev_init(struct ismt_priv *priv)
726{
727 /* allocate memory for the descriptor */
728 priv->hw = dmam_alloc_coherent(&priv->pci_dev->dev,
729 (ISMT_DESC_ENTRIES
730 * sizeof(struct ismt_desc)),
731 &priv->io_rng_dma,
732 GFP_KERNEL);
733 if (!priv->hw)
734 return -ENOMEM;
735
736 memset(priv->hw, 0, (ISMT_DESC_ENTRIES * sizeof(struct ismt_desc)));
737
738 priv->head = 0;
739 init_completion(&priv->cmp);
740
741 return 0;
742}
743
744/**
745 * ismt_int_init() - initialize interrupts
746 * @priv: iSMT private data
747 */
748static int ismt_int_init(struct ismt_priv *priv)
749{
750 int err;
751
752 /* Try using MSI interrupts */
753 err = pci_enable_msi(priv->pci_dev);
754 if (err) {
755 dev_warn(&priv->pci_dev->dev,
756 "Unable to use MSI interrupts, falling back to legacy\n");
757 goto intx;
758 }
759
760 err = devm_request_irq(&priv->pci_dev->dev,
761 priv->pci_dev->irq,
762 ismt_do_msi_interrupt,
763 0,
764 "ismt-msi",
765 priv);
766 if (err) {
767 pci_disable_msi(priv->pci_dev);
768 goto intx;
769 }
770
771 priv->using_msi = true;
772 goto done;
773
774 /* Try using legacy interrupts */
775intx:
776 err = devm_request_irq(&priv->pci_dev->dev,
777 priv->pci_dev->irq,
778 ismt_do_interrupt,
779 IRQF_SHARED,
780 "ismt-intx",
781 priv);
782 if (err) {
783 dev_err(&priv->pci_dev->dev, "no usable interrupts\n");
784 return -ENODEV;
785 }
786
787 priv->using_msi = false;
788
789done:
790 return 0;
791}
792
793static struct pci_driver ismt_driver;
794
795/**
796 * ismt_probe() - probe for iSMT devices
797 * @pdev: PCI-Express device
798 * @id: PCI-Express device ID
799 */
800static int
801ismt_probe(struct pci_dev *pdev, const struct pci_device_id *id)
802{
803 int err;
804 struct ismt_priv *priv;
805 unsigned long start, len;
806
807 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
808 if (!priv)
809 return -ENOMEM;
810
811 pci_set_drvdata(pdev, priv);
812 i2c_set_adapdata(&priv->adapter, priv);
813 priv->adapter.owner = THIS_MODULE;
814
815 priv->adapter.class = I2C_CLASS_HWMON;
816
817 priv->adapter.algo = &smbus_algorithm;
818
819 /* set up the sysfs linkage to our parent device */
820 priv->adapter.dev.parent = &pdev->dev;
821
822 /* number of retries on lost arbitration */
823 priv->adapter.retries = ISMT_MAX_RETRIES;
824
825 priv->pci_dev = pdev;
826
827 err = pcim_enable_device(pdev);
828 if (err) {
829 dev_err(&pdev->dev, "Failed to enable SMBus PCI device (%d)\n",
830 err);
831 return err;
832 }
833
834 /* enable bus mastering */
835 pci_set_master(pdev);
836
837 /* Determine the address of the SMBus area */
838 start = pci_resource_start(pdev, SMBBAR);
839 len = pci_resource_len(pdev, SMBBAR);
840 if (!start || !len) {
841 dev_err(&pdev->dev,
842 "SMBus base address uninitialized, upgrade BIOS\n");
843 return -ENODEV;
844 }
845
846 snprintf(priv->adapter.name, sizeof(priv->adapter.name),
847 "SMBus iSMT adapter at %lx", start);
848
849 dev_dbg(&priv->pci_dev->dev, " start=0x%lX\n", start);
850 dev_dbg(&priv->pci_dev->dev, " len=0x%lX\n", len);
851
852 err = acpi_check_resource_conflict(&pdev->resource[SMBBAR]);
853 if (err) {
854 dev_err(&pdev->dev, "ACPI resource conflict!\n");
855 return err;
856 }
857
858 err = pci_request_region(pdev, SMBBAR, ismt_driver.name);
859 if (err) {
860 dev_err(&pdev->dev,
861 "Failed to request SMBus region 0x%lx-0x%lx\n",
862 start, start + len);
863 return err;
864 }
865
866 priv->smba = pcim_iomap(pdev, SMBBAR, len);
867 if (!priv->smba) {
868 dev_err(&pdev->dev, "Unable to ioremap SMBus BAR\n");
869 err = -ENODEV;
870 goto fail;
871 }
872
873 if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) != 0) ||
874 (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)) != 0)) {
875 if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) ||
876 (pci_set_consistent_dma_mask(pdev,
877 DMA_BIT_MASK(32)) != 0)) {
878 dev_err(&pdev->dev, "pci_set_dma_mask fail %p\n",
879 pdev);
880 goto fail;
881 }
882 }
883
884 err = ismt_dev_init(priv);
885 if (err)
886 goto fail;
887
888 ismt_hw_init(priv);
889
890 err = ismt_int_init(priv);
891 if (err)
892 goto fail;
893
894 err = i2c_add_adapter(&priv->adapter);
895 if (err) {
896 dev_err(&pdev->dev, "Failed to add SMBus iSMT adapter\n");
897 err = -ENODEV;
898 goto fail;
899 }
900 return 0;
901
902fail:
903 pci_release_region(pdev, SMBBAR);
904 return err;
905}
906
907/**
908 * ismt_remove() - release driver resources
909 * @pdev: PCI-Express device
910 */
911static void ismt_remove(struct pci_dev *pdev)
912{
913 struct ismt_priv *priv = pci_get_drvdata(pdev);
914
915 i2c_del_adapter(&priv->adapter);
916 pci_release_region(pdev, SMBBAR);
917}
918
919/**
920 * ismt_suspend() - place the device in suspend
921 * @pdev: PCI-Express device
922 * @mesg: PM message
923 */
924#ifdef CONFIG_PM
925static int ismt_suspend(struct pci_dev *pdev, pm_message_t mesg)
926{
927 pci_save_state(pdev);
928 pci_set_power_state(pdev, pci_choose_state(pdev, mesg));
929 return 0;
930}
931
932/**
933 * ismt_resume() - PCI resume code
934 * @pdev: PCI-Express device
935 */
936static int ismt_resume(struct pci_dev *pdev)
937{
938 pci_set_power_state(pdev, PCI_D0);
939 pci_restore_state(pdev);
940 return pci_enable_device(pdev);
941}
942
943#else
944
945#define ismt_suspend NULL
946#define ismt_resume NULL
947
948#endif
949
950static struct pci_driver ismt_driver = {
951 .name = "ismt_smbus",
952 .id_table = ismt_ids,
953 .probe = ismt_probe,
954 .remove = ismt_remove,
955 .suspend = ismt_suspend,
956 .resume = ismt_resume,
957};
958
959module_pci_driver(ismt_driver);
960
961MODULE_LICENSE("Dual BSD/GPL");
962MODULE_AUTHOR("Bill E. Brown <bill.e.brown@intel.com>");
963MODULE_DESCRIPTION("Intel SMBus Message Transport (iSMT) driver");
diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c
index a69459e5c3f3..5e705ee02f4a 100644
--- a/drivers/i2c/busses/i2c-mpc.c
+++ b/drivers/i2c/busses/i2c-mpc.c
@@ -696,7 +696,6 @@ static int fsl_i2c_probe(struct platform_device *op)
696 return result; 696 return result;
697 697
698 fail_add: 698 fail_add:
699 dev_set_drvdata(&op->dev, NULL);
700 free_irq(i2c->irq, i2c); 699 free_irq(i2c->irq, i2c);
701 fail_request: 700 fail_request:
702 irq_dispose_mapping(i2c->irq); 701 irq_dispose_mapping(i2c->irq);
@@ -711,7 +710,6 @@ static int fsl_i2c_remove(struct platform_device *op)
711 struct mpc_i2c *i2c = dev_get_drvdata(&op->dev); 710 struct mpc_i2c *i2c = dev_get_drvdata(&op->dev);
712 711
713 i2c_del_adapter(&i2c->adap); 712 i2c_del_adapter(&i2c->adap);
714 dev_set_drvdata(&op->dev, NULL);
715 713
716 if (i2c->irq) 714 if (i2c->irq)
717 free_irq(i2c->irq, i2c); 715 free_irq(i2c->irq, i2c);
diff --git a/drivers/i2c/busses/i2c-mxs.c b/drivers/i2c/busses/i2c-mxs.c
index d6abaf2cf2e3..120f24646696 100644
--- a/drivers/i2c/busses/i2c-mxs.c
+++ b/drivers/i2c/busses/i2c-mxs.c
@@ -39,6 +39,7 @@
39#define MXS_I2C_CTRL0_SET (0x04) 39#define MXS_I2C_CTRL0_SET (0x04)
40 40
41#define MXS_I2C_CTRL0_SFTRST 0x80000000 41#define MXS_I2C_CTRL0_SFTRST 0x80000000
42#define MXS_I2C_CTRL0_RUN 0x20000000
42#define MXS_I2C_CTRL0_SEND_NAK_ON_LAST 0x02000000 43#define MXS_I2C_CTRL0_SEND_NAK_ON_LAST 0x02000000
43#define MXS_I2C_CTRL0_RETAIN_CLOCK 0x00200000 44#define MXS_I2C_CTRL0_RETAIN_CLOCK 0x00200000
44#define MXS_I2C_CTRL0_POST_SEND_STOP 0x00100000 45#define MXS_I2C_CTRL0_POST_SEND_STOP 0x00100000
@@ -64,6 +65,13 @@
64#define MXS_I2C_CTRL1_SLAVE_STOP_IRQ 0x02 65#define MXS_I2C_CTRL1_SLAVE_STOP_IRQ 0x02
65#define MXS_I2C_CTRL1_SLAVE_IRQ 0x01 66#define MXS_I2C_CTRL1_SLAVE_IRQ 0x01
66 67
68#define MXS_I2C_DATA (0xa0)
69
70#define MXS_I2C_DEBUG0 (0xb0)
71#define MXS_I2C_DEBUG0_CLR (0xb8)
72
73#define MXS_I2C_DEBUG0_DMAREQ 0x80000000
74
67#define MXS_I2C_IRQ_MASK (MXS_I2C_CTRL1_DATA_ENGINE_CMPLT_IRQ | \ 75#define MXS_I2C_IRQ_MASK (MXS_I2C_CTRL1_DATA_ENGINE_CMPLT_IRQ | \
68 MXS_I2C_CTRL1_NO_SLAVE_ACK_IRQ | \ 76 MXS_I2C_CTRL1_NO_SLAVE_ACK_IRQ | \
69 MXS_I2C_CTRL1_EARLY_TERM_IRQ | \ 77 MXS_I2C_CTRL1_EARLY_TERM_IRQ | \
@@ -85,35 +93,6 @@
85#define MXS_CMD_I2C_READ (MXS_I2C_CTRL0_SEND_NAK_ON_LAST | \ 93#define MXS_CMD_I2C_READ (MXS_I2C_CTRL0_SEND_NAK_ON_LAST | \
86 MXS_I2C_CTRL0_MASTER_MODE) 94 MXS_I2C_CTRL0_MASTER_MODE)
87 95
88struct mxs_i2c_speed_config {
89 uint32_t timing0;
90 uint32_t timing1;
91 uint32_t timing2;
92};
93
94/*
95 * Timing values for the default 24MHz clock supplied into the i2c block.
96 *
97 * The bus can operate at 95kHz or at 400kHz with the following timing
98 * register configurations. The 100kHz mode isn't present because it's
99 * values are not stated in the i.MX233/i.MX28 datasheet. The 95kHz mode
100 * shall be close enough replacement. Therefore when the bus is configured
101 * for 100kHz operation, 95kHz timing settings are actually loaded.
102 *
103 * For details, see i.MX233 [25.4.2 - 25.4.4] and i.MX28 [27.5.2 - 27.5.4].
104 */
105static const struct mxs_i2c_speed_config mxs_i2c_95kHz_config = {
106 .timing0 = 0x00780030,
107 .timing1 = 0x00800030,
108 .timing2 = 0x00300030,
109};
110
111static const struct mxs_i2c_speed_config mxs_i2c_400kHz_config = {
112 .timing0 = 0x000f0007,
113 .timing1 = 0x001f000f,
114 .timing2 = 0x00300030,
115};
116
117/** 96/**
118 * struct mxs_i2c_dev - per device, private MXS-I2C data 97 * struct mxs_i2c_dev - per device, private MXS-I2C data
119 * 98 *
@@ -129,7 +108,9 @@ struct mxs_i2c_dev {
129 struct completion cmd_complete; 108 struct completion cmd_complete;
130 int cmd_err; 109 int cmd_err;
131 struct i2c_adapter adapter; 110 struct i2c_adapter adapter;
132 const struct mxs_i2c_speed_config *speed; 111
112 uint32_t timing0;
113 uint32_t timing1;
133 114
134 /* DMA support components */ 115 /* DMA support components */
135 int dma_channel; 116 int dma_channel;
@@ -145,9 +126,16 @@ static void mxs_i2c_reset(struct mxs_i2c_dev *i2c)
145{ 126{
146 stmp_reset_block(i2c->regs); 127 stmp_reset_block(i2c->regs);
147 128
148 writel(i2c->speed->timing0, i2c->regs + MXS_I2C_TIMING0); 129 /*
149 writel(i2c->speed->timing1, i2c->regs + MXS_I2C_TIMING1); 130 * Configure timing for the I2C block. The I2C TIMING2 register has to
150 writel(i2c->speed->timing2, i2c->regs + MXS_I2C_TIMING2); 131 * be programmed with this particular magic number. The rest is derived
132 * from the XTAL speed and requested I2C speed.
133 *
134 * For details, see i.MX233 [25.4.2 - 25.4.4] and i.MX28 [27.5.2 - 27.5.4].
135 */
136 writel(i2c->timing0, i2c->regs + MXS_I2C_TIMING0);
137 writel(i2c->timing1, i2c->regs + MXS_I2C_TIMING1);
138 writel(0x00300030, i2c->regs + MXS_I2C_TIMING2);
151 139
152 writel(MXS_I2C_IRQ_MASK << 8, i2c->regs + MXS_I2C_CTRL1_SET); 140 writel(MXS_I2C_IRQ_MASK << 8, i2c->regs + MXS_I2C_CTRL1_SET);
153} 141}
@@ -298,6 +286,135 @@ write_init_pio_fail:
298 return -EINVAL; 286 return -EINVAL;
299} 287}
300 288
289static int mxs_i2c_pio_wait_dmareq(struct mxs_i2c_dev *i2c)
290{
291 unsigned long timeout = jiffies + msecs_to_jiffies(1000);
292
293 while (!(readl(i2c->regs + MXS_I2C_DEBUG0) &
294 MXS_I2C_DEBUG0_DMAREQ)) {
295 if (time_after(jiffies, timeout))
296 return -ETIMEDOUT;
297 cond_resched();
298 }
299
300 writel(MXS_I2C_DEBUG0_DMAREQ, i2c->regs + MXS_I2C_DEBUG0_CLR);
301
302 return 0;
303}
304
305static int mxs_i2c_pio_wait_cplt(struct mxs_i2c_dev *i2c)
306{
307 unsigned long timeout = jiffies + msecs_to_jiffies(1000);
308
309 /*
310 * We do not use interrupts in the PIO mode. Due to the
311 * maximum transfer length being 8 bytes in PIO mode, the
312 * overhead of interrupt would be too large and this would
313 * neglect the gain from using the PIO mode.
314 */
315
316 while (!(readl(i2c->regs + MXS_I2C_CTRL1) &
317 MXS_I2C_CTRL1_DATA_ENGINE_CMPLT_IRQ)) {
318 if (time_after(jiffies, timeout))
319 return -ETIMEDOUT;
320 cond_resched();
321 }
322
323 writel(MXS_I2C_CTRL1_DATA_ENGINE_CMPLT_IRQ,
324 i2c->regs + MXS_I2C_CTRL1_CLR);
325
326 return 0;
327}
328
329static int mxs_i2c_pio_setup_xfer(struct i2c_adapter *adap,
330 struct i2c_msg *msg, uint32_t flags)
331{
332 struct mxs_i2c_dev *i2c = i2c_get_adapdata(adap);
333 uint32_t addr_data = msg->addr << 1;
334 uint32_t data = 0;
335 int i, shifts_left, ret;
336
337 /* Mute IRQs coming from this block. */
338 writel(MXS_I2C_IRQ_MASK << 8, i2c->regs + MXS_I2C_CTRL1_CLR);
339
340 if (msg->flags & I2C_M_RD) {
341 addr_data |= I2C_SMBUS_READ;
342
343 /* SELECT command. */
344 writel(MXS_I2C_CTRL0_RUN | MXS_CMD_I2C_SELECT,
345 i2c->regs + MXS_I2C_CTRL0);
346
347 ret = mxs_i2c_pio_wait_dmareq(i2c);
348 if (ret)
349 return ret;
350
351 writel(addr_data, i2c->regs + MXS_I2C_DATA);
352
353 ret = mxs_i2c_pio_wait_cplt(i2c);
354 if (ret)
355 return ret;
356
357 /* READ command. */
358 writel(MXS_I2C_CTRL0_RUN | MXS_CMD_I2C_READ | flags |
359 MXS_I2C_CTRL0_XFER_COUNT(msg->len),
360 i2c->regs + MXS_I2C_CTRL0);
361
362 for (i = 0; i < msg->len; i++) {
363 if ((i & 3) == 0) {
364 ret = mxs_i2c_pio_wait_dmareq(i2c);
365 if (ret)
366 return ret;
367 data = readl(i2c->regs + MXS_I2C_DATA);
368 }
369 msg->buf[i] = data & 0xff;
370 data >>= 8;
371 }
372 } else {
373 addr_data |= I2C_SMBUS_WRITE;
374
375 /* WRITE command. */
376 writel(MXS_I2C_CTRL0_RUN | MXS_CMD_I2C_WRITE | flags |
377 MXS_I2C_CTRL0_XFER_COUNT(msg->len + 1),
378 i2c->regs + MXS_I2C_CTRL0);
379
380 /*
381 * The LSB of data buffer is the first byte blasted across
382 * the bus. Higher order bytes follow. Thus the following
383 * filling schematic.
384 */
385 data = addr_data << 24;
386 for (i = 0; i < msg->len; i++) {
387 data >>= 8;
388 data |= (msg->buf[i] << 24);
389 if ((i & 3) == 2) {
390 ret = mxs_i2c_pio_wait_dmareq(i2c);
391 if (ret)
392 return ret;
393 writel(data, i2c->regs + MXS_I2C_DATA);
394 }
395 }
396
397 shifts_left = 24 - (i & 3) * 8;
398 if (shifts_left) {
399 data >>= shifts_left;
400 ret = mxs_i2c_pio_wait_dmareq(i2c);
401 if (ret)
402 return ret;
403 writel(data, i2c->regs + MXS_I2C_DATA);
404 }
405 }
406
407 ret = mxs_i2c_pio_wait_cplt(i2c);
408 if (ret)
409 return ret;
410
411 /* Clear any dangling IRQs and re-enable interrupts. */
412 writel(MXS_I2C_IRQ_MASK, i2c->regs + MXS_I2C_CTRL1_CLR);
413 writel(MXS_I2C_IRQ_MASK << 8, i2c->regs + MXS_I2C_CTRL1_SET);
414
415 return 0;
416}
417
301/* 418/*
302 * Low level master read/write transaction. 419 * Low level master read/write transaction.
303 */ 420 */
@@ -316,24 +433,37 @@ static int mxs_i2c_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg,
316 if (msg->len == 0) 433 if (msg->len == 0)
317 return -EINVAL; 434 return -EINVAL;
318 435
319 INIT_COMPLETION(i2c->cmd_complete); 436 /*
320 i2c->cmd_err = 0; 437 * The current boundary to select between PIO/DMA transfer method
321 438 * is set to 8 bytes, transfers shorter than 8 bytes are transfered
322 ret = mxs_i2c_dma_setup_xfer(adap, msg, flags); 439 * using PIO mode while longer transfers use DMA. The 8 byte border is
323 if (ret) 440 * based on this empirical measurement and a lot of previous frobbing.
324 return ret; 441 */
442 if (msg->len < 8) {
443 ret = mxs_i2c_pio_setup_xfer(adap, msg, flags);
444 if (ret)
445 mxs_i2c_reset(i2c);
446 } else {
447 i2c->cmd_err = 0;
448 INIT_COMPLETION(i2c->cmd_complete);
449 ret = mxs_i2c_dma_setup_xfer(adap, msg, flags);
450 if (ret)
451 return ret;
325 452
326 ret = wait_for_completion_timeout(&i2c->cmd_complete, 453 ret = wait_for_completion_timeout(&i2c->cmd_complete,
327 msecs_to_jiffies(1000)); 454 msecs_to_jiffies(1000));
328 if (ret == 0) 455 if (ret == 0)
329 goto timeout; 456 goto timeout;
457
458 if (i2c->cmd_err == -ENXIO)
459 mxs_i2c_reset(i2c);
330 460
331 if (i2c->cmd_err == -ENXIO) 461 ret = i2c->cmd_err;
332 mxs_i2c_reset(i2c); 462 }
333 463
334 dev_dbg(i2c->dev, "Done with err=%d\n", i2c->cmd_err); 464 dev_dbg(i2c->dev, "Done with err=%d\n", ret);
335 465
336 return i2c->cmd_err; 466 return ret;
337 467
338timeout: 468timeout:
339 dev_dbg(i2c->dev, "Timeout!\n"); 469 dev_dbg(i2c->dev, "Timeout!\n");
@@ -403,6 +533,43 @@ static bool mxs_i2c_dma_filter(struct dma_chan *chan, void *param)
403 return true; 533 return true;
404} 534}
405 535
536static void mxs_i2c_derive_timing(struct mxs_i2c_dev *i2c, int speed)
537{
538 /* The I2C block clock run at 24MHz */
539 const uint32_t clk = 24000000;
540 uint32_t base;
541 uint16_t high_count, low_count, rcv_count, xmit_count;
542 struct device *dev = i2c->dev;
543
544 if (speed > 540000) {
545 dev_warn(dev, "Speed too high (%d Hz), using 540 kHz\n", speed);
546 speed = 540000;
547 } else if (speed < 12000) {
548 dev_warn(dev, "Speed too low (%d Hz), using 12 kHz\n", speed);
549 speed = 12000;
550 }
551
552 /*
553 * The timing derivation algorithm. There is no documentation for this
554 * algorithm available, it was derived by using the scope and fiddling
555 * with constants until the result observed on the scope was good enough
556 * for 20kHz, 50kHz, 100kHz, 200kHz, 300kHz and 400kHz. It should be
557 * possible to assume the algorithm works for other frequencies as well.
558 *
559 * Note it was necessary to cap the frequency on both ends as it's not
560 * possible to configure completely arbitrary frequency for the I2C bus
561 * clock.
562 */
563 base = ((clk / speed) - 38) / 2;
564 high_count = base + 3;
565 low_count = base - 3;
566 rcv_count = (high_count * 3) / 4;
567 xmit_count = low_count / 4;
568
569 i2c->timing0 = (high_count << 16) | rcv_count;
570 i2c->timing1 = (low_count << 16) | xmit_count;
571}
572
406static int mxs_i2c_get_ofdata(struct mxs_i2c_dev *i2c) 573static int mxs_i2c_get_ofdata(struct mxs_i2c_dev *i2c)
407{ 574{
408 uint32_t speed; 575 uint32_t speed;
@@ -422,12 +589,12 @@ static int mxs_i2c_get_ofdata(struct mxs_i2c_dev *i2c)
422 } 589 }
423 590
424 ret = of_property_read_u32(node, "clock-frequency", &speed); 591 ret = of_property_read_u32(node, "clock-frequency", &speed);
425 if (ret) 592 if (ret) {
426 dev_warn(dev, "No I2C speed selected, using 100kHz\n"); 593 dev_warn(dev, "No I2C speed selected, using 100kHz\n");
427 else if (speed == 400000) 594 speed = 100000;
428 i2c->speed = &mxs_i2c_400kHz_config; 595 }
429 else if (speed != 100000) 596
430 dev_warn(dev, "Unsupported I2C speed selected, using 100kHz\n"); 597 mxs_i2c_derive_timing(i2c, speed);
431 598
432 return 0; 599 return 0;
433} 600}
@@ -471,7 +638,6 @@ static int mxs_i2c_probe(struct platform_device *pdev)
471 return err; 638 return err;
472 639
473 i2c->dev = dev; 640 i2c->dev = dev;
474 i2c->speed = &mxs_i2c_95kHz_config;
475 641
476 init_completion(&i2c->cmd_complete); 642 init_completion(&i2c->cmd_complete);
477 643
@@ -531,8 +697,6 @@ static int mxs_i2c_remove(struct platform_device *pdev)
531 697
532 writel(MXS_I2C_CTRL0_SFTRST, i2c->regs + MXS_I2C_CTRL0_SET); 698 writel(MXS_I2C_CTRL0_SFTRST, i2c->regs + MXS_I2C_CTRL0_SET);
533 699
534 platform_set_drvdata(pdev, NULL);
535
536 return 0; 700 return 0;
537} 701}
538 702
diff --git a/drivers/i2c/busses/i2c-nforce2.c b/drivers/i2c/busses/i2c-nforce2.c
index adac8542771d..ac88f4000cc2 100644
--- a/drivers/i2c/busses/i2c-nforce2.c
+++ b/drivers/i2c/busses/i2c-nforce2.c
@@ -60,7 +60,7 @@
60#include <linux/io.h> 60#include <linux/io.h>
61 61
62MODULE_LICENSE("GPL"); 62MODULE_LICENSE("GPL");
63MODULE_AUTHOR ("Hans-Frieder Vogt <hfvogt@gmx.net>"); 63MODULE_AUTHOR("Hans-Frieder Vogt <hfvogt@gmx.net>");
64MODULE_DESCRIPTION("nForce2/3/4/5xx SMBus driver"); 64MODULE_DESCRIPTION("nForce2/3/4/5xx SMBus driver");
65 65
66 66
@@ -188,9 +188,9 @@ static int nforce2_check_status(struct i2c_adapter *adap)
188} 188}
189 189
190/* Return negative errno on error */ 190/* Return negative errno on error */
191static s32 nforce2_access(struct i2c_adapter * adap, u16 addr, 191static s32 nforce2_access(struct i2c_adapter *adap, u16 addr,
192 unsigned short flags, char read_write, 192 unsigned short flags, char read_write,
193 u8 command, int size, union i2c_smbus_data * data) 193 u8 command, int size, union i2c_smbus_data *data)
194{ 194{
195 struct nforce2_smbus *smbus = adap->algo_data; 195 struct nforce2_smbus *smbus = adap->algo_data;
196 unsigned char protocol, pec; 196 unsigned char protocol, pec;
@@ -202,56 +202,54 @@ static s32 nforce2_access(struct i2c_adapter * adap, u16 addr,
202 pec = (flags & I2C_CLIENT_PEC) ? NVIDIA_SMB_PRTCL_PEC : 0; 202 pec = (flags & I2C_CLIENT_PEC) ? NVIDIA_SMB_PRTCL_PEC : 0;
203 203
204 switch (size) { 204 switch (size) {
205 case I2C_SMBUS_QUICK:
206 protocol |= NVIDIA_SMB_PRTCL_QUICK;
207 read_write = I2C_SMBUS_WRITE;
208 break;
205 209
206 case I2C_SMBUS_QUICK: 210 case I2C_SMBUS_BYTE:
207 protocol |= NVIDIA_SMB_PRTCL_QUICK; 211 if (read_write == I2C_SMBUS_WRITE)
208 read_write = I2C_SMBUS_WRITE;
209 break;
210
211 case I2C_SMBUS_BYTE:
212 if (read_write == I2C_SMBUS_WRITE)
213 outb_p(command, NVIDIA_SMB_CMD);
214 protocol |= NVIDIA_SMB_PRTCL_BYTE;
215 break;
216
217 case I2C_SMBUS_BYTE_DATA:
218 outb_p(command, NVIDIA_SMB_CMD);
219 if (read_write == I2C_SMBUS_WRITE)
220 outb_p(data->byte, NVIDIA_SMB_DATA);
221 protocol |= NVIDIA_SMB_PRTCL_BYTE_DATA;
222 break;
223
224 case I2C_SMBUS_WORD_DATA:
225 outb_p(command, NVIDIA_SMB_CMD); 212 outb_p(command, NVIDIA_SMB_CMD);
226 if (read_write == I2C_SMBUS_WRITE) { 213 protocol |= NVIDIA_SMB_PRTCL_BYTE;
227 outb_p(data->word, NVIDIA_SMB_DATA); 214 break;
228 outb_p(data->word >> 8, NVIDIA_SMB_DATA+1); 215
229 } 216 case I2C_SMBUS_BYTE_DATA:
230 protocol |= NVIDIA_SMB_PRTCL_WORD_DATA | pec; 217 outb_p(command, NVIDIA_SMB_CMD);
231 break; 218 if (read_write == I2C_SMBUS_WRITE)
232 219 outb_p(data->byte, NVIDIA_SMB_DATA);
233 case I2C_SMBUS_BLOCK_DATA: 220 protocol |= NVIDIA_SMB_PRTCL_BYTE_DATA;
234 outb_p(command, NVIDIA_SMB_CMD); 221 break;
235 if (read_write == I2C_SMBUS_WRITE) { 222
236 len = data->block[0]; 223 case I2C_SMBUS_WORD_DATA:
237 if ((len == 0) || (len > I2C_SMBUS_BLOCK_MAX)) { 224 outb_p(command, NVIDIA_SMB_CMD);
238 dev_err(&adap->dev, 225 if (read_write == I2C_SMBUS_WRITE) {
239 "Transaction failed " 226 outb_p(data->word, NVIDIA_SMB_DATA);
240 "(requested block size: %d)\n", 227 outb_p(data->word >> 8, NVIDIA_SMB_DATA + 1);
241 len); 228 }
242 return -EINVAL; 229 protocol |= NVIDIA_SMB_PRTCL_WORD_DATA | pec;
243 } 230 break;
244 outb_p(len, NVIDIA_SMB_BCNT); 231
245 for (i = 0; i < I2C_SMBUS_BLOCK_MAX; i++) 232 case I2C_SMBUS_BLOCK_DATA:
246 outb_p(data->block[i + 1], 233 outb_p(command, NVIDIA_SMB_CMD);
247 NVIDIA_SMB_DATA+i); 234 if (read_write == I2C_SMBUS_WRITE) {
235 len = data->block[0];
236 if ((len == 0) || (len > I2C_SMBUS_BLOCK_MAX)) {
237 dev_err(&adap->dev,
238 "Transaction failed (requested block size: %d)\n",
239 len);
240 return -EINVAL;
248 } 241 }
249 protocol |= NVIDIA_SMB_PRTCL_BLOCK_DATA | pec; 242 outb_p(len, NVIDIA_SMB_BCNT);
250 break; 243 for (i = 0; i < I2C_SMBUS_BLOCK_MAX; i++)
244 outb_p(data->block[i + 1],
245 NVIDIA_SMB_DATA + i);
246 }
247 protocol |= NVIDIA_SMB_PRTCL_BLOCK_DATA | pec;
248 break;
251 249
252 default: 250 default:
253 dev_err(&adap->dev, "Unsupported transaction %d\n", size); 251 dev_err(&adap->dev, "Unsupported transaction %d\n", size);
254 return -EOPNOTSUPP; 252 return -EOPNOTSUPP;
255 } 253 }
256 254
257 outb_p((addr & 0x7f) << 1, NVIDIA_SMB_ADDR); 255 outb_p((addr & 0x7f) << 1, NVIDIA_SMB_ADDR);
@@ -265,28 +263,28 @@ static s32 nforce2_access(struct i2c_adapter * adap, u16 addr,
265 return 0; 263 return 0;
266 264
267 switch (size) { 265 switch (size) {
268 266 case I2C_SMBUS_BYTE:
269 case I2C_SMBUS_BYTE: 267 case I2C_SMBUS_BYTE_DATA:
270 case I2C_SMBUS_BYTE_DATA: 268 data->byte = inb_p(NVIDIA_SMB_DATA);
271 data->byte = inb_p(NVIDIA_SMB_DATA); 269 break;
272 break; 270
273 271 case I2C_SMBUS_WORD_DATA:
274 case I2C_SMBUS_WORD_DATA: 272 data->word = inb_p(NVIDIA_SMB_DATA) |
275 data->word = inb_p(NVIDIA_SMB_DATA) | (inb_p(NVIDIA_SMB_DATA+1) << 8); 273 (inb_p(NVIDIA_SMB_DATA + 1) << 8);
276 break; 274 break;
277 275
278 case I2C_SMBUS_BLOCK_DATA: 276 case I2C_SMBUS_BLOCK_DATA:
279 len = inb_p(NVIDIA_SMB_BCNT); 277 len = inb_p(NVIDIA_SMB_BCNT);
280 if ((len <= 0) || (len > I2C_SMBUS_BLOCK_MAX)) { 278 if ((len <= 0) || (len > I2C_SMBUS_BLOCK_MAX)) {
281 dev_err(&adap->dev, "Transaction failed " 279 dev_err(&adap->dev,
282 "(received block size: 0x%02x)\n", 280 "Transaction failed (received block size: 0x%02x)\n",
283 len); 281 len);
284 return -EPROTO; 282 return -EPROTO;
285 } 283 }
286 for (i = 0; i < len; i++) 284 for (i = 0; i < len; i++)
287 data->block[i+1] = inb_p(NVIDIA_SMB_DATA + i); 285 data->block[i + 1] = inb_p(NVIDIA_SMB_DATA + i);
288 data->block[0] = len; 286 data->block[0] = len;
289 break; 287 break;
290 } 288 }
291 289
292 return 0; 290 return 0;
@@ -299,7 +297,7 @@ static u32 nforce2_func(struct i2c_adapter *adapter)
299 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | 297 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
300 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA | 298 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
301 I2C_FUNC_SMBUS_PEC | 299 I2C_FUNC_SMBUS_PEC |
302 (((struct nforce2_smbus*)adapter->algo_data)->blockops ? 300 (((struct nforce2_smbus *)adapter->algo_data)->blockops ?
303 I2C_FUNC_SMBUS_BLOCK_DATA : 0); 301 I2C_FUNC_SMBUS_BLOCK_DATA : 0);
304} 302}
305 303
@@ -327,7 +325,7 @@ static DEFINE_PCI_DEVICE_TABLE(nforce2_ids) = {
327 { 0 } 325 { 0 }
328}; 326};
329 327
330MODULE_DEVICE_TABLE (pci, nforce2_ids); 328MODULE_DEVICE_TABLE(pci, nforce2_ids);
331 329
332 330
333static int nforce2_probe_smb(struct pci_dev *dev, int bar, int alt_reg, 331static int nforce2_probe_smb(struct pci_dev *dev, int bar, int alt_reg,
@@ -377,7 +375,8 @@ static int nforce2_probe_smb(struct pci_dev *dev, int bar, int alt_reg,
377 release_region(smbus->base, smbus->size); 375 release_region(smbus->base, smbus->size);
378 return error; 376 return error;
379 } 377 }
380 dev_info(&smbus->adapter.dev, "nForce2 SMBus adapter at %#x\n", smbus->base); 378 dev_info(&smbus->adapter.dev, "nForce2 SMBus adapter at %#x\n",
379 smbus->base);
381 return 0; 380 return 0;
382} 381}
383 382
@@ -388,11 +387,12 @@ static int nforce2_probe(struct pci_dev *dev, const struct pci_device_id *id)
388 int res1, res2; 387 int res1, res2;
389 388
390 /* we support 2 SMBus adapters */ 389 /* we support 2 SMBus adapters */
391 if (!(smbuses = kzalloc(2*sizeof(struct nforce2_smbus), GFP_KERNEL))) 390 smbuses = kzalloc(2 * sizeof(struct nforce2_smbus), GFP_KERNEL);
391 if (!smbuses)
392 return -ENOMEM; 392 return -ENOMEM;
393 pci_set_drvdata(dev, smbuses); 393 pci_set_drvdata(dev, smbuses);
394 394
395 switch(dev->device) { 395 switch (dev->device) {
396 case PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS: 396 case PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS:
397 case PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SMBUS: 397 case PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SMBUS:
398 case PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SMBUS: 398 case PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SMBUS:
diff --git a/drivers/i2c/busses/i2c-nomadik.c b/drivers/i2c/busses/i2c-nomadik.c
index 8b2ffcf45322..650293ff4d62 100644
--- a/drivers/i2c/busses/i2c-nomadik.c
+++ b/drivers/i2c/busses/i2c-nomadik.c
@@ -26,6 +26,7 @@
26#include <linux/platform_data/i2c-nomadik.h> 26#include <linux/platform_data/i2c-nomadik.h>
27#include <linux/of.h> 27#include <linux/of.h>
28#include <linux/of_i2c.h> 28#include <linux/of_i2c.h>
29#include <linux/pinctrl/consumer.h>
29 30
30#define DRIVER_NAME "nmk-i2c" 31#define DRIVER_NAME "nmk-i2c"
31 32
@@ -147,6 +148,10 @@ struct i2c_nmk_client {
147 * @stop: stop condition. 148 * @stop: stop condition.
148 * @xfer_complete: acknowledge completion for a I2C message. 149 * @xfer_complete: acknowledge completion for a I2C message.
149 * @result: controller propogated result. 150 * @result: controller propogated result.
151 * @pinctrl: pinctrl handle.
152 * @pins_default: default state for the pins.
153 * @pins_idle: idle state for the pins.
154 * @pins_sleep: sleep state for the pins.
150 * @busy: Busy doing transfer. 155 * @busy: Busy doing transfer.
151 */ 156 */
152struct nmk_i2c_dev { 157struct nmk_i2c_dev {
@@ -160,6 +165,11 @@ struct nmk_i2c_dev {
160 int stop; 165 int stop;
161 struct completion xfer_complete; 166 struct completion xfer_complete;
162 int result; 167 int result;
168 /* Three pin states - default, idle & sleep */
169 struct pinctrl *pinctrl;
170 struct pinctrl_state *pins_default;
171 struct pinctrl_state *pins_idle;
172 struct pinctrl_state *pins_sleep;
163 bool busy; 173 bool busy;
164}; 174};
165 175
@@ -402,8 +412,7 @@ static void setup_i2c_controller(struct nmk_i2c_dev *dev)
402static int read_i2c(struct nmk_i2c_dev *dev, u16 flags) 412static int read_i2c(struct nmk_i2c_dev *dev, u16 flags)
403{ 413{
404 u32 status = 0; 414 u32 status = 0;
405 u32 mcr; 415 u32 mcr, irq_mask;
406 u32 irq_mask = 0;
407 int timeout; 416 int timeout;
408 417
409 mcr = load_i2c_mcr_reg(dev, flags); 418 mcr = load_i2c_mcr_reg(dev, flags);
@@ -472,8 +481,7 @@ static void fill_tx_fifo(struct nmk_i2c_dev *dev, int no_bytes)
472static int write_i2c(struct nmk_i2c_dev *dev, u16 flags) 481static int write_i2c(struct nmk_i2c_dev *dev, u16 flags)
473{ 482{
474 u32 status = 0; 483 u32 status = 0;
475 u32 mcr; 484 u32 mcr, irq_mask;
476 u32 irq_mask = 0;
477 int timeout; 485 int timeout;
478 486
479 mcr = load_i2c_mcr_reg(dev, flags); 487 mcr = load_i2c_mcr_reg(dev, flags);
@@ -636,6 +644,15 @@ static int nmk_i2c_xfer(struct i2c_adapter *i2c_adap,
636 goto out_clk; 644 goto out_clk;
637 } 645 }
638 646
647 /* Optionaly enable pins to be muxed in and configured */
648 if (!IS_ERR(dev->pins_default)) {
649 status = pinctrl_select_state(dev->pinctrl,
650 dev->pins_default);
651 if (status)
652 dev_err(&dev->adev->dev,
653 "could not set default pins\n");
654 }
655
639 status = init_hw(dev); 656 status = init_hw(dev);
640 if (status) 657 if (status)
641 goto out; 658 goto out;
@@ -663,6 +680,15 @@ static int nmk_i2c_xfer(struct i2c_adapter *i2c_adap,
663out: 680out:
664 clk_disable_unprepare(dev->clk); 681 clk_disable_unprepare(dev->clk);
665out_clk: 682out_clk:
683 /* Optionally let pins go into idle state */
684 if (!IS_ERR(dev->pins_idle)) {
685 status = pinctrl_select_state(dev->pinctrl,
686 dev->pins_idle);
687 if (status)
688 dev_err(&dev->adev->dev,
689 "could not set pins to idle state\n");
690 }
691
666 pm_runtime_put_sync(&dev->adev->dev); 692 pm_runtime_put_sync(&dev->adev->dev);
667 693
668 dev->busy = false; 694 dev->busy = false;
@@ -703,8 +729,7 @@ static irqreturn_t i2c_irq_handler(int irq, void *arg)
703 struct nmk_i2c_dev *dev = arg; 729 struct nmk_i2c_dev *dev = arg;
704 u32 tft, rft; 730 u32 tft, rft;
705 u32 count; 731 u32 count;
706 u32 misr; 732 u32 misr, src;
707 u32 src = 0;
708 733
709 /* load Tx FIFO and Rx FIFO threshold values */ 734 /* load Tx FIFO and Rx FIFO threshold values */
710 tft = readl(dev->virtbase + I2C_TFTR); 735 tft = readl(dev->virtbase + I2C_TFTR);
@@ -857,15 +882,41 @@ static int nmk_i2c_suspend(struct device *dev)
857{ 882{
858 struct amba_device *adev = to_amba_device(dev); 883 struct amba_device *adev = to_amba_device(dev);
859 struct nmk_i2c_dev *nmk_i2c = amba_get_drvdata(adev); 884 struct nmk_i2c_dev *nmk_i2c = amba_get_drvdata(adev);
885 int ret;
860 886
861 if (nmk_i2c->busy) 887 if (nmk_i2c->busy)
862 return -EBUSY; 888 return -EBUSY;
863 889
890 if (!IS_ERR(nmk_i2c->pins_sleep)) {
891 ret = pinctrl_select_state(nmk_i2c->pinctrl,
892 nmk_i2c->pins_sleep);
893 if (ret)
894 dev_err(dev, "could not set pins to sleep state\n");
895 }
896
864 return 0; 897 return 0;
865} 898}
866 899
867static int nmk_i2c_resume(struct device *dev) 900static int nmk_i2c_resume(struct device *dev)
868{ 901{
902 struct amba_device *adev = to_amba_device(dev);
903 struct nmk_i2c_dev *nmk_i2c = amba_get_drvdata(adev);
904 int ret;
905
906 /* First go to the default state */
907 if (!IS_ERR(nmk_i2c->pins_default)) {
908 ret = pinctrl_select_state(nmk_i2c->pinctrl,
909 nmk_i2c->pins_default);
910 if (ret)
911 dev_err(dev, "could not set pins to default state\n");
912 }
913 /* Then let's idle the pins until the next transfer happens */
914 if (!IS_ERR(nmk_i2c->pins_idle)) {
915 ret = pinctrl_select_state(nmk_i2c->pinctrl,
916 nmk_i2c->pins_idle);
917 if (ret)
918 dev_err(dev, "could not set pins to idle state\n");
919 }
869 return 0; 920 return 0;
870} 921}
871#else 922#else
@@ -953,6 +1004,40 @@ static int nmk_i2c_probe(struct amba_device *adev, const struct amba_id *id)
953 dev->adev = adev; 1004 dev->adev = adev;
954 amba_set_drvdata(adev, dev); 1005 amba_set_drvdata(adev, dev);
955 1006
1007 dev->pinctrl = devm_pinctrl_get(&adev->dev);
1008 if (IS_ERR(dev->pinctrl)) {
1009 ret = PTR_ERR(dev->pinctrl);
1010 goto err_pinctrl;
1011 }
1012
1013 dev->pins_default = pinctrl_lookup_state(dev->pinctrl,
1014 PINCTRL_STATE_DEFAULT);
1015 if (IS_ERR(dev->pins_default)) {
1016 dev_err(&adev->dev, "could not get default pinstate\n");
1017 } else {
1018 ret = pinctrl_select_state(dev->pinctrl,
1019 dev->pins_default);
1020 if (ret)
1021 dev_dbg(&adev->dev, "could not set default pinstate\n");
1022 }
1023
1024 dev->pins_idle = pinctrl_lookup_state(dev->pinctrl,
1025 PINCTRL_STATE_IDLE);
1026 if (IS_ERR(dev->pins_idle)) {
1027 dev_dbg(&adev->dev, "could not get idle pinstate\n");
1028 } else {
1029 /* If possible, let's go to idle until the first transfer */
1030 ret = pinctrl_select_state(dev->pinctrl,
1031 dev->pins_idle);
1032 if (ret)
1033 dev_dbg(&adev->dev, "could not set idle pinstate\n");
1034 }
1035
1036 dev->pins_sleep = pinctrl_lookup_state(dev->pinctrl,
1037 PINCTRL_STATE_SLEEP);
1038 if (IS_ERR(dev->pins_sleep))
1039 dev_dbg(&adev->dev, "could not get sleep pinstate\n");
1040
956 dev->virtbase = ioremap(adev->res.start, resource_size(&adev->res)); 1041 dev->virtbase = ioremap(adev->res.start, resource_size(&adev->res));
957 if (!dev->virtbase) { 1042 if (!dev->virtbase) {
958 ret = -ENOMEM; 1043 ret = -ENOMEM;
@@ -1020,8 +1105,8 @@ static int nmk_i2c_probe(struct amba_device *adev, const struct amba_id *id)
1020 err_irq: 1105 err_irq:
1021 iounmap(dev->virtbase); 1106 iounmap(dev->virtbase);
1022 err_no_ioremap: 1107 err_no_ioremap:
1023 amba_set_drvdata(adev, NULL);
1024 kfree(dev); 1108 kfree(dev);
1109 err_pinctrl:
1025 err_no_mem: 1110 err_no_mem:
1026 1111
1027 return ret; 1112 return ret;
@@ -1044,7 +1129,6 @@ static int nmk_i2c_remove(struct amba_device *adev)
1044 release_mem_region(res->start, resource_size(res)); 1129 release_mem_region(res->start, resource_size(res));
1045 clk_put(dev->clk); 1130 clk_put(dev->clk);
1046 pm_runtime_disable(&adev->dev); 1131 pm_runtime_disable(&adev->dev);
1047 amba_set_drvdata(adev, NULL);
1048 kfree(dev); 1132 kfree(dev);
1049 1133
1050 return 0; 1134 return 0;
diff --git a/drivers/i2c/busses/i2c-ocores.c b/drivers/i2c/busses/i2c-ocores.c
index a337d08a392d..0e1f8245e768 100644
--- a/drivers/i2c/busses/i2c-ocores.c
+++ b/drivers/i2c/busses/i2c-ocores.c
@@ -332,7 +332,7 @@ static int ocores_i2c_of_probe(struct platform_device *pdev,
332 &i2c->reg_io_width); 332 &i2c->reg_io_width);
333 333
334 match = of_match_node(ocores_i2c_match, pdev->dev.of_node); 334 match = of_match_node(ocores_i2c_match, pdev->dev.of_node);
335 if (match && (int)match->data == TYPE_GRLIB) { 335 if (match && (long)match->data == TYPE_GRLIB) {
336 dev_dbg(&pdev->dev, "GRLIB variant of i2c-ocores\n"); 336 dev_dbg(&pdev->dev, "GRLIB variant of i2c-ocores\n");
337 i2c->setreg = oc_setreg_grlib; 337 i2c->setreg = oc_setreg_grlib;
338 i2c->getreg = oc_getreg_grlib; 338 i2c->getreg = oc_getreg_grlib;
@@ -452,7 +452,6 @@ static int ocores_i2c_remove(struct platform_device *pdev)
452 452
453 /* remove adapter & data */ 453 /* remove adapter & data */
454 i2c_del_adapter(&i2c->adap); 454 i2c_del_adapter(&i2c->adap);
455 platform_set_drvdata(pdev, NULL);
456 455
457 return 0; 456 return 0;
458} 457}
diff --git a/drivers/i2c/busses/i2c-octeon.c b/drivers/i2c/busses/i2c-octeon.c
index 484ca771fdff..935585ef4d39 100644
--- a/drivers/i2c/busses/i2c-octeon.c
+++ b/drivers/i2c/busses/i2c-octeon.c
@@ -595,7 +595,7 @@ static int octeon_i2c_probe(struct platform_device *pdev)
595 result = i2c_add_adapter(&i2c->adap); 595 result = i2c_add_adapter(&i2c->adap);
596 if (result < 0) { 596 if (result < 0) {
597 dev_err(i2c->dev, "failed to add adapter\n"); 597 dev_err(i2c->dev, "failed to add adapter\n");
598 goto fail_add; 598 goto out;
599 } 599 }
600 dev_info(i2c->dev, "version %s\n", DRV_VERSION); 600 dev_info(i2c->dev, "version %s\n", DRV_VERSION);
601 601
@@ -603,8 +603,6 @@ static int octeon_i2c_probe(struct platform_device *pdev)
603 603
604 return 0; 604 return 0;
605 605
606fail_add:
607 platform_set_drvdata(pdev, NULL);
608out: 606out:
609 return result; 607 return result;
610}; 608};
@@ -614,7 +612,6 @@ static int octeon_i2c_remove(struct platform_device *pdev)
614 struct octeon_i2c *i2c = platform_get_drvdata(pdev); 612 struct octeon_i2c *i2c = platform_get_drvdata(pdev);
615 613
616 i2c_del_adapter(&i2c->adap); 614 i2c_del_adapter(&i2c->adap);
617 platform_set_drvdata(pdev, NULL);
618 return 0; 615 return 0;
619}; 616};
620 617
diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index 3ee188679cf1..e02f9e36a7b2 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -1260,7 +1260,6 @@ err_unuse_clocks:
1260 pm_runtime_put(dev->dev); 1260 pm_runtime_put(dev->dev);
1261 pm_runtime_disable(&pdev->dev); 1261 pm_runtime_disable(&pdev->dev);
1262err_free_mem: 1262err_free_mem:
1263 platform_set_drvdata(pdev, NULL);
1264 1263
1265 return r; 1264 return r;
1266} 1265}
@@ -1270,8 +1269,6 @@ static int omap_i2c_remove(struct platform_device *pdev)
1270 struct omap_i2c_dev *dev = platform_get_drvdata(pdev); 1269 struct omap_i2c_dev *dev = platform_get_drvdata(pdev);
1271 int ret; 1270 int ret;
1272 1271
1273 platform_set_drvdata(pdev, NULL);
1274
1275 i2c_del_adapter(&dev->adapter); 1272 i2c_del_adapter(&dev->adapter);
1276 ret = pm_runtime_get_sync(&pdev->dev); 1273 ret = pm_runtime_get_sync(&pdev->dev);
1277 if (IS_ERR_VALUE(ret)) 1274 if (IS_ERR_VALUE(ret))
diff --git a/drivers/i2c/busses/i2c-pca-platform.c b/drivers/i2c/busses/i2c-pca-platform.c
index a30d2f613c03..aa00df14e30b 100644
--- a/drivers/i2c/busses/i2c-pca-platform.c
+++ b/drivers/i2c/busses/i2c-pca-platform.c
@@ -260,7 +260,6 @@ e_print:
260static int i2c_pca_pf_remove(struct platform_device *pdev) 260static int i2c_pca_pf_remove(struct platform_device *pdev)
261{ 261{
262 struct i2c_pca_pf_data *i2c = platform_get_drvdata(pdev); 262 struct i2c_pca_pf_data *i2c = platform_get_drvdata(pdev);
263 platform_set_drvdata(pdev, NULL);
264 263
265 i2c_del_adapter(&i2c->adap); 264 i2c_del_adapter(&i2c->adap);
266 265
diff --git a/drivers/i2c/busses/i2c-pmcmsp.c b/drivers/i2c/busses/i2c-pmcmsp.c
index 083d68cfaf0b..f6389e2c9d02 100644
--- a/drivers/i2c/busses/i2c-pmcmsp.c
+++ b/drivers/i2c/busses/i2c-pmcmsp.c
@@ -349,7 +349,6 @@ static int pmcmsptwi_probe(struct platform_device *pldev)
349 return 0; 349 return 0;
350 350
351ret_unmap: 351ret_unmap:
352 platform_set_drvdata(pldev, NULL);
353 if (pmcmsptwi_data.irq) { 352 if (pmcmsptwi_data.irq) {
354 pmcmsptwi_writel(0, 353 pmcmsptwi_writel(0,
355 pmcmsptwi_data.iobase + MSP_TWI_INT_MSK_REG_OFFSET); 354 pmcmsptwi_data.iobase + MSP_TWI_INT_MSK_REG_OFFSET);
@@ -374,7 +373,6 @@ static int pmcmsptwi_remove(struct platform_device *pldev)
374 373
375 i2c_del_adapter(&pmcmsptwi_adapter); 374 i2c_del_adapter(&pmcmsptwi_adapter);
376 375
377 platform_set_drvdata(pldev, NULL);
378 if (pmcmsptwi_data.irq) { 376 if (pmcmsptwi_data.irq) {
379 pmcmsptwi_writel(0, 377 pmcmsptwi_writel(0,
380 pmcmsptwi_data.iobase + MSP_TWI_INT_MSK_REG_OFFSET); 378 pmcmsptwi_data.iobase + MSP_TWI_INT_MSK_REG_OFFSET);
diff --git a/drivers/i2c/busses/i2c-pnx.c b/drivers/i2c/busses/i2c-pnx.c
index ce4097012e97..5f39c6d8117a 100644
--- a/drivers/i2c/busses/i2c-pnx.c
+++ b/drivers/i2c/busses/i2c-pnx.c
@@ -761,7 +761,6 @@ out_clkget:
761out_drvdata: 761out_drvdata:
762 kfree(alg_data); 762 kfree(alg_data);
763err_kzalloc: 763err_kzalloc:
764 platform_set_drvdata(pdev, NULL);
765 return ret; 764 return ret;
766} 765}
767 766
@@ -776,7 +775,6 @@ static int i2c_pnx_remove(struct platform_device *pdev)
776 release_mem_region(alg_data->base, I2C_PNX_REGION_SIZE); 775 release_mem_region(alg_data->base, I2C_PNX_REGION_SIZE);
777 clk_put(alg_data->clk); 776 clk_put(alg_data->clk);
778 kfree(alg_data); 777 kfree(alg_data);
779 platform_set_drvdata(pdev, NULL);
780 778
781 return 0; 779 return 0;
782} 780}
diff --git a/drivers/i2c/busses/i2c-powermac.c b/drivers/i2c/busses/i2c-powermac.c
index 0dd5b334d090..da54e673449d 100644
--- a/drivers/i2c/busses/i2c-powermac.c
+++ b/drivers/i2c/busses/i2c-powermac.c
@@ -221,7 +221,6 @@ static int i2c_powermac_remove(struct platform_device *dev)
221 printk(KERN_WARNING 221 printk(KERN_WARNING
222 "i2c-powermac.c: Failed to remove bus %s !\n", 222 "i2c-powermac.c: Failed to remove bus %s !\n",
223 adapter->name); 223 adapter->name);
224 platform_set_drvdata(dev, NULL);
225 memset(adapter, 0, sizeof(*adapter)); 224 memset(adapter, 0, sizeof(*adapter));
226 225
227 return 0; 226 return 0;
diff --git a/drivers/i2c/busses/i2c-puv3.c b/drivers/i2c/busses/i2c-puv3.c
index d7c512d717a7..261d7db437e2 100644
--- a/drivers/i2c/busses/i2c-puv3.c
+++ b/drivers/i2c/busses/i2c-puv3.c
@@ -223,7 +223,6 @@ static int puv3_i2c_probe(struct platform_device *pdev)
223 return 0; 223 return 0;
224 224
225fail_add_adapter: 225fail_add_adapter:
226 platform_set_drvdata(pdev, NULL);
227 kfree(adapter); 226 kfree(adapter);
228fail_nomem: 227fail_nomem:
229 release_mem_region(mem->start, resource_size(mem)); 228 release_mem_region(mem->start, resource_size(mem));
@@ -245,7 +244,6 @@ static int puv3_i2c_remove(struct platform_device *pdev)
245 } 244 }
246 245
247 put_device(&pdev->dev); 246 put_device(&pdev->dev);
248 platform_set_drvdata(pdev, NULL);
249 247
250 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 248 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
251 release_mem_region(mem->start, resource_size(mem)); 249 release_mem_region(mem->start, resource_size(mem));
diff --git a/drivers/i2c/busses/i2c-pxa-pci.c b/drivers/i2c/busses/i2c-pxa-pci.c
index 3d4985695aed..9639be86e53f 100644
--- a/drivers/i2c/busses/i2c-pxa-pci.c
+++ b/drivers/i2c/busses/i2c-pxa-pci.c
@@ -128,7 +128,6 @@ static int ce4100_i2c_probe(struct pci_dev *dev,
128 return 0; 128 return 0;
129 129
130err_dev_add: 130err_dev_add:
131 pci_set_drvdata(dev, NULL);
132 kfree(sds); 131 kfree(sds);
133err_mem: 132err_mem:
134 pci_disable_device(dev); 133 pci_disable_device(dev);
@@ -141,7 +140,6 @@ static void ce4100_i2c_remove(struct pci_dev *dev)
141 unsigned int i; 140 unsigned int i;
142 141
143 sds = pci_get_drvdata(dev); 142 sds = pci_get_drvdata(dev);
144 pci_set_drvdata(dev, NULL);
145 143
146 for (i = 0; i < ARRAY_SIZE(sds->pdev); i++) 144 for (i = 0; i < ARRAY_SIZE(sds->pdev); i++)
147 platform_device_unregister(sds->pdev[i]); 145 platform_device_unregister(sds->pdev[i]);
diff --git a/drivers/i2c/busses/i2c-pxa.c b/drivers/i2c/busses/i2c-pxa.c
index 1034d93fb838..1e88e8d66c55 100644
--- a/drivers/i2c/busses/i2c-pxa.c
+++ b/drivers/i2c/busses/i2c-pxa.c
@@ -1215,12 +1215,10 @@ emalloc:
1215 return ret; 1215 return ret;
1216} 1216}
1217 1217
1218static int __exit i2c_pxa_remove(struct platform_device *dev) 1218static int i2c_pxa_remove(struct platform_device *dev)
1219{ 1219{
1220 struct pxa_i2c *i2c = platform_get_drvdata(dev); 1220 struct pxa_i2c *i2c = platform_get_drvdata(dev);
1221 1221
1222 platform_set_drvdata(dev, NULL);
1223
1224 i2c_del_adapter(&i2c->adap); 1222 i2c_del_adapter(&i2c->adap);
1225 if (!i2c->use_pio) 1223 if (!i2c->use_pio)
1226 free_irq(i2c->irq, i2c); 1224 free_irq(i2c->irq, i2c);
@@ -1269,7 +1267,7 @@ static const struct dev_pm_ops i2c_pxa_dev_pm_ops = {
1269 1267
1270static struct platform_driver i2c_pxa_driver = { 1268static struct platform_driver i2c_pxa_driver = {
1271 .probe = i2c_pxa_probe, 1269 .probe = i2c_pxa_probe,
1272 .remove = __exit_p(i2c_pxa_remove), 1270 .remove = i2c_pxa_remove,
1273 .driver = { 1271 .driver = {
1274 .name = "pxa2xx-i2c", 1272 .name = "pxa2xx-i2c",
1275 .owner = THIS_MODULE, 1273 .owner = THIS_MODULE,
diff --git a/drivers/i2c/busses/i2c-s3c2410.c b/drivers/i2c/busses/i2c-s3c2410.c
index c807a6d14f0c..f6b880ba1932 100644
--- a/drivers/i2c/busses/i2c-s3c2410.c
+++ b/drivers/i2c/busses/i2c-s3c2410.c
@@ -111,6 +111,8 @@ static const struct of_device_id s3c24xx_i2c_match[] = {
111 { .compatible = "samsung,s3c2440-i2c", .data = (void *)QUIRK_S3C2440 }, 111 { .compatible = "samsung,s3c2440-i2c", .data = (void *)QUIRK_S3C2440 },
112 { .compatible = "samsung,s3c2440-hdmiphy-i2c", 112 { .compatible = "samsung,s3c2440-hdmiphy-i2c",
113 .data = (void *)(QUIRK_S3C2440 | QUIRK_HDMIPHY | QUIRK_NO_GPIO) }, 113 .data = (void *)(QUIRK_S3C2440 | QUIRK_HDMIPHY | QUIRK_NO_GPIO) },
114 { .compatible = "samsung,exynos5440-i2c",
115 .data = (void *)(QUIRK_S3C2440 | QUIRK_NO_GPIO) },
114 {}, 116 {},
115}; 117};
116MODULE_DEVICE_TABLE(of, s3c24xx_i2c_match); 118MODULE_DEVICE_TABLE(of, s3c24xx_i2c_match);
@@ -1000,8 +1002,8 @@ static int s3c24xx_i2c_probe(struct platform_device *pdev)
1000 1002
1001 i2c->pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); 1003 i2c->pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
1002 if (!i2c->pdata) { 1004 if (!i2c->pdata) {
1003 ret = -ENOMEM; 1005 dev_err(&pdev->dev, "no memory for platform data\n");
1004 goto err_noclk; 1006 return -ENOMEM;
1005 } 1007 }
1006 1008
1007 i2c->quirks = s3c24xx_get_device_quirks(pdev); 1009 i2c->quirks = s3c24xx_get_device_quirks(pdev);
@@ -1022,32 +1024,27 @@ static int s3c24xx_i2c_probe(struct platform_device *pdev)
1022 /* find the clock and enable it */ 1024 /* find the clock and enable it */
1023 1025
1024 i2c->dev = &pdev->dev; 1026 i2c->dev = &pdev->dev;
1025 i2c->clk = clk_get(&pdev->dev, "i2c"); 1027 i2c->clk = devm_clk_get(&pdev->dev, "i2c");
1026 if (IS_ERR(i2c->clk)) { 1028 if (IS_ERR(i2c->clk)) {
1027 dev_err(&pdev->dev, "cannot get clock\n"); 1029 dev_err(&pdev->dev, "cannot get clock\n");
1028 ret = -ENOENT; 1030 return -ENOENT;
1029 goto err_noclk;
1030 } 1031 }
1031 1032
1032 dev_dbg(&pdev->dev, "clock source %p\n", i2c->clk); 1033 dev_dbg(&pdev->dev, "clock source %p\n", i2c->clk);
1033 1034
1034 clk_prepare_enable(i2c->clk);
1035 1035
1036 /* map the registers */ 1036 /* map the registers */
1037 1037
1038 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1038 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1039 if (res == NULL) { 1039 if (res == NULL) {
1040 dev_err(&pdev->dev, "cannot find IO resource\n"); 1040 dev_err(&pdev->dev, "cannot find IO resource\n");
1041 ret = -ENOENT; 1041 return -ENOENT;
1042 goto err_clk;
1043 } 1042 }
1044 1043
1045 i2c->regs = devm_ioremap_resource(&pdev->dev, res); 1044 i2c->regs = devm_ioremap_resource(&pdev->dev, res);
1046 1045
1047 if (IS_ERR(i2c->regs)) { 1046 if (IS_ERR(i2c->regs))
1048 ret = PTR_ERR(i2c->regs); 1047 return PTR_ERR(i2c->regs);
1049 goto err_clk;
1050 }
1051 1048
1052 dev_dbg(&pdev->dev, "registers %p (%p)\n", 1049 dev_dbg(&pdev->dev, "registers %p (%p)\n",
1053 i2c->regs, res); 1050 i2c->regs, res);
@@ -1064,16 +1061,18 @@ static int s3c24xx_i2c_probe(struct platform_device *pdev)
1064 if (i2c->pdata->cfg_gpio) { 1061 if (i2c->pdata->cfg_gpio) {
1065 i2c->pdata->cfg_gpio(to_platform_device(i2c->dev)); 1062 i2c->pdata->cfg_gpio(to_platform_device(i2c->dev));
1066 } else if (IS_ERR(i2c->pctrl) && s3c24xx_i2c_parse_dt_gpio(i2c)) { 1063 } else if (IS_ERR(i2c->pctrl) && s3c24xx_i2c_parse_dt_gpio(i2c)) {
1067 ret = -EINVAL; 1064 return -EINVAL;
1068 goto err_clk;
1069 } 1065 }
1070 1066
1071 /* initialise the i2c controller */ 1067 /* initialise the i2c controller */
1072 1068
1069 clk_prepare_enable(i2c->clk);
1073 ret = s3c24xx_i2c_init(i2c); 1070 ret = s3c24xx_i2c_init(i2c);
1074 if (ret != 0) 1071 clk_disable_unprepare(i2c->clk);
1075 goto err_clk; 1072 if (ret != 0) {
1076 1073 dev_err(&pdev->dev, "I2C controller init failed\n");
1074 return ret;
1075 }
1077 /* find the IRQ for this unit (note, this relies on the init call to 1076 /* find the IRQ for this unit (note, this relies on the init call to
1078 * ensure no current IRQs pending 1077 * ensure no current IRQs pending
1079 */ 1078 */
@@ -1081,21 +1080,21 @@ static int s3c24xx_i2c_probe(struct platform_device *pdev)
1081 i2c->irq = ret = platform_get_irq(pdev, 0); 1080 i2c->irq = ret = platform_get_irq(pdev, 0);
1082 if (ret <= 0) { 1081 if (ret <= 0) {
1083 dev_err(&pdev->dev, "cannot find IRQ\n"); 1082 dev_err(&pdev->dev, "cannot find IRQ\n");
1084 goto err_clk; 1083 return ret;
1085 } 1084 }
1086 1085
1087 ret = request_irq(i2c->irq, s3c24xx_i2c_irq, 0, 1086 ret = devm_request_irq(&pdev->dev, i2c->irq, s3c24xx_i2c_irq, 0,
1088 dev_name(&pdev->dev), i2c); 1087 dev_name(&pdev->dev), i2c);
1089 1088
1090 if (ret != 0) { 1089 if (ret != 0) {
1091 dev_err(&pdev->dev, "cannot claim IRQ %d\n", i2c->irq); 1090 dev_err(&pdev->dev, "cannot claim IRQ %d\n", i2c->irq);
1092 goto err_clk; 1091 return ret;
1093 } 1092 }
1094 1093
1095 ret = s3c24xx_i2c_register_cpufreq(i2c); 1094 ret = s3c24xx_i2c_register_cpufreq(i2c);
1096 if (ret < 0) { 1095 if (ret < 0) {
1097 dev_err(&pdev->dev, "failed to register cpufreq notifier\n"); 1096 dev_err(&pdev->dev, "failed to register cpufreq notifier\n");
1098 goto err_irq; 1097 return ret;
1099 } 1098 }
1100 1099
1101 /* Note, previous versions of the driver used i2c_add_adapter() 1100 /* Note, previous versions of the driver used i2c_add_adapter()
@@ -1110,7 +1109,8 @@ static int s3c24xx_i2c_probe(struct platform_device *pdev)
1110 ret = i2c_add_numbered_adapter(&i2c->adap); 1109 ret = i2c_add_numbered_adapter(&i2c->adap);
1111 if (ret < 0) { 1110 if (ret < 0) {
1112 dev_err(&pdev->dev, "failed to add bus to i2c core\n"); 1111 dev_err(&pdev->dev, "failed to add bus to i2c core\n");
1113 goto err_cpufreq; 1112 s3c24xx_i2c_deregister_cpufreq(i2c);
1113 return ret;
1114 } 1114 }
1115 1115
1116 of_i2c_register_devices(&i2c->adap); 1116 of_i2c_register_devices(&i2c->adap);
@@ -1120,21 +1120,7 @@ static int s3c24xx_i2c_probe(struct platform_device *pdev)
1120 pm_runtime_enable(&i2c->adap.dev); 1120 pm_runtime_enable(&i2c->adap.dev);
1121 1121
1122 dev_info(&pdev->dev, "%s: S3C I2C adapter\n", dev_name(&i2c->adap.dev)); 1122 dev_info(&pdev->dev, "%s: S3C I2C adapter\n", dev_name(&i2c->adap.dev));
1123 clk_disable_unprepare(i2c->clk);
1124 return 0; 1123 return 0;
1125
1126 err_cpufreq:
1127 s3c24xx_i2c_deregister_cpufreq(i2c);
1128
1129 err_irq:
1130 free_irq(i2c->irq, i2c);
1131
1132 err_clk:
1133 clk_disable_unprepare(i2c->clk);
1134 clk_put(i2c->clk);
1135
1136 err_noclk:
1137 return ret;
1138} 1124}
1139 1125
1140/* s3c24xx_i2c_remove 1126/* s3c24xx_i2c_remove
@@ -1152,10 +1138,8 @@ static int s3c24xx_i2c_remove(struct platform_device *pdev)
1152 s3c24xx_i2c_deregister_cpufreq(i2c); 1138 s3c24xx_i2c_deregister_cpufreq(i2c);
1153 1139
1154 i2c_del_adapter(&i2c->adap); 1140 i2c_del_adapter(&i2c->adap);
1155 free_irq(i2c->irq, i2c);
1156 1141
1157 clk_disable_unprepare(i2c->clk); 1142 clk_disable_unprepare(i2c->clk);
1158 clk_put(i2c->clk);
1159 1143
1160 if (pdev->dev.of_node && IS_ERR(i2c->pctrl)) 1144 if (pdev->dev.of_node && IS_ERR(i2c->pctrl))
1161 s3c24xx_i2c_dt_gpio_free(i2c); 1145 s3c24xx_i2c_dt_gpio_free(i2c);
diff --git a/drivers/i2c/busses/i2c-s6000.c b/drivers/i2c/busses/i2c-s6000.c
index 008836409efe..7c1ca5aca088 100644
--- a/drivers/i2c/busses/i2c-s6000.c
+++ b/drivers/i2c/busses/i2c-s6000.c
@@ -365,7 +365,6 @@ static int s6i2c_remove(struct platform_device *pdev)
365{ 365{
366 struct s6i2c_if *iface = platform_get_drvdata(pdev); 366 struct s6i2c_if *iface = platform_get_drvdata(pdev);
367 i2c_wr16(iface, S6_I2C_ENABLE, 0); 367 i2c_wr16(iface, S6_I2C_ENABLE, 0);
368 platform_set_drvdata(pdev, NULL);
369 i2c_del_adapter(&iface->adap); 368 i2c_del_adapter(&iface->adap);
370 free_irq(iface->irq, iface); 369 free_irq(iface->irq, iface);
371 clk_disable(iface->clk); 370 clk_disable(iface->clk);
diff --git a/drivers/i2c/busses/i2c-sh7760.c b/drivers/i2c/busses/i2c-sh7760.c
index 3a2253e1bf59..5351a2f34912 100644
--- a/drivers/i2c/busses/i2c-sh7760.c
+++ b/drivers/i2c/busses/i2c-sh7760.c
@@ -546,7 +546,6 @@ static int sh7760_i2c_remove(struct platform_device *pdev)
546 release_resource(id->ioarea); 546 release_resource(id->ioarea);
547 kfree(id->ioarea); 547 kfree(id->ioarea);
548 kfree(id); 548 kfree(id);
549 platform_set_drvdata(pdev, NULL);
550 549
551 return 0; 550 return 0;
552} 551}
diff --git a/drivers/i2c/busses/i2c-sh_mobile.c b/drivers/i2c/busses/i2c-sh_mobile.c
index b6e7a83a8296..debf745c0268 100644
--- a/drivers/i2c/busses/i2c-sh_mobile.c
+++ b/drivers/i2c/busses/i2c-sh_mobile.c
@@ -38,21 +38,21 @@
38/* Transmit operation: */ 38/* Transmit operation: */
39/* */ 39/* */
40/* 0 byte transmit */ 40/* 0 byte transmit */
41/* BUS: S A8 ACK P */ 41/* BUS: S A8 ACK P(*) */
42/* IRQ: DTE WAIT */ 42/* IRQ: DTE WAIT */
43/* ICIC: */ 43/* ICIC: */
44/* ICCR: 0x94 0x90 */ 44/* ICCR: 0x94 0x90 */
45/* ICDR: A8 */ 45/* ICDR: A8 */
46/* */ 46/* */
47/* 1 byte transmit */ 47/* 1 byte transmit */
48/* BUS: S A8 ACK D8(1) ACK P */ 48/* BUS: S A8 ACK D8(1) ACK P(*) */
49/* IRQ: DTE WAIT WAIT */ 49/* IRQ: DTE WAIT WAIT */
50/* ICIC: -DTE */ 50/* ICIC: -DTE */
51/* ICCR: 0x94 0x90 */ 51/* ICCR: 0x94 0x90 */
52/* ICDR: A8 D8(1) */ 52/* ICDR: A8 D8(1) */
53/* */ 53/* */
54/* 2 byte transmit */ 54/* 2 byte transmit */
55/* BUS: S A8 ACK D8(1) ACK D8(2) ACK P */ 55/* BUS: S A8 ACK D8(1) ACK D8(2) ACK P(*) */
56/* IRQ: DTE WAIT WAIT WAIT */ 56/* IRQ: DTE WAIT WAIT WAIT */
57/* ICIC: -DTE */ 57/* ICIC: -DTE */
58/* ICCR: 0x94 0x90 */ 58/* ICCR: 0x94 0x90 */
@@ -66,20 +66,20 @@
66/* 0 byte receive - not supported since slave may hold SDA low */ 66/* 0 byte receive - not supported since slave may hold SDA low */
67/* */ 67/* */
68/* 1 byte receive [TX] | [RX] */ 68/* 1 byte receive [TX] | [RX] */
69/* BUS: S A8 ACK | D8(1) ACK P */ 69/* BUS: S A8 ACK | D8(1) ACK P(*) */
70/* IRQ: DTE WAIT | WAIT DTE */ 70/* IRQ: DTE WAIT | WAIT DTE */
71/* ICIC: -DTE | +DTE */ 71/* ICIC: -DTE | +DTE */
72/* ICCR: 0x94 0x81 | 0xc0 */ 72/* ICCR: 0x94 0x81 | 0xc0 */
73/* ICDR: A8 | D8(1) */ 73/* ICDR: A8 | D8(1) */
74/* */ 74/* */
75/* 2 byte receive [TX]| [RX] */ 75/* 2 byte receive [TX]| [RX] */
76/* BUS: S A8 ACK | D8(1) ACK D8(2) ACK P */ 76/* BUS: S A8 ACK | D8(1) ACK D8(2) ACK P(*) */
77/* IRQ: DTE WAIT | WAIT WAIT DTE */ 77/* IRQ: DTE WAIT | WAIT WAIT DTE */
78/* ICIC: -DTE | +DTE */ 78/* ICIC: -DTE | +DTE */
79/* ICCR: 0x94 0x81 | 0xc0 */ 79/* ICCR: 0x94 0x81 | 0xc0 */
80/* ICDR: A8 | D8(1) D8(2) */ 80/* ICDR: A8 | D8(1) D8(2) */
81/* */ 81/* */
82/* 3 byte receive [TX] | [RX] */ 82/* 3 byte receive [TX] | [RX] (*) */
83/* BUS: S A8 ACK | D8(1) ACK D8(2) ACK D8(3) ACK P */ 83/* BUS: S A8 ACK | D8(1) ACK D8(2) ACK D8(3) ACK P */
84/* IRQ: DTE WAIT | WAIT WAIT WAIT DTE */ 84/* IRQ: DTE WAIT | WAIT WAIT WAIT DTE */
85/* ICIC: -DTE | +DTE */ 85/* ICIC: -DTE | +DTE */
@@ -94,7 +94,7 @@
94/* SDA ___\___XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXAAAAAAAAA___/ */ 94/* SDA ___\___XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXAAAAAAAAA___/ */
95/* SCL \_/1\_/2\_/3\_/4\_/5\_/6\_/7\_/8\___/9\_____/ */ 95/* SCL \_/1\_/2\_/3\_/4\_/5\_/6\_/7\_/8\___/9\_____/ */
96/* */ 96/* */
97/* S D7 D6 D5 D4 D3 D2 D1 D0 P */ 97/* S D7 D6 D5 D4 D3 D2 D1 D0 P(*) */
98/* ___ */ 98/* ___ */
99/* WAIT IRQ ________________________________/ \___________ */ 99/* WAIT IRQ ________________________________/ \___________ */
100/* TACK IRQ ____________________________________/ \_______ */ 100/* TACK IRQ ____________________________________/ \_______ */
@@ -103,6 +103,11 @@
103/* _______________________________________________ */ 103/* _______________________________________________ */
104/* BUSY __/ \_ */ 104/* BUSY __/ \_ */
105/* */ 105/* */
106/* (*) The STOP condition is only sent by the master at the end of the last */
107/* I2C message or if the I2C_M_STOP flag is set. Similarly, the BUSY bit is */
108/* only cleared after the STOP condition, so, between messages we have to */
109/* poll for the DTE bit. */
110/* */
106 111
107enum sh_mobile_i2c_op { 112enum sh_mobile_i2c_op {
108 OP_START = 0, 113 OP_START = 0,
@@ -132,6 +137,7 @@ struct sh_mobile_i2c_data {
132 struct i2c_msg *msg; 137 struct i2c_msg *msg;
133 int pos; 138 int pos;
134 int sr; 139 int sr;
140 bool send_stop;
135}; 141};
136 142
137#define IIC_FLAG_HAS_ICIC67 (1 << 0) 143#define IIC_FLAG_HAS_ICIC67 (1 << 0)
@@ -322,7 +328,7 @@ static unsigned char i2c_op(struct sh_mobile_i2c_data *pd,
322 break; 328 break;
323 case OP_TX_STOP: /* write data and issue a stop afterwards */ 329 case OP_TX_STOP: /* write data and issue a stop afterwards */
324 iic_wr(pd, ICDR, data); 330 iic_wr(pd, ICDR, data);
325 iic_wr(pd, ICCR, 0x90); 331 iic_wr(pd, ICCR, pd->send_stop ? 0x90 : 0x94);
326 break; 332 break;
327 case OP_TX_TO_RX: /* select read mode */ 333 case OP_TX_TO_RX: /* select read mode */
328 iic_wr(pd, ICCR, 0x81); 334 iic_wr(pd, ICCR, 0x81);
@@ -349,20 +355,14 @@ static unsigned char i2c_op(struct sh_mobile_i2c_data *pd,
349 return ret; 355 return ret;
350} 356}
351 357
352static int sh_mobile_i2c_is_first_byte(struct sh_mobile_i2c_data *pd) 358static bool sh_mobile_i2c_is_first_byte(struct sh_mobile_i2c_data *pd)
353{ 359{
354 if (pd->pos == -1) 360 return pd->pos == -1;
355 return 1;
356
357 return 0;
358} 361}
359 362
360static int sh_mobile_i2c_is_last_byte(struct sh_mobile_i2c_data *pd) 363static bool sh_mobile_i2c_is_last_byte(struct sh_mobile_i2c_data *pd)
361{ 364{
362 if (pd->pos == (pd->msg->len - 1)) 365 return pd->pos == pd->msg->len - 1;
363 return 1;
364
365 return 0;
366} 366}
367 367
368static void sh_mobile_i2c_get_data(struct sh_mobile_i2c_data *pd, 368static void sh_mobile_i2c_get_data(struct sh_mobile_i2c_data *pd,
@@ -475,22 +475,25 @@ static irqreturn_t sh_mobile_i2c_isr(int irq, void *dev_id)
475 return IRQ_HANDLED; 475 return IRQ_HANDLED;
476} 476}
477 477
478static int start_ch(struct sh_mobile_i2c_data *pd, struct i2c_msg *usr_msg) 478static int start_ch(struct sh_mobile_i2c_data *pd, struct i2c_msg *usr_msg,
479 bool do_init)
479{ 480{
480 if (usr_msg->len == 0 && (usr_msg->flags & I2C_M_RD)) { 481 if (usr_msg->len == 0 && (usr_msg->flags & I2C_M_RD)) {
481 dev_err(pd->dev, "Unsupported zero length i2c read\n"); 482 dev_err(pd->dev, "Unsupported zero length i2c read\n");
482 return -EIO; 483 return -EIO;
483 } 484 }
484 485
485 /* Initialize channel registers */ 486 if (do_init) {
486 iic_set_clr(pd, ICCR, 0, ICCR_ICE); 487 /* Initialize channel registers */
488 iic_set_clr(pd, ICCR, 0, ICCR_ICE);
487 489
488 /* Enable channel and configure rx ack */ 490 /* Enable channel and configure rx ack */
489 iic_set_clr(pd, ICCR, ICCR_ICE, 0); 491 iic_set_clr(pd, ICCR, ICCR_ICE, 0);
490 492
491 /* Set the clock */ 493 /* Set the clock */
492 iic_wr(pd, ICCL, pd->iccl & 0xff); 494 iic_wr(pd, ICCL, pd->iccl & 0xff);
493 iic_wr(pd, ICCH, pd->icch & 0xff); 495 iic_wr(pd, ICCH, pd->icch & 0xff);
496 }
494 497
495 pd->msg = usr_msg; 498 pd->msg = usr_msg;
496 pd->pos = -1; 499 pd->pos = -1;
@@ -501,6 +504,61 @@ static int start_ch(struct sh_mobile_i2c_data *pd, struct i2c_msg *usr_msg)
501 return 0; 504 return 0;
502} 505}
503 506
507static int poll_dte(struct sh_mobile_i2c_data *pd)
508{
509 int i;
510
511 for (i = 1000; i; i--) {
512 u_int8_t val = iic_rd(pd, ICSR);
513
514 if (val & ICSR_DTE)
515 break;
516
517 if (val & ICSR_TACK)
518 return -EIO;
519
520 udelay(10);
521 }
522
523 if (!i) {
524 dev_warn(pd->dev, "Timeout polling for DTE!\n");
525 return -ETIMEDOUT;
526 }
527
528 return 0;
529}
530
531static int poll_busy(struct sh_mobile_i2c_data *pd)
532{
533 int i;
534
535 for (i = 1000; i; i--) {
536 u_int8_t val = iic_rd(pd, ICSR);
537
538 dev_dbg(pd->dev, "val 0x%02x pd->sr 0x%02x\n", val, pd->sr);
539
540 /* the interrupt handler may wake us up before the
541 * transfer is finished, so poll the hardware
542 * until we're done.
543 */
544 if (!(val & ICSR_BUSY)) {
545 /* handle missing acknowledge and arbitration lost */
546 if ((val | pd->sr) & (ICSR_TACK | ICSR_AL))
547 return -EIO;
548 break;
549 }
550
551 udelay(10);
552 }
553
554 if (!i) {
555 dev_err(pd->dev, "Polling timed out\n");
556 return -ETIMEDOUT;
557 }
558
559 return 0;
560}
561
504static int sh_mobile_i2c_xfer(struct i2c_adapter *adapter, 562static int sh_mobile_i2c_xfer(struct i2c_adapter *adapter,
505 struct i2c_msg *msgs, 563 struct i2c_msg *msgs,
506 int num) 564 int num)
@@ -508,53 +566,39 @@ static int sh_mobile_i2c_xfer(struct i2c_adapter *adapter,
508 struct sh_mobile_i2c_data *pd = i2c_get_adapdata(adapter); 566 struct sh_mobile_i2c_data *pd = i2c_get_adapdata(adapter);
509 struct i2c_msg *msg; 567 struct i2c_msg *msg;
510 int err = 0; 568 int err = 0;
511 u_int8_t val; 569 int i, k;
512 int i, k, retry_count;
513 570
514 activate_ch(pd); 571 activate_ch(pd);
515 572
516 /* Process all messages */ 573 /* Process all messages */
517 for (i = 0; i < num; i++) { 574 for (i = 0; i < num; i++) {
575 bool do_start = pd->send_stop || !i;
518 msg = &msgs[i]; 576 msg = &msgs[i];
577 pd->send_stop = i == num - 1 || msg->flags & I2C_M_STOP;
519 578
520 err = start_ch(pd, msg); 579 err = start_ch(pd, msg, do_start);
521 if (err) 580 if (err)
522 break; 581 break;
523 582
524 i2c_op(pd, OP_START, 0); 583 if (do_start)
584 i2c_op(pd, OP_START, 0);
525 585
526 /* The interrupt handler takes care of the rest... */ 586 /* The interrupt handler takes care of the rest... */
527 k = wait_event_timeout(pd->wait, 587 k = wait_event_timeout(pd->wait,
528 pd->sr & (ICSR_TACK | SW_DONE), 588 pd->sr & (ICSR_TACK | SW_DONE),
529 5 * HZ); 589 5 * HZ);
530 if (!k) 590 if (!k) {
531 dev_err(pd->dev, "Transfer request timed out\n"); 591 dev_err(pd->dev, "Transfer request timed out\n");
532 592 err = -ETIMEDOUT;
533 retry_count = 1000;
534again:
535 val = iic_rd(pd, ICSR);
536
537 dev_dbg(pd->dev, "val 0x%02x pd->sr 0x%02x\n", val, pd->sr);
538
539 /* the interrupt handler may wake us up before the
540 * transfer is finished, so poll the hardware
541 * until we're done.
542 */
543 if (val & ICSR_BUSY) {
544 udelay(10);
545 if (retry_count--)
546 goto again;
547
548 err = -EIO;
549 dev_err(pd->dev, "Polling timed out\n");
550 break; 593 break;
551 } 594 }
552 595
553 /* handle missing acknowledge and arbitration lost */ 596 if (pd->send_stop)
554 if ((val | pd->sr) & (ICSR_TACK | ICSR_AL)) { 597 err = poll_busy(pd);
555 err = -EIO; 598 else
599 err = poll_dte(pd);
600 if (err < 0)
556 break; 601 break;
557 }
558 } 602 }
559 603
560 deactivate_ch(pd); 604 deactivate_ch(pd);
@@ -566,7 +610,7 @@ again:
566 610
567static u32 sh_mobile_i2c_func(struct i2c_adapter *adapter) 611static u32 sh_mobile_i2c_func(struct i2c_adapter *adapter)
568{ 612{
569 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; 613 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | I2C_FUNC_PROTOCOL_MANGLING;
570} 614}
571 615
572static struct i2c_algorithm sh_mobile_i2c_algorithm = { 616static struct i2c_algorithm sh_mobile_i2c_algorithm = {
diff --git a/drivers/i2c/busses/i2c-sis630.c b/drivers/i2c/busses/i2c-sis630.c
index de6dddb9f865..36a9556d7cfa 100644
--- a/drivers/i2c/busses/i2c-sis630.c
+++ b/drivers/i2c/busses/i2c-sis630.c
@@ -17,30 +17,25 @@
17*/ 17*/
18 18
19/* 19/*
20 Changes:
21 24.08.2002
22 Fixed the typo in sis630_access (Thanks to Mark M. Hoffman)
23 Changed sis630_transaction.(Thanks to Mark M. Hoffman)
24 18.09.2002
25 Added SIS730 as supported.
26 21.09.2002
27 Added high_clock module option.If this option is set
28 used Host Master Clock 56KHz (default 14KHz).For now we save old Host
29 Master Clock and after transaction completed restore (otherwise
30 it's confuse BIOS and hung Machine).
31 24.09.2002
32 Fixed typo in sis630_access
33 Fixed logical error by restoring of Host Master Clock
34 31.07.2003
35 Added block data read/write support.
36*/
37
38/*
39 Status: beta 20 Status: beta
40 21
41 Supports: 22 Supports:
42 SIS 630 23 SIS 630
43 SIS 730 24 SIS 730
25 SIS 964
26
27 Notable differences between chips:
28 +------------------------+--------------------+-------------------+
29 | | SIS630/730 | SIS964 |
30 +------------------------+--------------------+-------------------+
31 | Clock | 14kHz/56kHz | 55.56kHz/27.78kHz |
32 | SMBus registers offset | 0x80 | 0xE0 |
33 | SMB_CNT | Bit 1 = Slave Busy | Bit 1 = Bus probe |
34 | (not used yet) | Bit 3 is reserved | Bit 3 = Last byte |
35 | SMB_PCOUNT | Offset + 0x06 | Offset + 0x14 |
36 | SMB_COUNT | 4:0 bits | 5:0 bits |
37 +------------------------+--------------------+-------------------+
38 (Other differences don't affect the functions provided by the driver)
44 39
45 Note: we assume there can only be one device, with one SMBus interface. 40 Note: we assume there can only be one device, with one SMBus interface.
46*/ 41*/
@@ -55,22 +50,36 @@
55#include <linux/acpi.h> 50#include <linux/acpi.h>
56#include <linux/io.h> 51#include <linux/io.h>
57 52
58/* SIS630 SMBus registers */ 53/* SIS964 id is defined here as we are the only file using it */
59#define SMB_STS 0x80 /* status */ 54#define PCI_DEVICE_ID_SI_964 0x0964
60#define SMB_EN 0x81 /* status enable */ 55
61#define SMB_CNT 0x82 56/* SIS630/730/964 SMBus registers */
62#define SMBHOST_CNT 0x83 57#define SMB_STS 0x00 /* status */
63#define SMB_ADDR 0x84 58#define SMB_CNT 0x02 /* control */
64#define SMB_CMD 0x85 59#define SMBHOST_CNT 0x03 /* host control */
65#define SMB_PCOUNT 0x86 /* processed count */ 60#define SMB_ADDR 0x04 /* address */
66#define SMB_COUNT 0x87 61#define SMB_CMD 0x05 /* command */
67#define SMB_BYTE 0x88 /* ~0x8F data byte field */ 62#define SMB_COUNT 0x07 /* byte count */
68#define SMBDEV_ADDR 0x90 63#define SMB_BYTE 0x08 /* ~0x8F data byte field */
69#define SMB_DB0 0x91 64
70#define SMB_DB1 0x92 65/* SMB_STS register */
71#define SMB_SAA 0x93 66#define BYTE_DONE_STS 0x10 /* Byte Done Status / Block Array */
72 67#define SMBCOL_STS 0x04 /* Collision */
73/* register count for request_region */ 68#define SMBERR_STS 0x02 /* Device error */
69
70/* SMB_CNT register */
71#define MSTO_EN 0x40 /* Host Master Timeout Enable */
72#define SMBCLK_SEL 0x20 /* Host master clock selection */
73#define SMB_PROBE 0x02 /* Bus Probe/Slave busy */
74#define SMB_HOSTBUSY 0x01 /* Host Busy */
75
76/* SMBHOST_CNT register */
77#define SMB_KILL 0x20 /* Kill */
78#define SMB_START 0x10 /* Start */
79
80/* register count for request_region
81 * As we don't use SMB_PCOUNT, 20 is ok for SiS630 and SiS964
82 */
74#define SIS630_SMB_IOREGION 20 83#define SIS630_SMB_IOREGION 20
75 84
76/* PCI address constants */ 85/* PCI address constants */
@@ -96,65 +105,71 @@ static struct pci_driver sis630_driver;
96static bool high_clock; 105static bool high_clock;
97static bool force; 106static bool force;
98module_param(high_clock, bool, 0); 107module_param(high_clock, bool, 0);
99MODULE_PARM_DESC(high_clock, "Set Host Master Clock to 56KHz (default 14KHz)."); 108MODULE_PARM_DESC(high_clock,
109 "Set Host Master Clock to 56KHz (default 14KHz) (SIS630/730 only).");
100module_param(force, bool, 0); 110module_param(force, bool, 0);
101MODULE_PARM_DESC(force, "Forcibly enable the SIS630. DANGEROUS!"); 111MODULE_PARM_DESC(force, "Forcibly enable the SIS630. DANGEROUS!");
102 112
103/* acpi base address */ 113/* SMBus base adress */
104static unsigned short acpi_base; 114static unsigned short smbus_base;
105 115
106/* supported chips */ 116/* supported chips */
107static int supported[] = { 117static int supported[] = {
108 PCI_DEVICE_ID_SI_630, 118 PCI_DEVICE_ID_SI_630,
109 PCI_DEVICE_ID_SI_730, 119 PCI_DEVICE_ID_SI_730,
120 PCI_DEVICE_ID_SI_760,
110 0 /* terminates the list */ 121 0 /* terminates the list */
111}; 122};
112 123
113static inline u8 sis630_read(u8 reg) 124static inline u8 sis630_read(u8 reg)
114{ 125{
115 return inb(acpi_base + reg); 126 return inb(smbus_base + reg);
116} 127}
117 128
118static inline void sis630_write(u8 reg, u8 data) 129static inline void sis630_write(u8 reg, u8 data)
119{ 130{
120 outb(data, acpi_base + reg); 131 outb(data, smbus_base + reg);
121} 132}
122 133
123static int sis630_transaction_start(struct i2c_adapter *adap, int size, u8 *oldclock) 134static int sis630_transaction_start(struct i2c_adapter *adap, int size,
135 u8 *oldclock)
124{ 136{
125 int temp; 137 int temp;
126 138
127 /* Make sure the SMBus host is ready to start transmitting. */ 139 /* Make sure the SMBus host is ready to start transmitting. */
128 if ((temp = sis630_read(SMB_CNT) & 0x03) != 0x00) { 140 temp = sis630_read(SMB_CNT);
129 dev_dbg(&adap->dev, "SMBus busy (%02x).Resetting...\n",temp); 141 if ((temp & (SMB_PROBE | SMB_HOSTBUSY)) != 0x00) {
142 dev_dbg(&adap->dev, "SMBus busy (%02x). Resetting...\n", temp);
130 /* kill smbus transaction */ 143 /* kill smbus transaction */
131 sis630_write(SMBHOST_CNT, 0x20); 144 sis630_write(SMBHOST_CNT, SMB_KILL);
132 145
133 if ((temp = sis630_read(SMB_CNT) & 0x03) != 0x00) { 146 temp = sis630_read(SMB_CNT);
147 if (temp & (SMB_PROBE | SMB_HOSTBUSY)) {
134 dev_dbg(&adap->dev, "Failed! (%02x)\n", temp); 148 dev_dbg(&adap->dev, "Failed! (%02x)\n", temp);
135 return -EBUSY; 149 return -EBUSY;
136 } else { 150 } else {
137 dev_dbg(&adap->dev, "Successful!\n"); 151 dev_dbg(&adap->dev, "Successful!\n");
138 } 152 }
139 } 153 }
140 154
141 /* save old clock, so we can prevent machine for hung */ 155 /* save old clock, so we can prevent machine for hung */
142 *oldclock = sis630_read(SMB_CNT); 156 *oldclock = sis630_read(SMB_CNT);
143 157
144 dev_dbg(&adap->dev, "saved clock 0x%02x\n", *oldclock); 158 dev_dbg(&adap->dev, "saved clock 0x%02x\n", *oldclock);
145 159
146 /* disable timeout interrupt , set Host Master Clock to 56KHz if requested */ 160 /* disable timeout interrupt,
161 * set Host Master Clock to 56KHz if requested */
147 if (high_clock) 162 if (high_clock)
148 sis630_write(SMB_CNT, 0x20); 163 sis630_write(SMB_CNT, SMBCLK_SEL);
149 else 164 else
150 sis630_write(SMB_CNT, (*oldclock & ~0x40)); 165 sis630_write(SMB_CNT, (*oldclock & ~MSTO_EN));
151 166
152 /* clear all sticky bits */ 167 /* clear all sticky bits */
153 temp = sis630_read(SMB_STS); 168 temp = sis630_read(SMB_STS);
154 sis630_write(SMB_STS, temp & 0x1e); 169 sis630_write(SMB_STS, temp & 0x1e);
155 170
156 /* start the transaction by setting bit 4 and size */ 171 /* start the transaction by setting bit 4 and size */
157 sis630_write(SMBHOST_CNT,0x10 | (size & 0x07)); 172 sis630_write(SMBHOST_CNT, SMB_START | (size & 0x07));
158 173
159 return 0; 174 return 0;
160} 175}
@@ -168,7 +183,7 @@ static int sis630_transaction_wait(struct i2c_adapter *adap, int size)
168 msleep(1); 183 msleep(1);
169 temp = sis630_read(SMB_STS); 184 temp = sis630_read(SMB_STS);
170 /* check if block transmitted */ 185 /* check if block transmitted */
171 if (size == SIS630_BLOCK_DATA && (temp & 0x10)) 186 if (size == SIS630_BLOCK_DATA && (temp & BYTE_DONE_STS))
172 break; 187 break;
173 } while (!(temp & 0x0e) && (timeout++ < MAX_TIMEOUT)); 188 } while (!(temp & 0x0e) && (timeout++ < MAX_TIMEOUT));
174 189
@@ -178,19 +193,14 @@ static int sis630_transaction_wait(struct i2c_adapter *adap, int size)
178 result = -ETIMEDOUT; 193 result = -ETIMEDOUT;
179 } 194 }
180 195
181 if (temp & 0x02) { 196 if (temp & SMBERR_STS) {
182 dev_dbg(&adap->dev, "Error: Failed bus transaction\n"); 197 dev_dbg(&adap->dev, "Error: Failed bus transaction\n");
183 result = -ENXIO; 198 result = -ENXIO;
184 } 199 }
185 200
186 if (temp & 0x04) { 201 if (temp & SMBCOL_STS) {
187 dev_err(&adap->dev, "Bus collision!\n"); 202 dev_err(&adap->dev, "Bus collision!\n");
188 result = -EIO; 203 result = -EAGAIN;
189 /*
190 TBD: Datasheet say:
191 the software should clear this bit and restart SMBUS operation.
192 Should we do it or user start request again?
193 */
194 } 204 }
195 205
196 return result; 206 return result;
@@ -198,21 +208,21 @@ static int sis630_transaction_wait(struct i2c_adapter *adap, int size)
198 208
199static void sis630_transaction_end(struct i2c_adapter *adap, u8 oldclock) 209static void sis630_transaction_end(struct i2c_adapter *adap, u8 oldclock)
200{ 210{
201 int temp = 0;
202
203 /* clear all status "sticky" bits */ 211 /* clear all status "sticky" bits */
204 sis630_write(SMB_STS, temp); 212 sis630_write(SMB_STS, 0xFF);
205 213
206 dev_dbg(&adap->dev, "SMB_CNT before clock restore 0x%02x\n", sis630_read(SMB_CNT)); 214 dev_dbg(&adap->dev,
215 "SMB_CNT before clock restore 0x%02x\n", sis630_read(SMB_CNT));
207 216
208 /* 217 /*
209 * restore old Host Master Clock if high_clock is set 218 * restore old Host Master Clock if high_clock is set
210 * and oldclock was not 56KHz 219 * and oldclock was not 56KHz
211 */ 220 */
212 if (high_clock && !(oldclock & 0x20)) 221 if (high_clock && !(oldclock & SMBCLK_SEL))
213 sis630_write(SMB_CNT,(sis630_read(SMB_CNT) & ~0x20)); 222 sis630_write(SMB_CNT, sis630_read(SMB_CNT) & ~SMBCLK_SEL);
214 223
215 dev_dbg(&adap->dev, "SMB_CNT after clock restore 0x%02x\n", sis630_read(SMB_CNT)); 224 dev_dbg(&adap->dev,
225 "SMB_CNT after clock restore 0x%02x\n", sis630_read(SMB_CNT));
216} 226}
217 227
218static int sis630_transaction(struct i2c_adapter *adap, int size) 228static int sis630_transaction(struct i2c_adapter *adap, int size)
@@ -229,7 +239,8 @@ static int sis630_transaction(struct i2c_adapter *adap, int size)
229 return result; 239 return result;
230} 240}
231 241
232static int sis630_block_data(struct i2c_adapter *adap, union i2c_smbus_data *data, int read_write) 242static int sis630_block_data(struct i2c_adapter *adap,
243 union i2c_smbus_data *data, int read_write)
233{ 244{
234 int i, len = 0, rc = 0; 245 int i, len = 0, rc = 0;
235 u8 oldclock = 0; 246 u8 oldclock = 0;
@@ -241,39 +252,43 @@ static int sis630_block_data(struct i2c_adapter *adap, union i2c_smbus_data *dat
241 else if (len > 32) 252 else if (len > 32)
242 len = 32; 253 len = 32;
243 sis630_write(SMB_COUNT, len); 254 sis630_write(SMB_COUNT, len);
244 for (i=1; i <= len; i++) { 255 for (i = 1; i <= len; i++) {
245 dev_dbg(&adap->dev, "set data 0x%02x\n", data->block[i]); 256 dev_dbg(&adap->dev,
257 "set data 0x%02x\n", data->block[i]);
246 /* set data */ 258 /* set data */
247 sis630_write(SMB_BYTE+(i-1)%8, data->block[i]); 259 sis630_write(SMB_BYTE + (i - 1) % 8, data->block[i]);
248 if (i==8 || (len<8 && i==len)) { 260 if (i == 8 || (len < 8 && i == len)) {
249 dev_dbg(&adap->dev, "start trans len=%d i=%d\n",len ,i); 261 dev_dbg(&adap->dev,
262 "start trans len=%d i=%d\n", len, i);
250 /* first transaction */ 263 /* first transaction */
251 rc = sis630_transaction_start(adap, 264 rc = sis630_transaction_start(adap,
252 SIS630_BLOCK_DATA, &oldclock); 265 SIS630_BLOCK_DATA, &oldclock);
253 if (rc) 266 if (rc)
254 return rc; 267 return rc;
255 } 268 } else if ((i - 1) % 8 == 7 || i == len) {
256 else if ((i-1)%8 == 7 || i==len) { 269 dev_dbg(&adap->dev,
257 dev_dbg(&adap->dev, "trans_wait len=%d i=%d\n",len,i); 270 "trans_wait len=%d i=%d\n", len, i);
258 if (i>8) { 271 if (i > 8) {
259 dev_dbg(&adap->dev, "clear smbary_sts len=%d i=%d\n",len,i); 272 dev_dbg(&adap->dev,
273 "clear smbary_sts"
274 " len=%d i=%d\n", len, i);
260 /* 275 /*
261 If this is not first transaction, 276 If this is not first transaction,
262 we must clear sticky bit. 277 we must clear sticky bit.
263 clear SMBARY_STS 278 clear SMBARY_STS
264 */ 279 */
265 sis630_write(SMB_STS,0x10); 280 sis630_write(SMB_STS, BYTE_DONE_STS);
266 } 281 }
267 rc = sis630_transaction_wait(adap, 282 rc = sis630_transaction_wait(adap,
268 SIS630_BLOCK_DATA); 283 SIS630_BLOCK_DATA);
269 if (rc) { 284 if (rc) {
270 dev_dbg(&adap->dev, "trans_wait failed\n"); 285 dev_dbg(&adap->dev,
286 "trans_wait failed\n");
271 break; 287 break;
272 } 288 }
273 } 289 }
274 } 290 }
275 } 291 } else {
276 else {
277 /* read request */ 292 /* read request */
278 data->block[0] = len = 0; 293 data->block[0] = len = 0;
279 rc = sis630_transaction_start(adap, 294 rc = sis630_transaction_start(adap,
@@ -294,18 +309,22 @@ static int sis630_block_data(struct i2c_adapter *adap, union i2c_smbus_data *dat
294 if (data->block[0] > 32) 309 if (data->block[0] > 32)
295 data->block[0] = 32; 310 data->block[0] = 32;
296 311
297 dev_dbg(&adap->dev, "block data read len=0x%x\n", data->block[0]); 312 dev_dbg(&adap->dev,
313 "block data read len=0x%x\n", data->block[0]);
298 314
299 for (i=0; i < 8 && len < data->block[0]; i++,len++) { 315 for (i = 0; i < 8 && len < data->block[0]; i++, len++) {
300 dev_dbg(&adap->dev, "read i=%d len=%d\n", i, len); 316 dev_dbg(&adap->dev,
301 data->block[len+1] = sis630_read(SMB_BYTE+i); 317 "read i=%d len=%d\n", i, len);
318 data->block[len + 1] = sis630_read(SMB_BYTE +
319 i);
302 } 320 }
303 321
304 dev_dbg(&adap->dev, "clear smbary_sts len=%d i=%d\n",len,i); 322 dev_dbg(&adap->dev,
323 "clear smbary_sts len=%d i=%d\n", len, i);
305 324
306 /* clear SMBARY_STS */ 325 /* clear SMBARY_STS */
307 sis630_write(SMB_STS,0x10); 326 sis630_write(SMB_STS, BYTE_DONE_STS);
308 } while(len < data->block[0]); 327 } while (len < data->block[0]);
309 } 328 }
310 329
311 sis630_transaction_end(adap, oldclock); 330 sis630_transaction_end(adap, oldclock);
@@ -321,42 +340,47 @@ static s32 sis630_access(struct i2c_adapter *adap, u16 addr,
321 int status; 340 int status;
322 341
323 switch (size) { 342 switch (size) {
324 case I2C_SMBUS_QUICK: 343 case I2C_SMBUS_QUICK:
325 sis630_write(SMB_ADDR, ((addr & 0x7f) << 1) | (read_write & 0x01)); 344 sis630_write(SMB_ADDR,
326 size = SIS630_QUICK; 345 ((addr & 0x7f) << 1) | (read_write & 0x01));
327 break; 346 size = SIS630_QUICK;
328 case I2C_SMBUS_BYTE: 347 break;
329 sis630_write(SMB_ADDR, ((addr & 0x7f) << 1) | (read_write & 0x01)); 348 case I2C_SMBUS_BYTE:
330 if (read_write == I2C_SMBUS_WRITE) 349 sis630_write(SMB_ADDR,
331 sis630_write(SMB_CMD, command); 350 ((addr & 0x7f) << 1) | (read_write & 0x01));
332 size = SIS630_BYTE; 351 if (read_write == I2C_SMBUS_WRITE)
333 break;
334 case I2C_SMBUS_BYTE_DATA:
335 sis630_write(SMB_ADDR, ((addr & 0x7f) << 1) | (read_write & 0x01));
336 sis630_write(SMB_CMD, command);
337 if (read_write == I2C_SMBUS_WRITE)
338 sis630_write(SMB_BYTE, data->byte);
339 size = SIS630_BYTE_DATA;
340 break;
341 case I2C_SMBUS_PROC_CALL:
342 case I2C_SMBUS_WORD_DATA:
343 sis630_write(SMB_ADDR,((addr & 0x7f) << 1) | (read_write & 0x01));
344 sis630_write(SMB_CMD, command); 352 sis630_write(SMB_CMD, command);
345 if (read_write == I2C_SMBUS_WRITE) { 353 size = SIS630_BYTE;
346 sis630_write(SMB_BYTE, data->word & 0xff); 354 break;
347 sis630_write(SMB_BYTE + 1,(data->word & 0xff00) >> 8); 355 case I2C_SMBUS_BYTE_DATA:
348 } 356 sis630_write(SMB_ADDR,
349 size = (size == I2C_SMBUS_PROC_CALL ? SIS630_PCALL : SIS630_WORD_DATA); 357 ((addr & 0x7f) << 1) | (read_write & 0x01));
350 break; 358 sis630_write(SMB_CMD, command);
351 case I2C_SMBUS_BLOCK_DATA: 359 if (read_write == I2C_SMBUS_WRITE)
352 sis630_write(SMB_ADDR,((addr & 0x7f) << 1) | (read_write & 0x01)); 360 sis630_write(SMB_BYTE, data->byte);
353 sis630_write(SMB_CMD, command); 361 size = SIS630_BYTE_DATA;
354 size = SIS630_BLOCK_DATA; 362 break;
355 return sis630_block_data(adap, data, read_write); 363 case I2C_SMBUS_PROC_CALL:
356 default: 364 case I2C_SMBUS_WORD_DATA:
357 dev_warn(&adap->dev, "Unsupported transaction %d\n", 365 sis630_write(SMB_ADDR,
358 size); 366 ((addr & 0x7f) << 1) | (read_write & 0x01));
359 return -EOPNOTSUPP; 367 sis630_write(SMB_CMD, command);
368 if (read_write == I2C_SMBUS_WRITE) {
369 sis630_write(SMB_BYTE, data->word & 0xff);
370 sis630_write(SMB_BYTE + 1, (data->word & 0xff00) >> 8);
371 }
372 size = (size == I2C_SMBUS_PROC_CALL ?
373 SIS630_PCALL : SIS630_WORD_DATA);
374 break;
375 case I2C_SMBUS_BLOCK_DATA:
376 sis630_write(SMB_ADDR,
377 ((addr & 0x7f) << 1) | (read_write & 0x01));
378 sis630_write(SMB_CMD, command);
379 size = SIS630_BLOCK_DATA;
380 return sis630_block_data(adap, data, read_write);
381 default:
382 dev_warn(&adap->dev, "Unsupported transaction %d\n", size);
383 return -EOPNOTSUPP;
360 } 384 }
361 385
362 status = sis630_transaction(adap, size); 386 status = sis630_transaction(adap, size);
@@ -368,15 +392,16 @@ static s32 sis630_access(struct i2c_adapter *adap, u16 addr,
368 return 0; 392 return 0;
369 } 393 }
370 394
371 switch(size) { 395 switch (size) {
372 case SIS630_BYTE: 396 case SIS630_BYTE:
373 case SIS630_BYTE_DATA: 397 case SIS630_BYTE_DATA:
374 data->byte = sis630_read(SMB_BYTE); 398 data->byte = sis630_read(SMB_BYTE);
375 break; 399 break;
376 case SIS630_PCALL: 400 case SIS630_PCALL:
377 case SIS630_WORD_DATA: 401 case SIS630_WORD_DATA:
378 data->word = sis630_read(SMB_BYTE) + (sis630_read(SMB_BYTE + 1) << 8); 402 data->word = sis630_read(SMB_BYTE) +
379 break; 403 (sis630_read(SMB_BYTE + 1) << 8);
404 break;
380 } 405 }
381 406
382 return 0; 407 return 0;
@@ -384,9 +409,9 @@ static s32 sis630_access(struct i2c_adapter *adap, u16 addr,
384 409
385static u32 sis630_func(struct i2c_adapter *adapter) 410static u32 sis630_func(struct i2c_adapter *adapter)
386{ 411{
387 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | I2C_FUNC_SMBUS_BYTE_DATA | 412 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
388 I2C_FUNC_SMBUS_WORD_DATA | I2C_FUNC_SMBUS_PROC_CALL | 413 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
389 I2C_FUNC_SMBUS_BLOCK_DATA; 414 I2C_FUNC_SMBUS_PROC_CALL | I2C_FUNC_SMBUS_BLOCK_DATA;
390} 415}
391 416
392static int sis630_setup(struct pci_dev *sis630_dev) 417static int sis630_setup(struct pci_dev *sis630_dev)
@@ -394,21 +419,23 @@ static int sis630_setup(struct pci_dev *sis630_dev)
394 unsigned char b; 419 unsigned char b;
395 struct pci_dev *dummy = NULL; 420 struct pci_dev *dummy = NULL;
396 int retval, i; 421 int retval, i;
422 /* acpi base address */
423 unsigned short acpi_base;
397 424
398 /* check for supported SiS devices */ 425 /* check for supported SiS devices */
399 for (i=0; supported[i] > 0 ; i++) { 426 for (i = 0; supported[i] > 0; i++) {
400 if ((dummy = pci_get_device(PCI_VENDOR_ID_SI, supported[i], dummy))) 427 dummy = pci_get_device(PCI_VENDOR_ID_SI, supported[i], dummy);
428 if (dummy)
401 break; /* found */ 429 break; /* found */
402 } 430 }
403 431
404 if (dummy) { 432 if (dummy) {
405 pci_dev_put(dummy); 433 pci_dev_put(dummy);
406 } 434 } else if (force) {
407 else if (force) { 435 dev_err(&sis630_dev->dev,
408 dev_err(&sis630_dev->dev, "WARNING: Can't detect SIS630 compatible device, but " 436 "WARNING: Can't detect SIS630 compatible device, but "
409 "loading because of force option enabled\n"); 437 "loading because of force option enabled\n");
410 } 438 } else {
411 else {
412 return -ENODEV; 439 return -ENODEV;
413 } 440 }
414 441
@@ -416,7 +443,7 @@ static int sis630_setup(struct pci_dev *sis630_dev)
416 Enable ACPI first , so we can accsess reg 74-75 443 Enable ACPI first , so we can accsess reg 74-75
417 in acpi io space and read acpi base addr 444 in acpi io space and read acpi base addr
418 */ 445 */
419 if (pci_read_config_byte(sis630_dev, SIS630_BIOS_CTL_REG,&b)) { 446 if (pci_read_config_byte(sis630_dev, SIS630_BIOS_CTL_REG, &b)) {
420 dev_err(&sis630_dev->dev, "Error: Can't read bios ctl reg\n"); 447 dev_err(&sis630_dev->dev, "Error: Can't read bios ctl reg\n");
421 retval = -ENODEV; 448 retval = -ENODEV;
422 goto exit; 449 goto exit;
@@ -430,24 +457,35 @@ static int sis630_setup(struct pci_dev *sis630_dev)
430 } 457 }
431 458
432 /* Determine the ACPI base address */ 459 /* Determine the ACPI base address */
433 if (pci_read_config_word(sis630_dev,SIS630_ACPI_BASE_REG,&acpi_base)) { 460 if (pci_read_config_word(sis630_dev,
434 dev_err(&sis630_dev->dev, "Error: Can't determine ACPI base address\n"); 461 SIS630_ACPI_BASE_REG, &acpi_base)) {
462 dev_err(&sis630_dev->dev,
463 "Error: Can't determine ACPI base address\n");
435 retval = -ENODEV; 464 retval = -ENODEV;
436 goto exit; 465 goto exit;
437 } 466 }
438 467
439 dev_dbg(&sis630_dev->dev, "ACPI base at 0x%04x\n", acpi_base); 468 dev_dbg(&sis630_dev->dev, "ACPI base at 0x%04hx\n", acpi_base);
469
470 if (supported[i] == PCI_DEVICE_ID_SI_760)
471 smbus_base = acpi_base + 0xE0;
472 else
473 smbus_base = acpi_base + 0x80;
474
475 dev_dbg(&sis630_dev->dev, "SMBus base at 0x%04hx\n", smbus_base);
440 476
441 retval = acpi_check_region(acpi_base + SMB_STS, SIS630_SMB_IOREGION, 477 retval = acpi_check_region(smbus_base + SMB_STS, SIS630_SMB_IOREGION,
442 sis630_driver.name); 478 sis630_driver.name);
443 if (retval) 479 if (retval)
444 goto exit; 480 goto exit;
445 481
446 /* Everything is happy, let's grab the memory and set things up. */ 482 /* Everything is happy, let's grab the memory and set things up. */
447 if (!request_region(acpi_base + SMB_STS, SIS630_SMB_IOREGION, 483 if (!request_region(smbus_base + SMB_STS, SIS630_SMB_IOREGION,
448 sis630_driver.name)) { 484 sis630_driver.name)) {
449 dev_err(&sis630_dev->dev, "SMBus registers 0x%04x-0x%04x already " 485 dev_err(&sis630_dev->dev,
450 "in use!\n", acpi_base + SMB_STS, acpi_base + SMB_SAA); 486 "I/O Region 0x%04hx-0x%04hx for SMBus already in use.\n",
487 smbus_base + SMB_STS,
488 smbus_base + SMB_STS + SIS630_SMB_IOREGION - 1);
451 retval = -EBUSY; 489 retval = -EBUSY;
452 goto exit; 490 goto exit;
453 } 491 }
@@ -456,7 +494,7 @@ static int sis630_setup(struct pci_dev *sis630_dev)
456 494
457exit: 495exit:
458 if (retval) 496 if (retval)
459 acpi_base = 0; 497 smbus_base = 0;
460 return retval; 498 return retval;
461} 499}
462 500
@@ -470,20 +508,24 @@ static struct i2c_adapter sis630_adapter = {
470 .owner = THIS_MODULE, 508 .owner = THIS_MODULE,
471 .class = I2C_CLASS_HWMON | I2C_CLASS_SPD, 509 .class = I2C_CLASS_HWMON | I2C_CLASS_SPD,
472 .algo = &smbus_algorithm, 510 .algo = &smbus_algorithm,
511 .retries = 3
473}; 512};
474 513
475static DEFINE_PCI_DEVICE_TABLE(sis630_ids) = { 514static DEFINE_PCI_DEVICE_TABLE(sis630_ids) = {
476 { PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_503) }, 515 { PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_503) },
477 { PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_LPC) }, 516 { PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_LPC) },
517 { PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_964) },
478 { 0, } 518 { 0, }
479}; 519};
480 520
481MODULE_DEVICE_TABLE (pci, sis630_ids); 521MODULE_DEVICE_TABLE(pci, sis630_ids);
482 522
483static int sis630_probe(struct pci_dev *dev, const struct pci_device_id *id) 523static int sis630_probe(struct pci_dev *dev, const struct pci_device_id *id)
484{ 524{
485 if (sis630_setup(dev)) { 525 if (sis630_setup(dev)) {
486 dev_err(&dev->dev, "SIS630 comp. bus not detected, module not inserted.\n"); 526 dev_err(&dev->dev,
527 "SIS630 compatible bus not detected, "
528 "module not inserted.\n");
487 return -ENODEV; 529 return -ENODEV;
488 } 530 }
489 531
@@ -491,17 +533,17 @@ static int sis630_probe(struct pci_dev *dev, const struct pci_device_id *id)
491 sis630_adapter.dev.parent = &dev->dev; 533 sis630_adapter.dev.parent = &dev->dev;
492 534
493 snprintf(sis630_adapter.name, sizeof(sis630_adapter.name), 535 snprintf(sis630_adapter.name, sizeof(sis630_adapter.name),
494 "SMBus SIS630 adapter at %04x", acpi_base + SMB_STS); 536 "SMBus SIS630 adapter at %04hx", smbus_base + SMB_STS);
495 537
496 return i2c_add_adapter(&sis630_adapter); 538 return i2c_add_adapter(&sis630_adapter);
497} 539}
498 540
499static void sis630_remove(struct pci_dev *dev) 541static void sis630_remove(struct pci_dev *dev)
500{ 542{
501 if (acpi_base) { 543 if (smbus_base) {
502 i2c_del_adapter(&sis630_adapter); 544 i2c_del_adapter(&sis630_adapter);
503 release_region(acpi_base + SMB_STS, SIS630_SMB_IOREGION); 545 release_region(smbus_base + SMB_STS, SIS630_SMB_IOREGION);
504 acpi_base = 0; 546 smbus_base = 0;
505 } 547 }
506} 548}
507 549
diff --git a/drivers/i2c/busses/i2c-stu300.c b/drivers/i2c/busses/i2c-stu300.c
index 60195b590637..0a6f941133f6 100644
--- a/drivers/i2c/busses/i2c-stu300.c
+++ b/drivers/i2c/busses/i2c-stu300.c
@@ -975,7 +975,6 @@ stu300_remove(struct platform_device *pdev)
975 i2c_del_adapter(&dev->adapter); 975 i2c_del_adapter(&dev->adapter);
976 /* Turn off everything */ 976 /* Turn off everything */
977 stu300_wr8(0x00, dev->virtbase + I2C_CR); 977 stu300_wr8(0x00, dev->virtbase + I2C_CR);
978 platform_set_drvdata(pdev, NULL);
979 return 0; 978 return 0;
980} 979}
981 980
diff --git a/drivers/i2c/busses/i2c-taos-evm.c b/drivers/i2c/busses/i2c-taos-evm.c
index 26c352a09298..6ffa56e08517 100644
--- a/drivers/i2c/busses/i2c-taos-evm.c
+++ b/drivers/i2c/busses/i2c-taos-evm.c
@@ -271,7 +271,6 @@ static int taos_connect(struct serio *serio, struct serio_driver *drv)
271 exit_close: 271 exit_close:
272 serio_close(serio); 272 serio_close(serio);
273 exit_kfree: 273 exit_kfree:
274 serio_set_drvdata(serio, NULL);
275 kfree(taos); 274 kfree(taos);
276 exit: 275 exit:
277 return err; 276 return err;
@@ -285,7 +284,6 @@ static void taos_disconnect(struct serio *serio)
285 i2c_unregister_device(taos->client); 284 i2c_unregister_device(taos->client);
286 i2c_del_adapter(&taos->adapter); 285 i2c_del_adapter(&taos->adapter);
287 serio_close(serio); 286 serio_close(serio);
288 serio_set_drvdata(serio, NULL);
289 kfree(taos); 287 kfree(taos);
290 288
291 dev_info(&serio->dev, "Disconnected from TAOS EVM\n"); 289 dev_info(&serio->dev, "Disconnected from TAOS EVM\n");
diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c
index f0d9923323ea..36704e3ab3fa 100644
--- a/drivers/i2c/busses/i2c-tegra.c
+++ b/drivers/i2c/busses/i2c-tegra.c
@@ -70,6 +70,8 @@
70#define I2C_INT_TX_FIFO_DATA_REQ (1<<1) 70#define I2C_INT_TX_FIFO_DATA_REQ (1<<1)
71#define I2C_INT_RX_FIFO_DATA_REQ (1<<0) 71#define I2C_INT_RX_FIFO_DATA_REQ (1<<0)
72#define I2C_CLK_DIVISOR 0x06c 72#define I2C_CLK_DIVISOR 0x06c
73#define I2C_CLK_DIVISOR_STD_FAST_MODE_SHIFT 16
74#define I2C_CLK_MULTIPLIER_STD_FAST_MODE 8
73 75
74#define DVC_CTRL_REG1 0x000 76#define DVC_CTRL_REG1 0x000
75#define DVC_CTRL_REG1_INTR_EN (1<<10) 77#define DVC_CTRL_REG1_INTR_EN (1<<10)
@@ -116,10 +118,23 @@ enum msg_end_type {
116/** 118/**
117 * struct tegra_i2c_hw_feature : Different HW support on Tegra 119 * struct tegra_i2c_hw_feature : Different HW support on Tegra
118 * @has_continue_xfer_support: Continue transfer supports. 120 * @has_continue_xfer_support: Continue transfer supports.
121 * @has_per_pkt_xfer_complete_irq: Has enable/disable capability for transfer
122 * complete interrupt per packet basis.
123 * @has_single_clk_source: The i2c controller has single clock source. Tegra30
124 * and earlier Socs has two clock sources i.e. div-clk and
125 * fast-clk.
126 * @clk_divisor_hs_mode: Clock divisor in HS mode.
127 * @clk_divisor_std_fast_mode: Clock divisor in standard/fast mode. It is
128 * applicable if there is no fast clock source i.e. single clock
129 * source.
119 */ 130 */
120 131
121struct tegra_i2c_hw_feature { 132struct tegra_i2c_hw_feature {
122 bool has_continue_xfer_support; 133 bool has_continue_xfer_support;
134 bool has_per_pkt_xfer_complete_irq;
135 bool has_single_clk_source;
136 int clk_divisor_hs_mode;
137 int clk_divisor_std_fast_mode;
123}; 138};
124 139
125/** 140/**
@@ -365,11 +380,13 @@ static void tegra_dvc_init(struct tegra_i2c_dev *i2c_dev)
365static inline int tegra_i2c_clock_enable(struct tegra_i2c_dev *i2c_dev) 380static inline int tegra_i2c_clock_enable(struct tegra_i2c_dev *i2c_dev)
366{ 381{
367 int ret; 382 int ret;
368 ret = clk_prepare_enable(i2c_dev->fast_clk); 383 if (!i2c_dev->hw->has_single_clk_source) {
369 if (ret < 0) { 384 ret = clk_prepare_enable(i2c_dev->fast_clk);
370 dev_err(i2c_dev->dev, 385 if (ret < 0) {
371 "Enabling fast clk failed, err %d\n", ret); 386 dev_err(i2c_dev->dev,
372 return ret; 387 "Enabling fast clk failed, err %d\n", ret);
388 return ret;
389 }
373 } 390 }
374 ret = clk_prepare_enable(i2c_dev->div_clk); 391 ret = clk_prepare_enable(i2c_dev->div_clk);
375 if (ret < 0) { 392 if (ret < 0) {
@@ -383,13 +400,16 @@ static inline int tegra_i2c_clock_enable(struct tegra_i2c_dev *i2c_dev)
383static inline void tegra_i2c_clock_disable(struct tegra_i2c_dev *i2c_dev) 400static inline void tegra_i2c_clock_disable(struct tegra_i2c_dev *i2c_dev)
384{ 401{
385 clk_disable_unprepare(i2c_dev->div_clk); 402 clk_disable_unprepare(i2c_dev->div_clk);
386 clk_disable_unprepare(i2c_dev->fast_clk); 403 if (!i2c_dev->hw->has_single_clk_source)
404 clk_disable_unprepare(i2c_dev->fast_clk);
387} 405}
388 406
389static int tegra_i2c_init(struct tegra_i2c_dev *i2c_dev) 407static int tegra_i2c_init(struct tegra_i2c_dev *i2c_dev)
390{ 408{
391 u32 val; 409 u32 val;
392 int err = 0; 410 int err = 0;
411 int clk_multiplier = I2C_CLK_MULTIPLIER_STD_FAST_MODE;
412 u32 clk_divisor;
393 413
394 tegra_i2c_clock_enable(i2c_dev); 414 tegra_i2c_clock_enable(i2c_dev);
395 415
@@ -404,7 +424,15 @@ static int tegra_i2c_init(struct tegra_i2c_dev *i2c_dev)
404 (0x2 << I2C_CNFG_DEBOUNCE_CNT_SHIFT); 424 (0x2 << I2C_CNFG_DEBOUNCE_CNT_SHIFT);
405 i2c_writel(i2c_dev, val, I2C_CNFG); 425 i2c_writel(i2c_dev, val, I2C_CNFG);
406 i2c_writel(i2c_dev, 0, I2C_INT_MASK); 426 i2c_writel(i2c_dev, 0, I2C_INT_MASK);
407 clk_set_rate(i2c_dev->div_clk, i2c_dev->bus_clk_rate * 8); 427
428 clk_multiplier *= (i2c_dev->hw->clk_divisor_std_fast_mode + 1);
429 clk_set_rate(i2c_dev->div_clk, i2c_dev->bus_clk_rate * clk_multiplier);
430
431 /* Make sure clock divisor programmed correctly */
432 clk_divisor = i2c_dev->hw->clk_divisor_hs_mode;
433 clk_divisor |= i2c_dev->hw->clk_divisor_std_fast_mode <<
434 I2C_CLK_DIVISOR_STD_FAST_MODE_SHIFT;
435 i2c_writel(i2c_dev, clk_divisor, I2C_CLK_DIVISOR);
408 436
409 if (!i2c_dev->is_dvc) { 437 if (!i2c_dev->is_dvc) {
410 u32 sl_cfg = i2c_readl(i2c_dev, I2C_SL_CNFG); 438 u32 sl_cfg = i2c_readl(i2c_dev, I2C_SL_CNFG);
@@ -546,6 +574,8 @@ static int tegra_i2c_xfer_msg(struct tegra_i2c_dev *i2c_dev,
546 tegra_i2c_fill_tx_fifo(i2c_dev); 574 tegra_i2c_fill_tx_fifo(i2c_dev);
547 575
548 int_mask = I2C_INT_NO_ACK | I2C_INT_ARBITRATION_LOST; 576 int_mask = I2C_INT_NO_ACK | I2C_INT_ARBITRATION_LOST;
577 if (i2c_dev->hw->has_per_pkt_xfer_complete_irq)
578 int_mask |= I2C_INT_PACKET_XFER_COMPLETE;
549 if (msg->flags & I2C_M_RD) 579 if (msg->flags & I2C_M_RD)
550 int_mask |= I2C_INT_RX_FIFO_DATA_REQ; 580 int_mask |= I2C_INT_RX_FIFO_DATA_REQ;
551 else if (i2c_dev->msg_buf_remaining) 581 else if (i2c_dev->msg_buf_remaining)
@@ -557,7 +587,7 @@ static int tegra_i2c_xfer_msg(struct tegra_i2c_dev *i2c_dev,
557 ret = wait_for_completion_timeout(&i2c_dev->msg_complete, TEGRA_I2C_TIMEOUT); 587 ret = wait_for_completion_timeout(&i2c_dev->msg_complete, TEGRA_I2C_TIMEOUT);
558 tegra_i2c_mask_irq(i2c_dev, int_mask); 588 tegra_i2c_mask_irq(i2c_dev, int_mask);
559 589
560 if (WARN_ON(ret == 0)) { 590 if (ret == 0) {
561 dev_err(i2c_dev->dev, "i2c transfer timed out\n"); 591 dev_err(i2c_dev->dev, "i2c transfer timed out\n");
562 592
563 tegra_i2c_init(i2c_dev); 593 tegra_i2c_init(i2c_dev);
@@ -633,15 +663,32 @@ static const struct i2c_algorithm tegra_i2c_algo = {
633 663
634static const struct tegra_i2c_hw_feature tegra20_i2c_hw = { 664static const struct tegra_i2c_hw_feature tegra20_i2c_hw = {
635 .has_continue_xfer_support = false, 665 .has_continue_xfer_support = false,
666 .has_per_pkt_xfer_complete_irq = false,
667 .has_single_clk_source = false,
668 .clk_divisor_hs_mode = 3,
669 .clk_divisor_std_fast_mode = 0,
636}; 670};
637 671
638static const struct tegra_i2c_hw_feature tegra30_i2c_hw = { 672static const struct tegra_i2c_hw_feature tegra30_i2c_hw = {
639 .has_continue_xfer_support = true, 673 .has_continue_xfer_support = true,
674 .has_per_pkt_xfer_complete_irq = false,
675 .has_single_clk_source = false,
676 .clk_divisor_hs_mode = 3,
677 .clk_divisor_std_fast_mode = 0,
678};
679
680static const struct tegra_i2c_hw_feature tegra114_i2c_hw = {
681 .has_continue_xfer_support = true,
682 .has_per_pkt_xfer_complete_irq = true,
683 .has_single_clk_source = true,
684 .clk_divisor_hs_mode = 1,
685 .clk_divisor_std_fast_mode = 0x19,
640}; 686};
641 687
642#if defined(CONFIG_OF) 688#if defined(CONFIG_OF)
643/* Match table for of_platform binding */ 689/* Match table for of_platform binding */
644static const struct of_device_id tegra_i2c_of_match[] = { 690static const struct of_device_id tegra_i2c_of_match[] = {
691 { .compatible = "nvidia,tegra114-i2c", .data = &tegra114_i2c_hw, },
645 { .compatible = "nvidia,tegra30-i2c", .data = &tegra30_i2c_hw, }, 692 { .compatible = "nvidia,tegra30-i2c", .data = &tegra30_i2c_hw, },
646 { .compatible = "nvidia,tegra20-i2c", .data = &tegra20_i2c_hw, }, 693 { .compatible = "nvidia,tegra20-i2c", .data = &tegra20_i2c_hw, },
647 { .compatible = "nvidia,tegra20-i2c-dvc", .data = &tegra20_i2c_hw, }, 694 { .compatible = "nvidia,tegra20-i2c-dvc", .data = &tegra20_i2c_hw, },
@@ -685,12 +732,6 @@ static int tegra_i2c_probe(struct platform_device *pdev)
685 return PTR_ERR(div_clk); 732 return PTR_ERR(div_clk);
686 } 733 }
687 734
688 fast_clk = devm_clk_get(&pdev->dev, "fast-clk");
689 if (IS_ERR(fast_clk)) {
690 dev_err(&pdev->dev, "missing bus clock");
691 return PTR_ERR(fast_clk);
692 }
693
694 i2c_dev = devm_kzalloc(&pdev->dev, sizeof(*i2c_dev), GFP_KERNEL); 735 i2c_dev = devm_kzalloc(&pdev->dev, sizeof(*i2c_dev), GFP_KERNEL);
695 if (!i2c_dev) { 736 if (!i2c_dev) {
696 dev_err(&pdev->dev, "Could not allocate struct tegra_i2c_dev"); 737 dev_err(&pdev->dev, "Could not allocate struct tegra_i2c_dev");
@@ -699,7 +740,6 @@ static int tegra_i2c_probe(struct platform_device *pdev)
699 740
700 i2c_dev->base = base; 741 i2c_dev->base = base;
701 i2c_dev->div_clk = div_clk; 742 i2c_dev->div_clk = div_clk;
702 i2c_dev->fast_clk = fast_clk;
703 i2c_dev->adapter.algo = &tegra_i2c_algo; 743 i2c_dev->adapter.algo = &tegra_i2c_algo;
704 i2c_dev->irq = irq; 744 i2c_dev->irq = irq;
705 i2c_dev->cont_id = pdev->id; 745 i2c_dev->cont_id = pdev->id;
@@ -730,6 +770,15 @@ static int tegra_i2c_probe(struct platform_device *pdev)
730 } 770 }
731 init_completion(&i2c_dev->msg_complete); 771 init_completion(&i2c_dev->msg_complete);
732 772
773 if (!i2c_dev->hw->has_single_clk_source) {
774 fast_clk = devm_clk_get(&pdev->dev, "fast-clk");
775 if (IS_ERR(fast_clk)) {
776 dev_err(&pdev->dev, "missing fast clock");
777 return PTR_ERR(fast_clk);
778 }
779 i2c_dev->fast_clk = fast_clk;
780 }
781
733 platform_set_drvdata(pdev, i2c_dev); 782 platform_set_drvdata(pdev, i2c_dev);
734 783
735 ret = tegra_i2c_init(i2c_dev); 784 ret = tegra_i2c_init(i2c_dev);
diff --git a/drivers/i2c/busses/i2c-versatile.c b/drivers/i2c/busses/i2c-versatile.c
index eec20db6246f..f3a8790a07e8 100644
--- a/drivers/i2c/busses/i2c-versatile.c
+++ b/drivers/i2c/busses/i2c-versatile.c
@@ -125,8 +125,6 @@ static int i2c_versatile_remove(struct platform_device *dev)
125{ 125{
126 struct i2c_versatile *i2c = platform_get_drvdata(dev); 126 struct i2c_versatile *i2c = platform_get_drvdata(dev);
127 127
128 platform_set_drvdata(dev, NULL);
129
130 i2c_del_adapter(&i2c->adap); 128 i2c_del_adapter(&i2c->adap);
131 return 0; 129 return 0;
132} 130}
diff --git a/drivers/i2c/busses/i2c-xiic.c b/drivers/i2c/busses/i2c-xiic.c
index f042f6da0ace..332c720fb3fe 100644
--- a/drivers/i2c/busses/i2c-xiic.c
+++ b/drivers/i2c/busses/i2c-xiic.c
@@ -784,8 +784,6 @@ static int xiic_i2c_remove(struct platform_device *pdev)
784 784
785 xiic_deinit(i2c); 785 xiic_deinit(i2c);
786 786
787 platform_set_drvdata(pdev, NULL);
788
789 free_irq(platform_get_irq(pdev, 0), i2c); 787 free_irq(platform_get_irq(pdev, 0), i2c);
790 788
791 iounmap(i2c->base); 789 iounmap(i2c->base);
diff --git a/drivers/i2c/busses/i2c-xlr.c b/drivers/i2c/busses/i2c-xlr.c
index 93f029e98c0d..7945b05d3ea0 100644
--- a/drivers/i2c/busses/i2c-xlr.c
+++ b/drivers/i2c/busses/i2c-xlr.c
@@ -256,7 +256,6 @@ static int xlr_i2c_remove(struct platform_device *pdev)
256 256
257 priv = platform_get_drvdata(pdev); 257 priv = platform_get_drvdata(pdev);
258 i2c_del_adapter(&priv->adap); 258 i2c_del_adapter(&priv->adap);
259 platform_set_drvdata(pdev, NULL);
260 return 0; 259 return 0;
261} 260}
262 261
diff --git a/drivers/i2c/busses/scx200_acb.c b/drivers/i2c/busses/scx200_acb.c
index 3862a953239c..2d1d2c5653fb 100644
--- a/drivers/i2c/busses/scx200_acb.c
+++ b/drivers/i2c/busses/scx200_acb.c
@@ -542,7 +542,6 @@ static int scx200_remove(struct platform_device *pdev)
542 struct scx200_acb_iface *iface; 542 struct scx200_acb_iface *iface;
543 543
544 iface = platform_get_drvdata(pdev); 544 iface = platform_get_drvdata(pdev);
545 platform_set_drvdata(pdev, NULL);
546 scx200_cleanup_iface(iface); 545 scx200_cleanup_iface(iface);
547 546
548 return 0; 547 return 0;
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-29 12:40:02 -0500