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authorJean Delvare <khali@linux-fr.org>2006-08-13 17:33:16 -0400
committerGreg Kroah-Hartman <gregkh@suse.de>2006-09-26 18:38:50 -0400
commit51c3711704b66986373408cbc0540abea43d2380 (patch)
tree2bb3fc022d9462a76deb7d29c9001377906ec5eb /drivers/i2c/busses
parent3fd39687540bd5d0501f413c91461d3b9fcbb525 (diff)
i2c-algo-sibyte: Merge into i2c-sibyte
i2c-algo-sibyte: Merge into i2c-sibyte Merge i2c-algo-sibyte into i2c-sibyte, as this is a complete, hardware-dependent SMBus implementation and not a reusable algorithm. Perform some basic coding style cleanups while we're here (mainly space-based indentation replaced by tabulations.) Signed-off-by: Jean Delvare <khali@linux-fr.org> Cc: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/i2c/busses')
-rw-r--r--drivers/i2c/busses/i2c-sibyte.c158
1 files changed, 155 insertions, 3 deletions
diff --git a/drivers/i2c/busses/i2c-sibyte.c b/drivers/i2c/busses/i2c-sibyte.c
index fa503ed9f86d..f516eb7a23f7 100644
--- a/drivers/i2c/busses/i2c-sibyte.c
+++ b/drivers/i2c/busses/i2c-sibyte.c
@@ -1,6 +1,7 @@
1/* 1/*
2 * Copyright (C) 2004 Steven J. Hill 2 * Copyright (C) 2004 Steven J. Hill
3 * Copyright (C) 2001,2002,2003 Broadcom Corporation 3 * Copyright (C) 2001,2002,2003 Broadcom Corporation
4 * Copyright (C) 1995-2000 Simon G. Vogl
4 * 5 *
5 * This program is free software; you can redistribute it and/or 6 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License 7 * modify it under the terms of the GNU General Public License
@@ -17,11 +18,162 @@
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 18 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
18 */ 19 */
19 20
21#include <linux/kernel.h>
20#include <linux/module.h> 22#include <linux/module.h>
21#include <linux/i2c-algo-sibyte.h> 23#include <linux/init.h>
24#include <linux/i2c.h>
25#include <asm/io.h>
22#include <asm/sibyte/sb1250_regs.h> 26#include <asm/sibyte/sb1250_regs.h>
23#include <asm/sibyte/sb1250_smbus.h> 27#include <asm/sibyte/sb1250_smbus.h>
24 28
29
30struct i2c_algo_sibyte_data {
31 void *data; /* private data */
32 int bus; /* which bus */
33 void *reg_base; /* CSR base */
34};
35
36/* ----- global defines ----------------------------------------------- */
37#define SMB_CSR(a,r) ((long)(a->reg_base + r))
38
39/* ----- global variables --------------------------------------------- */
40
41/* module parameters:
42 */
43static int bit_scan; /* have a look at what's hanging 'round */
44module_param(bit_scan, int, 0);
45MODULE_PARM_DESC(bit_scan, "Scan for active chips on the bus");
46
47
48static int smbus_xfer(struct i2c_adapter *i2c_adap, u16 addr,
49 unsigned short flags, char read_write,
50 u8 command, int size, union i2c_smbus_data * data)
51{
52 struct i2c_algo_sibyte_data *adap = i2c_adap->algo_data;
53 int data_bytes = 0;
54 int error;
55
56 while (csr_in32(SMB_CSR(adap, R_SMB_STATUS)) & M_SMB_BUSY)
57 ;
58
59 switch (size) {
60 case I2C_SMBUS_QUICK:
61 csr_out32((V_SMB_ADDR(addr) |
62 (read_write == I2C_SMBUS_READ ? M_SMB_QDATA : 0) |
63 V_SMB_TT_QUICKCMD), SMB_CSR(adap, R_SMB_START));
64 break;
65 case I2C_SMBUS_BYTE:
66 if (read_write == I2C_SMBUS_READ) {
67 csr_out32((V_SMB_ADDR(addr) | V_SMB_TT_RD1BYTE),
68 SMB_CSR(adap, R_SMB_START));
69 data_bytes = 1;
70 } else {
71 csr_out32(V_SMB_CMD(command), SMB_CSR(adap, R_SMB_CMD));
72 csr_out32((V_SMB_ADDR(addr) | V_SMB_TT_WR1BYTE),
73 SMB_CSR(adap, R_SMB_START));
74 }
75 break;
76 case I2C_SMBUS_BYTE_DATA:
77 csr_out32(V_SMB_CMD(command), SMB_CSR(adap, R_SMB_CMD));
78 if (read_write == I2C_SMBUS_READ) {
79 csr_out32((V_SMB_ADDR(addr) | V_SMB_TT_CMD_RD1BYTE),
80 SMB_CSR(adap, R_SMB_START));
81 data_bytes = 1;
82 } else {
83 csr_out32(V_SMB_LB(data->byte),
84 SMB_CSR(adap, R_SMB_DATA));
85 csr_out32((V_SMB_ADDR(addr) | V_SMB_TT_WR2BYTE),
86 SMB_CSR(adap, R_SMB_START));
87 }
88 break;
89 case I2C_SMBUS_WORD_DATA:
90 csr_out32(V_SMB_CMD(command), SMB_CSR(adap, R_SMB_CMD));
91 if (read_write == I2C_SMBUS_READ) {
92 csr_out32((V_SMB_ADDR(addr) | V_SMB_TT_CMD_RD2BYTE),
93 SMB_CSR(adap, R_SMB_START));
94 data_bytes = 2;
95 } else {
96 csr_out32(V_SMB_LB(data->word & 0xff),
97 SMB_CSR(adap, R_SMB_DATA));
98 csr_out32(V_SMB_MB(data->word >> 8),
99 SMB_CSR(adap, R_SMB_DATA));
100 csr_out32((V_SMB_ADDR(addr) | V_SMB_TT_WR2BYTE),
101 SMB_CSR(adap, R_SMB_START));
102 }
103 break;
104 default:
105 return -1; /* XXXKW better error code? */
106 }
107
108 while (csr_in32(SMB_CSR(adap, R_SMB_STATUS)) & M_SMB_BUSY)
109 ;
110
111 error = csr_in32(SMB_CSR(adap, R_SMB_STATUS));
112 if (error & M_SMB_ERROR) {
113 /* Clear error bit by writing a 1 */
114 csr_out32(M_SMB_ERROR, SMB_CSR(adap, R_SMB_STATUS));
115 return -1; /* XXXKW better error code? */
116 }
117
118 if (data_bytes == 1)
119 data->byte = csr_in32(SMB_CSR(adap, R_SMB_DATA)) & 0xff;
120 if (data_bytes == 2)
121 data->word = csr_in32(SMB_CSR(adap, R_SMB_DATA)) & 0xffff;
122
123 return 0;
124}
125
126static u32 bit_func(struct i2c_adapter *adap)
127{
128 return (I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
129 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA);
130}
131
132
133/* -----exported algorithm data: ------------------------------------- */
134
135static struct i2c_algorithm i2c_sibyte_algo = {
136 .smbus_xfer = smbus_xfer,
137 .functionality = bit_func,
138};
139
140/*
141 * registering functions to load algorithms at runtime
142 */
143int i2c_sibyte_add_bus(struct i2c_adapter *i2c_adap, int speed)
144{
145 int i;
146 struct i2c_algo_sibyte_data *adap = i2c_adap->algo_data;
147
148 /* register new adapter to i2c module... */
149 i2c_adap->algo = &i2c_sibyte_algo;
150
151 /* Set the frequency to 100 kHz */
152 csr_out32(speed, SMB_CSR(adap,R_SMB_FREQ));
153 csr_out32(0, SMB_CSR(adap,R_SMB_CONTROL));
154
155 /* scan bus */
156 if (bit_scan) {
157 union i2c_smbus_data data;
158 int rc;
159 printk(KERN_INFO " i2c-algo-sibyte.o: scanning bus %s.\n",
160 i2c_adap->name);
161 for (i = 0x00; i < 0x7f; i++) {
162 /* XXXKW is this a realistic probe? */
163 rc = smbus_xfer(i2c_adap, i, 0, I2C_SMBUS_READ, 0,
164 I2C_SMBUS_BYTE_DATA, &data);
165 if (!rc) {
166 printk("(%02x)",i);
167 } else
168 printk(".");
169 }
170 printk("\n");
171 }
172
173 return i2c_add_adapter(i2c_adap);
174}
175
176
25static struct i2c_algo_sibyte_data sibyte_board_data[2] = { 177static struct i2c_algo_sibyte_data sibyte_board_data[2] = {
26 { NULL, 0, (void *) (CKSEG1+A_SMB_BASE(0)) }, 178 { NULL, 0, (void *) (CKSEG1+A_SMB_BASE(0)) },
27 { NULL, 1, (void *) (CKSEG1+A_SMB_BASE(1)) } 179 { NULL, 1, (void *) (CKSEG1+A_SMB_BASE(1)) }
@@ -58,8 +210,8 @@ static int __init i2c_sibyte_init(void)
58 210
59static void __exit i2c_sibyte_exit(void) 211static void __exit i2c_sibyte_exit(void)
60{ 212{
61 i2c_sibyte_del_bus(&sibyte_board_adapter[0]); 213 i2c_del_bus(&sibyte_board_adapter[0]);
62 i2c_sibyte_del_bus(&sibyte_board_adapter[1]); 214 i2c_del_bus(&sibyte_board_adapter[1]);
63} 215}
64 216
65module_init(i2c_sibyte_init); 217module_init(i2c_sibyte_init);