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authorJarkko Nikula <jarkko.nikula@linux.intel.com>2015-01-23 04:35:55 -0500
committerWolfram Sang <wsa@the-dreams.de>2015-01-26 10:58:26 -0500
commit42ffd3907c1663441cd1bd4d1a575930b63a5964 (patch)
treeb50bac0f8565ef9bb3da2b593b494599a9451804 /drivers/i2c/busses
parentc680eed5ccd4a1c99ee48cd41f4e5fdfad497dc2 (diff)
i2c: designware: Do not calculate SCL timing parameters needlessly
Do SCL timing parameter calculation conditionally depending are custom parameters provided since calculated values will get instantly overwritten by provided parameters. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Diffstat (limited to 'drivers/i2c/busses')
-rw-r--r--drivers/i2c/busses/i2c-designware-core.c45
1 files changed, 22 insertions, 23 deletions
diff --git a/drivers/i2c/busses/i2c-designware-core.c b/drivers/i2c/busses/i2c-designware-core.c
index fbb48fb138e7..6e25c010e690 100644
--- a/drivers/i2c/busses/i2c-designware-core.c
+++ b/drivers/i2c/busses/i2c-designware-core.c
@@ -320,40 +320,39 @@ int i2c_dw_init(struct dw_i2c_dev *dev)
320 sda_falling_time = dev->sda_falling_time ?: 300; /* ns */ 320 sda_falling_time = dev->sda_falling_time ?: 300; /* ns */
321 scl_falling_time = dev->scl_falling_time ?: 300; /* ns */ 321 scl_falling_time = dev->scl_falling_time ?: 300; /* ns */
322 322
323 /* Standard-mode */ 323 /* Set SCL timing parameters for standard-mode */
324 hcnt = i2c_dw_scl_hcnt(input_clock_khz,
325 4000, /* tHD;STA = tHIGH = 4.0 us */
326 sda_falling_time,
327 0, /* 0: DW default, 1: Ideal */
328 0); /* No offset */
329 lcnt = i2c_dw_scl_lcnt(input_clock_khz,
330 4700, /* tLOW = 4.7 us */
331 scl_falling_time,
332 0); /* No offset */
333
334 /* Allow platforms to specify the ideal HCNT and LCNT values */
335 if (dev->ss_hcnt && dev->ss_lcnt) { 324 if (dev->ss_hcnt && dev->ss_lcnt) {
336 hcnt = dev->ss_hcnt; 325 hcnt = dev->ss_hcnt;
337 lcnt = dev->ss_lcnt; 326 lcnt = dev->ss_lcnt;
327 } else {
328 hcnt = i2c_dw_scl_hcnt(input_clock_khz,
329 4000, /* tHD;STA = tHIGH = 4.0 us */
330 sda_falling_time,
331 0, /* 0: DW default, 1: Ideal */
332 0); /* No offset */
333 lcnt = i2c_dw_scl_lcnt(input_clock_khz,
334 4700, /* tLOW = 4.7 us */
335 scl_falling_time,
336 0); /* No offset */
338 } 337 }
339 dw_writel(dev, hcnt, DW_IC_SS_SCL_HCNT); 338 dw_writel(dev, hcnt, DW_IC_SS_SCL_HCNT);
340 dw_writel(dev, lcnt, DW_IC_SS_SCL_LCNT); 339 dw_writel(dev, lcnt, DW_IC_SS_SCL_LCNT);
341 dev_dbg(dev->dev, "Standard-mode HCNT:LCNT = %d:%d\n", hcnt, lcnt); 340 dev_dbg(dev->dev, "Standard-mode HCNT:LCNT = %d:%d\n", hcnt, lcnt);
342 341
343 /* Fast-mode */ 342 /* Set SCL timing parameters for fast-mode */
344 hcnt = i2c_dw_scl_hcnt(input_clock_khz,
345 600, /* tHD;STA = tHIGH = 0.6 us */
346 sda_falling_time,
347 0, /* 0: DW default, 1: Ideal */
348 0); /* No offset */
349 lcnt = i2c_dw_scl_lcnt(input_clock_khz,
350 1300, /* tLOW = 1.3 us */
351 scl_falling_time,
352 0); /* No offset */
353
354 if (dev->fs_hcnt && dev->fs_lcnt) { 343 if (dev->fs_hcnt && dev->fs_lcnt) {
355 hcnt = dev->fs_hcnt; 344 hcnt = dev->fs_hcnt;
356 lcnt = dev->fs_lcnt; 345 lcnt = dev->fs_lcnt;
346 } else {
347 hcnt = i2c_dw_scl_hcnt(input_clock_khz,
348 600, /* tHD;STA = tHIGH = 0.6 us */
349 sda_falling_time,
350 0, /* 0: DW default, 1: Ideal */
351 0); /* No offset */
352 lcnt = i2c_dw_scl_lcnt(input_clock_khz,
353 1300, /* tLOW = 1.3 us */
354 scl_falling_time,
355 0); /* No offset */
357 } 356 }
358 dw_writel(dev, hcnt, DW_IC_FS_SCL_HCNT); 357 dw_writel(dev, hcnt, DW_IC_FS_SCL_HCNT);
359 dw_writel(dev, lcnt, DW_IC_FS_SCL_LCNT); 358 dw_writel(dev, lcnt, DW_IC_FS_SCL_LCNT);