diff options
author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2005-09-08 16:04:58 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2005-09-08 16:04:58 -0400 |
commit | 6fd60fa97b706e52abba7c9f810b148aa230817f (patch) | |
tree | 40e376d9cf3116c5728a6603ac827a89efdc7a6d /drivers/i2c/busses | |
parent | b652b438fcad4c9c079d0774e9d45ee58fae22e2 (diff) |
[I2C] Clean up i2c-pxa debugging/printks
Fix up comments made by review by gregkh.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'drivers/i2c/busses')
-rw-r--r-- | drivers/i2c/busses/i2c-pxa.c | 75 |
1 files changed, 33 insertions, 42 deletions
diff --git a/drivers/i2c/busses/i2c-pxa.c b/drivers/i2c/busses/i2c-pxa.c index a72d28365297..fdf53ce04248 100644 --- a/drivers/i2c/busses/i2c-pxa.c +++ b/drivers/i2c/busses/i2c-pxa.c | |||
@@ -60,17 +60,6 @@ struct pxa_i2c { | |||
60 | */ | 60 | */ |
61 | #define I2C_PXA_SLAVE_ADDR 0x1 | 61 | #define I2C_PXA_SLAVE_ADDR 0x1 |
62 | 62 | ||
63 | /* | ||
64 | * Set this to zero to remove all debug statements via dead code elimination. | ||
65 | */ | ||
66 | #undef DEBUG | ||
67 | |||
68 | #if 0 | ||
69 | #define DBGLVL KERN_INFO | ||
70 | #else | ||
71 | #define DBGLVL KERN_DEBUG | ||
72 | #endif | ||
73 | |||
74 | #ifdef DEBUG | 63 | #ifdef DEBUG |
75 | 64 | ||
76 | struct bits { | 65 | struct bits { |
@@ -108,7 +97,7 @@ static const struct bits isr_bits[] = { | |||
108 | 97 | ||
109 | static void decode_ISR(unsigned int val) | 98 | static void decode_ISR(unsigned int val) |
110 | { | 99 | { |
111 | decode_bits(DBGLVL "ISR", isr_bits, ARRAY_SIZE(isr_bits), val); | 100 | decode_bits(KERN_DEBUG "ISR", isr_bits, ARRAY_SIZE(isr_bits), val); |
112 | printk("\n"); | 101 | printk("\n"); |
113 | } | 102 | } |
114 | 103 | ||
@@ -132,7 +121,7 @@ static const struct bits icr_bits[] = { | |||
132 | 121 | ||
133 | static void decode_ICR(unsigned int val) | 122 | static void decode_ICR(unsigned int val) |
134 | { | 123 | { |
135 | decode_bits(DBGLVL "ICR", icr_bits, ARRAY_SIZE(icr_bits), val); | 124 | decode_bits(KERN_DEBUG "ICR", icr_bits, ARRAY_SIZE(icr_bits), val); |
136 | printk("\n"); | 125 | printk("\n"); |
137 | } | 126 | } |
138 | 127 | ||
@@ -140,7 +129,7 @@ static unsigned int i2c_debug = DEBUG; | |||
140 | 129 | ||
141 | static void i2c_pxa_show_state(struct pxa_i2c *i2c, int lno, const char *fname) | 130 | static void i2c_pxa_show_state(struct pxa_i2c *i2c, int lno, const char *fname) |
142 | { | 131 | { |
143 | printk(DBGLVL "state:%s:%d: ISR=%08x, ICR=%08x, IBMR=%02x\n", fname, lno, ISR, ICR, IBMR); | 132 | dev_dbg(&i2c->adap.dev, "state:%s:%d: ISR=%08x, ICR=%08x, IBMR=%02x\n", fname, lno, ISR, ICR, IBMR); |
144 | } | 133 | } |
145 | 134 | ||
146 | #define show_state(i2c) i2c_pxa_show_state(i2c, __LINE__, __FUNCTION__) | 135 | #define show_state(i2c) i2c_pxa_show_state(i2c, __LINE__, __FUNCTION__) |
@@ -152,7 +141,7 @@ static void i2c_pxa_show_state(struct pxa_i2c *i2c, int lno, const char *fname) | |||
152 | #define decode_ICR(val) do { } while (0) | 141 | #define decode_ICR(val) do { } while (0) |
153 | #endif | 142 | #endif |
154 | 143 | ||
155 | #define eedbg(lvl, x...) do { if ((lvl) < 1) { printk(DBGLVL "" x); } } while(0) | 144 | #define eedbg(lvl, x...) do { if ((lvl) < 1) { printk(KERN_DEBUG "" x); } } while(0) |
156 | 145 | ||
157 | static void i2c_pxa_master_complete(struct pxa_i2c *i2c, int ret); | 146 | static void i2c_pxa_master_complete(struct pxa_i2c *i2c, int ret); |
158 | 147 | ||
@@ -162,7 +151,8 @@ static void i2c_pxa_scream_blue_murder(struct pxa_i2c *i2c, const char *why) | |||
162 | printk("i2c: error: %s\n", why); | 151 | printk("i2c: error: %s\n", why); |
163 | printk("i2c: msg_num: %d msg_idx: %d msg_ptr: %d\n", | 152 | printk("i2c: msg_num: %d msg_idx: %d msg_ptr: %d\n", |
164 | i2c->msg_num, i2c->msg_idx, i2c->msg_ptr); | 153 | i2c->msg_num, i2c->msg_idx, i2c->msg_ptr); |
165 | printk("i2c: ICR: %08x ISR: %08x\ni2c: log: ", ICR, ISR); | 154 | printk("i2c: ICR: %08x ISR: %08x\n" |
155 | "i2c: log: ", ICR, ISR); | ||
166 | for (i = 0; i < i2c->irqlogidx; i++) | 156 | for (i = 0; i < i2c->irqlogidx; i++) |
167 | printk("[%08x:%08x] ", i2c->isrlog[i], i2c->icrlog[i]); | 157 | printk("[%08x:%08x] ", i2c->isrlog[i], i2c->icrlog[i]); |
168 | printk("\n"); | 158 | printk("\n"); |
@@ -178,7 +168,7 @@ static void i2c_pxa_abort(struct pxa_i2c *i2c) | |||
178 | unsigned long timeout = jiffies + HZ/4; | 168 | unsigned long timeout = jiffies + HZ/4; |
179 | 169 | ||
180 | if (i2c_pxa_is_slavemode(i2c)) { | 170 | if (i2c_pxa_is_slavemode(i2c)) { |
181 | printk(DBGLVL "i2c_pxa_transfer: called in slave mode\n"); | 171 | dev_dbg(&i2c->adap.dev, "%s: called in slave mode\n", __func__); |
182 | return; | 172 | return; |
183 | } | 173 | } |
184 | 174 | ||
@@ -222,12 +212,12 @@ static int i2c_pxa_wait_master(struct pxa_i2c *i2c) | |||
222 | 212 | ||
223 | while (time_before(jiffies, timeout)) { | 213 | while (time_before(jiffies, timeout)) { |
224 | if (i2c_debug > 1) | 214 | if (i2c_debug > 1) |
225 | printk(DBGLVL "i2c_pxa_wait_master: %ld: ISR=%08x, ICR=%08x, IBMR=%02x\n", | 215 | dev_dbg(&i2c->adap.dev, "%s: %ld: ISR=%08x, ICR=%08x, IBMR=%02x\n", |
226 | (long)jiffies, ISR, ICR, IBMR); | 216 | __func__, (long)jiffies, ISR, ICR, IBMR); |
227 | 217 | ||
228 | if (ISR & ISR_SAD) { | 218 | if (ISR & ISR_SAD) { |
229 | if (i2c_debug > 0) | 219 | if (i2c_debug > 0) |
230 | printk(DBGLVL "i2c_pxa_wait_master: Slave detected\n"); | 220 | dev_dbg(&i2c->adap.dev, "%s: Slave detected\n", __func__); |
231 | goto out; | 221 | goto out; |
232 | } | 222 | } |
233 | 223 | ||
@@ -237,7 +227,7 @@ static int i2c_pxa_wait_master(struct pxa_i2c *i2c) | |||
237 | */ | 227 | */ |
238 | if ((ISR & (ISR_UB | ISR_IBB)) == 0 && IBMR == 3) { | 228 | if ((ISR & (ISR_UB | ISR_IBB)) == 0 && IBMR == 3) { |
239 | if (i2c_debug > 0) | 229 | if (i2c_debug > 0) |
240 | printk(DBGLVL "i2c_pxa_wait_master: done\n"); | 230 | dev_dbg(&i2c->adap.dev, "%s: done\n", __func__); |
241 | return 1; | 231 | return 1; |
242 | } | 232 | } |
243 | 233 | ||
@@ -245,7 +235,7 @@ static int i2c_pxa_wait_master(struct pxa_i2c *i2c) | |||
245 | } | 235 | } |
246 | 236 | ||
247 | if (i2c_debug > 0) | 237 | if (i2c_debug > 0) |
248 | printk(DBGLVL "i2c_pxa_wait_master: did not free\n"); | 238 | dev_dbg(&i2c->adap.dev, "%s: did not free\n", __func__); |
249 | out: | 239 | out: |
250 | return 0; | 240 | return 0; |
251 | } | 241 | } |
@@ -253,12 +243,12 @@ static int i2c_pxa_wait_master(struct pxa_i2c *i2c) | |||
253 | static int i2c_pxa_set_master(struct pxa_i2c *i2c) | 243 | static int i2c_pxa_set_master(struct pxa_i2c *i2c) |
254 | { | 244 | { |
255 | if (i2c_debug) | 245 | if (i2c_debug) |
256 | printk(DBGLVL "I2C: setting to bus master\n"); | 246 | dev_dbg(&i2c->adap.dev, "setting to bus master\n"); |
257 | 247 | ||
258 | if ((ISR & (ISR_UB | ISR_IBB)) != 0) { | 248 | if ((ISR & (ISR_UB | ISR_IBB)) != 0) { |
259 | printk(DBGLVL "set_master: unit is busy\n"); | 249 | dev_dbg(&i2c->adap.dev, "%s: unit is busy\n", __func__); |
260 | if (!i2c_pxa_wait_master(i2c)) { | 250 | if (!i2c_pxa_wait_master(i2c)) { |
261 | printk(DBGLVL "set_master: error: unit busy\n"); | 251 | dev_dbg(&i2c->adap.dev, "%s: error: unit busy\n", __func__); |
262 | return I2C_RETRY; | 252 | return I2C_RETRY; |
263 | } | 253 | } |
264 | } | 254 | } |
@@ -278,13 +268,13 @@ static int i2c_pxa_wait_slave(struct pxa_i2c *i2c) | |||
278 | 268 | ||
279 | while (time_before(jiffies, timeout)) { | 269 | while (time_before(jiffies, timeout)) { |
280 | if (i2c_debug > 1) | 270 | if (i2c_debug > 1) |
281 | printk(DBGLVL "i2c_pxa_wait_slave: %ld: ISR=%08x, ICR=%08x, IBMR=%02x\n", | 271 | dev_dbg(&i2c->adap.dev, "%s: %ld: ISR=%08x, ICR=%08x, IBMR=%02x\n", |
282 | (long)jiffies, ISR, ICR, IBMR); | 272 | __func__, (long)jiffies, ISR, ICR, IBMR); |
283 | 273 | ||
284 | if ((ISR & (ISR_UB|ISR_IBB|ISR_SAD)) == ISR_SAD || | 274 | if ((ISR & (ISR_UB|ISR_IBB|ISR_SAD)) == ISR_SAD || |
285 | (ICR & ICR_SCLE) == 0) { | 275 | (ICR & ICR_SCLE) == 0) { |
286 | if (i2c_debug > 1) | 276 | if (i2c_debug > 1) |
287 | printk(DBGLVL "i2c_pxa_wait_slave: done\n"); | 277 | dev_dbg(&i2c->adap.dev, "%s: done\n", __func__); |
288 | return 1; | 278 | return 1; |
289 | } | 279 | } |
290 | 280 | ||
@@ -292,7 +282,7 @@ static int i2c_pxa_wait_slave(struct pxa_i2c *i2c) | |||
292 | } | 282 | } |
293 | 283 | ||
294 | if (i2c_debug > 0) | 284 | if (i2c_debug > 0) |
295 | printk(DBGLVL "i2c_pxa_wait_slave: did not free\n"); | 285 | dev_dbg(&i2c->adap.dev, "%s: did not free\n", __func__); |
296 | return 0; | 286 | return 0; |
297 | } | 287 | } |
298 | 288 | ||
@@ -316,7 +306,8 @@ static void i2c_pxa_set_slave(struct pxa_i2c *i2c, int errcode) | |||
316 | } | 306 | } |
317 | 307 | ||
318 | if (!i2c_pxa_wait_slave(i2c)) { | 308 | if (!i2c_pxa_wait_slave(i2c)) { |
319 | printk(KERN_ERR "i2c_pxa_set_slave: wait timedout\n"); | 309 | dev_err(&i2c->adap.dev, "%s: wait timedout\n", |
310 | __func__); | ||
320 | return; | 311 | return; |
321 | } | 312 | } |
322 | } | 313 | } |
@@ -325,7 +316,7 @@ static void i2c_pxa_set_slave(struct pxa_i2c *i2c, int errcode) | |||
325 | ICR &= ~ICR_SCLE; | 316 | ICR &= ~ICR_SCLE; |
326 | 317 | ||
327 | if (i2c_debug) { | 318 | if (i2c_debug) { |
328 | printk(DBGLVL "ICR now %08x, ISR %08x\n", ICR, ISR); | 319 | dev_dbg(&i2c->adap.dev, "ICR now %08x, ISR %08x\n", ICR, ISR); |
329 | decode_ICR(ICR); | 320 | decode_ICR(ICR); |
330 | } | 321 | } |
331 | } | 322 | } |
@@ -351,7 +342,7 @@ static void i2c_pxa_reset(struct pxa_i2c *i2c) | |||
351 | ICR = I2C_ICR_INIT; | 342 | ICR = I2C_ICR_INIT; |
352 | 343 | ||
353 | #ifdef CONFIG_I2C_PXA_SLAVE | 344 | #ifdef CONFIG_I2C_PXA_SLAVE |
354 | printk(KERN_INFO "I2C: Enabling slave mode\n"); | 345 | dev_info(&i2c->adap.dev, "Enabling slave mode\n"); |
355 | ICR |= ICR_SADIE | ICR_ALDIE | ICR_SSDIE; | 346 | ICR |= ICR_SADIE | ICR_ALDIE | ICR_SSDIE; |
356 | #endif | 347 | #endif |
357 | 348 | ||
@@ -522,7 +513,7 @@ static void i2c_pxa_slave_start(struct pxa_i2c *i2c, u32 isr) | |||
522 | int timeout; | 513 | int timeout; |
523 | 514 | ||
524 | if (i2c_debug > 0) | 515 | if (i2c_debug > 0) |
525 | printk(DBGLVL "I2C: SAD, mode is slave-%cx\n", | 516 | dev_dbg(&i2c->adap.dev, "SAD, mode is slave-%cx\n", |
526 | (isr & ISR_RWM) ? 'r' : 't'); | 517 | (isr & ISR_RWM) ? 'r' : 't'); |
527 | 518 | ||
528 | if (i2c->slave != NULL) | 519 | if (i2c->slave != NULL) |
@@ -546,7 +537,7 @@ static void i2c_pxa_slave_start(struct pxa_i2c *i2c, u32 isr) | |||
546 | timeout--; | 537 | timeout--; |
547 | 538 | ||
548 | if (timeout <= 0) { | 539 | if (timeout <= 0) { |
549 | printk(KERN_ERR "timeout waiting for SCL high\n"); | 540 | dev_err(&i2c->adap.dev, "timeout waiting for SCL high\n"); |
550 | break; | 541 | break; |
551 | } | 542 | } |
552 | } | 543 | } |
@@ -557,13 +548,13 @@ static void i2c_pxa_slave_start(struct pxa_i2c *i2c, u32 isr) | |||
557 | static void i2c_pxa_slave_stop(struct pxa_i2c *i2c) | 548 | static void i2c_pxa_slave_stop(struct pxa_i2c *i2c) |
558 | { | 549 | { |
559 | if (i2c_debug > 2) | 550 | if (i2c_debug > 2) |
560 | printk(DBGLVL "ISR: SSD (Slave Stop)\n"); | 551 | dev_dbg(&i2c->adap.dev, "ISR: SSD (Slave Stop)\n"); |
561 | 552 | ||
562 | if (i2c->slave != NULL) | 553 | if (i2c->slave != NULL) |
563 | i2c->slave->event(i2c->slave->data, I2C_SLAVE_EVENT_STOP); | 554 | i2c->slave->event(i2c->slave->data, I2C_SLAVE_EVENT_STOP); |
564 | 555 | ||
565 | if (i2c_debug > 2) | 556 | if (i2c_debug > 2) |
566 | printk(DBGLVL "ISR: SSD (Slave Stop) acked\n"); | 557 | dev_dbg(&i2c->adap.dev, "ISR: SSD (Slave Stop) acked\n"); |
567 | 558 | ||
568 | /* | 559 | /* |
569 | * If we have a master-mode message waiting, | 560 | * If we have a master-mode message waiting, |
@@ -609,7 +600,7 @@ static void i2c_pxa_slave_start(struct pxa_i2c *i2c, u32 isr) | |||
609 | timeout--; | 600 | timeout--; |
610 | 601 | ||
611 | if (timeout <= 0) { | 602 | if (timeout <= 0) { |
612 | printk(KERN_ERR "timeout waiting for SCL high\n"); | 603 | dev_err(&i2c->adap.dev, "timeout waiting for SCL high\n"); |
613 | break; | 604 | break; |
614 | } | 605 | } |
615 | } | 606 | } |
@@ -667,7 +658,7 @@ static int i2c_pxa_do_xfer(struct pxa_i2c *i2c, struct i2c_msg *msg, int num) | |||
667 | */ | 658 | */ |
668 | ret = i2c_pxa_wait_bus_not_busy(i2c); | 659 | ret = i2c_pxa_wait_bus_not_busy(i2c); |
669 | if (ret) { | 660 | if (ret) { |
670 | printk(KERN_INFO "i2c_pxa: timeout waiting for bus free\n"); | 661 | dev_err(&i2c->adap.dev, "i2c_pxa: timeout waiting for bus free\n"); |
671 | goto out; | 662 | goto out; |
672 | } | 663 | } |
673 | 664 | ||
@@ -676,7 +667,7 @@ static int i2c_pxa_do_xfer(struct pxa_i2c *i2c, struct i2c_msg *msg, int num) | |||
676 | */ | 667 | */ |
677 | ret = i2c_pxa_set_master(i2c); | 668 | ret = i2c_pxa_set_master(i2c); |
678 | if (ret) { | 669 | if (ret) { |
679 | printk(KERN_INFO "i2c_pxa_set_master: error %d\n", ret); | 670 | dev_err(&i2c->adap.dev, "i2c_pxa_set_master: error %d\n", ret); |
680 | goto out; | 671 | goto out; |
681 | } | 672 | } |
682 | 673 | ||
@@ -864,8 +855,8 @@ static irqreturn_t i2c_pxa_handler(int this_irq, void *dev_id, struct pt_regs *r | |||
864 | u32 isr = ISR; | 855 | u32 isr = ISR; |
865 | 856 | ||
866 | if (i2c_debug > 2 && 0) { | 857 | if (i2c_debug > 2 && 0) { |
867 | printk(DBGLVL "i2c_pxa_handler: ISR=%08x, ICR=%08x, IBMR=%02x\n", | 858 | dev_dbg(&i2c->adap.dev, "%s: ISR=%08x, ICR=%08x, IBMR=%02x\n", |
868 | isr, ICR, IBMR); | 859 | __func__, isr, ICR, IBMR); |
869 | decode_ISR(isr); | 860 | decode_ISR(isr); |
870 | } | 861 | } |
871 | 862 | ||
@@ -913,7 +904,7 @@ static int i2c_pxa_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num | |||
913 | goto out; | 904 | goto out; |
914 | 905 | ||
915 | if (i2c_debug) | 906 | if (i2c_debug) |
916 | printk(KERN_INFO "Retrying transmission\n"); | 907 | dev_dbg(&adap->dev, "Retrying transmission\n"); |
917 | udelay(100); | 908 | udelay(100); |
918 | } | 909 | } |
919 | i2c_pxa_scream_blue_murder(i2c, "exhausted retries"); | 910 | i2c_pxa_scream_blue_murder(i2c, "exhausted retries"); |