aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/i2c/busses
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@woody.osdl.org>2006-12-12 12:57:55 -0500
committerLinus Torvalds <torvalds@woody.osdl.org>2006-12-12 12:57:55 -0500
commit659dba34807692a6ebd55e7859dff2c7cb1b005d (patch)
treecbc8454fa57af5d3e5d37a3dbbca2c7da92c6ef0 /drivers/i2c/busses
parent3640543df26fd38f31f0c6decc35c07be2a6307c (diff)
parentd7aef138f3c08c5bbab567bc9a84e43a88f50395 (diff)
Merge branch 'i2c-for-linus' of git://jdelvare.pck.nerim.net/jdelvare-2.6
* 'i2c-for-linus' of git://jdelvare.pck.nerim.net/jdelvare-2.6: i2c: Fix OMAP clock prescaler to match the comment i2c: Refactor a kfree in i2c-dev i2c: Fix return value check in i2c-dev i2c: Enable PEC on more i2c-i801 devices i2c: Discard the i2c algo del_bus wrappers i2c: New ARM Versatile/Realview bus driver i2c: fix broken ds1337 initialization i2c: i2c-i801 documentation update i2c: Use the __ATTR macro where possible i2c: Whitespace cleanups i2c: Use put_user instead of copy_to_user where possible i2c: New Atmel AT91 bus driver i2c: Add support for nested i2c bus locking i2c: Cleanups to the i2c-nforce2 bus driver i2c: Add request/release_mem_region to i2c-ibm_iic bus driver i2c: New Philips PNX bus driver i2c: Delete the broken i2c-ite bus driver i2c: Update the list of driver IDs i2c: Fix documentation typos
Diffstat (limited to 'drivers/i2c/busses')
-rw-r--r--drivers/i2c/busses/Kconfig49
-rw-r--r--drivers/i2c/busses/Makefile4
-rw-r--r--drivers/i2c/busses/i2c-at91.c325
-rw-r--r--drivers/i2c/busses/i2c-elektor.c2
-rw-r--r--drivers/i2c/busses/i2c-hydra.c2
-rw-r--r--drivers/i2c/busses/i2c-i801.c16
-rw-r--r--drivers/i2c/busses/i2c-i810.c6
-rw-r--r--drivers/i2c/busses/i2c-ibm_iic.c9
-rw-r--r--drivers/i2c/busses/i2c-ite.c278
-rw-r--r--drivers/i2c/busses/i2c-ixp2000.c2
-rw-r--r--drivers/i2c/busses/i2c-ixp4xx.c2
-rw-r--r--drivers/i2c/busses/i2c-nforce2.c89
-rw-r--r--drivers/i2c/busses/i2c-omap.c4
-rw-r--r--drivers/i2c/busses/i2c-parport-light.c2
-rw-r--r--drivers/i2c/busses/i2c-parport.c2
-rw-r--r--drivers/i2c/busses/i2c-pca-isa.c2
-rw-r--r--drivers/i2c/busses/i2c-pnx.c708
-rw-r--r--drivers/i2c/busses/i2c-prosavage.c2
-rw-r--r--drivers/i2c/busses/i2c-savage4.c2
-rw-r--r--drivers/i2c/busses/i2c-versatile.c153
-rw-r--r--drivers/i2c/busses/i2c-via.c2
-rw-r--r--drivers/i2c/busses/i2c-voodoo3.c6
-rw-r--r--drivers/i2c/busses/scx200_i2c.c2
23 files changed, 1280 insertions, 389 deletions
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index 90f91d039ee2..e1989f3a2684 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -74,6 +74,13 @@ config I2C_AMD8111
74 This driver can also be built as a module. If so, the module 74 This driver can also be built as a module. If so, the module
75 will be called i2c-amd8111. 75 will be called i2c-amd8111.
76 76
77config I2C_AT91
78 tristate "Atmel AT91 I2C Two-Wire interface (TWI)"
79 depends on I2C && ARCH_AT91 && EXPERIMENTAL
80 help
81 This supports the use of the I2C interface on Atmel AT91
82 processors.
83
77config I2C_AU1550 84config I2C_AU1550
78 tristate "Au1550/Au1200 SMBus interface" 85 tristate "Au1550/Au1200 SMBus interface"
79 depends on I2C && (SOC_AU1550 || SOC_AU1200) 86 depends on I2C && (SOC_AU1550 || SOC_AU1200)
@@ -209,18 +216,6 @@ config I2C_ISA
209 tristate 216 tristate
210 depends on I2C 217 depends on I2C
211 218
212config I2C_ITE
213 tristate "ITE I2C Adapter"
214 depends on I2C && MIPS_ITE8172
215 select I2C_ALGOITE
216 help
217 This supports the ITE8172 I2C peripheral found on some MIPS
218 systems. Say Y if you have one of these. You should also say Y for
219 the ITE I2C driver algorithm support above.
220
221 This support is also available as a module. If so, the module
222 will be called i2c-ite.
223
224config I2C_IXP4XX 219config I2C_IXP4XX
225 tristate "IXP4xx GPIO-Based I2C Interface" 220 tristate "IXP4xx GPIO-Based I2C Interface"
226 depends on I2C && ARCH_IXP4XX 221 depends on I2C && ARCH_IXP4XX
@@ -481,6 +476,17 @@ config I2C_STUB
481 476
482 If you don't know what to do here, definitely say N. 477 If you don't know what to do here, definitely say N.
483 478
479config I2C_VERSATILE
480 tristate "ARM Versatile/Realview I2C bus support"
481 depends on I2C && (ARCH_VERSATILE || ARCH_REALVIEW)
482 select I2C_ALGOBIT
483 help
484 Say yes if you want to support the I2C serial bus on ARMs Versatile
485 range of platforms.
486
487 This driver can also be built as a module. If so, the module
488 will be called i2c-versatile.
489
484config I2C_VIA 490config I2C_VIA
485 tristate "VIA 82C586B" 491 tristate "VIA 82C586B"
486 depends on I2C && PCI && EXPERIMENTAL 492 depends on I2C && PCI && EXPERIMENTAL
@@ -548,4 +554,23 @@ config I2C_MV64XXX
548 This driver can also be built as a module. If so, the module 554 This driver can also be built as a module. If so, the module
549 will be called i2c-mv64xxx. 555 will be called i2c-mv64xxx.
550 556
557config I2C_PNX
558 tristate "I2C bus support for Philips PNX targets"
559 depends on ARCH_PNX4008 && I2C
560 help
561 This driver supports the Philips IP3204 I2C IP block master and/or
562 slave controller
563
564 This driver can also be built as a module. If so, the module
565 will be called i2c-pnx.
566
567config I2C_PNX_EARLY
568 bool "Early initialization for I2C on PNXxxxx"
569 depends on I2C_PNX=y
570 help
571 Under certain circumstances one may need to make sure I2C on PNXxxxx
572 is initialized earlier than some other driver that depends on it
573 (for instance, that might be USB in case of PNX4008). With this
574 option turned on you can guarantee that.
575
551endmenu 576endmenu
diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
index 493c87289b62..37196c1d0794 100644
--- a/drivers/i2c/busses/Makefile
+++ b/drivers/i2c/busses/Makefile
@@ -8,6 +8,7 @@ obj-$(CONFIG_I2C_ALI15X3) += i2c-ali15x3.o
8obj-$(CONFIG_I2C_AMD756) += i2c-amd756.o 8obj-$(CONFIG_I2C_AMD756) += i2c-amd756.o
9obj-$(CONFIG_I2C_AMD756_S4882) += i2c-amd756-s4882.o 9obj-$(CONFIG_I2C_AMD756_S4882) += i2c-amd756-s4882.o
10obj-$(CONFIG_I2C_AMD8111) += i2c-amd8111.o 10obj-$(CONFIG_I2C_AMD8111) += i2c-amd8111.o
11obj-$(CONFIG_I2C_AT91) += i2c-at91.o
11obj-$(CONFIG_I2C_AU1550) += i2c-au1550.o 12obj-$(CONFIG_I2C_AU1550) += i2c-au1550.o
12obj-$(CONFIG_I2C_ELEKTOR) += i2c-elektor.o 13obj-$(CONFIG_I2C_ELEKTOR) += i2c-elektor.o
13obj-$(CONFIG_I2C_HYDRA) += i2c-hydra.o 14obj-$(CONFIG_I2C_HYDRA) += i2c-hydra.o
@@ -16,7 +17,6 @@ obj-$(CONFIG_I2C_I810) += i2c-i810.o
16obj-$(CONFIG_I2C_IBM_IIC) += i2c-ibm_iic.o 17obj-$(CONFIG_I2C_IBM_IIC) += i2c-ibm_iic.o
17obj-$(CONFIG_I2C_IOP3XX) += i2c-iop3xx.o 18obj-$(CONFIG_I2C_IOP3XX) += i2c-iop3xx.o
18obj-$(CONFIG_I2C_ISA) += i2c-isa.o 19obj-$(CONFIG_I2C_ISA) += i2c-isa.o
19obj-$(CONFIG_I2C_ITE) += i2c-ite.o
20obj-$(CONFIG_I2C_IXP2000) += i2c-ixp2000.o 20obj-$(CONFIG_I2C_IXP2000) += i2c-ixp2000.o
21obj-$(CONFIG_I2C_IXP4XX) += i2c-ixp4xx.o 21obj-$(CONFIG_I2C_IXP4XX) += i2c-ixp4xx.o
22obj-$(CONFIG_I2C_POWERMAC) += i2c-powermac.o 22obj-$(CONFIG_I2C_POWERMAC) += i2c-powermac.o
@@ -29,6 +29,7 @@ obj-$(CONFIG_I2C_PARPORT) += i2c-parport.o
29obj-$(CONFIG_I2C_PARPORT_LIGHT) += i2c-parport-light.o 29obj-$(CONFIG_I2C_PARPORT_LIGHT) += i2c-parport-light.o
30obj-$(CONFIG_I2C_PCA_ISA) += i2c-pca-isa.o 30obj-$(CONFIG_I2C_PCA_ISA) += i2c-pca-isa.o
31obj-$(CONFIG_I2C_PIIX4) += i2c-piix4.o 31obj-$(CONFIG_I2C_PIIX4) += i2c-piix4.o
32obj-$(CONFIG_I2C_PNX) += i2c-pnx.o
32obj-$(CONFIG_I2C_PROSAVAGE) += i2c-prosavage.o 33obj-$(CONFIG_I2C_PROSAVAGE) += i2c-prosavage.o
33obj-$(CONFIG_I2C_PXA) += i2c-pxa.o 34obj-$(CONFIG_I2C_PXA) += i2c-pxa.o
34obj-$(CONFIG_I2C_RPXLITE) += i2c-rpx.o 35obj-$(CONFIG_I2C_RPXLITE) += i2c-rpx.o
@@ -39,6 +40,7 @@ obj-$(CONFIG_I2C_SIS5595) += i2c-sis5595.o
39obj-$(CONFIG_I2C_SIS630) += i2c-sis630.o 40obj-$(CONFIG_I2C_SIS630) += i2c-sis630.o
40obj-$(CONFIG_I2C_SIS96X) += i2c-sis96x.o 41obj-$(CONFIG_I2C_SIS96X) += i2c-sis96x.o
41obj-$(CONFIG_I2C_STUB) += i2c-stub.o 42obj-$(CONFIG_I2C_STUB) += i2c-stub.o
43obj-$(CONFIG_I2C_VERSATILE) += i2c-versatile.o
42obj-$(CONFIG_I2C_VIA) += i2c-via.o 44obj-$(CONFIG_I2C_VIA) += i2c-via.o
43obj-$(CONFIG_I2C_VIAPRO) += i2c-viapro.o 45obj-$(CONFIG_I2C_VIAPRO) += i2c-viapro.o
44obj-$(CONFIG_I2C_VOODOO3) += i2c-voodoo3.o 46obj-$(CONFIG_I2C_VOODOO3) += i2c-voodoo3.o
diff --git a/drivers/i2c/busses/i2c-at91.c b/drivers/i2c/busses/i2c-at91.c
new file mode 100644
index 000000000000..67f91bdda089
--- /dev/null
+++ b/drivers/i2c/busses/i2c-at91.c
@@ -0,0 +1,325 @@
1/*
2 i2c Support for Atmel's AT91 Two-Wire Interface (TWI)
3
4 Copyright (C) 2004 Rick Bronson
5 Converted to 2.6 by Andrew Victor <andrew@sanpeople.com>
6
7 Borrowed heavily from original work by:
8 Copyright (C) 2000 Philip Edelbrock <phil@stimpy.netroedge.com>
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or
13 (at your option) any later version.
14*/
15
16#include <linux/module.h>
17#include <linux/version.h>
18#include <linux/kernel.h>
19#include <linux/slab.h>
20#include <linux/pci.h>
21#include <linux/types.h>
22#include <linux/delay.h>
23#include <linux/i2c.h>
24#include <linux/init.h>
25#include <linux/clk.h>
26#include <linux/platform_device.h>
27
28#include <asm/io.h>
29
30#include <asm/arch/at91_twi.h>
31#include <asm/arch/board.h>
32#include <asm/arch/cpu.h>
33
34#define TWI_CLOCK 100000 /* Hz. max 400 Kbits/sec */
35
36
37static struct clk *twi_clk;
38static void __iomem *twi_base;
39
40#define at91_twi_read(reg) __raw_readl(twi_base + (reg))
41#define at91_twi_write(reg, val) __raw_writel((val), twi_base + (reg))
42
43
44/*
45 * Initialize the TWI hardware registers.
46 */
47static void __devinit at91_twi_hwinit(void)
48{
49 unsigned long cdiv, ckdiv;
50
51 at91_twi_write(AT91_TWI_IDR, 0xffffffff); /* Disable all interrupts */
52 at91_twi_write(AT91_TWI_CR, AT91_TWI_SWRST); /* Reset peripheral */
53 at91_twi_write(AT91_TWI_CR, AT91_TWI_MSEN); /* Set Master mode */
54
55 /* Calcuate clock dividers */
56 cdiv = (clk_get_rate(twi_clk) / (2 * TWI_CLOCK)) - 3;
57 cdiv = cdiv + 1; /* round up */
58 ckdiv = 0;
59 while (cdiv > 255) {
60 ckdiv++;
61 cdiv = cdiv >> 1;
62 }
63
64 if (cpu_is_at91rm9200()) { /* AT91RM9200 Errata #22 */
65 if (ckdiv > 5) {
66 printk(KERN_ERR "AT91 I2C: Invalid TWI_CLOCK value!\n");
67 ckdiv = 5;
68 }
69 }
70
71 at91_twi_write(AT91_TWI_CWGR, (ckdiv << 16) | (cdiv << 8) | cdiv);
72}
73
74/*
75 * Poll the i2c status register until the specified bit is set.
76 * Returns 0 if timed out (100 msec).
77 */
78static short at91_poll_status(unsigned long bit)
79{
80 int loop_cntr = 10000;
81
82 do {
83 udelay(10);
84 } while (!(at91_twi_read(AT91_TWI_SR) & bit) && (--loop_cntr > 0));
85
86 return (loop_cntr > 0);
87}
88
89static int xfer_read(struct i2c_adapter *adap, unsigned char *buf, int length)
90{
91 /* Send Start */
92 at91_twi_write(AT91_TWI_CR, AT91_TWI_START);
93
94 /* Read data */
95 while (length--) {
96 if (!length) /* need to send Stop before reading last byte */
97 at91_twi_write(AT91_TWI_CR, AT91_TWI_STOP);
98 if (!at91_poll_status(AT91_TWI_RXRDY)) {
99 dev_dbg(&adap->dev, "RXRDY timeout\n");
100 return -ETIMEDOUT;
101 }
102 *buf++ = (at91_twi_read(AT91_TWI_RHR) & 0xff);
103 }
104
105 return 0;
106}
107
108static int xfer_write(struct i2c_adapter *adap, unsigned char *buf, int length)
109{
110 /* Load first byte into transmitter */
111 at91_twi_write(AT91_TWI_THR, *buf++);
112
113 /* Send Start */
114 at91_twi_write(AT91_TWI_CR, AT91_TWI_START);
115
116 do {
117 if (!at91_poll_status(AT91_TWI_TXRDY)) {
118 dev_dbg(&adap->dev, "TXRDY timeout\n");
119 return -ETIMEDOUT;
120 }
121
122 length--; /* byte was transmitted */
123
124 if (length > 0) /* more data to send? */
125 at91_twi_write(AT91_TWI_THR, *buf++);
126 } while (length);
127
128 /* Send Stop */
129 at91_twi_write(AT91_TWI_CR, AT91_TWI_STOP);
130
131 return 0;
132}
133
134/*
135 * Generic i2c master transfer entrypoint.
136 *
137 * Note: We do not use Atmel's feature of storing the "internal device address".
138 * Instead the "internal device address" has to be written using a seperate
139 * i2c message.
140 * http://lists.arm.linux.org.uk/pipermail/linux-arm-kernel/2004-September/024411.html
141 */
142static int at91_xfer(struct i2c_adapter *adap, struct i2c_msg *pmsg, int num)
143{
144 int i, ret;
145
146 dev_dbg(&adap->dev, "at91_xfer: processing %d messages:\n", num);
147
148 for (i = 0; i < num; i++) {
149 dev_dbg(&adap->dev, " #%d: %sing %d byte%s %s 0x%02x\n", i,
150 pmsg->flags & I2C_M_RD ? "read" : "writ",
151 pmsg->len, pmsg->len > 1 ? "s" : "",
152 pmsg->flags & I2C_M_RD ? "from" : "to", pmsg->addr);
153
154 at91_twi_write(AT91_TWI_MMR, (pmsg->addr << 16)
155 | ((pmsg->flags & I2C_M_RD) ? AT91_TWI_MREAD : 0));
156
157 if (pmsg->len && pmsg->buf) { /* sanity check */
158 if (pmsg->flags & I2C_M_RD)
159 ret = xfer_read(adap, pmsg->buf, pmsg->len);
160 else
161 ret = xfer_write(adap, pmsg->buf, pmsg->len);
162
163 if (ret)
164 return ret;
165
166 /* Wait until transfer is finished */
167 if (!at91_poll_status(AT91_TWI_TXCOMP)) {
168 dev_dbg(&adap->dev, "TXCOMP timeout\n");
169 return -ETIMEDOUT;
170 }
171 }
172 dev_dbg(&adap->dev, "transfer complete\n");
173 pmsg++; /* next message */
174 }
175 return i;
176}
177
178/*
179 * Return list of supported functionality.
180 */
181static u32 at91_func(struct i2c_adapter *adapter)
182{
183 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
184}
185
186static struct i2c_algorithm at91_algorithm = {
187 .master_xfer = at91_xfer,
188 .functionality = at91_func,
189};
190
191/*
192 * Main initialization routine.
193 */
194static int __devinit at91_i2c_probe(struct platform_device *pdev)
195{
196 struct i2c_adapter *adapter;
197 struct resource *res;
198 int rc;
199
200 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
201 if (!res)
202 return -ENXIO;
203
204 if (!request_mem_region(res->start, res->end - res->start + 1, "at91_i2c"))
205 return -EBUSY;
206
207 twi_base = ioremap(res->start, res->end - res->start + 1);
208 if (!twi_base) {
209 rc = -ENOMEM;
210 goto fail0;
211 }
212
213 twi_clk = clk_get(NULL, "twi_clk");
214 if (IS_ERR(twi_clk)) {
215 dev_err(&pdev->dev, "no clock defined\n");
216 rc = -ENODEV;
217 goto fail1;
218 }
219
220 adapter = kzalloc(sizeof(struct i2c_adapter), GFP_KERNEL);
221 if (adapter == NULL) {
222 dev_err(&pdev->dev, "can't allocate inteface!\n");
223 rc = -ENOMEM;
224 goto fail2;
225 }
226 sprintf(adapter->name, "AT91");
227 adapter->algo = &at91_algorithm;
228 adapter->class = I2C_CLASS_HWMON;
229 adapter->dev.parent = &pdev->dev;
230
231 platform_set_drvdata(pdev, adapter);
232
233 clk_enable(twi_clk); /* enable peripheral clock */
234 at91_twi_hwinit(); /* initialize TWI controller */
235
236 rc = i2c_add_adapter(adapter);
237 if (rc) {
238 dev_err(&pdev->dev, "Adapter %s registration failed\n",
239 adapter->name);
240 goto fail3;
241 }
242
243 dev_info(&pdev->dev, "AT91 i2c bus driver.\n");
244 return 0;
245
246fail3:
247 platform_set_drvdata(pdev, NULL);
248 kfree(adapter);
249 clk_disable(twi_clk);
250fail2:
251 clk_put(twi_clk);
252fail1:
253 iounmap(twi_base);
254fail0:
255 release_mem_region(res->start, res->end - res->start + 1);
256
257 return rc;
258}
259
260static int __devexit at91_i2c_remove(struct platform_device *pdev)
261{
262 struct i2c_adapter *adapter = platform_get_drvdata(pdev);
263 struct resource *res;
264 int rc;
265
266 rc = i2c_del_adapter(adapter);
267 platform_set_drvdata(pdev, NULL);
268
269 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
270 iounmap(twi_base);
271 release_mem_region(res->start, res->end - res->start + 1);
272
273 clk_disable(twi_clk); /* disable peripheral clock */
274 clk_put(twi_clk);
275
276 return rc;
277}
278
279#ifdef CONFIG_PM
280
281/* NOTE: could save a few mA by keeping clock off outside of at91_xfer... */
282
283static int at91_i2c_suspend(struct platform_device *pdev, pm_message_t mesg)
284{
285 clk_disable(twi_clk);
286 return 0;
287}
288
289static int at91_i2c_resume(struct platform_device *pdev)
290{
291 return clk_enable(twi_clk);
292}
293
294#else
295#define at91_i2c_suspend NULL
296#define at91_i2c_resume NULL
297#endif
298
299static struct platform_driver at91_i2c_driver = {
300 .probe = at91_i2c_probe,
301 .remove = __devexit_p(at91_i2c_remove),
302 .suspend = at91_i2c_suspend,
303 .resume = at91_i2c_resume,
304 .driver = {
305 .name = "at91_i2c",
306 .owner = THIS_MODULE,
307 },
308};
309
310static int __init at91_i2c_init(void)
311{
312 return platform_driver_register(&at91_i2c_driver);
313}
314
315static void __exit at91_i2c_exit(void)
316{
317 platform_driver_unregister(&at91_i2c_driver);
318}
319
320module_init(at91_i2c_init);
321module_exit(at91_i2c_exit);
322
323MODULE_AUTHOR("Rick Bronson");
324MODULE_DESCRIPTION("I2C (TWI) driver for Atmel AT91");
325MODULE_LICENSE("GPL");
diff --git a/drivers/i2c/busses/i2c-elektor.c b/drivers/i2c/busses/i2c-elektor.c
index a591fe685f06..834967464814 100644
--- a/drivers/i2c/busses/i2c-elektor.c
+++ b/drivers/i2c/busses/i2c-elektor.c
@@ -293,7 +293,7 @@ static int __init i2c_pcfisa_init(void)
293 293
294static void i2c_pcfisa_exit(void) 294static void i2c_pcfisa_exit(void)
295{ 295{
296 i2c_pcf_del_bus(&pcf_isa_ops); 296 i2c_del_adapter(&pcf_isa_ops);
297 297
298 if (irq > 0) { 298 if (irq > 0) {
299 disable_irq(irq); 299 disable_irq(irq);
diff --git a/drivers/i2c/busses/i2c-hydra.c b/drivers/i2c/busses/i2c-hydra.c
index 457d48a0ab9d..9832f773651d 100644
--- a/drivers/i2c/busses/i2c-hydra.c
+++ b/drivers/i2c/busses/i2c-hydra.c
@@ -146,7 +146,7 @@ static int __devinit hydra_probe(struct pci_dev *dev,
146static void __devexit hydra_remove(struct pci_dev *dev) 146static void __devexit hydra_remove(struct pci_dev *dev)
147{ 147{
148 pdregw(hydra_bit_data.data, 0); /* clear SCLK_OE and SDAT_OE */ 148 pdregw(hydra_bit_data.data, 0); /* clear SCLK_OE and SDAT_OE */
149 i2c_bit_del_bus(&hydra_adap); 149 i2c_del_adapter(&hydra_adap);
150 iounmap(hydra_bit_data.data); 150 iounmap(hydra_bit_data.data);
151 release_mem_region(pci_resource_start(dev, 0)+ 151 release_mem_region(pci_resource_start(dev, 0)+
152 offsetof(struct Hydra, CachePD), 4); 152 offsetof(struct Hydra, CachePD), 4);
diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c
index c7be2fdbd86b..ae625b854470 100644
--- a/drivers/i2c/busses/i2c-i801.c
+++ b/drivers/i2c/busses/i2c-i801.c
@@ -470,12 +470,20 @@ static int __devinit i801_probe(struct pci_dev *dev, const struct pci_device_id
470 int err; 470 int err;
471 471
472 I801_dev = dev; 472 I801_dev = dev;
473 if ((dev->device == PCI_DEVICE_ID_INTEL_82801DB_3) || 473 switch (dev->device) {
474 (dev->device == PCI_DEVICE_ID_INTEL_82801EB_3) || 474 case PCI_DEVICE_ID_INTEL_82801DB_3:
475 (dev->device == PCI_DEVICE_ID_INTEL_ESB_4)) 475 case PCI_DEVICE_ID_INTEL_82801EB_3:
476 case PCI_DEVICE_ID_INTEL_ESB_4:
477 case PCI_DEVICE_ID_INTEL_ICH6_16:
478 case PCI_DEVICE_ID_INTEL_ICH7_17:
479 case PCI_DEVICE_ID_INTEL_ESB2_17:
480 case PCI_DEVICE_ID_INTEL_ICH8_5:
481 case PCI_DEVICE_ID_INTEL_ICH9_6:
476 isich4 = 1; 482 isich4 = 1;
477 else 483 break;
484 default:
478 isich4 = 0; 485 isich4 = 0;
486 }
479 487
480 err = pci_enable_device(dev); 488 err = pci_enable_device(dev);
481 if (err) { 489 if (err) {
diff --git a/drivers/i2c/busses/i2c-i810.c b/drivers/i2c/busses/i2c-i810.c
index b66fb6bb1870..10c98bc88aa6 100644
--- a/drivers/i2c/busses/i2c-i810.c
+++ b/drivers/i2c/busses/i2c-i810.c
@@ -219,14 +219,14 @@ static int __devinit i810_probe(struct pci_dev *dev, const struct pci_device_id
219 return retval; 219 return retval;
220 retval = i2c_bit_add_bus(&i810_ddc_adapter); 220 retval = i2c_bit_add_bus(&i810_ddc_adapter);
221 if (retval) 221 if (retval)
222 i2c_bit_del_bus(&i810_i2c_adapter); 222 i2c_del_adapter(&i810_i2c_adapter);
223 return retval; 223 return retval;
224} 224}
225 225
226static void __devexit i810_remove(struct pci_dev *dev) 226static void __devexit i810_remove(struct pci_dev *dev)
227{ 227{
228 i2c_bit_del_bus(&i810_ddc_adapter); 228 i2c_del_adapter(&i810_ddc_adapter);
229 i2c_bit_del_bus(&i810_i2c_adapter); 229 i2c_del_adapter(&i810_i2c_adapter);
230 iounmap(ioaddr); 230 iounmap(ioaddr);
231} 231}
232 232
diff --git a/drivers/i2c/busses/i2c-ibm_iic.c b/drivers/i2c/busses/i2c-ibm_iic.c
index 781a99c1647a..1898e9987021 100644
--- a/drivers/i2c/busses/i2c-ibm_iic.c
+++ b/drivers/i2c/busses/i2c-ibm_iic.c
@@ -680,6 +680,12 @@ static int __devinit iic_probe(struct ocp_device *ocp){
680 dev->idx = ocp->def->index; 680 dev->idx = ocp->def->index;
681 ocp_set_drvdata(ocp, dev); 681 ocp_set_drvdata(ocp, dev);
682 682
683 if (!request_mem_region(ocp->def->paddr, sizeof(struct iic_regs),
684 "ibm_iic")) {
685 ret = -EBUSY;
686 goto fail1;
687 }
688
683 if (!(dev->vaddr = ioremap(ocp->def->paddr, sizeof(struct iic_regs)))){ 689 if (!(dev->vaddr = ioremap(ocp->def->paddr, sizeof(struct iic_regs)))){
684 printk(KERN_CRIT "ibm-iic%d: failed to ioremap device registers\n", 690 printk(KERN_CRIT "ibm-iic%d: failed to ioremap device registers\n",
685 dev->idx); 691 dev->idx);
@@ -750,6 +756,8 @@ fail:
750 756
751 iounmap(dev->vaddr); 757 iounmap(dev->vaddr);
752fail2: 758fail2:
759 release_mem_region(ocp->def->paddr, sizeof(struct iic_regs));
760fail1:
753 ocp_set_drvdata(ocp, NULL); 761 ocp_set_drvdata(ocp, NULL);
754 kfree(dev); 762 kfree(dev);
755 return ret; 763 return ret;
@@ -777,6 +785,7 @@ static void __devexit iic_remove(struct ocp_device *ocp)
777 free_irq(dev->irq, dev); 785 free_irq(dev->irq, dev);
778 } 786 }
779 iounmap(dev->vaddr); 787 iounmap(dev->vaddr);
788 release_mem_region(ocp->def->paddr, sizeof(struct iic_regs));
780 kfree(dev); 789 kfree(dev);
781 } 790 }
782} 791}
diff --git a/drivers/i2c/busses/i2c-ite.c b/drivers/i2c/busses/i2c-ite.c
deleted file mode 100644
index f7d71869b3b9..000000000000
--- a/drivers/i2c/busses/i2c-ite.c
+++ /dev/null
@@ -1,278 +0,0 @@
1/*
2 -------------------------------------------------------------------------
3 i2c-adap-ite.c i2c-hw access for the IIC peripheral on the ITE MIPS system
4 -------------------------------------------------------------------------
5 Hai-Pao Fan, MontaVista Software, Inc.
6 hpfan@mvista.com or source@mvista.com
7
8 Copyright 2001 MontaVista Software Inc.
9
10 ----------------------------------------------------------------------------
11 This file was highly leveraged from i2c-elektor.c, which was created
12 by Simon G. Vogl and Hans Berglund:
13
14
15 Copyright (C) 1995-97 Simon G. Vogl
16 1998-99 Hans Berglund
17
18 This program is free software; you can redistribute it and/or modify
19 it under the terms of the GNU General Public License as published by
20 the Free Software Foundation; either version 2 of the License, or
21 (at your option) any later version.
22
23 This program is distributed in the hope that it will be useful,
24 but WITHOUT ANY WARRANTY; without even the implied warranty of
25 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 GNU General Public License for more details.
27
28 You should have received a copy of the GNU General Public License
29 along with this program; if not, write to the Free Software
30 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
31/* ------------------------------------------------------------------------- */
32
33/* With some changes from Kyösti Mälkki <kmalkki@cc.hut.fi> and even
34 Frodo Looijaard <frodol@dds.nl> */
35
36#include <linux/kernel.h>
37#include <linux/ioport.h>
38#include <linux/module.h>
39#include <linux/delay.h>
40#include <linux/slab.h>
41#include <linux/init.h>
42#include <linux/wait.h>
43#include <asm/irq.h>
44#include <asm/io.h>
45
46#include <linux/i2c.h>
47#include <linux/i2c-algo-ite.h>
48#include <linux/i2c-adap-ite.h>
49#include "../i2c-ite.h"
50
51#define DEFAULT_BASE 0x14014030
52#define ITE_IIC_IO_SIZE 0x40
53#define DEFAULT_IRQ 0
54#define DEFAULT_CLOCK 0x1b0e /* default 16MHz/(27+14) = 400KHz */
55#define DEFAULT_OWN 0x55
56
57static int base;
58static int irq;
59static int clock;
60static int own;
61
62static struct iic_ite gpi;
63static wait_queue_head_t iic_wait;
64static int iic_pending;
65static spinlock_t lock;
66
67/* ----- local functions ---------------------------------------------- */
68
69static void iic_ite_setiic(void *data, int ctl, short val)
70{
71 unsigned long j = jiffies + 10;
72
73 pr_debug(" Write 0x%02x to 0x%x\n",(unsigned short)val, ctl&0xff);
74#ifdef DEBUG
75 while (time_before(jiffies, j))
76 schedule();
77#endif
78 outw(val,ctl);
79}
80
81static short iic_ite_getiic(void *data, int ctl)
82{
83 short val;
84
85 val = inw(ctl);
86 pr_debug("Read 0x%02x from 0x%x\n",(unsigned short)val, ctl&0xff);
87 return (val);
88}
89
90/* Return our slave address. This is the address
91 * put on the I2C bus when another master on the bus wants to address us
92 * as a slave
93 */
94static int iic_ite_getown(void *data)
95{
96 return (gpi.iic_own);
97}
98
99
100static int iic_ite_getclock(void *data)
101{
102 return (gpi.iic_clock);
103}
104
105
106/* Put this process to sleep. We will wake up when the
107 * IIC controller interrupts.
108 */
109static void iic_ite_waitforpin(void) {
110 DEFINE_WAIT(wait);
111 int timeout = 2;
112 unsigned long flags;
113
114 /* If interrupts are enabled (which they are), then put the process to
115 * sleep. This process will be awakened by two events -- either the
116 * the IIC peripheral interrupts or the timeout expires.
117 * If interrupts are not enabled then delay for a reasonable amount
118 * of time and return.
119 */
120 if (gpi.iic_irq > 0) {
121 spin_lock_irqsave(&lock, flags);
122 if (iic_pending == 0) {
123 spin_unlock_irqrestore(&lock, flags);
124 prepare_to_wait(&iic_wait, &wait, TASK_INTERRUPTIBLE);
125 if (schedule_timeout(timeout*HZ)) {
126 spin_lock_irqsave(&lock, flags);
127 if (iic_pending == 1) {
128 iic_pending = 0;
129 }
130 spin_unlock_irqrestore(&lock, flags);
131 }
132 finish_wait(&iic_wait, &wait);
133 } else {
134 iic_pending = 0;
135 spin_unlock_irqrestore(&lock, flags);
136 }
137 } else {
138 udelay(100);
139 }
140}
141
142
143static irqreturn_t iic_ite_handler(int this_irq, void *dev_id)
144{
145 spin_lock(&lock);
146 iic_pending = 1;
147 spin_unlock(&lock);
148
149 wake_up_interruptible(&iic_wait);
150
151 return IRQ_HANDLED;
152}
153
154
155/* Lock the region of memory where I/O registers exist. Request our
156 * interrupt line and register its associated handler.
157 */
158static int iic_hw_resrc_init(void)
159{
160 if (!request_region(gpi.iic_base, ITE_IIC_IO_SIZE, "i2c"))
161 return -ENODEV;
162
163 if (gpi.iic_irq <= 0)
164 return 0;
165
166 if (request_irq(gpi.iic_irq, iic_ite_handler, 0, "ITE IIC", 0) < 0)
167 gpi.iic_irq = 0;
168 else
169 enable_irq(gpi.iic_irq);
170
171 return 0;
172}
173
174
175static void iic_ite_release(void)
176{
177 if (gpi.iic_irq > 0) {
178 disable_irq(gpi.iic_irq);
179 free_irq(gpi.iic_irq, 0);
180 }
181 release_region(gpi.iic_base , 2);
182}
183
184/* ------------------------------------------------------------------------
185 * Encapsulate the above functions in the correct operations structure.
186 * This is only done when more than one hardware adapter is supported.
187 */
188static struct i2c_algo_iic_data iic_ite_data = {
189 NULL,
190 iic_ite_setiic,
191 iic_ite_getiic,
192 iic_ite_getown,
193 iic_ite_getclock,
194 iic_ite_waitforpin,
195 80, 80, 100, /* waits, timeout */
196};
197
198static struct i2c_adapter iic_ite_ops = {
199 .owner = THIS_MODULE,
200 .id = I2C_HW_I_IIC,
201 .algo_data = &iic_ite_data,
202 .name = "ITE IIC adapter",
203};
204
205/* Called when the module is loaded. This function starts the
206 * cascade of calls up through the hierarchy of i2c modules (i.e. up to the
207 * algorithm layer and into to the core layer)
208 */
209static int __init iic_ite_init(void)
210{
211
212 struct iic_ite *piic = &gpi;
213
214 printk(KERN_INFO "Initialize ITE IIC adapter module\n");
215 if (base == 0)
216 piic->iic_base = DEFAULT_BASE;
217 else
218 piic->iic_base = base;
219
220 if (irq == 0)
221 piic->iic_irq = DEFAULT_IRQ;
222 else
223 piic->iic_irq = irq;
224
225 if (clock == 0)
226 piic->iic_clock = DEFAULT_CLOCK;
227 else
228 piic->iic_clock = clock;
229
230 if (own == 0)
231 piic->iic_own = DEFAULT_OWN;
232 else
233 piic->iic_own = own;
234
235 iic_ite_data.data = (void *)piic;
236 init_waitqueue_head(&iic_wait);
237 spin_lock_init(&lock);
238 if (iic_hw_resrc_init() == 0) {
239 if (i2c_iic_add_bus(&iic_ite_ops) < 0)
240 return -ENODEV;
241 } else {
242 return -ENODEV;
243 }
244 printk(KERN_INFO " found device at %#x irq %d.\n",
245 piic->iic_base, piic->iic_irq);
246 return 0;
247}
248
249
250static void iic_ite_exit(void)
251{
252 i2c_iic_del_bus(&iic_ite_ops);
253 iic_ite_release();
254}
255
256/* If modules is NOT defined when this file is compiled, then the MODULE_*
257 * macros will resolve to nothing
258 */
259MODULE_AUTHOR("MontaVista Software <www.mvista.com>");
260MODULE_DESCRIPTION("I2C-Bus adapter routines for ITE IIC bus adapter");
261MODULE_LICENSE("GPL");
262
263module_param(base, int, 0);
264module_param(irq, int, 0);
265module_param(clock, int, 0);
266module_param(own, int, 0);
267
268
269/* Called when module is loaded or when kernel is initialized.
270 * If MODULES is defined when this file is compiled, then this function will
271 * resolve to init_module (the function called when insmod is invoked for a
272 * module). Otherwise, this function is called early in the boot, when the
273 * kernel is intialized. Check out /include/init.h to see how this works.
274 */
275module_init(iic_ite_init);
276
277/* Resolves to module_cleanup when MODULES is defined. */
278module_exit(iic_ite_exit);
diff --git a/drivers/i2c/busses/i2c-ixp2000.c b/drivers/i2c/busses/i2c-ixp2000.c
index dd3f4cd3aa68..efa3ecc5522a 100644
--- a/drivers/i2c/busses/i2c-ixp2000.c
+++ b/drivers/i2c/busses/i2c-ixp2000.c
@@ -90,7 +90,7 @@ static int ixp2000_i2c_remove(struct platform_device *plat_dev)
90 90
91 platform_set_drvdata(plat_dev, NULL); 91 platform_set_drvdata(plat_dev, NULL);
92 92
93 i2c_bit_del_bus(&drv_data->adapter); 93 i2c_del_adapter(&drv_data->adapter);
94 94
95 kfree(drv_data); 95 kfree(drv_data);
96 96
diff --git a/drivers/i2c/busses/i2c-ixp4xx.c b/drivers/i2c/busses/i2c-ixp4xx.c
index 68fe863f9d54..08e89b83984a 100644
--- a/drivers/i2c/busses/i2c-ixp4xx.c
+++ b/drivers/i2c/busses/i2c-ixp4xx.c
@@ -91,7 +91,7 @@ static int ixp4xx_i2c_remove(struct platform_device *plat_dev)
91 91
92 platform_set_drvdata(plat_dev, NULL); 92 platform_set_drvdata(plat_dev, NULL);
93 93
94 i2c_bit_del_bus(&drv_data->adapter); 94 i2c_del_adapter(&drv_data->adapter);
95 95
96 kfree(drv_data); 96 kfree(drv_data);
97 97
diff --git a/drivers/i2c/busses/i2c-nforce2.c b/drivers/i2c/busses/i2c-nforce2.c
index e0292e414ab2..ad37c10e7fec 100644
--- a/drivers/i2c/busses/i2c-nforce2.c
+++ b/drivers/i2c/busses/i2c-nforce2.c
@@ -35,7 +35,7 @@
35 nForce4 MCP55 0368 35 nForce4 MCP55 0368
36 36
37 This driver supports the 2 SMBuses that are included in the MCP of the 37 This driver supports the 2 SMBuses that are included in the MCP of the
38 nForce2/3/4 chipsets. 38 nForce2/3/4/5xx chipsets.
39*/ 39*/
40 40
41/* Note: we assume there can only be one nForce2, with two SMBus interfaces */ 41/* Note: we assume there can only be one nForce2, with two SMBus interfaces */
@@ -52,8 +52,8 @@
52#include <asm/io.h> 52#include <asm/io.h>
53 53
54MODULE_LICENSE("GPL"); 54MODULE_LICENSE("GPL");
55MODULE_AUTHOR ("Hans-Frieder Vogt <hfvogt@arcor.de>"); 55MODULE_AUTHOR ("Hans-Frieder Vogt <hfvogt@gmx.net>");
56MODULE_DESCRIPTION("nForce2 SMBus driver"); 56MODULE_DESCRIPTION("nForce2/3/4/5xx SMBus driver");
57 57
58 58
59struct nforce2_smbus { 59struct nforce2_smbus {
@@ -80,9 +80,6 @@ struct nforce2_smbus {
80#define NVIDIA_SMB_ADDR (smbus->base + 0x02) /* address */ 80#define NVIDIA_SMB_ADDR (smbus->base + 0x02) /* address */
81#define NVIDIA_SMB_CMD (smbus->base + 0x03) /* command */ 81#define NVIDIA_SMB_CMD (smbus->base + 0x03) /* command */
82#define NVIDIA_SMB_DATA (smbus->base + 0x04) /* 32 data registers */ 82#define NVIDIA_SMB_DATA (smbus->base + 0x04) /* 32 data registers */
83#define NVIDIA_SMB_BCNT (smbus->base + 0x24) /* number of data bytes */
84#define NVIDIA_SMB_ALRM_A (smbus->base + 0x25) /* alarm address */
85#define NVIDIA_SMB_ALRM_D (smbus->base + 0x26) /* 2 bytes alarm data */
86 83
87#define NVIDIA_SMB_STS_DONE 0x80 84#define NVIDIA_SMB_STS_DONE 0x80
88#define NVIDIA_SMB_STS_ALRM 0x40 85#define NVIDIA_SMB_STS_ALRM 0x40
@@ -95,40 +92,17 @@ struct nforce2_smbus {
95#define NVIDIA_SMB_PRTCL_BYTE 0x04 92#define NVIDIA_SMB_PRTCL_BYTE 0x04
96#define NVIDIA_SMB_PRTCL_BYTE_DATA 0x06 93#define NVIDIA_SMB_PRTCL_BYTE_DATA 0x06
97#define NVIDIA_SMB_PRTCL_WORD_DATA 0x08 94#define NVIDIA_SMB_PRTCL_WORD_DATA 0x08
98#define NVIDIA_SMB_PRTCL_BLOCK_DATA 0x0a
99#define NVIDIA_SMB_PRTCL_PROC_CALL 0x0c
100#define NVIDIA_SMB_PRTCL_BLOCK_PROC_CALL 0x0d
101#define NVIDIA_SMB_PRTCL_I2C_BLOCK_DATA 0x4a
102#define NVIDIA_SMB_PRTCL_PEC 0x80 95#define NVIDIA_SMB_PRTCL_PEC 0x80
103 96
104static struct pci_driver nforce2_driver; 97static struct pci_driver nforce2_driver;
105 98
106static s32 nforce2_access(struct i2c_adapter *adap, u16 addr, 99/* Return -1 on error */
107 unsigned short flags, char read_write,
108 u8 command, int size, union i2c_smbus_data *data);
109static u32 nforce2_func(struct i2c_adapter *adapter);
110
111
112static const struct i2c_algorithm smbus_algorithm = {
113 .smbus_xfer = nforce2_access,
114 .functionality = nforce2_func,
115};
116
117static struct i2c_adapter nforce2_adapter = {
118 .owner = THIS_MODULE,
119 .class = I2C_CLASS_HWMON,
120 .algo = &smbus_algorithm,
121};
122
123/* Return -1 on error. See smbus.h for more information */
124static s32 nforce2_access(struct i2c_adapter * adap, u16 addr, 100static s32 nforce2_access(struct i2c_adapter * adap, u16 addr,
125 unsigned short flags, char read_write, 101 unsigned short flags, char read_write,
126 u8 command, int size, union i2c_smbus_data * data) 102 u8 command, int size, union i2c_smbus_data * data)
127{ 103{
128 struct nforce2_smbus *smbus = adap->algo_data; 104 struct nforce2_smbus *smbus = adap->algo_data;
129 unsigned char protocol, pec, temp; 105 unsigned char protocol, pec, temp;
130 unsigned char len = 0; /* to keep the compiler quiet */
131 int i;
132 106
133 protocol = (read_write == I2C_SMBUS_READ) ? NVIDIA_SMB_PRTCL_READ : 107 protocol = (read_write == I2C_SMBUS_READ) ? NVIDIA_SMB_PRTCL_READ :
134 NVIDIA_SMB_PRTCL_WRITE; 108 NVIDIA_SMB_PRTCL_WRITE;
@@ -163,35 +137,6 @@ static s32 nforce2_access(struct i2c_adapter * adap, u16 addr,
163 protocol |= NVIDIA_SMB_PRTCL_WORD_DATA | pec; 137 protocol |= NVIDIA_SMB_PRTCL_WORD_DATA | pec;
164 break; 138 break;
165 139
166 case I2C_SMBUS_BLOCK_DATA:
167 outb_p(command, NVIDIA_SMB_CMD);
168 if (read_write == I2C_SMBUS_WRITE) {
169 len = min_t(u8, data->block[0], 32);
170 outb_p(len, NVIDIA_SMB_BCNT);
171 for (i = 0; i < len; i++)
172 outb_p(data->block[i + 1], NVIDIA_SMB_DATA+i);
173 }
174 protocol |= NVIDIA_SMB_PRTCL_BLOCK_DATA | pec;
175 break;
176
177 case I2C_SMBUS_I2C_BLOCK_DATA:
178 len = min_t(u8, data->block[0], 32);
179 outb_p(command, NVIDIA_SMB_CMD);
180 outb_p(len, NVIDIA_SMB_BCNT);
181 if (read_write == I2C_SMBUS_WRITE)
182 for (i = 0; i < len; i++)
183 outb_p(data->block[i + 1], NVIDIA_SMB_DATA+i);
184 protocol |= NVIDIA_SMB_PRTCL_I2C_BLOCK_DATA;
185 break;
186
187 case I2C_SMBUS_PROC_CALL:
188 dev_err(&adap->dev, "I2C_SMBUS_PROC_CALL not supported!\n");
189 return -1;
190
191 case I2C_SMBUS_BLOCK_PROC_CALL:
192 dev_err(&adap->dev, "I2C_SMBUS_BLOCK_PROC_CALL not supported!\n");
193 return -1;
194
195 default: 140 default:
196 dev_err(&adap->dev, "Unsupported transaction %d\n", size); 141 dev_err(&adap->dev, "Unsupported transaction %d\n", size);
197 return -1; 142 return -1;
@@ -227,19 +172,8 @@ static s32 nforce2_access(struct i2c_adapter * adap, u16 addr,
227 break; 172 break;
228 173
229 case I2C_SMBUS_WORD_DATA: 174 case I2C_SMBUS_WORD_DATA:
230 /* case I2C_SMBUS_PROC_CALL: not supported */
231 data->word = inb_p(NVIDIA_SMB_DATA) | (inb_p(NVIDIA_SMB_DATA+1) << 8); 175 data->word = inb_p(NVIDIA_SMB_DATA) | (inb_p(NVIDIA_SMB_DATA+1) << 8);
232 break; 176 break;
233
234 case I2C_SMBUS_BLOCK_DATA:
235 /* case I2C_SMBUS_BLOCK_PROC_CALL: not supported */
236 len = inb_p(NVIDIA_SMB_BCNT);
237 len = min_t(u8, len, 32);
238 case I2C_SMBUS_I2C_BLOCK_DATA:
239 for (i = 0; i < len; i++)
240 data->block[i+1] = inb_p(NVIDIA_SMB_DATA + i);
241 data->block[0] = len;
242 break;
243 } 177 }
244 178
245 return 0; 179 return 0;
@@ -250,10 +184,14 @@ static u32 nforce2_func(struct i2c_adapter *adapter)
250{ 184{
251 /* other functionality might be possible, but is not tested */ 185 /* other functionality might be possible, but is not tested */
252 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | 186 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
253 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA /* | 187 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA;
254 I2C_FUNC_SMBUS_BLOCK_DATA */;
255} 188}
256 189
190static struct i2c_algorithm smbus_algorithm = {
191 .smbus_xfer = nforce2_access,
192 .functionality = nforce2_func,
193};
194
257 195
258static struct pci_device_id nforce2_ids[] = { 196static struct pci_device_id nforce2_ids[] = {
259 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS) }, 197 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS) },
@@ -267,7 +205,6 @@ static struct pci_device_id nforce2_ids[] = {
267 { 0 } 205 { 0 }
268}; 206};
269 207
270
271MODULE_DEVICE_TABLE (pci, nforce2_ids); 208MODULE_DEVICE_TABLE (pci, nforce2_ids);
272 209
273 210
@@ -291,7 +228,7 @@ static int __devinit nforce2_probe_smb (struct pci_dev *dev, int bar,
291 } 228 }
292 229
293 smbus->base = iobase & PCI_BASE_ADDRESS_IO_MASK; 230 smbus->base = iobase & PCI_BASE_ADDRESS_IO_MASK;
294 smbus->size = 8; 231 smbus->size = 64;
295 } 232 }
296 smbus->dev = dev; 233 smbus->dev = dev;
297 234
@@ -300,7 +237,9 @@ static int __devinit nforce2_probe_smb (struct pci_dev *dev, int bar,
300 smbus->base, smbus->base+smbus->size-1, name); 237 smbus->base, smbus->base+smbus->size-1, name);
301 return -1; 238 return -1;
302 } 239 }
303 smbus->adapter = nforce2_adapter; 240 smbus->adapter.owner = THIS_MODULE;
241 smbus->adapter.class = I2C_CLASS_HWMON;
242 smbus->adapter.algo = &smbus_algorithm;
304 smbus->adapter.algo_data = smbus; 243 smbus->adapter.algo_data = smbus;
305 smbus->adapter.dev.parent = &dev->dev; 244 smbus->adapter.dev.parent = &dev->dev;
306 snprintf(smbus->adapter.name, I2C_NAME_SIZE, 245 snprintf(smbus->adapter.name, I2C_NAME_SIZE,
diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index dec04da0455c..bcd8367cede1 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -231,8 +231,8 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
231 * 13 2 1 231 * 13 2 1
232 * 19.2 2 1 232 * 19.2 2 1
233 */ 233 */
234 if (fclk_rate > 16000000) 234 if (fclk_rate > 12000000)
235 psc = (fclk_rate + 8000000) / 12000000; 235 psc = fclk_rate / 12000000;
236 } 236 }
237 237
238 /* Setup clock prescaler to obtain approx 12MHz I2C module clock: */ 238 /* Setup clock prescaler to obtain approx 12MHz I2C module clock: */
diff --git a/drivers/i2c/busses/i2c-parport-light.c b/drivers/i2c/busses/i2c-parport-light.c
index 5eb2bd294fd9..4bc42810b9aa 100644
--- a/drivers/i2c/busses/i2c-parport-light.c
+++ b/drivers/i2c/busses/i2c-parport-light.c
@@ -163,7 +163,7 @@ static void __exit i2c_parport_exit(void)
163 if (adapter_parm[type].init.val) 163 if (adapter_parm[type].init.val)
164 line_set(0, &adapter_parm[type].init); 164 line_set(0, &adapter_parm[type].init);
165 165
166 i2c_bit_del_bus(&parport_adapter); 166 i2c_del_adapter(&parport_adapter);
167 release_region(base, 3); 167 release_region(base, 3);
168} 168}
169 169
diff --git a/drivers/i2c/busses/i2c-parport.c b/drivers/i2c/busses/i2c-parport.c
index 48a829431c7b..66696a40c7b5 100644
--- a/drivers/i2c/busses/i2c-parport.c
+++ b/drivers/i2c/busses/i2c-parport.c
@@ -218,7 +218,7 @@ static void i2c_parport_detach (struct parport *port)
218 if (adapter_parm[type].init.val) 218 if (adapter_parm[type].init.val)
219 line_set(port, 0, &adapter_parm[type].init); 219 line_set(port, 0, &adapter_parm[type].init);
220 220
221 i2c_bit_del_bus(&adapter->adapter); 221 i2c_del_adapter(&adapter->adapter);
222 parport_unregister_device(adapter->pdev); 222 parport_unregister_device(adapter->pdev);
223 if (prev) 223 if (prev)
224 prev->next = adapter->next; 224 prev->next = adapter->next;
diff --git a/drivers/i2c/busses/i2c-pca-isa.c b/drivers/i2c/busses/i2c-pca-isa.c
index 407840b6a260..cc6536a19eca 100644
--- a/drivers/i2c/busses/i2c-pca-isa.c
+++ b/drivers/i2c/busses/i2c-pca-isa.c
@@ -156,7 +156,7 @@ static int __init pca_isa_init(void)
156 156
157static void pca_isa_exit(void) 157static void pca_isa_exit(void)
158{ 158{
159 i2c_pca_del_bus(&pca_isa_ops); 159 i2c_del_adapter(&pca_isa_ops);
160 160
161 if (irq > 0) { 161 if (irq > 0) {
162 disable_irq(irq); 162 disable_irq(irq);
diff --git a/drivers/i2c/busses/i2c-pnx.c b/drivers/i2c/busses/i2c-pnx.c
new file mode 100644
index 000000000000..de0bca77e926
--- /dev/null
+++ b/drivers/i2c/busses/i2c-pnx.c
@@ -0,0 +1,708 @@
1/*
2 * Provides I2C support for Philips PNX010x/PNX4008 boards.
3 *
4 * Authors: Dennis Kovalev <dkovalev@ru.mvista.com>
5 * Vitaly Wool <vwool@ru.mvista.com>
6 *
7 * 2004-2006 (c) MontaVista Software, Inc. This file is licensed under
8 * the terms of the GNU General Public License version 2. This program
9 * is licensed "as is" without any warranty of any kind, whether express
10 * or implied.
11 */
12
13#include <linux/module.h>
14#include <linux/interrupt.h>
15#include <linux/ioport.h>
16#include <linux/delay.h>
17#include <linux/i2c.h>
18#include <linux/timer.h>
19#include <linux/completion.h>
20#include <linux/platform_device.h>
21#include <linux/i2c-pnx.h>
22#include <asm/hardware.h>
23#include <asm/irq.h>
24#include <asm/uaccess.h>
25
26#define I2C_PNX_TIMEOUT 10 /* msec */
27#define I2C_PNX_SPEED_KHZ 100
28#define I2C_PNX_REGION_SIZE 0x100
29#define PNX_DEFAULT_FREQ 13 /* MHz */
30
31static inline int wait_timeout(long timeout, struct i2c_pnx_algo_data *data)
32{
33 while (timeout > 0 &&
34 (ioread32(I2C_REG_STS(data)) & mstatus_active)) {
35 mdelay(1);
36 timeout--;
37 }
38 return (timeout <= 0);
39}
40
41static inline int wait_reset(long timeout, struct i2c_pnx_algo_data *data)
42{
43 while (timeout > 0 &&
44 (ioread32(I2C_REG_CTL(data)) & mcntrl_reset)) {
45 mdelay(1);
46 timeout--;
47 }
48 return (timeout <= 0);
49}
50
51static inline void i2c_pnx_arm_timer(struct i2c_adapter *adap)
52{
53 struct i2c_pnx_algo_data *data = adap->algo_data;
54 struct timer_list *timer = &data->mif.timer;
55 int expires = I2C_PNX_TIMEOUT / (1000 / HZ);
56
57 del_timer_sync(timer);
58
59 dev_dbg(&adap->dev, "Timer armed at %lu plus %u jiffies.\n",
60 jiffies, expires);
61
62 timer->expires = jiffies + expires;
63 timer->data = (unsigned long)adap;
64
65 add_timer(timer);
66}
67
68/**
69 * i2c_pnx_start - start a device
70 * @slave_addr: slave address
71 * @adap: pointer to adapter structure
72 *
73 * Generate a START signal in the desired mode.
74 */
75static int i2c_pnx_start(unsigned char slave_addr, struct i2c_adapter *adap)
76{
77 struct i2c_pnx_algo_data *alg_data = adap->algo_data;
78
79 dev_dbg(&adap->dev, "%s(): addr 0x%x mode %d\n", __FUNCTION__,
80 slave_addr, alg_data->mif.mode);
81
82 /* Check for 7 bit slave addresses only */
83 if (slave_addr & ~0x7f) {
84 dev_err(&adap->dev, "%s: Invalid slave address %x. "
85 "Only 7-bit addresses are supported\n",
86 adap->name, slave_addr);
87 return -EINVAL;
88 }
89
90 /* First, make sure bus is idle */
91 if (wait_timeout(I2C_PNX_TIMEOUT, alg_data)) {
92 /* Somebody else is monopolizing the bus */
93 dev_err(&adap->dev, "%s: Bus busy. Slave addr = %02x, "
94 "cntrl = %x, stat = %x\n",
95 adap->name, slave_addr,
96 ioread32(I2C_REG_CTL(alg_data)),
97 ioread32(I2C_REG_STS(alg_data)));
98 return -EBUSY;
99 } else if (ioread32(I2C_REG_STS(alg_data)) & mstatus_afi) {
100 /* Sorry, we lost the bus */
101 dev_err(&adap->dev, "%s: Arbitration failure. "
102 "Slave addr = %02x\n", adap->name, slave_addr);
103 return -EIO;
104 }
105
106 /*
107 * OK, I2C is enabled and we have the bus.
108 * Clear the current TDI and AFI status flags.
109 */
110 iowrite32(ioread32(I2C_REG_STS(alg_data)) | mstatus_tdi | mstatus_afi,
111 I2C_REG_STS(alg_data));
112
113 dev_dbg(&adap->dev, "%s(): sending %#x\n", __FUNCTION__,
114 (slave_addr << 1) | start_bit | alg_data->mif.mode);
115
116 /* Write the slave address, START bit and R/W bit */
117 iowrite32((slave_addr << 1) | start_bit | alg_data->mif.mode,
118 I2C_REG_TX(alg_data));
119
120 dev_dbg(&adap->dev, "%s(): exit\n", __FUNCTION__);
121
122 return 0;
123}
124
125/**
126 * i2c_pnx_stop - stop a device
127 * @adap: pointer to I2C adapter structure
128 *
129 * Generate a STOP signal to terminate the master transaction.
130 */
131static void i2c_pnx_stop(struct i2c_adapter *adap)
132{
133 struct i2c_pnx_algo_data *alg_data = adap->algo_data;
134 /* Only 1 msec max timeout due to interrupt context */
135 long timeout = 1000;
136
137 dev_dbg(&adap->dev, "%s(): entering: stat = %04x.\n",
138 __FUNCTION__, ioread32(I2C_REG_STS(alg_data)));
139
140 /* Write a STOP bit to TX FIFO */
141 iowrite32(0xff | stop_bit, I2C_REG_TX(alg_data));
142
143 /* Wait until the STOP is seen. */
144 while (timeout > 0 &&
145 (ioread32(I2C_REG_STS(alg_data)) & mstatus_active)) {
146 /* may be called from interrupt context */
147 udelay(1);
148 timeout--;
149 }
150
151 dev_dbg(&adap->dev, "%s(): exiting: stat = %04x.\n",
152 __FUNCTION__, ioread32(I2C_REG_STS(alg_data)));
153}
154
155/**
156 * i2c_pnx_master_xmit - transmit data to slave
157 * @adap: pointer to I2C adapter structure
158 *
159 * Sends one byte of data to the slave
160 */
161static int i2c_pnx_master_xmit(struct i2c_adapter *adap)
162{
163 struct i2c_pnx_algo_data *alg_data = adap->algo_data;
164 u32 val;
165
166 dev_dbg(&adap->dev, "%s(): entering: stat = %04x.\n",
167 __FUNCTION__, ioread32(I2C_REG_STS(alg_data)));
168
169 if (alg_data->mif.len > 0) {
170 /* We still have something to talk about... */
171 val = *alg_data->mif.buf++;
172
173 if (alg_data->mif.len == 1) {
174 val |= stop_bit;
175 if (!alg_data->last)
176 val |= start_bit;
177 }
178
179 alg_data->mif.len--;
180 iowrite32(val, I2C_REG_TX(alg_data));
181
182 dev_dbg(&adap->dev, "%s(): xmit %#x [%d]\n", __FUNCTION__,
183 val, alg_data->mif.len + 1);
184
185 if (alg_data->mif.len == 0) {
186 if (alg_data->last) {
187 /* Wait until the STOP is seen. */
188 if (wait_timeout(I2C_PNX_TIMEOUT, alg_data))
189 dev_err(&adap->dev, "The bus is still "
190 "active after timeout\n");
191 }
192 /* Disable master interrupts */
193 iowrite32(ioread32(I2C_REG_CTL(alg_data)) &
194 ~(mcntrl_afie | mcntrl_naie | mcntrl_drmie),
195 I2C_REG_CTL(alg_data));
196
197 del_timer_sync(&alg_data->mif.timer);
198
199 dev_dbg(&adap->dev, "%s(): Waking up xfer routine.\n",
200 __FUNCTION__);
201
202 complete(&alg_data->mif.complete);
203 }
204 } else if (alg_data->mif.len == 0) {
205 /* zero-sized transfer */
206 i2c_pnx_stop(adap);
207
208 /* Disable master interrupts. */
209 iowrite32(ioread32(I2C_REG_CTL(alg_data)) &
210 ~(mcntrl_afie | mcntrl_naie | mcntrl_drmie),
211 I2C_REG_CTL(alg_data));
212
213 /* Stop timer. */
214 del_timer_sync(&alg_data->mif.timer);
215 dev_dbg(&adap->dev, "%s(): Waking up xfer routine after "
216 "zero-xfer.\n", __FUNCTION__);
217
218 complete(&alg_data->mif.complete);
219 }
220
221 dev_dbg(&adap->dev, "%s(): exiting: stat = %04x.\n",
222 __FUNCTION__, ioread32(I2C_REG_STS(alg_data)));
223
224 return 0;
225}
226
227/**
228 * i2c_pnx_master_rcv - receive data from slave
229 * @adap: pointer to I2C adapter structure
230 *
231 * Reads one byte data from the slave
232 */
233static int i2c_pnx_master_rcv(struct i2c_adapter *adap)
234{
235 struct i2c_pnx_algo_data *alg_data = adap->algo_data;
236 unsigned int val = 0;
237 u32 ctl = 0;
238
239 dev_dbg(&adap->dev, "%s(): entering: stat = %04x.\n",
240 __FUNCTION__, ioread32(I2C_REG_STS(alg_data)));
241
242 /* Check, whether there is already data,
243 * or we didn't 'ask' for it yet.
244 */
245 if (ioread32(I2C_REG_STS(alg_data)) & mstatus_rfe) {
246 dev_dbg(&adap->dev, "%s(): Write dummy data to fill "
247 "Rx-fifo...\n", __FUNCTION__);
248
249 if (alg_data->mif.len == 1) {
250 /* Last byte, do not acknowledge next rcv. */
251 val |= stop_bit;
252 if (!alg_data->last)
253 val |= start_bit;
254
255 /*
256 * Enable interrupt RFDAIE (data in Rx fifo),
257 * and disable DRMIE (need data for Tx)
258 */
259 ctl = ioread32(I2C_REG_CTL(alg_data));
260 ctl |= mcntrl_rffie | mcntrl_daie;
261 ctl &= ~mcntrl_drmie;
262 iowrite32(ctl, I2C_REG_CTL(alg_data));
263 }
264
265 /*
266 * Now we'll 'ask' for data:
267 * For each byte we want to receive, we must
268 * write a (dummy) byte to the Tx-FIFO.
269 */
270 iowrite32(val, I2C_REG_TX(alg_data));
271
272 return 0;
273 }
274
275 /* Handle data. */
276 if (alg_data->mif.len > 0) {
277 val = ioread32(I2C_REG_RX(alg_data));
278 *alg_data->mif.buf++ = (u8) (val & 0xff);
279 dev_dbg(&adap->dev, "%s(): rcv 0x%x [%d]\n", __FUNCTION__, val,
280 alg_data->mif.len);
281
282 alg_data->mif.len--;
283 if (alg_data->mif.len == 0) {
284 if (alg_data->last)
285 /* Wait until the STOP is seen. */
286 if (wait_timeout(I2C_PNX_TIMEOUT, alg_data))
287 dev_err(&adap->dev, "The bus is still "
288 "active after timeout\n");
289
290 /* Disable master interrupts */
291 ctl = ioread32(I2C_REG_CTL(alg_data));
292 ctl &= ~(mcntrl_afie | mcntrl_naie | mcntrl_rffie |
293 mcntrl_drmie | mcntrl_daie);
294 iowrite32(ctl, I2C_REG_CTL(alg_data));
295
296 /* Kill timer. */
297 del_timer_sync(&alg_data->mif.timer);
298 complete(&alg_data->mif.complete);
299 }
300 }
301
302 dev_dbg(&adap->dev, "%s(): exiting: stat = %04x.\n",
303 __FUNCTION__, ioread32(I2C_REG_STS(alg_data)));
304
305 return 0;
306}
307
308static irqreturn_t
309i2c_pnx_interrupt(int irq, void *dev_id, struct pt_regs *regs)
310{
311 u32 stat, ctl;
312 struct i2c_adapter *adap = dev_id;
313 struct i2c_pnx_algo_data *alg_data = adap->algo_data;
314
315 dev_dbg(&adap->dev, "%s(): mstat = %x mctrl = %x, mode = %d\n",
316 __FUNCTION__,
317 ioread32(I2C_REG_STS(alg_data)),
318 ioread32(I2C_REG_CTL(alg_data)),
319 alg_data->mif.mode);
320 stat = ioread32(I2C_REG_STS(alg_data));
321
322 /* let's see what kind of event this is */
323 if (stat & mstatus_afi) {
324 /* We lost arbitration in the midst of a transfer */
325 alg_data->mif.ret = -EIO;
326
327 /* Disable master interrupts. */
328 ctl = ioread32(I2C_REG_CTL(alg_data));
329 ctl &= ~(mcntrl_afie | mcntrl_naie | mcntrl_rffie |
330 mcntrl_drmie);
331 iowrite32(ctl, I2C_REG_CTL(alg_data));
332
333 /* Stop timer, to prevent timeout. */
334 del_timer_sync(&alg_data->mif.timer);
335 complete(&alg_data->mif.complete);
336 } else if (stat & mstatus_nai) {
337 /* Slave did not acknowledge, generate a STOP */
338 dev_dbg(&adap->dev, "%s(): "
339 "Slave did not acknowledge, generating a STOP.\n",
340 __FUNCTION__);
341 i2c_pnx_stop(adap);
342
343 /* Disable master interrupts. */
344 ctl = ioread32(I2C_REG_CTL(alg_data));
345 ctl &= ~(mcntrl_afie | mcntrl_naie | mcntrl_rffie |
346 mcntrl_drmie);
347 iowrite32(ctl, I2C_REG_CTL(alg_data));
348
349 /* Our return value. */
350 alg_data->mif.ret = -EIO;
351
352 /* Stop timer, to prevent timeout. */
353 del_timer_sync(&alg_data->mif.timer);
354 complete(&alg_data->mif.complete);
355 } else {
356 /*
357 * Two options:
358 * - Master Tx needs data.
359 * - There is data in the Rx-fifo
360 * The latter is only the case if we have requested for data,
361 * via a dummy write. (See 'i2c_pnx_master_rcv'.)
362 * We therefore check, as a sanity check, whether that interrupt
363 * has been enabled.
364 */
365 if ((stat & mstatus_drmi) || !(stat & mstatus_rfe)) {
366 if (alg_data->mif.mode == I2C_SMBUS_WRITE) {
367 i2c_pnx_master_xmit(adap);
368 } else if (alg_data->mif.mode == I2C_SMBUS_READ) {
369 i2c_pnx_master_rcv(adap);
370 }
371 }
372 }
373
374 /* Clear TDI and AFI bits */
375 stat = ioread32(I2C_REG_STS(alg_data));
376 iowrite32(stat | mstatus_tdi | mstatus_afi, I2C_REG_STS(alg_data));
377
378 dev_dbg(&adap->dev, "%s(): exiting, stat = %x ctrl = %x.\n",
379 __FUNCTION__, ioread32(I2C_REG_STS(alg_data)),
380 ioread32(I2C_REG_CTL(alg_data)));
381
382 return IRQ_HANDLED;
383}
384
385static void i2c_pnx_timeout(unsigned long data)
386{
387 struct i2c_adapter *adap = (struct i2c_adapter *)data;
388 struct i2c_pnx_algo_data *alg_data = adap->algo_data;
389 u32 ctl;
390
391 dev_err(&adap->dev, "Master timed out. stat = %04x, cntrl = %04x. "
392 "Resetting master...\n",
393 ioread32(I2C_REG_STS(alg_data)),
394 ioread32(I2C_REG_CTL(alg_data)));
395
396 /* Reset master and disable interrupts */
397 ctl = ioread32(I2C_REG_CTL(alg_data));
398 ctl &= ~(mcntrl_afie | mcntrl_naie | mcntrl_rffie | mcntrl_drmie);
399 iowrite32(ctl, I2C_REG_CTL(alg_data));
400
401 ctl |= mcntrl_reset;
402 iowrite32(ctl, I2C_REG_CTL(alg_data));
403 wait_reset(I2C_PNX_TIMEOUT, alg_data);
404 alg_data->mif.ret = -EIO;
405 complete(&alg_data->mif.complete);
406}
407
408static inline void bus_reset_if_active(struct i2c_adapter *adap)
409{
410 struct i2c_pnx_algo_data *alg_data = adap->algo_data;
411 u32 stat;
412
413 if ((stat = ioread32(I2C_REG_STS(alg_data))) & mstatus_active) {
414 dev_err(&adap->dev,
415 "%s: Bus is still active after xfer. Reset it...\n",
416 adap->name);
417 iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_reset,
418 I2C_REG_CTL(alg_data));
419 wait_reset(I2C_PNX_TIMEOUT, alg_data);
420 } else if (!(stat & mstatus_rfe) || !(stat & mstatus_tfe)) {
421 /* If there is data in the fifo's after transfer,
422 * flush fifo's by reset.
423 */
424 iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_reset,
425 I2C_REG_CTL(alg_data));
426 wait_reset(I2C_PNX_TIMEOUT, alg_data);
427 } else if (stat & mstatus_nai) {
428 iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_reset,
429 I2C_REG_CTL(alg_data));
430 wait_reset(I2C_PNX_TIMEOUT, alg_data);
431 }
432}
433
434/**
435 * i2c_pnx_xfer - generic transfer entry point
436 * @adap: pointer to I2C adapter structure
437 * @msgs: array of messages
438 * @num: number of messages
439 *
440 * Initiates the transfer
441 */
442static int
443i2c_pnx_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
444{
445 struct i2c_msg *pmsg;
446 int rc = 0, completed = 0, i;
447 struct i2c_pnx_algo_data *alg_data = adap->algo_data;
448 u32 stat = ioread32(I2C_REG_STS(alg_data));
449
450 dev_dbg(&adap->dev, "%s(): entering: %d messages, stat = %04x.\n",
451 __FUNCTION__, num, ioread32(I2C_REG_STS(alg_data)));
452
453 bus_reset_if_active(adap);
454
455 /* Process transactions in a loop. */
456 for (i = 0; rc >= 0 && i < num; i++) {
457 u8 addr;
458
459 pmsg = &msgs[i];
460 addr = pmsg->addr;
461
462 if (pmsg->flags & I2C_M_TEN) {
463 dev_err(&adap->dev,
464 "%s: 10 bits addr not supported!\n",
465 adap->name);
466 rc = -EINVAL;
467 break;
468 }
469
470 alg_data->mif.buf = pmsg->buf;
471 alg_data->mif.len = pmsg->len;
472 alg_data->mif.mode = (pmsg->flags & I2C_M_RD) ?
473 I2C_SMBUS_READ : I2C_SMBUS_WRITE;
474 alg_data->mif.ret = 0;
475 alg_data->last = (i == num - 1);
476
477 dev_dbg(&adap->dev, "%s(): mode %d, %d bytes\n", __FUNCTION__,
478 alg_data->mif.mode,
479 alg_data->mif.len);
480
481 i2c_pnx_arm_timer(adap);
482
483 /* initialize the completion var */
484 init_completion(&alg_data->mif.complete);
485
486 /* Enable master interrupt */
487 iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_afie |
488 mcntrl_naie | mcntrl_drmie,
489 I2C_REG_CTL(alg_data));
490
491 /* Put start-code and slave-address on the bus. */
492 rc = i2c_pnx_start(addr, adap);
493 if (rc < 0)
494 break;
495
496 /* Wait for completion */
497 wait_for_completion(&alg_data->mif.complete);
498
499 if (!(rc = alg_data->mif.ret))
500 completed++;
501 dev_dbg(&adap->dev, "%s(): Complete, return code = %d.\n",
502 __FUNCTION__, rc);
503
504 /* Clear TDI and AFI bits in case they are set. */
505 if ((stat = ioread32(I2C_REG_STS(alg_data))) & mstatus_tdi) {
506 dev_dbg(&adap->dev,
507 "%s: TDI still set... clearing now.\n",
508 adap->name);
509 iowrite32(stat, I2C_REG_STS(alg_data));
510 }
511 if ((stat = ioread32(I2C_REG_STS(alg_data))) & mstatus_afi) {
512 dev_dbg(&adap->dev,
513 "%s: AFI still set... clearing now.\n",
514 adap->name);
515 iowrite32(stat, I2C_REG_STS(alg_data));
516 }
517 }
518
519 bus_reset_if_active(adap);
520
521 /* Cleanup to be sure... */
522 alg_data->mif.buf = NULL;
523 alg_data->mif.len = 0;
524
525 dev_dbg(&adap->dev, "%s(): exiting, stat = %x\n",
526 __FUNCTION__, ioread32(I2C_REG_STS(alg_data)));
527
528 if (completed != num)
529 return ((rc < 0) ? rc : -EREMOTEIO);
530
531 return num;
532}
533
534static u32 i2c_pnx_func(struct i2c_adapter *adapter)
535{
536 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
537}
538
539static struct i2c_algorithm pnx_algorithm = {
540 .master_xfer = i2c_pnx_xfer,
541 .functionality = i2c_pnx_func,
542};
543
544static int i2c_pnx_controller_suspend(struct platform_device *pdev,
545 pm_message_t state)
546{
547 struct i2c_pnx_data *i2c_pnx = platform_get_drvdata(pdev);
548 return i2c_pnx->suspend(pdev, state);
549}
550
551static int i2c_pnx_controller_resume(struct platform_device *pdev)
552{
553 struct i2c_pnx_data *i2c_pnx = platform_get_drvdata(pdev);
554 return i2c_pnx->resume(pdev);
555}
556
557static int __devinit i2c_pnx_probe(struct platform_device *pdev)
558{
559 unsigned long tmp;
560 int ret = 0;
561 struct i2c_pnx_algo_data *alg_data;
562 int freq_mhz;
563 struct i2c_pnx_data *i2c_pnx = pdev->dev.platform_data;
564
565 if (!i2c_pnx || !i2c_pnx->adapter) {
566 dev_err(&pdev->dev, "%s: no platform data supplied\n",
567 __FUNCTION__);
568 ret = -EINVAL;
569 goto out;
570 }
571
572 platform_set_drvdata(pdev, i2c_pnx);
573
574 if (i2c_pnx->calculate_input_freq)
575 freq_mhz = i2c_pnx->calculate_input_freq(pdev);
576 else {
577 freq_mhz = PNX_DEFAULT_FREQ;
578 dev_info(&pdev->dev, "Setting bus frequency to default value: "
579 "%d MHz", freq_mhz);
580 }
581
582 i2c_pnx->adapter->algo = &pnx_algorithm;
583
584 alg_data = i2c_pnx->adapter->algo_data;
585 init_timer(&alg_data->mif.timer);
586 alg_data->mif.timer.function = i2c_pnx_timeout;
587 alg_data->mif.timer.data = (unsigned long)i2c_pnx->adapter;
588
589 /* Register I/O resource */
590 if (!request_region(alg_data->base, I2C_PNX_REGION_SIZE, pdev->name)) {
591 dev_err(&pdev->dev,
592 "I/O region 0x%08x for I2C already in use.\n",
593 alg_data->base);
594 ret = -ENODEV;
595 goto out_drvdata;
596 }
597
598 if (!(alg_data->ioaddr =
599 (u32)ioremap(alg_data->base, I2C_PNX_REGION_SIZE))) {
600 dev_err(&pdev->dev, "Couldn't ioremap I2C I/O region\n");
601 ret = -ENOMEM;
602 goto out_release;
603 }
604
605 i2c_pnx->set_clock_run(pdev);
606
607 /*
608 * Clock Divisor High This value is the number of system clocks
609 * the serial clock (SCL) will be high.
610 * For example, if the system clock period is 50 ns and the maximum
611 * desired serial period is 10000 ns (100 kHz), then CLKHI would be
612 * set to 0.5*(f_sys/f_i2c)-2=0.5*(20e6/100e3)-2=98. The actual value
613 * programmed into CLKHI will vary from this slightly due to
614 * variations in the output pad's rise and fall times as well as
615 * the deglitching filter length.
616 */
617
618 tmp = ((freq_mhz * 1000) / I2C_PNX_SPEED_KHZ) / 2 - 2;
619 iowrite32(tmp, I2C_REG_CKH(alg_data));
620 iowrite32(tmp, I2C_REG_CKL(alg_data));
621
622 iowrite32(mcntrl_reset, I2C_REG_CTL(alg_data));
623 if (wait_reset(I2C_PNX_TIMEOUT, alg_data)) {
624 ret = -ENODEV;
625 goto out_unmap;
626 }
627 init_completion(&alg_data->mif.complete);
628
629 ret = request_irq(alg_data->irq, i2c_pnx_interrupt,
630 0, pdev->name, i2c_pnx->adapter);
631 if (ret)
632 goto out_clock;
633
634 /* Register this adapter with the I2C subsystem */
635 i2c_pnx->adapter->dev.parent = &pdev->dev;
636 ret = i2c_add_adapter(i2c_pnx->adapter);
637 if (ret < 0) {
638 dev_err(&pdev->dev, "I2C: Failed to add bus\n");
639 goto out_irq;
640 }
641
642 dev_dbg(&pdev->dev, "%s: Master at %#8x, irq %d.\n",
643 i2c_pnx->adapter->name, alg_data->base, alg_data->irq);
644
645 return 0;
646
647out_irq:
648 free_irq(alg_data->irq, alg_data);
649out_clock:
650 i2c_pnx->set_clock_stop(pdev);
651out_unmap:
652 iounmap((void *)alg_data->ioaddr);
653out_release:
654 release_region(alg_data->base, I2C_PNX_REGION_SIZE);
655out_drvdata:
656 platform_set_drvdata(pdev, NULL);
657out:
658 return ret;
659}
660
661static int __devexit i2c_pnx_remove(struct platform_device *pdev)
662{
663 struct i2c_pnx_data *i2c_pnx = platform_get_drvdata(pdev);
664 struct i2c_adapter *adap = i2c_pnx->adapter;
665 struct i2c_pnx_algo_data *alg_data = adap->algo_data;
666
667 free_irq(alg_data->irq, alg_data);
668 i2c_del_adapter(adap);
669 i2c_pnx->set_clock_stop(pdev);
670 iounmap((void *)alg_data->ioaddr);
671 release_region(alg_data->base, I2C_PNX_REGION_SIZE);
672 platform_set_drvdata(pdev, NULL);
673
674 return 0;
675}
676
677static struct platform_driver i2c_pnx_driver = {
678 .driver = {
679 .name = "pnx-i2c",
680 .owner = THIS_MODULE,
681 },
682 .probe = i2c_pnx_probe,
683 .remove = __devexit_p(i2c_pnx_remove),
684 .suspend = i2c_pnx_controller_suspend,
685 .resume = i2c_pnx_controller_resume,
686};
687
688static int __init i2c_adap_pnx_init(void)
689{
690 return platform_driver_register(&i2c_pnx_driver);
691}
692
693static void __exit i2c_adap_pnx_exit(void)
694{
695 platform_driver_unregister(&i2c_pnx_driver);
696}
697
698MODULE_AUTHOR("Vitaly Wool, Dennis Kovalev <source@mvista.com>");
699MODULE_DESCRIPTION("I2C driver for Philips IP3204-based I2C busses");
700MODULE_LICENSE("GPL");
701
702#ifdef CONFIG_I2C_PNX_EARLY
703/* We need to make sure I2C is initialized before USB */
704subsys_initcall(i2c_adap_pnx_init);
705#else
706mudule_init(i2c_adap_pnx_init);
707#endif
708module_exit(i2c_adap_pnx_exit);
diff --git a/drivers/i2c/busses/i2c-prosavage.c b/drivers/i2c/busses/i2c-prosavage.c
index 7745e21874a8..07c1f1e27df1 100644
--- a/drivers/i2c/busses/i2c-prosavage.c
+++ b/drivers/i2c/busses/i2c-prosavage.c
@@ -212,7 +212,7 @@ static void prosavage_remove(struct pci_dev *dev)
212 if (chip->i2c_bus[i].adap_ok == 0) 212 if (chip->i2c_bus[i].adap_ok == 0)
213 continue; 213 continue;
214 214
215 ret = i2c_bit_del_bus(&chip->i2c_bus[i].adap); 215 ret = i2c_del_adapter(&chip->i2c_bus[i].adap);
216 if (ret) { 216 if (ret) {
217 dev_err(&dev->dev, "%s not removed\n", 217 dev_err(&dev->dev, "%s not removed\n",
218 chip->i2c_bus[i].adap.name); 218 chip->i2c_bus[i].adap.name);
diff --git a/drivers/i2c/busses/i2c-savage4.c b/drivers/i2c/busses/i2c-savage4.c
index 209f47ea1750..844b4ff90893 100644
--- a/drivers/i2c/busses/i2c-savage4.c
+++ b/drivers/i2c/busses/i2c-savage4.c
@@ -173,7 +173,7 @@ static int __devinit savage4_probe(struct pci_dev *dev, const struct pci_device_
173 173
174static void __devexit savage4_remove(struct pci_dev *dev) 174static void __devexit savage4_remove(struct pci_dev *dev)
175{ 175{
176 i2c_bit_del_bus(&savage4_i2c_adapter); 176 i2c_del_adapter(&savage4_i2c_adapter);
177 iounmap(ioaddr); 177 iounmap(ioaddr);
178} 178}
179 179
diff --git a/drivers/i2c/busses/i2c-versatile.c b/drivers/i2c/busses/i2c-versatile.c
new file mode 100644
index 000000000000..081d9578ce10
--- /dev/null
+++ b/drivers/i2c/busses/i2c-versatile.c
@@ -0,0 +1,153 @@
1/*
2 * i2c-versatile.c
3 *
4 * Copyright (C) 2006 ARM Ltd.
5 * written by Russell King, Deep Blue Solutions Ltd.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#include <linux/kernel.h>
12#include <linux/module.h>
13#include <linux/i2c.h>
14#include <linux/i2c-algo-bit.h>
15#include <linux/init.h>
16#include <linux/platform_device.h>
17
18#include <asm/io.h>
19
20#define I2C_CONTROL 0x00
21#define I2C_CONTROLS 0x00
22#define I2C_CONTROLC 0x04
23#define SCL (1 << 0)
24#define SDA (1 << 1)
25
26struct i2c_versatile {
27 struct i2c_adapter adap;
28 struct i2c_algo_bit_data algo;
29 void __iomem *base;
30};
31
32static void i2c_versatile_setsda(void *data, int state)
33{
34 struct i2c_versatile *i2c = data;
35
36 writel(SDA, i2c->base + (state ? I2C_CONTROLS : I2C_CONTROLC));
37}
38
39static void i2c_versatile_setscl(void *data, int state)
40{
41 struct i2c_versatile *i2c = data;
42
43 writel(SCL, i2c->base + (state ? I2C_CONTROLS : I2C_CONTROLC));
44}
45
46static int i2c_versatile_getsda(void *data)
47{
48 struct i2c_versatile *i2c = data;
49 return !!(readl(i2c->base + I2C_CONTROL) & SDA);
50}
51
52static int i2c_versatile_getscl(void *data)
53{
54 struct i2c_versatile *i2c = data;
55 return !!(readl(i2c->base + I2C_CONTROL) & SCL);
56}
57
58static struct i2c_algo_bit_data i2c_versatile_algo = {
59 .setsda = i2c_versatile_setsda,
60 .setscl = i2c_versatile_setscl,
61 .getsda = i2c_versatile_getsda,
62 .getscl = i2c_versatile_getscl,
63 .udelay = 30,
64 .timeout = HZ,
65};
66
67static int i2c_versatile_probe(struct platform_device *dev)
68{
69 struct i2c_versatile *i2c;
70 struct resource *r;
71 int ret;
72
73 r = platform_get_resource(dev, IORESOURCE_MEM, 0);
74 if (!r) {
75 ret = -EINVAL;
76 goto err_out;
77 }
78
79 if (!request_mem_region(r->start, r->end - r->start + 1, "versatile-i2c")) {
80 ret = -EBUSY;
81 goto err_out;
82 }
83
84 i2c = kzalloc(sizeof(struct i2c_versatile), GFP_KERNEL);
85 if (!i2c) {
86 ret = -ENOMEM;
87 goto err_release;
88 }
89
90 i2c->base = ioremap(r->start, r->end - r->start + 1);
91 if (!i2c->base) {
92 ret = -ENOMEM;
93 goto err_free;
94 }
95
96 writel(SCL | SDA, i2c->base + I2C_CONTROLS);
97
98 i2c->adap.owner = THIS_MODULE;
99 strlcpy(i2c->adap.name, "Versatile I2C adapter", sizeof(i2c->adap.name));
100 i2c->adap.algo_data = &i2c->algo;
101 i2c->adap.dev.parent = &dev->dev;
102 i2c->algo = i2c_versatile_algo;
103 i2c->algo.data = i2c;
104
105 ret = i2c_bit_add_bus(&i2c->adap);
106 if (ret >= 0) {
107 platform_set_drvdata(dev, i2c);
108 return 0;
109 }
110
111 iounmap(i2c->base);
112 err_free:
113 kfree(i2c);
114 err_release:
115 release_mem_region(r->start, r->end - r->start + 1);
116 err_out:
117 return ret;
118}
119
120static int i2c_versatile_remove(struct platform_device *dev)
121{
122 struct i2c_versatile *i2c = platform_get_drvdata(dev);
123
124 platform_set_drvdata(dev, NULL);
125
126 i2c_del_adapter(&i2c->adap);
127 return 0;
128}
129
130static struct platform_driver i2c_versatile_driver = {
131 .probe = i2c_versatile_probe,
132 .remove = i2c_versatile_remove,
133 .driver = {
134 .name = "versatile-i2c",
135 .owner = THIS_MODULE,
136 },
137};
138
139static int __init i2c_versatile_init(void)
140{
141 return platform_driver_register(&i2c_versatile_driver);
142}
143
144static void __exit i2c_versatile_exit(void)
145{
146 platform_driver_unregister(&i2c_versatile_driver);
147}
148
149module_init(i2c_versatile_init);
150module_exit(i2c_versatile_exit);
151
152MODULE_DESCRIPTION("ARM Versatile I2C bus driver");
153MODULE_LICENSE("GPL");
diff --git a/drivers/i2c/busses/i2c-via.c b/drivers/i2c/busses/i2c-via.c
index 910e200ad500..15d7e00e47e6 100644
--- a/drivers/i2c/busses/i2c-via.c
+++ b/drivers/i2c/busses/i2c-via.c
@@ -151,7 +151,7 @@ static int __devinit vt586b_probe(struct pci_dev *dev, const struct pci_device_i
151 151
152static void __devexit vt586b_remove(struct pci_dev *dev) 152static void __devexit vt586b_remove(struct pci_dev *dev)
153{ 153{
154 i2c_bit_del_bus(&vt586b_adapter); 154 i2c_del_adapter(&vt586b_adapter);
155 release_region(I2C_DIR, IOSPACE); 155 release_region(I2C_DIR, IOSPACE);
156 pm_io_base = 0; 156 pm_io_base = 0;
157} 157}
diff --git a/drivers/i2c/busses/i2c-voodoo3.c b/drivers/i2c/busses/i2c-voodoo3.c
index 6c8d25183382..b0377b81744b 100644
--- a/drivers/i2c/busses/i2c-voodoo3.c
+++ b/drivers/i2c/busses/i2c-voodoo3.c
@@ -211,14 +211,14 @@ static int __devinit voodoo3_probe(struct pci_dev *dev, const struct pci_device_
211 return retval; 211 return retval;
212 retval = i2c_bit_add_bus(&voodoo3_ddc_adapter); 212 retval = i2c_bit_add_bus(&voodoo3_ddc_adapter);
213 if (retval) 213 if (retval)
214 i2c_bit_del_bus(&voodoo3_i2c_adapter); 214 i2c_del_adapter(&voodoo3_i2c_adapter);
215 return retval; 215 return retval;
216} 216}
217 217
218static void __devexit voodoo3_remove(struct pci_dev *dev) 218static void __devexit voodoo3_remove(struct pci_dev *dev)
219{ 219{
220 i2c_bit_del_bus(&voodoo3_i2c_adapter); 220 i2c_del_adapter(&voodoo3_i2c_adapter);
221 i2c_bit_del_bus(&voodoo3_ddc_adapter); 221 i2c_del_adapter(&voodoo3_ddc_adapter);
222 iounmap(ioaddr); 222 iounmap(ioaddr);
223} 223}
224 224
diff --git a/drivers/i2c/busses/scx200_i2c.c b/drivers/i2c/busses/scx200_i2c.c
index 8ddbae4fafe6..6cd96e43aa72 100644
--- a/drivers/i2c/busses/scx200_i2c.c
+++ b/drivers/i2c/busses/scx200_i2c.c
@@ -116,7 +116,7 @@ static int scx200_i2c_init(void)
116 116
117static void scx200_i2c_cleanup(void) 117static void scx200_i2c_cleanup(void)
118{ 118{
119 i2c_bit_del_bus(&scx200_i2c_ops); 119 i2c_del_adapter(&scx200_i2c_ops);
120} 120}
121 121
122module_init(scx200_i2c_init); 122module_init(scx200_i2c_init);
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-28 02:19:25 -0500