diff options
author | Amaury Decrême <amaury.decreme@gmail.com> | 2013-01-29 15:22:26 -0500 |
---|---|---|
committer | Wolfram Sang <wolfram@the-dreams.de> | 2013-02-11 09:59:40 -0500 |
commit | 91991f34d71d4dd1d6333710d1e159db2f95e6e3 (patch) | |
tree | b1512becbd6f2da124bf8c52d1ac4783cb40b784 /drivers/i2c/busses/i2c-sis630.c | |
parent | 97da42dcb48079860b31dc83cb6bc5af15f9fc17 (diff) |
i2c: sis630: checkpatch cleanup
This patch corrects checkpatch errors.
The changes has also been removed as it has less meaning with version
control tools.
Signed-off-by: Amaury Decrême <amaury.decreme@gmail.com>
Reviewed-by: Jean Delvare <khali@linux-fr.org>
Signed-off-by: Wolfram Sang <wolfram@the-dreams.de>
Diffstat (limited to 'drivers/i2c/busses/i2c-sis630.c')
-rw-r--r-- | drivers/i2c/busses/i2c-sis630.c | 214 |
1 files changed, 109 insertions, 105 deletions
diff --git a/drivers/i2c/busses/i2c-sis630.c b/drivers/i2c/busses/i2c-sis630.c index 424545b50970..36a9556d7cfa 100644 --- a/drivers/i2c/busses/i2c-sis630.c +++ b/drivers/i2c/busses/i2c-sis630.c | |||
@@ -17,25 +17,6 @@ | |||
17 | */ | 17 | */ |
18 | 18 | ||
19 | /* | 19 | /* |
20 | Changes: | ||
21 | 24.08.2002 | ||
22 | Fixed the typo in sis630_access (Thanks to Mark M. Hoffman) | ||
23 | Changed sis630_transaction.(Thanks to Mark M. Hoffman) | ||
24 | 18.09.2002 | ||
25 | Added SIS730 as supported. | ||
26 | 21.09.2002 | ||
27 | Added high_clock module option.If this option is set | ||
28 | used Host Master Clock 56KHz (default 14KHz).For now we save old Host | ||
29 | Master Clock and after transaction completed restore (otherwise | ||
30 | it's confuse BIOS and hung Machine). | ||
31 | 24.09.2002 | ||
32 | Fixed typo in sis630_access | ||
33 | Fixed logical error by restoring of Host Master Clock | ||
34 | 31.07.2003 | ||
35 | Added block data read/write support. | ||
36 | */ | ||
37 | |||
38 | /* | ||
39 | Status: beta | 20 | Status: beta |
40 | 21 | ||
41 | Supports: | 22 | Supports: |
@@ -150,9 +131,10 @@ static inline void sis630_write(u8 reg, u8 data) | |||
150 | outb(data, smbus_base + reg); | 131 | outb(data, smbus_base + reg); |
151 | } | 132 | } |
152 | 133 | ||
153 | static int sis630_transaction_start(struct i2c_adapter *adap, int size, u8 *oldclock) | 134 | static int sis630_transaction_start(struct i2c_adapter *adap, int size, |
135 | u8 *oldclock) | ||
154 | { | 136 | { |
155 | int temp; | 137 | int temp; |
156 | 138 | ||
157 | /* Make sure the SMBus host is ready to start transmitting. */ | 139 | /* Make sure the SMBus host is ready to start transmitting. */ |
158 | temp = sis630_read(SMB_CNT); | 140 | temp = sis630_read(SMB_CNT); |
@@ -165,17 +147,18 @@ static int sis630_transaction_start(struct i2c_adapter *adap, int size, u8 *oldc | |||
165 | if (temp & (SMB_PROBE | SMB_HOSTBUSY)) { | 147 | if (temp & (SMB_PROBE | SMB_HOSTBUSY)) { |
166 | dev_dbg(&adap->dev, "Failed! (%02x)\n", temp); | 148 | dev_dbg(&adap->dev, "Failed! (%02x)\n", temp); |
167 | return -EBUSY; | 149 | return -EBUSY; |
168 | } else { | 150 | } else { |
169 | dev_dbg(&adap->dev, "Successful!\n"); | 151 | dev_dbg(&adap->dev, "Successful!\n"); |
170 | } | 152 | } |
171 | } | 153 | } |
172 | 154 | ||
173 | /* save old clock, so we can prevent machine for hung */ | 155 | /* save old clock, so we can prevent machine for hung */ |
174 | *oldclock = sis630_read(SMB_CNT); | 156 | *oldclock = sis630_read(SMB_CNT); |
175 | 157 | ||
176 | dev_dbg(&adap->dev, "saved clock 0x%02x\n", *oldclock); | 158 | dev_dbg(&adap->dev, "saved clock 0x%02x\n", *oldclock); |
177 | 159 | ||
178 | /* disable timeout interrupt , set Host Master Clock to 56KHz if requested */ | 160 | /* disable timeout interrupt, |
161 | * set Host Master Clock to 56KHz if requested */ | ||
179 | if (high_clock) | 162 | if (high_clock) |
180 | sis630_write(SMB_CNT, SMBCLK_SEL); | 163 | sis630_write(SMB_CNT, SMBCLK_SEL); |
181 | else | 164 | else |
@@ -228,7 +211,8 @@ static void sis630_transaction_end(struct i2c_adapter *adap, u8 oldclock) | |||
228 | /* clear all status "sticky" bits */ | 211 | /* clear all status "sticky" bits */ |
229 | sis630_write(SMB_STS, 0xFF); | 212 | sis630_write(SMB_STS, 0xFF); |
230 | 213 | ||
231 | dev_dbg(&adap->dev, "SMB_CNT before clock restore 0x%02x\n", sis630_read(SMB_CNT)); | 214 | dev_dbg(&adap->dev, |
215 | "SMB_CNT before clock restore 0x%02x\n", sis630_read(SMB_CNT)); | ||
232 | 216 | ||
233 | /* | 217 | /* |
234 | * restore old Host Master Clock if high_clock is set | 218 | * restore old Host Master Clock if high_clock is set |
@@ -237,7 +221,8 @@ static void sis630_transaction_end(struct i2c_adapter *adap, u8 oldclock) | |||
237 | if (high_clock && !(oldclock & SMBCLK_SEL)) | 221 | if (high_clock && !(oldclock & SMBCLK_SEL)) |
238 | sis630_write(SMB_CNT, sis630_read(SMB_CNT) & ~SMBCLK_SEL); | 222 | sis630_write(SMB_CNT, sis630_read(SMB_CNT) & ~SMBCLK_SEL); |
239 | 223 | ||
240 | dev_dbg(&adap->dev, "SMB_CNT after clock restore 0x%02x\n", sis630_read(SMB_CNT)); | 224 | dev_dbg(&adap->dev, |
225 | "SMB_CNT after clock restore 0x%02x\n", sis630_read(SMB_CNT)); | ||
241 | } | 226 | } |
242 | 227 | ||
243 | static int sis630_transaction(struct i2c_adapter *adap, int size) | 228 | static int sis630_transaction(struct i2c_adapter *adap, int size) |
@@ -254,7 +239,8 @@ static int sis630_transaction(struct i2c_adapter *adap, int size) | |||
254 | return result; | 239 | return result; |
255 | } | 240 | } |
256 | 241 | ||
257 | static int sis630_block_data(struct i2c_adapter *adap, union i2c_smbus_data *data, int read_write) | 242 | static int sis630_block_data(struct i2c_adapter *adap, |
243 | union i2c_smbus_data *data, int read_write) | ||
258 | { | 244 | { |
259 | int i, len = 0, rc = 0; | 245 | int i, len = 0, rc = 0; |
260 | u8 oldclock = 0; | 246 | u8 oldclock = 0; |
@@ -266,22 +252,26 @@ static int sis630_block_data(struct i2c_adapter *adap, union i2c_smbus_data *dat | |||
266 | else if (len > 32) | 252 | else if (len > 32) |
267 | len = 32; | 253 | len = 32; |
268 | sis630_write(SMB_COUNT, len); | 254 | sis630_write(SMB_COUNT, len); |
269 | for (i=1; i <= len; i++) { | 255 | for (i = 1; i <= len; i++) { |
270 | dev_dbg(&adap->dev, "set data 0x%02x\n", data->block[i]); | 256 | dev_dbg(&adap->dev, |
257 | "set data 0x%02x\n", data->block[i]); | ||
271 | /* set data */ | 258 | /* set data */ |
272 | sis630_write(SMB_BYTE+(i-1)%8, data->block[i]); | 259 | sis630_write(SMB_BYTE + (i - 1) % 8, data->block[i]); |
273 | if (i==8 || (len<8 && i==len)) { | 260 | if (i == 8 || (len < 8 && i == len)) { |
274 | dev_dbg(&adap->dev, "start trans len=%d i=%d\n",len ,i); | 261 | dev_dbg(&adap->dev, |
262 | "start trans len=%d i=%d\n", len, i); | ||
275 | /* first transaction */ | 263 | /* first transaction */ |
276 | rc = sis630_transaction_start(adap, | 264 | rc = sis630_transaction_start(adap, |
277 | SIS630_BLOCK_DATA, &oldclock); | 265 | SIS630_BLOCK_DATA, &oldclock); |
278 | if (rc) | 266 | if (rc) |
279 | return rc; | 267 | return rc; |
280 | } | 268 | } else if ((i - 1) % 8 == 7 || i == len) { |
281 | else if ((i-1)%8 == 7 || i==len) { | 269 | dev_dbg(&adap->dev, |
282 | dev_dbg(&adap->dev, "trans_wait len=%d i=%d\n",len,i); | 270 | "trans_wait len=%d i=%d\n", len, i); |
283 | if (i>8) { | 271 | if (i > 8) { |
284 | dev_dbg(&adap->dev, "clear smbary_sts len=%d i=%d\n",len,i); | 272 | dev_dbg(&adap->dev, |
273 | "clear smbary_sts" | ||
274 | " len=%d i=%d\n", len, i); | ||
285 | /* | 275 | /* |
286 | If this is not first transaction, | 276 | If this is not first transaction, |
287 | we must clear sticky bit. | 277 | we must clear sticky bit. |
@@ -292,13 +282,13 @@ static int sis630_block_data(struct i2c_adapter *adap, union i2c_smbus_data *dat | |||
292 | rc = sis630_transaction_wait(adap, | 282 | rc = sis630_transaction_wait(adap, |
293 | SIS630_BLOCK_DATA); | 283 | SIS630_BLOCK_DATA); |
294 | if (rc) { | 284 | if (rc) { |
295 | dev_dbg(&adap->dev, "trans_wait failed\n"); | 285 | dev_dbg(&adap->dev, |
286 | "trans_wait failed\n"); | ||
296 | break; | 287 | break; |
297 | } | 288 | } |
298 | } | 289 | } |
299 | } | 290 | } |
300 | } | 291 | } else { |
301 | else { | ||
302 | /* read request */ | 292 | /* read request */ |
303 | data->block[0] = len = 0; | 293 | data->block[0] = len = 0; |
304 | rc = sis630_transaction_start(adap, | 294 | rc = sis630_transaction_start(adap, |
@@ -319,18 +309,22 @@ static int sis630_block_data(struct i2c_adapter *adap, union i2c_smbus_data *dat | |||
319 | if (data->block[0] > 32) | 309 | if (data->block[0] > 32) |
320 | data->block[0] = 32; | 310 | data->block[0] = 32; |
321 | 311 | ||
322 | dev_dbg(&adap->dev, "block data read len=0x%x\n", data->block[0]); | 312 | dev_dbg(&adap->dev, |
313 | "block data read len=0x%x\n", data->block[0]); | ||
323 | 314 | ||
324 | for (i=0; i < 8 && len < data->block[0]; i++,len++) { | 315 | for (i = 0; i < 8 && len < data->block[0]; i++, len++) { |
325 | dev_dbg(&adap->dev, "read i=%d len=%d\n", i, len); | 316 | dev_dbg(&adap->dev, |
326 | data->block[len+1] = sis630_read(SMB_BYTE+i); | 317 | "read i=%d len=%d\n", i, len); |
318 | data->block[len + 1] = sis630_read(SMB_BYTE + | ||
319 | i); | ||
327 | } | 320 | } |
328 | 321 | ||
329 | dev_dbg(&adap->dev, "clear smbary_sts len=%d i=%d\n",len,i); | 322 | dev_dbg(&adap->dev, |
323 | "clear smbary_sts len=%d i=%d\n", len, i); | ||
330 | 324 | ||
331 | /* clear SMBARY_STS */ | 325 | /* clear SMBARY_STS */ |
332 | sis630_write(SMB_STS, BYTE_DONE_STS); | 326 | sis630_write(SMB_STS, BYTE_DONE_STS); |
333 | } while(len < data->block[0]); | 327 | } while (len < data->block[0]); |
334 | } | 328 | } |
335 | 329 | ||
336 | sis630_transaction_end(adap, oldclock); | 330 | sis630_transaction_end(adap, oldclock); |
@@ -346,42 +340,47 @@ static s32 sis630_access(struct i2c_adapter *adap, u16 addr, | |||
346 | int status; | 340 | int status; |
347 | 341 | ||
348 | switch (size) { | 342 | switch (size) { |
349 | case I2C_SMBUS_QUICK: | 343 | case I2C_SMBUS_QUICK: |
350 | sis630_write(SMB_ADDR, ((addr & 0x7f) << 1) | (read_write & 0x01)); | 344 | sis630_write(SMB_ADDR, |
351 | size = SIS630_QUICK; | 345 | ((addr & 0x7f) << 1) | (read_write & 0x01)); |
352 | break; | 346 | size = SIS630_QUICK; |
353 | case I2C_SMBUS_BYTE: | 347 | break; |
354 | sis630_write(SMB_ADDR, ((addr & 0x7f) << 1) | (read_write & 0x01)); | 348 | case I2C_SMBUS_BYTE: |
355 | if (read_write == I2C_SMBUS_WRITE) | 349 | sis630_write(SMB_ADDR, |
356 | sis630_write(SMB_CMD, command); | 350 | ((addr & 0x7f) << 1) | (read_write & 0x01)); |
357 | size = SIS630_BYTE; | 351 | if (read_write == I2C_SMBUS_WRITE) |
358 | break; | ||
359 | case I2C_SMBUS_BYTE_DATA: | ||
360 | sis630_write(SMB_ADDR, ((addr & 0x7f) << 1) | (read_write & 0x01)); | ||
361 | sis630_write(SMB_CMD, command); | ||
362 | if (read_write == I2C_SMBUS_WRITE) | ||
363 | sis630_write(SMB_BYTE, data->byte); | ||
364 | size = SIS630_BYTE_DATA; | ||
365 | break; | ||
366 | case I2C_SMBUS_PROC_CALL: | ||
367 | case I2C_SMBUS_WORD_DATA: | ||
368 | sis630_write(SMB_ADDR,((addr & 0x7f) << 1) | (read_write & 0x01)); | ||
369 | sis630_write(SMB_CMD, command); | 352 | sis630_write(SMB_CMD, command); |
370 | if (read_write == I2C_SMBUS_WRITE) { | 353 | size = SIS630_BYTE; |
371 | sis630_write(SMB_BYTE, data->word & 0xff); | 354 | break; |
372 | sis630_write(SMB_BYTE + 1,(data->word & 0xff00) >> 8); | 355 | case I2C_SMBUS_BYTE_DATA: |
373 | } | 356 | sis630_write(SMB_ADDR, |
374 | size = (size == I2C_SMBUS_PROC_CALL ? SIS630_PCALL : SIS630_WORD_DATA); | 357 | ((addr & 0x7f) << 1) | (read_write & 0x01)); |
375 | break; | 358 | sis630_write(SMB_CMD, command); |
376 | case I2C_SMBUS_BLOCK_DATA: | 359 | if (read_write == I2C_SMBUS_WRITE) |
377 | sis630_write(SMB_ADDR,((addr & 0x7f) << 1) | (read_write & 0x01)); | 360 | sis630_write(SMB_BYTE, data->byte); |
378 | sis630_write(SMB_CMD, command); | 361 | size = SIS630_BYTE_DATA; |
379 | size = SIS630_BLOCK_DATA; | 362 | break; |
380 | return sis630_block_data(adap, data, read_write); | 363 | case I2C_SMBUS_PROC_CALL: |
381 | default: | 364 | case I2C_SMBUS_WORD_DATA: |
382 | dev_warn(&adap->dev, "Unsupported transaction %d\n", | 365 | sis630_write(SMB_ADDR, |
383 | size); | 366 | ((addr & 0x7f) << 1) | (read_write & 0x01)); |
384 | return -EOPNOTSUPP; | 367 | sis630_write(SMB_CMD, command); |
368 | if (read_write == I2C_SMBUS_WRITE) { | ||
369 | sis630_write(SMB_BYTE, data->word & 0xff); | ||
370 | sis630_write(SMB_BYTE + 1, (data->word & 0xff00) >> 8); | ||
371 | } | ||
372 | size = (size == I2C_SMBUS_PROC_CALL ? | ||
373 | SIS630_PCALL : SIS630_WORD_DATA); | ||
374 | break; | ||
375 | case I2C_SMBUS_BLOCK_DATA: | ||
376 | sis630_write(SMB_ADDR, | ||
377 | ((addr & 0x7f) << 1) | (read_write & 0x01)); | ||
378 | sis630_write(SMB_CMD, command); | ||
379 | size = SIS630_BLOCK_DATA; | ||
380 | return sis630_block_data(adap, data, read_write); | ||
381 | default: | ||
382 | dev_warn(&adap->dev, "Unsupported transaction %d\n", size); | ||
383 | return -EOPNOTSUPP; | ||
385 | } | 384 | } |
386 | 385 | ||
387 | status = sis630_transaction(adap, size); | 386 | status = sis630_transaction(adap, size); |
@@ -393,15 +392,16 @@ static s32 sis630_access(struct i2c_adapter *adap, u16 addr, | |||
393 | return 0; | 392 | return 0; |
394 | } | 393 | } |
395 | 394 | ||
396 | switch(size) { | 395 | switch (size) { |
397 | case SIS630_BYTE: | 396 | case SIS630_BYTE: |
398 | case SIS630_BYTE_DATA: | 397 | case SIS630_BYTE_DATA: |
399 | data->byte = sis630_read(SMB_BYTE); | 398 | data->byte = sis630_read(SMB_BYTE); |
400 | break; | 399 | break; |
401 | case SIS630_PCALL: | 400 | case SIS630_PCALL: |
402 | case SIS630_WORD_DATA: | 401 | case SIS630_WORD_DATA: |
403 | data->word = sis630_read(SMB_BYTE) + (sis630_read(SMB_BYTE + 1) << 8); | 402 | data->word = sis630_read(SMB_BYTE) + |
404 | break; | 403 | (sis630_read(SMB_BYTE + 1) << 8); |
404 | break; | ||
405 | } | 405 | } |
406 | 406 | ||
407 | return 0; | 407 | return 0; |
@@ -409,9 +409,9 @@ static s32 sis630_access(struct i2c_adapter *adap, u16 addr, | |||
409 | 409 | ||
410 | static u32 sis630_func(struct i2c_adapter *adapter) | 410 | static u32 sis630_func(struct i2c_adapter *adapter) |
411 | { | 411 | { |
412 | return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | I2C_FUNC_SMBUS_BYTE_DATA | | 412 | return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | |
413 | I2C_FUNC_SMBUS_WORD_DATA | I2C_FUNC_SMBUS_PROC_CALL | | 413 | I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA | |
414 | I2C_FUNC_SMBUS_BLOCK_DATA; | 414 | I2C_FUNC_SMBUS_PROC_CALL | I2C_FUNC_SMBUS_BLOCK_DATA; |
415 | } | 415 | } |
416 | 416 | ||
417 | static int sis630_setup(struct pci_dev *sis630_dev) | 417 | static int sis630_setup(struct pci_dev *sis630_dev) |
@@ -423,19 +423,19 @@ static int sis630_setup(struct pci_dev *sis630_dev) | |||
423 | unsigned short acpi_base; | 423 | unsigned short acpi_base; |
424 | 424 | ||
425 | /* check for supported SiS devices */ | 425 | /* check for supported SiS devices */ |
426 | for (i=0; supported[i] > 0 ; i++) { | 426 | for (i = 0; supported[i] > 0; i++) { |
427 | if ((dummy = pci_get_device(PCI_VENDOR_ID_SI, supported[i], dummy))) | 427 | dummy = pci_get_device(PCI_VENDOR_ID_SI, supported[i], dummy); |
428 | if (dummy) | ||
428 | break; /* found */ | 429 | break; /* found */ |
429 | } | 430 | } |
430 | 431 | ||
431 | if (dummy) { | 432 | if (dummy) { |
432 | pci_dev_put(dummy); | 433 | pci_dev_put(dummy); |
433 | } | 434 | } else if (force) { |
434 | else if (force) { | 435 | dev_err(&sis630_dev->dev, |
435 | dev_err(&sis630_dev->dev, "WARNING: Can't detect SIS630 compatible device, but " | 436 | "WARNING: Can't detect SIS630 compatible device, but " |
436 | "loading because of force option enabled\n"); | 437 | "loading because of force option enabled\n"); |
437 | } | 438 | } else { |
438 | else { | ||
439 | return -ENODEV; | 439 | return -ENODEV; |
440 | } | 440 | } |
441 | 441 | ||
@@ -443,7 +443,7 @@ static int sis630_setup(struct pci_dev *sis630_dev) | |||
443 | Enable ACPI first , so we can accsess reg 74-75 | 443 | Enable ACPI first , so we can accsess reg 74-75 |
444 | in acpi io space and read acpi base addr | 444 | in acpi io space and read acpi base addr |
445 | */ | 445 | */ |
446 | if (pci_read_config_byte(sis630_dev, SIS630_BIOS_CTL_REG,&b)) { | 446 | if (pci_read_config_byte(sis630_dev, SIS630_BIOS_CTL_REG, &b)) { |
447 | dev_err(&sis630_dev->dev, "Error: Can't read bios ctl reg\n"); | 447 | dev_err(&sis630_dev->dev, "Error: Can't read bios ctl reg\n"); |
448 | retval = -ENODEV; | 448 | retval = -ENODEV; |
449 | goto exit; | 449 | goto exit; |
@@ -457,8 +457,10 @@ static int sis630_setup(struct pci_dev *sis630_dev) | |||
457 | } | 457 | } |
458 | 458 | ||
459 | /* Determine the ACPI base address */ | 459 | /* Determine the ACPI base address */ |
460 | if (pci_read_config_word(sis630_dev,SIS630_ACPI_BASE_REG,&acpi_base)) { | 460 | if (pci_read_config_word(sis630_dev, |
461 | dev_err(&sis630_dev->dev, "Error: Can't determine ACPI base address\n"); | 461 | SIS630_ACPI_BASE_REG, &acpi_base)) { |
462 | dev_err(&sis630_dev->dev, | ||
463 | "Error: Can't determine ACPI base address\n"); | ||
462 | retval = -ENODEV; | 464 | retval = -ENODEV; |
463 | goto exit; | 465 | goto exit; |
464 | } | 466 | } |
@@ -516,12 +518,14 @@ static DEFINE_PCI_DEVICE_TABLE(sis630_ids) = { | |||
516 | { 0, } | 518 | { 0, } |
517 | }; | 519 | }; |
518 | 520 | ||
519 | MODULE_DEVICE_TABLE (pci, sis630_ids); | 521 | MODULE_DEVICE_TABLE(pci, sis630_ids); |
520 | 522 | ||
521 | static int sis630_probe(struct pci_dev *dev, const struct pci_device_id *id) | 523 | static int sis630_probe(struct pci_dev *dev, const struct pci_device_id *id) |
522 | { | 524 | { |
523 | if (sis630_setup(dev)) { | 525 | if (sis630_setup(dev)) { |
524 | dev_err(&dev->dev, "SIS630 comp. bus not detected, module not inserted.\n"); | 526 | dev_err(&dev->dev, |
527 | "SIS630 compatible bus not detected, " | ||
528 | "module not inserted.\n"); | ||
525 | return -ENODEV; | 529 | return -ENODEV; |
526 | } | 530 | } |
527 | 531 | ||