i2c: i2c-sh_mobile: support I2C hardware block with a faster operating clock

On newer SH-/R-Mobile SoCs, a clock supply to the I2C hardware block,
which is used to generate the SCL clock output, is getting faster than
before, while on the other hand, the SCL clock control registers, ICCH
and ICCL, stay unchanged in 9-bit-wide (8+1).

On such silicons, the internal SCL clock counter gets incremented every
2 clocks of the operating clock.

This patch makes it configurable through platform data.

Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>

1 files changed, 5 insertions, 0 deletions

diff --git a/drivers/i2c/busses/i2c-sh_mobile.c b/drivers/i2c/busses/i2c-sh_mobile.c
index 4dc0cc3611c2..4c283583bea0 100644
--- a/drivers/i2c/busses/i2c-sh_mobile.c
+++ b/drivers/i2c/busses/i2c-sh_mobile.c
@@ -120,6 +120,7 @@ struct sh_mobile_i2c_data {
         void __iomem *reg;
         struct i2c_adapter adap;
         unsigned long bus_speed;
+        unsigned int clks_per_count;
         struct clk *clk;
         u_int8_t icic;
         u_int8_t flags;
@@ -231,6 +232,7 @@ static void sh_mobile_i2c_init(struct sh_mobile_i2c_data *pd)
         /* Get clock rate after clock is enabled */
         clk_enable(pd->clk);
         i2c_clk_khz = clk_get_rate(pd->clk) / 1000;
+        i2c_clk_khz /= pd->clks_per_count;
 
         if (pd->bus_speed == STANDARD_MODE) {
                 tLOW    = 47;   /* tLOW = 4.7 us */
@@ -658,6 +660,9 @@ static int sh_mobile_i2c_probe(struct platform_device *dev)
         pd->bus_speed = STANDARD_MODE;
         if (pdata && pdata->bus_speed)
                 pd->bus_speed = pdata->bus_speed;
+        pd->clks_per_count = 1;
+        if (pdata && pdata->clks_per_count)
+                pd->clks_per_count = pdata->clks_per_count;
 
         /* The IIC blocks on SH-Mobile ARM processors
          * come with two new bits in ICIC.