diff options
author | Jean Delvare <khali@linux-fr.org> | 2007-07-12 08:12:31 -0400 |
---|---|---|
committer | Jean Delvare <khali@hyperion.delvare> | 2007-07-12 08:12:31 -0400 |
commit | c6e16295b71ec006c8cb6d13520e9194652a6026 (patch) | |
tree | 2d901a6284e53f5523f42f58a37f6736a4c359b1 /drivers/i2c/busses/i2c-savage4.c | |
parent | e296fb7f301f3c3398adc6d991b097cfa73e1c0c (diff) |
i2c-savage4: Delete many unused defines
Signed-off-by: Jean Delvare <khali@linux-fr.org>
Diffstat (limited to 'drivers/i2c/busses/i2c-savage4.c')
-rw-r--r-- | drivers/i2c/busses/i2c-savage4.c | 21 |
1 files changed, 1 insertions, 20 deletions
diff --git a/drivers/i2c/busses/i2c-savage4.c b/drivers/i2c/busses/i2c-savage4.c index b7fb65c30112..8adf4abaa035 100644 --- a/drivers/i2c/busses/i2c-savage4.c +++ b/drivers/i2c/busses/i2c-savage4.c | |||
@@ -25,8 +25,6 @@ | |||
25 | /* This interfaces to the I2C bus of the Savage4 to gain access to | 25 | /* This interfaces to the I2C bus of the Savage4 to gain access to |
26 | the BT869 and possibly other I2C devices. The DDC bus is not | 26 | the BT869 and possibly other I2C devices. The DDC bus is not |
27 | yet supported because its register is not memory-mapped. | 27 | yet supported because its register is not memory-mapped. |
28 | However we leave the DDC code here, commented out, to make | ||
29 | it easier to add later. | ||
30 | */ | 28 | */ |
31 | 29 | ||
32 | #include <linux/kernel.h> | 30 | #include <linux/kernel.h> |
@@ -37,36 +35,19 @@ | |||
37 | #include <linux/i2c-algo-bit.h> | 35 | #include <linux/i2c-algo-bit.h> |
38 | #include <asm/io.h> | 36 | #include <asm/io.h> |
39 | 37 | ||
40 | /* 3DFX defines */ | 38 | /* device IDs */ |
41 | #define PCI_CHIP_SAVAGE3D 0x8A20 | ||
42 | #define PCI_CHIP_SAVAGE3D_MV 0x8A21 | ||
43 | #define PCI_CHIP_SAVAGE4 0x8A22 | 39 | #define PCI_CHIP_SAVAGE4 0x8A22 |
44 | #define PCI_CHIP_SAVAGE2000 0x9102 | 40 | #define PCI_CHIP_SAVAGE2000 0x9102 |
45 | #define PCI_CHIP_PROSAVAGE_PM 0x8A25 | ||
46 | #define PCI_CHIP_PROSAVAGE_KM 0x8A26 | ||
47 | #define PCI_CHIP_SAVAGE_MX_MV 0x8c10 | ||
48 | #define PCI_CHIP_SAVAGE_MX 0x8c11 | ||
49 | #define PCI_CHIP_SAVAGE_IX_MV 0x8c12 | ||
50 | #define PCI_CHIP_SAVAGE_IX 0x8c13 | ||
51 | 41 | ||
52 | #define REG 0xff20 /* Serial Port 1 Register */ | 42 | #define REG 0xff20 /* Serial Port 1 Register */ |
53 | 43 | ||
54 | /* bit locations in the register */ | 44 | /* bit locations in the register */ |
55 | #define DDC_ENAB 0x00040000 | ||
56 | #define DDC_SCL_OUT 0x00080000 | ||
57 | #define DDC_SDA_OUT 0x00100000 | ||
58 | #define DDC_SCL_IN 0x00200000 | ||
59 | #define DDC_SDA_IN 0x00400000 | ||
60 | #define I2C_ENAB 0x00000020 | 45 | #define I2C_ENAB 0x00000020 |
61 | #define I2C_SCL_OUT 0x00000001 | 46 | #define I2C_SCL_OUT 0x00000001 |
62 | #define I2C_SDA_OUT 0x00000002 | 47 | #define I2C_SDA_OUT 0x00000002 |
63 | #define I2C_SCL_IN 0x00000008 | 48 | #define I2C_SCL_IN 0x00000008 |
64 | #define I2C_SDA_IN 0x00000010 | 49 | #define I2C_SDA_IN 0x00000010 |
65 | 50 | ||
66 | /* initialization states */ | ||
67 | #define INIT2 0x20 | ||
68 | #define INIT3 0x04 | ||
69 | |||
70 | /* delays */ | 51 | /* delays */ |
71 | #define CYCLE_DELAY 10 | 52 | #define CYCLE_DELAY 10 |
72 | #define TIMEOUT (HZ / 2) | 53 | #define TIMEOUT (HZ / 2) |