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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2009-03-29 23:04:53 -0400
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2009-03-29 23:04:53 -0400
commit9ff9a26b786c35ee8d2a66222924a807ec851a9f (patch)
treedb432a17bccca1ca2c16907f0ee83ac449ed4012 /drivers/i2c/busses/i2c-omap.c
parent0a3108beea9143225119d5e7c72a8e2c64f3eb7d (diff)
parent0d34fb8e93ceba7b6dad0062dbb4a0813bacd75b (diff)
Merge commit 'origin/master' into next
Manual merge of: arch/powerpc/include/asm/elf.h drivers/i2c/busses/i2c-mpc.c
Diffstat (limited to 'drivers/i2c/busses/i2c-omap.c')
-rw-r--r--drivers/i2c/busses/i2c-omap.c47
1 files changed, 22 insertions, 25 deletions
diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index be8ee2cac8bb..ece0125a1ee5 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -193,22 +193,24 @@ static inline u16 omap_i2c_read_reg(struct omap_i2c_dev *i2c_dev, int reg)
193 193
194static int __init omap_i2c_get_clocks(struct omap_i2c_dev *dev) 194static int __init omap_i2c_get_clocks(struct omap_i2c_dev *dev)
195{ 195{
196 if (cpu_is_omap16xx() || cpu_class_is_omap2()) { 196 int ret;
197 dev->iclk = clk_get(dev->dev, "i2c_ick"); 197
198 if (IS_ERR(dev->iclk)) { 198 dev->iclk = clk_get(dev->dev, "ick");
199 dev->iclk = NULL; 199 if (IS_ERR(dev->iclk)) {
200 return -ENODEV; 200 ret = PTR_ERR(dev->iclk);
201 } 201 dev->iclk = NULL;
202 return ret;
202 } 203 }
203 204
204 dev->fclk = clk_get(dev->dev, "i2c_fck"); 205 dev->fclk = clk_get(dev->dev, "fck");
205 if (IS_ERR(dev->fclk)) { 206 if (IS_ERR(dev->fclk)) {
207 ret = PTR_ERR(dev->fclk);
206 if (dev->iclk != NULL) { 208 if (dev->iclk != NULL) {
207 clk_put(dev->iclk); 209 clk_put(dev->iclk);
208 dev->iclk = NULL; 210 dev->iclk = NULL;
209 } 211 }
210 dev->fclk = NULL; 212 dev->fclk = NULL;
211 return -ENODEV; 213 return ret;
212 } 214 }
213 215
214 return 0; 216 return 0;
@@ -218,18 +220,15 @@ static void omap_i2c_put_clocks(struct omap_i2c_dev *dev)
218{ 220{
219 clk_put(dev->fclk); 221 clk_put(dev->fclk);
220 dev->fclk = NULL; 222 dev->fclk = NULL;
221 if (dev->iclk != NULL) { 223 clk_put(dev->iclk);
222 clk_put(dev->iclk); 224 dev->iclk = NULL;
223 dev->iclk = NULL;
224 }
225} 225}
226 226
227static void omap_i2c_unidle(struct omap_i2c_dev *dev) 227static void omap_i2c_unidle(struct omap_i2c_dev *dev)
228{ 228{
229 WARN_ON(!dev->idle); 229 WARN_ON(!dev->idle);
230 230
231 if (dev->iclk != NULL) 231 clk_enable(dev->iclk);
232 clk_enable(dev->iclk);
233 clk_enable(dev->fclk); 232 clk_enable(dev->fclk);
234 dev->idle = 0; 233 dev->idle = 0;
235 if (dev->iestate) 234 if (dev->iestate)
@@ -254,8 +253,7 @@ static void omap_i2c_idle(struct omap_i2c_dev *dev)
254 } 253 }
255 dev->idle = 1; 254 dev->idle = 1;
256 clk_disable(dev->fclk); 255 clk_disable(dev->fclk);
257 if (dev->iclk != NULL) 256 clk_disable(dev->iclk);
258 clk_disable(dev->iclk);
259} 257}
260 258
261static int omap_i2c_init(struct omap_i2c_dev *dev) 259static int omap_i2c_init(struct omap_i2c_dev *dev)
@@ -312,15 +310,14 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
312 omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0); 310 omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0);
313 311
314 if (cpu_class_is_omap1()) { 312 if (cpu_class_is_omap1()) {
315 struct clk *armxor_ck; 313 /*
316 314 * The I2C functional clock is the armxor_ck, so there's
317 armxor_ck = clk_get(NULL, "armxor_ck"); 315 * no need to get "armxor_ck" separately. Now, if OMAP2420
318 if (IS_ERR(armxor_ck)) 316 * always returns 12MHz for the functional clock, we can
319 dev_warn(dev->dev, "Could not get armxor_ck\n"); 317 * do this bit unconditionally.
320 else { 318 */
321 fclk_rate = clk_get_rate(armxor_ck); 319 fclk_rate = clk_get_rate(dev->fclk);
322 clk_put(armxor_ck); 320
323 }
324 /* TRM for 5912 says the I2C clock must be prescaled to be 321 /* TRM for 5912 says the I2C clock must be prescaled to be
325 * between 7 - 12 MHz. The XOR input clock is typically 322 * between 7 - 12 MHz. The XOR input clock is typically
326 * 12, 13 or 19.2 MHz. So we should have code that produces: 323 * 12, 13 or 19.2 MHz. So we should have code that produces: