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authorJoakim Tjernlund <Joakim.Tjernlund@transmode.se>2009-10-13 04:12:03 -0400
committerBen Dooks <ben-linux@fluff.org>2009-11-02 18:28:47 -0500
commit45da790ebe746bb29f7e4adf806c020db6ff7755 (patch)
tree0aa6a12cb9b128dd2bde8d71466e878420bc67c0 /drivers/i2c/busses/i2c-mpc.c
parentdb3a3d4ef7f676501325ae9c7ce0c193c2c1b28f (diff)
i2c-mpc: Do not generate STOP after read.
The driver always ends a read with a STOP condition which breaks subsequent I2C reads/writes in the same transaction as these expect to do a repeated START(ReSTART). This will also help I2C multimaster as the bus will not be released after the first read, but when the whole transaction ends. Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'drivers/i2c/busses/i2c-mpc.c')
-rw-r--r--drivers/i2c/busses/i2c-mpc.c10
1 files changed, 2 insertions, 8 deletions
diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c
index d325e86e3103..f627001108b8 100644
--- a/drivers/i2c/busses/i2c-mpc.c
+++ b/drivers/i2c/busses/i2c-mpc.c
@@ -365,9 +365,6 @@ static int mpc_write(struct mpc_i2c *i2c, int target,
365 unsigned timeout = i2c->adap.timeout; 365 unsigned timeout = i2c->adap.timeout;
366 u32 flags = restart ? CCR_RSTA : 0; 366 u32 flags = restart ? CCR_RSTA : 0;
367 367
368 /* Start with MEN */
369 if (!restart)
370 writeccr(i2c, CCR_MEN);
371 /* Start as master */ 368 /* Start as master */
372 writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_MTX | flags); 369 writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_MTX | flags);
373 /* Write target byte */ 370 /* Write target byte */
@@ -396,9 +393,6 @@ static int mpc_read(struct mpc_i2c *i2c, int target,
396 int i, result; 393 int i, result;
397 u32 flags = restart ? CCR_RSTA : 0; 394 u32 flags = restart ? CCR_RSTA : 0;
398 395
399 /* Start with MEN */
400 if (!restart)
401 writeccr(i2c, CCR_MEN);
402 /* Switch to read - restart */ 396 /* Switch to read - restart */
403 writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_MTX | flags); 397 writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_MTX | flags);
404 /* Write target address byte - this time with the read flag set */ 398 /* Write target address byte - this time with the read flag set */
@@ -425,9 +419,9 @@ static int mpc_read(struct mpc_i2c *i2c, int target,
425 /* Generate txack on next to last byte */ 419 /* Generate txack on next to last byte */
426 if (i == length - 2) 420 if (i == length - 2)
427 writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_TXAK); 421 writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_TXAK);
428 /* Generate stop on last byte */ 422 /* Do not generate stop on last byte */
429 if (i == length - 1) 423 if (i == length - 1)
430 writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_TXAK); 424 writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_MTX);
431 data[i] = readb(i2c->base + MPC_I2C_DR); 425 data[i] = readb(i2c->base + MPC_I2C_DR);
432 } 426 }
433 427