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authorRomain Baeriswyl <Romain.Baeriswyl@abilis.com>2014-08-20 10:29:08 -0400
committerWolfram Sang <wsa@the-dreams.de>2014-09-29 16:41:16 -0400
commit8e5f6b2a289c4374456fb785900b0b7445b719e6 (patch)
tree65ebc1319d0c63a6d09d125930fcffa21f1f3177 /drivers/i2c/busses/i2c-designware-platdrv.c
parentfe82dcec644244676d55a1384c958d5f67979adb (diff)
i2c: designware: add support of I2C standard mode
Some legacy devices support ony I2C standard mode at 100kHz. This patch allows to select the standard mode through the DTS with the use of the existing clock-frequency parameter. When clock-frequency parameter is not set, the fast mode is selected. Only when the parameter is set at 100000, the standard mode is selected. Signed-off-by: Romain Baeriswyl <romainba@abilis.com> Reviewed-by: Christian Ruppert <christian.ruppert@abilis.com> Acked-by: Alan Tull <atull@opensource.altera.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Diffstat (limited to 'drivers/i2c/busses/i2c-designware-platdrv.c')
-rw-r--r--drivers/i2c/busses/i2c-designware-platdrv.c23
1 files changed, 21 insertions, 2 deletions
diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c b/drivers/i2c/busses/i2c-designware-platdrv.c
index bc8773333155..8193e8eea764 100644
--- a/drivers/i2c/busses/i2c-designware-platdrv.c
+++ b/drivers/i2c/busses/i2c-designware-platdrv.c
@@ -123,6 +123,7 @@ static int dw_i2c_probe(struct platform_device *pdev)
123 struct i2c_adapter *adap; 123 struct i2c_adapter *adap;
124 struct resource *mem; 124 struct resource *mem;
125 int irq, r; 125 int irq, r;
126 u32 clk_freq;
126 127
127 irq = platform_get_irq(pdev, 0); 128 irq = platform_get_irq(pdev, 0);
128 if (irq < 0) { 129 if (irq < 0) {
@@ -152,6 +153,9 @@ static int dw_i2c_probe(struct platform_device *pdev)
152 return PTR_ERR(dev->clk); 153 return PTR_ERR(dev->clk);
153 clk_prepare_enable(dev->clk); 154 clk_prepare_enable(dev->clk);
154 155
156 /* fast mode by default because of legacy reasons */
157 clk_freq = 400000;
158
155 if (pdev->dev.of_node) { 159 if (pdev->dev.of_node) {
156 u32 ht = 0; 160 u32 ht = 0;
157 u32 ic_clk = dev->get_clk_rate_khz(dev); 161 u32 ic_clk = dev->get_clk_rate_khz(dev);
@@ -167,6 +171,17 @@ static int dw_i2c_probe(struct platform_device *pdev)
167 of_property_read_u32(pdev->dev.of_node, 171 of_property_read_u32(pdev->dev.of_node,
168 "i2c-scl-falling-time-ns", 172 "i2c-scl-falling-time-ns",
169 &dev->scl_falling_time); 173 &dev->scl_falling_time);
174
175 of_property_read_u32(pdev->dev.of_node, "clock-frequency",
176 &clk_freq);
177
178 /* Only standard mode at 100kHz and fast mode at 400kHz
179 * are supported.
180 */
181 if (clk_freq != 100000 && clk_freq != 400000) {
182 dev_err(&pdev->dev, "Only 100kHz and 400kHz supported");
183 return -EINVAL;
184 }
170 } 185 }
171 186
172 dev->functionality = 187 dev->functionality =
@@ -176,8 +191,12 @@ static int dw_i2c_probe(struct platform_device *pdev)
176 I2C_FUNC_SMBUS_BYTE_DATA | 191 I2C_FUNC_SMBUS_BYTE_DATA |
177 I2C_FUNC_SMBUS_WORD_DATA | 192 I2C_FUNC_SMBUS_WORD_DATA |
178 I2C_FUNC_SMBUS_I2C_BLOCK; 193 I2C_FUNC_SMBUS_I2C_BLOCK;
179 dev->master_cfg = DW_IC_CON_MASTER | DW_IC_CON_SLAVE_DISABLE | 194 if (clk_freq == 100000)
180 DW_IC_CON_RESTART_EN | DW_IC_CON_SPEED_FAST; 195 dev->master_cfg = DW_IC_CON_MASTER | DW_IC_CON_SLAVE_DISABLE |
196 DW_IC_CON_RESTART_EN | DW_IC_CON_SPEED_STD;
197 else
198 dev->master_cfg = DW_IC_CON_MASTER | DW_IC_CON_SLAVE_DISABLE |
199 DW_IC_CON_RESTART_EN | DW_IC_CON_SPEED_FAST;
181 200
182 /* Try first if we can configure the device from ACPI */ 201 /* Try first if we can configure the device from ACPI */
183 r = dw_i2c_acpi_configure(pdev); 202 r = dw_i2c_acpi_configure(pdev);