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authorGuenter Roeck <linux@roeck-us.net>2013-07-08 16:15:04 -0400
committerGuenter Roeck <linux@roeck-us.net>2013-08-12 01:10:39 -0400
commitdf612d5fb73d731e51964a6501fed7d465c79e95 (patch)
tree9352b5a06b864b706cbde97df1b8603a96dc0ecb /drivers/hwmon
parent578ab5f0e4b13a6f63e9ee108a44d7a20f6ccfce (diff)
hwmon: (nct6775) Avoid using device platform data outside probe function
Plan going forward is to attach all device attributes to the hwmon device and no longer to the platform device. With that change, accessing platform data outside the probe function will be more difficult. To avoid the problem, change code to no longer rely on it. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Diffstat (limited to 'drivers/hwmon')
-rw-r--r--drivers/hwmon/nct6775.c51
1 files changed, 25 insertions, 26 deletions
diff --git a/drivers/hwmon/nct6775.c b/drivers/hwmon/nct6775.c
index 3a9bb6671f29..f0941d78b985 100644
--- a/drivers/hwmon/nct6775.c
+++ b/drivers/hwmon/nct6775.c
@@ -720,6 +720,7 @@ static inline u8 in_to_reg(u32 val, u8 nr)
720 720
721struct nct6775_data { 721struct nct6775_data {
722 int addr; /* IO base of hw monitor block */ 722 int addr; /* IO base of hw monitor block */
723 int sioreg; /* SIO register address */
723 enum kinds kind; 724 enum kinds kind;
724 const char *name; 725 const char *name;
725 726
@@ -3008,7 +3009,6 @@ clear_caseopen(struct device *dev, struct device_attribute *attr,
3008 const char *buf, size_t count) 3009 const char *buf, size_t count)
3009{ 3010{
3010 struct nct6775_data *data = dev_get_drvdata(dev); 3011 struct nct6775_data *data = dev_get_drvdata(dev);
3011 struct nct6775_sio_data *sio_data = dev->platform_data;
3012 int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE; 3012 int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
3013 unsigned long val; 3013 unsigned long val;
3014 u8 reg; 3014 u8 reg;
@@ -3024,19 +3024,19 @@ clear_caseopen(struct device *dev, struct device_attribute *attr,
3024 * The CR registers are the same for all chips, and not all chips 3024 * The CR registers are the same for all chips, and not all chips
3025 * support clearing the caseopen status through "regular" registers. 3025 * support clearing the caseopen status through "regular" registers.
3026 */ 3026 */
3027 ret = superio_enter(sio_data->sioreg); 3027 ret = superio_enter(data->sioreg);
3028 if (ret) { 3028 if (ret) {
3029 count = ret; 3029 count = ret;
3030 goto error; 3030 goto error;
3031 } 3031 }
3032 3032
3033 superio_select(sio_data->sioreg, NCT6775_LD_ACPI); 3033 superio_select(data->sioreg, NCT6775_LD_ACPI);
3034 reg = superio_inb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr]); 3034 reg = superio_inb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
3035 reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr]; 3035 reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3036 superio_outb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg); 3036 superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3037 reg &= ~NCT6775_CR_CASEOPEN_CLR_MASK[nr]; 3037 reg &= ~NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3038 superio_outb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg); 3038 superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3039 superio_exit(sio_data->sioreg); 3039 superio_exit(data->sioreg);
3040 3040
3041 data->valid = false; /* Force cache refresh */ 3041 data->valid = false; /* Force cache refresh */
3042error: 3042error:
@@ -3163,22 +3163,22 @@ static inline void nct6775_init_device(struct nct6775_data *data)
3163} 3163}
3164 3164
3165static void 3165static void
3166nct6775_check_fan_inputs(const struct nct6775_sio_data *sio_data, 3166nct6775_check_fan_inputs(struct nct6775_data *data)
3167 struct nct6775_data *data)
3168{ 3167{
3169 int regval;
3170 bool fan3pin, fan4pin, fan4min, fan5pin, fan6pin; 3168 bool fan3pin, fan4pin, fan4min, fan5pin, fan6pin;
3171 bool pwm3pin, pwm4pin, pwm5pin, pwm6pin; 3169 bool pwm3pin, pwm4pin, pwm5pin, pwm6pin;
3170 int sioreg = data->sioreg;
3171 int regval;
3172 3172
3173 /* fan4 and fan5 share some pins with the GPIO and serial flash */ 3173 /* fan4 and fan5 share some pins with the GPIO and serial flash */
3174 if (data->kind == nct6775) { 3174 if (data->kind == nct6775) {
3175 regval = superio_inb(sio_data->sioreg, 0x2c); 3175 regval = superio_inb(sioreg, 0x2c);
3176 3176
3177 fan3pin = regval & (1 << 6); 3177 fan3pin = regval & (1 << 6);
3178 pwm3pin = regval & (1 << 7); 3178 pwm3pin = regval & (1 << 7);
3179 3179
3180 /* On NCT6775, fan4 shares pins with the fdc interface */ 3180 /* On NCT6775, fan4 shares pins with the fdc interface */
3181 fan4pin = !(superio_inb(sio_data->sioreg, 0x2A) & 0x80); 3181 fan4pin = !(superio_inb(sioreg, 0x2A) & 0x80);
3182 fan4min = false; 3182 fan4min = false;
3183 fan5pin = false; 3183 fan5pin = false;
3184 fan6pin = false; 3184 fan6pin = false;
@@ -3186,25 +3186,25 @@ nct6775_check_fan_inputs(const struct nct6775_sio_data *sio_data,
3186 pwm5pin = false; 3186 pwm5pin = false;
3187 pwm6pin = false; 3187 pwm6pin = false;
3188 } else if (data->kind == nct6776) { 3188 } else if (data->kind == nct6776) {
3189 bool gpok = superio_inb(sio_data->sioreg, 0x27) & 0x80; 3189 bool gpok = superio_inb(sioreg, 0x27) & 0x80;
3190 3190
3191 superio_select(sio_data->sioreg, NCT6775_LD_HWM); 3191 superio_select(sioreg, NCT6775_LD_HWM);
3192 regval = superio_inb(sio_data->sioreg, SIO_REG_ENABLE); 3192 regval = superio_inb(sioreg, SIO_REG_ENABLE);
3193 3193
3194 if (regval & 0x80) 3194 if (regval & 0x80)
3195 fan3pin = gpok; 3195 fan3pin = gpok;
3196 else 3196 else
3197 fan3pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x40); 3197 fan3pin = !(superio_inb(sioreg, 0x24) & 0x40);
3198 3198
3199 if (regval & 0x40) 3199 if (regval & 0x40)
3200 fan4pin = gpok; 3200 fan4pin = gpok;
3201 else 3201 else
3202 fan4pin = superio_inb(sio_data->sioreg, 0x1C) & 0x01; 3202 fan4pin = superio_inb(sioreg, 0x1C) & 0x01;
3203 3203
3204 if (regval & 0x20) 3204 if (regval & 0x20)
3205 fan5pin = gpok; 3205 fan5pin = gpok;
3206 else 3206 else
3207 fan5pin = superio_inb(sio_data->sioreg, 0x1C) & 0x02; 3207 fan5pin = superio_inb(sioreg, 0x1C) & 0x02;
3208 3208
3209 fan4min = fan4pin; 3209 fan4min = fan4pin;
3210 fan6pin = false; 3210 fan6pin = false;
@@ -3213,7 +3213,7 @@ nct6775_check_fan_inputs(const struct nct6775_sio_data *sio_data,
3213 pwm5pin = false; 3213 pwm5pin = false;
3214 pwm6pin = false; 3214 pwm6pin = false;
3215 } else if (data->kind == nct6106) { 3215 } else if (data->kind == nct6106) {
3216 regval = superio_inb(sio_data->sioreg, 0x24); 3216 regval = superio_inb(sioreg, 0x24);
3217 fan3pin = !(regval & 0x80); 3217 fan3pin = !(regval & 0x80);
3218 pwm3pin = regval & 0x08; 3218 pwm3pin = regval & 0x08;
3219 3219
@@ -3225,7 +3225,7 @@ nct6775_check_fan_inputs(const struct nct6775_sio_data *sio_data,
3225 pwm5pin = false; 3225 pwm5pin = false;
3226 pwm6pin = false; 3226 pwm6pin = false;
3227 } else { /* NCT6779D or NCT6791D */ 3227 } else { /* NCT6779D or NCT6791D */
3228 regval = superio_inb(sio_data->sioreg, 0x1c); 3228 regval = superio_inb(sioreg, 0x1c);
3229 3229
3230 fan3pin = !(regval & (1 << 5)); 3230 fan3pin = !(regval & (1 << 5));
3231 fan4pin = !(regval & (1 << 6)); 3231 fan4pin = !(regval & (1 << 6));
@@ -3238,7 +3238,7 @@ nct6775_check_fan_inputs(const struct nct6775_sio_data *sio_data,
3238 fan4min = fan4pin; 3238 fan4min = fan4pin;
3239 3239
3240 if (data->kind == nct6791) { 3240 if (data->kind == nct6791) {
3241 regval = superio_inb(sio_data->sioreg, 0x2d); 3241 regval = superio_inb(sioreg, 0x2d);
3242 fan6pin = (regval & (1 << 1)); 3242 fan6pin = (regval & (1 << 1));
3243 pwm6pin = (regval & (1 << 0)); 3243 pwm6pin = (regval & (1 << 0));
3244 } else { /* NCT6779D */ 3244 } else { /* NCT6779D */
@@ -3308,6 +3308,7 @@ static int nct6775_probe(struct platform_device *pdev)
3308 return -ENOMEM; 3308 return -ENOMEM;
3309 3309
3310 data->kind = sio_data->kind; 3310 data->kind = sio_data->kind;
3311 data->sioreg = sio_data->sioreg;
3311 data->addr = res->start; 3312 data->addr = res->start;
3312 mutex_init(&data->update_lock); 3313 mutex_init(&data->update_lock);
3313 data->name = nct6775_device_names[data->kind]; 3314 data->name = nct6775_device_names[data->kind];
@@ -3859,7 +3860,7 @@ static int nct6775_probe(struct platform_device *pdev)
3859 data->name); 3860 data->name);
3860 } 3861 }
3861 3862
3862 nct6775_check_fan_inputs(sio_data, data); 3863 nct6775_check_fan_inputs(data);
3863 3864
3864 superio_exit(sio_data->sioreg); 3865 superio_exit(sio_data->sioreg);
3865 3866
@@ -3930,11 +3931,10 @@ static int nct6775_remove(struct platform_device *pdev)
3930static int nct6775_suspend(struct device *dev) 3931static int nct6775_suspend(struct device *dev)
3931{ 3932{
3932 struct nct6775_data *data = nct6775_update_device(dev); 3933 struct nct6775_data *data = nct6775_update_device(dev);
3933 struct nct6775_sio_data *sio_data = dev->platform_data;
3934 3934
3935 mutex_lock(&data->update_lock); 3935 mutex_lock(&data->update_lock);
3936 data->vbat = nct6775_read_value(data, data->REG_VBAT); 3936 data->vbat = nct6775_read_value(data, data->REG_VBAT);
3937 if (sio_data->kind == nct6775) { 3937 if (data->kind == nct6775) {
3938 data->fandiv1 = nct6775_read_value(data, NCT6775_REG_FANDIV1); 3938 data->fandiv1 = nct6775_read_value(data, NCT6775_REG_FANDIV1);
3939 data->fandiv2 = nct6775_read_value(data, NCT6775_REG_FANDIV2); 3939 data->fandiv2 = nct6775_read_value(data, NCT6775_REG_FANDIV2);
3940 } 3940 }
@@ -3946,7 +3946,6 @@ static int nct6775_suspend(struct device *dev)
3946static int nct6775_resume(struct device *dev) 3946static int nct6775_resume(struct device *dev)
3947{ 3947{
3948 struct nct6775_data *data = dev_get_drvdata(dev); 3948 struct nct6775_data *data = dev_get_drvdata(dev);
3949 struct nct6775_sio_data *sio_data = dev->platform_data;
3950 int i, j; 3949 int i, j;
3951 3950
3952 mutex_lock(&data->update_lock); 3951 mutex_lock(&data->update_lock);
@@ -3983,7 +3982,7 @@ static int nct6775_resume(struct device *dev)
3983 3982
3984 /* Restore other settings */ 3983 /* Restore other settings */
3985 nct6775_write_value(data, data->REG_VBAT, data->vbat); 3984 nct6775_write_value(data, data->REG_VBAT, data->vbat);
3986 if (sio_data->kind == nct6775) { 3985 if (data->kind == nct6775) {
3987 nct6775_write_value(data, NCT6775_REG_FANDIV1, data->fandiv1); 3986 nct6775_write_value(data, NCT6775_REG_FANDIV1, data->fandiv1);
3988 nct6775_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2); 3987 nct6775_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2);
3989 } 3988 }